utils.c 33 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. * Copyright (C) 2015 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  37. * All rights reserved.
  38. *
  39. * Redistribution and use in source and binary forms, with or without
  40. * modification, are permitted provided that the following conditions
  41. * are met:
  42. *
  43. * * Redistributions of source code must retain the above copyright
  44. * notice, this list of conditions and the following disclaimer.
  45. * * Redistributions in binary form must reproduce the above copyright
  46. * notice, this list of conditions and the following disclaimer in
  47. * the documentation and/or other materials provided with the
  48. * distribution.
  49. * * Neither the name Intel Corporation nor the names of its
  50. * contributors may be used to endorse or promote products derived
  51. * from this software without specific prior written permission.
  52. *
  53. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  56. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  57. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  58. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  59. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  60. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  61. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  63. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  64. *
  65. *****************************************************************************/
  66. #include <net/mac80211.h>
  67. #include "iwl-debug.h"
  68. #include "iwl-io.h"
  69. #include "iwl-prph.h"
  70. #include "fw-dbg.h"
  71. #include "mvm.h"
  72. #include "fw-api-rs.h"
  73. /*
  74. * Will return 0 even if the cmd failed when RFKILL is asserted unless
  75. * CMD_WANT_SKB is set in cmd->flags.
  76. */
  77. int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  78. {
  79. int ret;
  80. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  81. if (WARN_ON(mvm->d3_test_active))
  82. return -EIO;
  83. #endif
  84. /*
  85. * Synchronous commands from this op-mode must hold
  86. * the mutex, this ensures we don't try to send two
  87. * (or more) synchronous commands at a time.
  88. */
  89. if (!(cmd->flags & CMD_ASYNC))
  90. lockdep_assert_held(&mvm->mutex);
  91. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  92. /*
  93. * If the caller wants the SKB, then don't hide any problems, the
  94. * caller might access the response buffer which will be NULL if
  95. * the command failed.
  96. */
  97. if (cmd->flags & CMD_WANT_SKB)
  98. return ret;
  99. /* Silently ignore failures if RFKILL is asserted */
  100. if (!ret || ret == -ERFKILL)
  101. return 0;
  102. return ret;
  103. }
  104. int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
  105. u32 flags, u16 len, const void *data)
  106. {
  107. struct iwl_host_cmd cmd = {
  108. .id = id,
  109. .len = { len, },
  110. .data = { data, },
  111. .flags = flags,
  112. };
  113. return iwl_mvm_send_cmd(mvm, &cmd);
  114. }
  115. /*
  116. * We assume that the caller set the status to the success value
  117. */
  118. int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
  119. u32 *status)
  120. {
  121. struct iwl_rx_packet *pkt;
  122. struct iwl_cmd_response *resp;
  123. int ret, resp_len;
  124. lockdep_assert_held(&mvm->mutex);
  125. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  126. if (WARN_ON(mvm->d3_test_active))
  127. return -EIO;
  128. #endif
  129. /*
  130. * Only synchronous commands can wait for status,
  131. * we use WANT_SKB so the caller can't.
  132. */
  133. if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
  134. "cmd flags %x", cmd->flags))
  135. return -EINVAL;
  136. cmd->flags |= CMD_WANT_SKB;
  137. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  138. if (ret == -ERFKILL) {
  139. /*
  140. * The command failed because of RFKILL, don't update
  141. * the status, leave it as success and return 0.
  142. */
  143. return 0;
  144. } else if (ret) {
  145. return ret;
  146. }
  147. pkt = cmd->resp_pkt;
  148. /* Can happen if RFKILL is asserted */
  149. if (!pkt) {
  150. ret = 0;
  151. goto out_free_resp;
  152. }
  153. resp_len = iwl_rx_packet_payload_len(pkt);
  154. if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
  155. ret = -EIO;
  156. goto out_free_resp;
  157. }
  158. resp = (void *)pkt->data;
  159. *status = le32_to_cpu(resp->status);
  160. out_free_resp:
  161. iwl_free_resp(cmd);
  162. return ret;
  163. }
  164. /*
  165. * We assume that the caller set the status to the sucess value
  166. */
  167. int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
  168. const void *data, u32 *status)
  169. {
  170. struct iwl_host_cmd cmd = {
  171. .id = id,
  172. .len = { len, },
  173. .data = { data, },
  174. };
  175. return iwl_mvm_send_cmd_status(mvm, &cmd, status);
  176. }
  177. #define IWL_DECLARE_RATE_INFO(r) \
  178. [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
  179. /*
  180. * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
  181. */
  182. static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
  183. IWL_DECLARE_RATE_INFO(1),
  184. IWL_DECLARE_RATE_INFO(2),
  185. IWL_DECLARE_RATE_INFO(5),
  186. IWL_DECLARE_RATE_INFO(11),
  187. IWL_DECLARE_RATE_INFO(6),
  188. IWL_DECLARE_RATE_INFO(9),
  189. IWL_DECLARE_RATE_INFO(12),
  190. IWL_DECLARE_RATE_INFO(18),
  191. IWL_DECLARE_RATE_INFO(24),
  192. IWL_DECLARE_RATE_INFO(36),
  193. IWL_DECLARE_RATE_INFO(48),
  194. IWL_DECLARE_RATE_INFO(54),
  195. };
  196. int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
  197. enum ieee80211_band band)
  198. {
  199. int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
  200. int idx;
  201. int band_offset = 0;
  202. /* Legacy rate format, search for match in table */
  203. if (band == IEEE80211_BAND_5GHZ)
  204. band_offset = IWL_FIRST_OFDM_RATE;
  205. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  206. if (fw_rate_idx_to_plcp[idx] == rate)
  207. return idx - band_offset;
  208. return -1;
  209. }
  210. u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
  211. {
  212. /* Get PLCP rate for tx_cmd->rate_n_flags */
  213. return fw_rate_idx_to_plcp[rate_idx];
  214. }
  215. void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
  216. {
  217. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  218. struct iwl_error_resp *err_resp = (void *)pkt->data;
  219. IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
  220. le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
  221. IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
  222. le16_to_cpu(err_resp->bad_cmd_seq_num),
  223. le32_to_cpu(err_resp->error_service));
  224. IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
  225. le64_to_cpu(err_resp->timestamp));
  226. }
  227. /*
  228. * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
  229. * The parameter should also be a combination of ANT_[ABC].
  230. */
  231. u8 first_antenna(u8 mask)
  232. {
  233. BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
  234. if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
  235. return BIT(0);
  236. return BIT(ffs(mask) - 1);
  237. }
  238. /*
  239. * Toggles between TX antennas to send the probe request on.
  240. * Receives the bitmask of valid TX antennas and the *index* used
  241. * for the last TX, and returns the next valid *index* to use.
  242. * In order to set it in the tx_cmd, must do BIT(idx).
  243. */
  244. u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
  245. {
  246. u8 ind = last_idx;
  247. int i;
  248. for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
  249. ind = (ind + 1) % RATE_MCS_ANT_NUM;
  250. if (valid & BIT(ind))
  251. return ind;
  252. }
  253. WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
  254. return last_idx;
  255. }
  256. static const struct {
  257. const char *name;
  258. u8 num;
  259. } advanced_lookup[] = {
  260. { "NMI_INTERRUPT_WDG", 0x34 },
  261. { "SYSASSERT", 0x35 },
  262. { "UCODE_VERSION_MISMATCH", 0x37 },
  263. { "BAD_COMMAND", 0x38 },
  264. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  265. { "FATAL_ERROR", 0x3D },
  266. { "NMI_TRM_HW_ERR", 0x46 },
  267. { "NMI_INTERRUPT_TRM", 0x4C },
  268. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  269. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  270. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  271. { "NMI_INTERRUPT_HOST", 0x66 },
  272. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  273. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  274. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  275. { "ADVANCED_SYSASSERT", 0 },
  276. };
  277. static const char *desc_lookup(u32 num)
  278. {
  279. int i;
  280. for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
  281. if (advanced_lookup[i].num == num)
  282. return advanced_lookup[i].name;
  283. /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
  284. return advanced_lookup[i].name;
  285. }
  286. /*
  287. * Note: This structure is read from the device with IO accesses,
  288. * and the reading already does the endian conversion. As it is
  289. * read with u32-sized accesses, any members with a different size
  290. * need to be ordered correctly though!
  291. */
  292. struct iwl_error_event_table_v1 {
  293. u32 valid; /* (nonzero) valid, (0) log is empty */
  294. u32 error_id; /* type of error */
  295. u32 pc; /* program counter */
  296. u32 blink1; /* branch link */
  297. u32 blink2; /* branch link */
  298. u32 ilink1; /* interrupt link */
  299. u32 ilink2; /* interrupt link */
  300. u32 data1; /* error-specific data */
  301. u32 data2; /* error-specific data */
  302. u32 data3; /* error-specific data */
  303. u32 bcon_time; /* beacon timer */
  304. u32 tsf_low; /* network timestamp function timer */
  305. u32 tsf_hi; /* network timestamp function timer */
  306. u32 gp1; /* GP1 timer register */
  307. u32 gp2; /* GP2 timer register */
  308. u32 gp3; /* GP3 timer register */
  309. u32 ucode_ver; /* uCode version */
  310. u32 hw_ver; /* HW Silicon version */
  311. u32 brd_ver; /* HW board version */
  312. u32 log_pc; /* log program counter */
  313. u32 frame_ptr; /* frame pointer */
  314. u32 stack_ptr; /* stack pointer */
  315. u32 hcmd; /* last host command header */
  316. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  317. * rxtx_flag */
  318. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  319. * host_flag */
  320. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  321. * enc_flag */
  322. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  323. * time_flag */
  324. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  325. * wico interrupt */
  326. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  327. u32 wait_event; /* wait event() caller address */
  328. u32 l2p_control; /* L2pControlField */
  329. u32 l2p_duration; /* L2pDurationField */
  330. u32 l2p_mhvalid; /* L2pMhValidBits */
  331. u32 l2p_addr_match; /* L2pAddrMatchStat */
  332. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  333. * (LMPM_PMG_SEL) */
  334. u32 u_timestamp; /* indicate when the date and time of the
  335. * compilation */
  336. u32 flow_handler; /* FH read/write pointers, RX credit */
  337. } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
  338. struct iwl_error_event_table {
  339. u32 valid; /* (nonzero) valid, (0) log is empty */
  340. u32 error_id; /* type of error */
  341. u32 trm_hw_status0; /* TRM HW status */
  342. u32 trm_hw_status1; /* TRM HW status */
  343. u32 blink2; /* branch link */
  344. u32 ilink1; /* interrupt link */
  345. u32 ilink2; /* interrupt link */
  346. u32 data1; /* error-specific data */
  347. u32 data2; /* error-specific data */
  348. u32 data3; /* error-specific data */
  349. u32 bcon_time; /* beacon timer */
  350. u32 tsf_low; /* network timestamp function timer */
  351. u32 tsf_hi; /* network timestamp function timer */
  352. u32 gp1; /* GP1 timer register */
  353. u32 gp2; /* GP2 timer register */
  354. u32 fw_rev_type; /* firmware revision type */
  355. u32 major; /* uCode version major */
  356. u32 minor; /* uCode version minor */
  357. u32 hw_ver; /* HW Silicon version */
  358. u32 brd_ver; /* HW board version */
  359. u32 log_pc; /* log program counter */
  360. u32 frame_ptr; /* frame pointer */
  361. u32 stack_ptr; /* stack pointer */
  362. u32 hcmd; /* last host command header */
  363. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  364. * rxtx_flag */
  365. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  366. * host_flag */
  367. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  368. * enc_flag */
  369. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  370. * time_flag */
  371. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  372. * wico interrupt */
  373. u32 last_cmd_id; /* last HCMD id handled by the firmware */
  374. u32 wait_event; /* wait event() caller address */
  375. u32 l2p_control; /* L2pControlField */
  376. u32 l2p_duration; /* L2pDurationField */
  377. u32 l2p_mhvalid; /* L2pMhValidBits */
  378. u32 l2p_addr_match; /* L2pAddrMatchStat */
  379. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  380. * (LMPM_PMG_SEL) */
  381. u32 u_timestamp; /* indicate when the date and time of the
  382. * compilation */
  383. u32 flow_handler; /* FH read/write pointers, RX credit */
  384. } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
  385. /*
  386. * UMAC error struct - relevant starting from family 8000 chip.
  387. * Note: This structure is read from the device with IO accesses,
  388. * and the reading already does the endian conversion. As it is
  389. * read with u32-sized accesses, any members with a different size
  390. * need to be ordered correctly though!
  391. */
  392. struct iwl_umac_error_event_table {
  393. u32 valid; /* (nonzero) valid, (0) log is empty */
  394. u32 error_id; /* type of error */
  395. u32 blink1; /* branch link */
  396. u32 blink2; /* branch link */
  397. u32 ilink1; /* interrupt link */
  398. u32 ilink2; /* interrupt link */
  399. u32 data1; /* error-specific data */
  400. u32 data2; /* error-specific data */
  401. u32 data3; /* error-specific data */
  402. u32 umac_major;
  403. u32 umac_minor;
  404. u32 frame_pointer; /* core register 27*/
  405. u32 stack_pointer; /* core register 28 */
  406. u32 cmd_header; /* latest host cmd sent to UMAC */
  407. u32 nic_isr_pref; /* ISR status register */
  408. } __packed;
  409. #define ERROR_START_OFFSET (1 * sizeof(u32))
  410. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  411. static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
  412. {
  413. struct iwl_trans *trans = mvm->trans;
  414. struct iwl_umac_error_event_table table;
  415. u32 base;
  416. base = mvm->umac_error_event_table;
  417. if (base < 0x800000) {
  418. IWL_ERR(mvm,
  419. "Not valid error log pointer 0x%08X for %s uCode\n",
  420. base,
  421. (mvm->cur_ucode == IWL_UCODE_INIT)
  422. ? "Init" : "RT");
  423. return;
  424. }
  425. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  426. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  427. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  428. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  429. mvm->status, table.valid);
  430. }
  431. IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
  432. desc_lookup(table.error_id));
  433. IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
  434. IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
  435. IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
  436. IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
  437. IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
  438. IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
  439. IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
  440. IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
  441. IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
  442. IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
  443. IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
  444. IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
  445. IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
  446. }
  447. static void iwl_mvm_dump_nic_error_log_old(struct iwl_mvm *mvm)
  448. {
  449. struct iwl_trans *trans = mvm->trans;
  450. struct iwl_error_event_table_v1 table;
  451. u32 base;
  452. base = mvm->error_event_table;
  453. if (mvm->cur_ucode == IWL_UCODE_INIT) {
  454. if (!base)
  455. base = mvm->fw->init_errlog_ptr;
  456. } else {
  457. if (!base)
  458. base = mvm->fw->inst_errlog_ptr;
  459. }
  460. if (base < 0x800000) {
  461. IWL_ERR(mvm,
  462. "Not valid error log pointer 0x%08X for %s uCode\n",
  463. base,
  464. (mvm->cur_ucode == IWL_UCODE_INIT)
  465. ? "Init" : "RT");
  466. return;
  467. }
  468. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  469. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  470. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  471. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  472. mvm->status, table.valid);
  473. }
  474. /* Do not change this output - scripts rely on it */
  475. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  476. trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
  477. table.data1, table.data2, table.data3,
  478. table.blink2, table.ilink1, table.ilink2,
  479. table.bcon_time, table.gp1, table.gp2,
  480. table.gp3, table.ucode_ver, 0,
  481. table.hw_ver, table.brd_ver);
  482. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  483. desc_lookup(table.error_id));
  484. IWL_ERR(mvm, "0x%08X | uPc\n", table.pc);
  485. IWL_ERR(mvm, "0x%08X | branchlink1\n", table.blink1);
  486. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  487. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  488. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  489. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  490. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  491. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  492. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  493. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  494. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  495. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  496. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  497. IWL_ERR(mvm, "0x%08X | time gp3\n", table.gp3);
  498. IWL_ERR(mvm, "0x%08X | uCode version\n", table.ucode_ver);
  499. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  500. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  501. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  502. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  503. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  504. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  505. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  506. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  507. IWL_ERR(mvm, "0x%08X | isr_pref\n", table.isr_pref);
  508. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  509. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  510. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  511. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  512. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  513. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  514. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  515. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  516. if (mvm->support_umac_log)
  517. iwl_mvm_dump_umac_error_log(mvm);
  518. }
  519. void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
  520. {
  521. struct iwl_trans *trans = mvm->trans;
  522. struct iwl_error_event_table table;
  523. u32 base;
  524. if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_NEW_VERSION)) {
  525. iwl_mvm_dump_nic_error_log_old(mvm);
  526. return;
  527. }
  528. base = mvm->error_event_table;
  529. if (mvm->cur_ucode == IWL_UCODE_INIT) {
  530. if (!base)
  531. base = mvm->fw->init_errlog_ptr;
  532. } else {
  533. if (!base)
  534. base = mvm->fw->inst_errlog_ptr;
  535. }
  536. if (base < 0x800000) {
  537. IWL_ERR(mvm,
  538. "Not valid error log pointer 0x%08X for %s uCode\n",
  539. base,
  540. (mvm->cur_ucode == IWL_UCODE_INIT)
  541. ? "Init" : "RT");
  542. return;
  543. }
  544. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  545. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  546. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  547. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  548. mvm->status, table.valid);
  549. }
  550. /* Do not change this output - scripts rely on it */
  551. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  552. trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
  553. table.data1, table.data2, table.data3,
  554. table.blink2, table.ilink1,
  555. table.ilink2, table.bcon_time, table.gp1,
  556. table.gp2, table.fw_rev_type, table.major,
  557. table.minor, table.hw_ver, table.brd_ver);
  558. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  559. desc_lookup(table.error_id));
  560. IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
  561. IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
  562. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  563. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  564. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  565. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  566. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  567. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  568. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  569. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  570. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  571. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  572. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  573. IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
  574. IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
  575. IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
  576. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  577. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  578. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  579. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  580. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  581. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  582. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  583. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  584. IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
  585. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  586. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  587. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  588. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  589. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  590. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  591. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  592. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  593. if (mvm->support_umac_log)
  594. iwl_mvm_dump_umac_error_log(mvm);
  595. }
  596. int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 minq, u8 maxq)
  597. {
  598. int i;
  599. lockdep_assert_held(&mvm->queue_info_lock);
  600. for (i = minq; i <= maxq; i++)
  601. if (mvm->queue_info[i].hw_queue_refcount == 0 &&
  602. !mvm->queue_info[i].setup_reserved)
  603. return i;
  604. return -ENOSPC;
  605. }
  606. void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  607. u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
  608. unsigned int wdg_timeout)
  609. {
  610. bool enable_queue = true;
  611. spin_lock_bh(&mvm->queue_info_lock);
  612. /* Make sure this TID isn't already enabled */
  613. if (mvm->queue_info[queue].tid_bitmap & BIT(cfg->tid)) {
  614. spin_unlock_bh(&mvm->queue_info_lock);
  615. IWL_ERR(mvm, "Trying to enable TXQ with existing TID %d\n",
  616. cfg->tid);
  617. return;
  618. }
  619. /* Update mappings and refcounts */
  620. mvm->queue_info[queue].hw_queue_to_mac80211 |= BIT(mac80211_queue);
  621. mvm->queue_info[queue].hw_queue_refcount++;
  622. if (mvm->queue_info[queue].hw_queue_refcount > 1)
  623. enable_queue = false;
  624. mvm->queue_info[queue].tid_bitmap |= BIT(cfg->tid);
  625. IWL_DEBUG_TX_QUEUES(mvm,
  626. "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  627. queue, mvm->queue_info[queue].hw_queue_refcount,
  628. mvm->queue_info[queue].hw_queue_to_mac80211);
  629. spin_unlock_bh(&mvm->queue_info_lock);
  630. /* Send the enabling command if we need to */
  631. if (enable_queue) {
  632. struct iwl_scd_txq_cfg_cmd cmd = {
  633. .scd_queue = queue,
  634. .enable = 1,
  635. .window = cfg->frame_limit,
  636. .sta_id = cfg->sta_id,
  637. .ssn = cpu_to_le16(ssn),
  638. .tx_fifo = cfg->fifo,
  639. .aggregate = cfg->aggregate,
  640. .tid = cfg->tid,
  641. };
  642. iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL,
  643. wdg_timeout);
  644. WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd),
  645. &cmd),
  646. "Failed to configure queue %d on FIFO %d\n", queue,
  647. cfg->fifo);
  648. }
  649. }
  650. void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  651. u8 tid, u8 flags)
  652. {
  653. struct iwl_scd_txq_cfg_cmd cmd = {
  654. .scd_queue = queue,
  655. .enable = 0,
  656. };
  657. bool remove_mac_queue = true;
  658. int ret;
  659. spin_lock_bh(&mvm->queue_info_lock);
  660. if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
  661. spin_unlock_bh(&mvm->queue_info_lock);
  662. return;
  663. }
  664. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  665. /*
  666. * If there is another TID with the same AC - don't remove the MAC queue
  667. * from the mapping
  668. */
  669. if (tid < IWL_MAX_TID_COUNT) {
  670. unsigned long tid_bitmap =
  671. mvm->queue_info[queue].tid_bitmap;
  672. int ac = tid_to_mac80211_ac[tid];
  673. int i;
  674. for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
  675. if (tid_to_mac80211_ac[i] == ac)
  676. remove_mac_queue = false;
  677. }
  678. }
  679. if (remove_mac_queue)
  680. mvm->queue_info[queue].hw_queue_to_mac80211 &=
  681. ~BIT(mac80211_queue);
  682. mvm->queue_info[queue].hw_queue_refcount--;
  683. cmd.enable = mvm->queue_info[queue].hw_queue_refcount ? 1 : 0;
  684. IWL_DEBUG_TX_QUEUES(mvm,
  685. "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  686. queue,
  687. mvm->queue_info[queue].hw_queue_refcount,
  688. mvm->queue_info[queue].hw_queue_to_mac80211);
  689. /* If the queue is still enabled - nothing left to do in this func */
  690. if (cmd.enable) {
  691. spin_unlock_bh(&mvm->queue_info_lock);
  692. return;
  693. }
  694. /* Make sure queue info is correct even though we overwrite it */
  695. WARN(mvm->queue_info[queue].hw_queue_refcount ||
  696. mvm->queue_info[queue].tid_bitmap ||
  697. mvm->queue_info[queue].hw_queue_to_mac80211,
  698. "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
  699. queue, mvm->queue_info[queue].hw_queue_refcount,
  700. mvm->queue_info[queue].hw_queue_to_mac80211,
  701. mvm->queue_info[queue].tid_bitmap);
  702. /* If we are here - the queue is freed and we can zero out these vals */
  703. mvm->queue_info[queue].hw_queue_refcount = 0;
  704. mvm->queue_info[queue].tid_bitmap = 0;
  705. mvm->queue_info[queue].hw_queue_to_mac80211 = 0;
  706. spin_unlock_bh(&mvm->queue_info_lock);
  707. iwl_trans_txq_disable(mvm->trans, queue, false);
  708. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
  709. sizeof(cmd), &cmd);
  710. if (ret)
  711. IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
  712. queue, ret);
  713. }
  714. /**
  715. * iwl_mvm_send_lq_cmd() - Send link quality command
  716. * @init: This command is sent as part of station initialization right
  717. * after station has been added.
  718. *
  719. * The link quality command is sent as the last step of station creation.
  720. * This is the special case in which init is set and we call a callback in
  721. * this case to clear the state indicating that station creation is in
  722. * progress.
  723. */
  724. int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
  725. {
  726. struct iwl_host_cmd cmd = {
  727. .id = LQ_CMD,
  728. .len = { sizeof(struct iwl_lq_cmd), },
  729. .flags = init ? 0 : CMD_ASYNC,
  730. .data = { lq, },
  731. };
  732. if (WARN_ON(lq->sta_id == IWL_MVM_STATION_COUNT))
  733. return -EINVAL;
  734. return iwl_mvm_send_cmd(mvm, &cmd);
  735. }
  736. /**
  737. * iwl_mvm_update_smps - Get a request to change the SMPS mode
  738. * @req_type: The part of the driver who call for a change.
  739. * @smps_requests: The request to change the SMPS mode.
  740. *
  741. * Get a requst to change the SMPS mode,
  742. * and change it according to all other requests in the driver.
  743. */
  744. void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  745. enum iwl_mvm_smps_type_request req_type,
  746. enum ieee80211_smps_mode smps_request)
  747. {
  748. struct iwl_mvm_vif *mvmvif;
  749. enum ieee80211_smps_mode smps_mode;
  750. int i;
  751. lockdep_assert_held(&mvm->mutex);
  752. /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
  753. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  754. return;
  755. if (vif->type == NL80211_IFTYPE_AP)
  756. smps_mode = IEEE80211_SMPS_OFF;
  757. else
  758. smps_mode = IEEE80211_SMPS_AUTOMATIC;
  759. mvmvif = iwl_mvm_vif_from_mac80211(vif);
  760. mvmvif->smps_requests[req_type] = smps_request;
  761. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  762. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
  763. smps_mode = IEEE80211_SMPS_STATIC;
  764. break;
  765. }
  766. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  767. smps_mode = IEEE80211_SMPS_DYNAMIC;
  768. }
  769. ieee80211_request_smps(vif, smps_mode);
  770. }
  771. int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
  772. {
  773. struct iwl_statistics_cmd scmd = {
  774. .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
  775. };
  776. struct iwl_host_cmd cmd = {
  777. .id = STATISTICS_CMD,
  778. .len[0] = sizeof(scmd),
  779. .data[0] = &scmd,
  780. .flags = CMD_WANT_SKB,
  781. };
  782. int ret;
  783. ret = iwl_mvm_send_cmd(mvm, &cmd);
  784. if (ret)
  785. return ret;
  786. iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
  787. iwl_free_resp(&cmd);
  788. if (clear)
  789. iwl_mvm_accu_radio_stats(mvm);
  790. return 0;
  791. }
  792. void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
  793. {
  794. mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
  795. mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
  796. mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
  797. mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
  798. }
  799. static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
  800. struct ieee80211_vif *vif)
  801. {
  802. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  803. bool *result = _data;
  804. int i;
  805. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  806. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
  807. mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  808. *result = false;
  809. }
  810. }
  811. bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
  812. {
  813. bool result = true;
  814. lockdep_assert_held(&mvm->mutex);
  815. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  816. return false;
  817. if (mvm->cfg->rx_with_siso_diversity)
  818. return false;
  819. ieee80211_iterate_active_interfaces_atomic(
  820. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  821. iwl_mvm_diversity_iter, &result);
  822. return result;
  823. }
  824. int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  825. bool prev)
  826. {
  827. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  828. int res;
  829. lockdep_assert_held(&mvm->mutex);
  830. if (iwl_mvm_vif_low_latency(mvmvif) == prev)
  831. return 0;
  832. res = iwl_mvm_update_quotas(mvm, false, NULL);
  833. if (res)
  834. return res;
  835. iwl_mvm_bt_coex_vif_change(mvm);
  836. return iwl_mvm_power_update_mac(mvm);
  837. }
  838. static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  839. {
  840. bool *result = _data;
  841. if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
  842. *result = true;
  843. }
  844. bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
  845. {
  846. bool result = false;
  847. ieee80211_iterate_active_interfaces_atomic(
  848. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  849. iwl_mvm_ll_iter, &result);
  850. return result;
  851. }
  852. struct iwl_bss_iter_data {
  853. struct ieee80211_vif *vif;
  854. bool error;
  855. };
  856. static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
  857. struct ieee80211_vif *vif)
  858. {
  859. struct iwl_bss_iter_data *data = _data;
  860. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  861. return;
  862. if (data->vif) {
  863. data->error = true;
  864. return;
  865. }
  866. data->vif = vif;
  867. }
  868. struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
  869. {
  870. struct iwl_bss_iter_data bss_iter_data = {};
  871. ieee80211_iterate_active_interfaces_atomic(
  872. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  873. iwl_mvm_bss_iface_iterator, &bss_iter_data);
  874. if (bss_iter_data.error) {
  875. IWL_ERR(mvm, "More than one managed interface active!\n");
  876. return ERR_PTR(-EINVAL);
  877. }
  878. return bss_iter_data.vif;
  879. }
  880. unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
  881. struct ieee80211_vif *vif,
  882. bool tdls, bool cmd_q)
  883. {
  884. struct iwl_fw_dbg_trigger_tlv *trigger;
  885. struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
  886. unsigned int default_timeout =
  887. cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
  888. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS))
  889. return iwlmvm_mod_params.tfd_q_hang_detect ?
  890. default_timeout : IWL_WATCHDOG_DISABLED;
  891. trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
  892. txq_timer = (void *)trigger->data;
  893. if (tdls)
  894. return le32_to_cpu(txq_timer->tdls);
  895. if (cmd_q)
  896. return le32_to_cpu(txq_timer->command_queue);
  897. if (WARN_ON(!vif))
  898. return default_timeout;
  899. switch (ieee80211_vif_type_p2p(vif)) {
  900. case NL80211_IFTYPE_ADHOC:
  901. return le32_to_cpu(txq_timer->ibss);
  902. case NL80211_IFTYPE_STATION:
  903. return le32_to_cpu(txq_timer->bss);
  904. case NL80211_IFTYPE_AP:
  905. return le32_to_cpu(txq_timer->softap);
  906. case NL80211_IFTYPE_P2P_CLIENT:
  907. return le32_to_cpu(txq_timer->p2p_client);
  908. case NL80211_IFTYPE_P2P_GO:
  909. return le32_to_cpu(txq_timer->p2p_go);
  910. case NL80211_IFTYPE_P2P_DEVICE:
  911. return le32_to_cpu(txq_timer->p2p_device);
  912. default:
  913. WARN_ON(1);
  914. return mvm->cfg->base_params->wd_timeout;
  915. }
  916. }
  917. void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  918. const char *errmsg)
  919. {
  920. struct iwl_fw_dbg_trigger_tlv *trig;
  921. struct iwl_fw_dbg_trigger_mlme *trig_mlme;
  922. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
  923. goto out;
  924. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
  925. trig_mlme = (void *)trig->data;
  926. if (!iwl_fw_dbg_trigger_check_stop(mvm, vif, trig))
  927. goto out;
  928. if (trig_mlme->stop_connection_loss &&
  929. --trig_mlme->stop_connection_loss)
  930. goto out;
  931. iwl_mvm_fw_dbg_collect_trig(mvm, trig, "%s", errmsg);
  932. out:
  933. ieee80211_connection_loss(vif);
  934. }