htt_rx.c 59 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include "mac.h"
  24. #include <linux/log2.h>
  25. #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
  26. #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
  27. /* when under memory pressure rx ring refill may fail and needs a retry */
  28. #define HTT_RX_RING_REFILL_RETRY_MS 50
  29. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  30. static void ath10k_htt_txrx_compl_task(unsigned long ptr);
  31. static struct sk_buff *
  32. ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
  33. {
  34. struct ath10k_skb_rxcb *rxcb;
  35. hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
  36. if (rxcb->paddr == paddr)
  37. return ATH10K_RXCB_SKB(rxcb);
  38. WARN_ON_ONCE(1);
  39. return NULL;
  40. }
  41. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  42. {
  43. struct sk_buff *skb;
  44. struct ath10k_skb_rxcb *rxcb;
  45. struct hlist_node *n;
  46. int i;
  47. if (htt->rx_ring.in_ord_rx) {
  48. hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
  49. skb = ATH10K_RXCB_SKB(rxcb);
  50. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  51. skb->len + skb_tailroom(skb),
  52. DMA_FROM_DEVICE);
  53. hash_del(&rxcb->hlist);
  54. dev_kfree_skb_any(skb);
  55. }
  56. } else {
  57. for (i = 0; i < htt->rx_ring.size; i++) {
  58. skb = htt->rx_ring.netbufs_ring[i];
  59. if (!skb)
  60. continue;
  61. rxcb = ATH10K_SKB_RXCB(skb);
  62. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  63. skb->len + skb_tailroom(skb),
  64. DMA_FROM_DEVICE);
  65. dev_kfree_skb_any(skb);
  66. }
  67. }
  68. htt->rx_ring.fill_cnt = 0;
  69. hash_init(htt->rx_ring.skb_table);
  70. memset(htt->rx_ring.netbufs_ring, 0,
  71. htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
  72. }
  73. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  74. {
  75. struct htt_rx_desc *rx_desc;
  76. struct ath10k_skb_rxcb *rxcb;
  77. struct sk_buff *skb;
  78. dma_addr_t paddr;
  79. int ret = 0, idx;
  80. /* The Full Rx Reorder firmware has no way of telling the host
  81. * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
  82. * To keep things simple make sure ring is always half empty. This
  83. * guarantees there'll be no replenishment overruns possible.
  84. */
  85. BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
  86. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  87. while (num > 0) {
  88. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  89. if (!skb) {
  90. ret = -ENOMEM;
  91. goto fail;
  92. }
  93. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  94. skb_pull(skb,
  95. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  96. skb->data);
  97. /* Clear rx_desc attention word before posting to Rx ring */
  98. rx_desc = (struct htt_rx_desc *)skb->data;
  99. rx_desc->attention.flags = __cpu_to_le32(0);
  100. paddr = dma_map_single(htt->ar->dev, skb->data,
  101. skb->len + skb_tailroom(skb),
  102. DMA_FROM_DEVICE);
  103. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  104. dev_kfree_skb_any(skb);
  105. ret = -ENOMEM;
  106. goto fail;
  107. }
  108. rxcb = ATH10K_SKB_RXCB(skb);
  109. rxcb->paddr = paddr;
  110. htt->rx_ring.netbufs_ring[idx] = skb;
  111. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  112. htt->rx_ring.fill_cnt++;
  113. if (htt->rx_ring.in_ord_rx) {
  114. hash_add(htt->rx_ring.skb_table,
  115. &ATH10K_SKB_RXCB(skb)->hlist,
  116. (u32)paddr);
  117. }
  118. num--;
  119. idx++;
  120. idx &= htt->rx_ring.size_mask;
  121. }
  122. fail:
  123. /*
  124. * Make sure the rx buffer is updated before available buffer
  125. * index to avoid any potential rx ring corruption.
  126. */
  127. mb();
  128. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  129. return ret;
  130. }
  131. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  132. {
  133. lockdep_assert_held(&htt->rx_ring.lock);
  134. return __ath10k_htt_rx_ring_fill_n(htt, num);
  135. }
  136. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  137. {
  138. int ret, num_deficit, num_to_fill;
  139. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  140. * reason is RX may take up significant amount of CPU cycles and starve
  141. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  142. * with ath10k wlan interface. This ended up with very poor performance
  143. * once CPU the host system was overwhelmed with RX on ath10k.
  144. *
  145. * By limiting the number of refills the replenishing occurs
  146. * progressively. This in turns makes use of the fact tasklets are
  147. * processed in FIFO order. This means actual RX processing can starve
  148. * out refilling. If there's not enough buffers on RX ring FW will not
  149. * report RX until it is refilled with enough buffers. This
  150. * automatically balances load wrt to CPU power.
  151. *
  152. * This probably comes at a cost of lower maximum throughput but
  153. * improves the average and stability. */
  154. spin_lock_bh(&htt->rx_ring.lock);
  155. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  156. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  157. num_deficit -= num_to_fill;
  158. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  159. if (ret == -ENOMEM) {
  160. /*
  161. * Failed to fill it to the desired level -
  162. * we'll start a timer and try again next time.
  163. * As long as enough buffers are left in the ring for
  164. * another A-MPDU rx, no special recovery is needed.
  165. */
  166. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  167. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  168. } else if (num_deficit > 0) {
  169. tasklet_schedule(&htt->rx_replenish_task);
  170. }
  171. spin_unlock_bh(&htt->rx_ring.lock);
  172. }
  173. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  174. {
  175. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  176. ath10k_htt_rx_msdu_buff_replenish(htt);
  177. }
  178. int ath10k_htt_rx_ring_refill(struct ath10k *ar)
  179. {
  180. struct ath10k_htt *htt = &ar->htt;
  181. int ret;
  182. spin_lock_bh(&htt->rx_ring.lock);
  183. ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
  184. htt->rx_ring.fill_cnt));
  185. spin_unlock_bh(&htt->rx_ring.lock);
  186. if (ret)
  187. ath10k_htt_rx_ring_free(htt);
  188. return ret;
  189. }
  190. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  191. {
  192. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  193. tasklet_kill(&htt->rx_replenish_task);
  194. tasklet_kill(&htt->txrx_compl_task);
  195. skb_queue_purge(&htt->tx_compl_q);
  196. skb_queue_purge(&htt->rx_compl_q);
  197. skb_queue_purge(&htt->rx_in_ord_compl_q);
  198. ath10k_htt_rx_ring_free(htt);
  199. dma_free_coherent(htt->ar->dev,
  200. (htt->rx_ring.size *
  201. sizeof(htt->rx_ring.paddrs_ring)),
  202. htt->rx_ring.paddrs_ring,
  203. htt->rx_ring.base_paddr);
  204. dma_free_coherent(htt->ar->dev,
  205. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  206. htt->rx_ring.alloc_idx.vaddr,
  207. htt->rx_ring.alloc_idx.paddr);
  208. kfree(htt->rx_ring.netbufs_ring);
  209. }
  210. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  211. {
  212. struct ath10k *ar = htt->ar;
  213. int idx;
  214. struct sk_buff *msdu;
  215. lockdep_assert_held(&htt->rx_ring.lock);
  216. if (htt->rx_ring.fill_cnt == 0) {
  217. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  218. return NULL;
  219. }
  220. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  221. msdu = htt->rx_ring.netbufs_ring[idx];
  222. htt->rx_ring.netbufs_ring[idx] = NULL;
  223. htt->rx_ring.paddrs_ring[idx] = 0;
  224. idx++;
  225. idx &= htt->rx_ring.size_mask;
  226. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  227. htt->rx_ring.fill_cnt--;
  228. dma_unmap_single(htt->ar->dev,
  229. ATH10K_SKB_RXCB(msdu)->paddr,
  230. msdu->len + skb_tailroom(msdu),
  231. DMA_FROM_DEVICE);
  232. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  233. msdu->data, msdu->len + skb_tailroom(msdu));
  234. return msdu;
  235. }
  236. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  237. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  238. u8 **fw_desc, int *fw_desc_len,
  239. struct sk_buff_head *amsdu)
  240. {
  241. struct ath10k *ar = htt->ar;
  242. int msdu_len, msdu_chaining = 0;
  243. struct sk_buff *msdu;
  244. struct htt_rx_desc *rx_desc;
  245. lockdep_assert_held(&htt->rx_ring.lock);
  246. for (;;) {
  247. int last_msdu, msdu_len_invalid, msdu_chained;
  248. msdu = ath10k_htt_rx_netbuf_pop(htt);
  249. if (!msdu) {
  250. __skb_queue_purge(amsdu);
  251. return -ENOENT;
  252. }
  253. __skb_queue_tail(amsdu, msdu);
  254. rx_desc = (struct htt_rx_desc *)msdu->data;
  255. /* FIXME: we must report msdu payload since this is what caller
  256. * expects now */
  257. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  258. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  259. /*
  260. * Sanity check - confirm the HW is finished filling in the
  261. * rx data.
  262. * If the HW and SW are working correctly, then it's guaranteed
  263. * that the HW's MAC DMA is done before this point in the SW.
  264. * To prevent the case that we handle a stale Rx descriptor,
  265. * just assert for now until we have a way to recover.
  266. */
  267. if (!(__le32_to_cpu(rx_desc->attention.flags)
  268. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  269. __skb_queue_purge(amsdu);
  270. return -EIO;
  271. }
  272. /*
  273. * Copy the FW rx descriptor for this MSDU from the rx
  274. * indication message into the MSDU's netbuf. HL uses the
  275. * same rx indication message definition as LL, and simply
  276. * appends new info (fields from the HW rx desc, and the
  277. * MSDU payload itself). So, the offset into the rx
  278. * indication message only has to account for the standard
  279. * offset of the per-MSDU FW rx desc info within the
  280. * message, and how many bytes of the per-MSDU FW rx desc
  281. * info have already been consumed. (And the endianness of
  282. * the host, since for a big-endian host, the rx ind
  283. * message contents, including the per-MSDU rx desc bytes,
  284. * were byteswapped during upload.)
  285. */
  286. if (*fw_desc_len > 0) {
  287. rx_desc->fw_desc.info0 = **fw_desc;
  288. /*
  289. * The target is expected to only provide the basic
  290. * per-MSDU rx descriptors. Just to be sure, verify
  291. * that the target has not attached extension data
  292. * (e.g. LRO flow ID).
  293. */
  294. /* or more, if there's extension data */
  295. (*fw_desc)++;
  296. (*fw_desc_len)--;
  297. } else {
  298. /*
  299. * When an oversized AMSDU happened, FW will lost
  300. * some of MSDU status - in this case, the FW
  301. * descriptors provided will be less than the
  302. * actual MSDUs inside this MPDU. Mark the FW
  303. * descriptors so that it will still deliver to
  304. * upper stack, if no CRC error for this MPDU.
  305. *
  306. * FIX THIS - the FW descriptors are actually for
  307. * MSDUs in the end of this A-MSDU instead of the
  308. * beginning.
  309. */
  310. rx_desc->fw_desc.info0 = 0;
  311. }
  312. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  313. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  314. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  315. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
  316. RX_MSDU_START_INFO0_MSDU_LENGTH);
  317. msdu_chained = rx_desc->frag_info.ring2_more_count;
  318. if (msdu_len_invalid)
  319. msdu_len = 0;
  320. skb_trim(msdu, 0);
  321. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  322. msdu_len -= msdu->len;
  323. /* Note: Chained buffers do not contain rx descriptor */
  324. while (msdu_chained--) {
  325. msdu = ath10k_htt_rx_netbuf_pop(htt);
  326. if (!msdu) {
  327. __skb_queue_purge(amsdu);
  328. return -ENOENT;
  329. }
  330. __skb_queue_tail(amsdu, msdu);
  331. skb_trim(msdu, 0);
  332. skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
  333. msdu_len -= msdu->len;
  334. msdu_chaining = 1;
  335. }
  336. last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
  337. RX_MSDU_END_INFO0_LAST_MSDU;
  338. trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
  339. sizeof(*rx_desc) - sizeof(u32));
  340. if (last_msdu)
  341. break;
  342. }
  343. if (skb_queue_empty(amsdu))
  344. msdu_chaining = -1;
  345. /*
  346. * Don't refill the ring yet.
  347. *
  348. * First, the elements popped here are still in use - it is not
  349. * safe to overwrite them until the matching call to
  350. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  351. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  352. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  353. * (something like 3 buffers). Consequently, we'll rely on the txrx
  354. * SW to tell us when it is done pulling all the PPDU's rx buffers
  355. * out of the rx ring, and then refill it just once.
  356. */
  357. return msdu_chaining;
  358. }
  359. static void ath10k_htt_rx_replenish_task(unsigned long ptr)
  360. {
  361. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  362. ath10k_htt_rx_msdu_buff_replenish(htt);
  363. }
  364. static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
  365. u32 paddr)
  366. {
  367. struct ath10k *ar = htt->ar;
  368. struct ath10k_skb_rxcb *rxcb;
  369. struct sk_buff *msdu;
  370. lockdep_assert_held(&htt->rx_ring.lock);
  371. msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
  372. if (!msdu)
  373. return NULL;
  374. rxcb = ATH10K_SKB_RXCB(msdu);
  375. hash_del(&rxcb->hlist);
  376. htt->rx_ring.fill_cnt--;
  377. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  378. msdu->len + skb_tailroom(msdu),
  379. DMA_FROM_DEVICE);
  380. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  381. msdu->data, msdu->len + skb_tailroom(msdu));
  382. return msdu;
  383. }
  384. static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
  385. struct htt_rx_in_ord_ind *ev,
  386. struct sk_buff_head *list)
  387. {
  388. struct ath10k *ar = htt->ar;
  389. struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
  390. struct htt_rx_desc *rxd;
  391. struct sk_buff *msdu;
  392. int msdu_count;
  393. bool is_offload;
  394. u32 paddr;
  395. lockdep_assert_held(&htt->rx_ring.lock);
  396. msdu_count = __le16_to_cpu(ev->msdu_count);
  397. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  398. while (msdu_count--) {
  399. paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
  400. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  401. if (!msdu) {
  402. __skb_queue_purge(list);
  403. return -ENOENT;
  404. }
  405. __skb_queue_tail(list, msdu);
  406. if (!is_offload) {
  407. rxd = (void *)msdu->data;
  408. trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
  409. skb_put(msdu, sizeof(*rxd));
  410. skb_pull(msdu, sizeof(*rxd));
  411. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  412. if (!(__le32_to_cpu(rxd->attention.flags) &
  413. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  414. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  415. return -EIO;
  416. }
  417. }
  418. msdu_desc++;
  419. }
  420. return 0;
  421. }
  422. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  423. {
  424. struct ath10k *ar = htt->ar;
  425. dma_addr_t paddr;
  426. void *vaddr;
  427. size_t size;
  428. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  429. htt->rx_confused = false;
  430. /* XXX: The fill level could be changed during runtime in response to
  431. * the host processing latency. Is this really worth it?
  432. */
  433. htt->rx_ring.size = HTT_RX_RING_SIZE;
  434. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  435. htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
  436. if (!is_power_of_2(htt->rx_ring.size)) {
  437. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  438. return -EINVAL;
  439. }
  440. htt->rx_ring.netbufs_ring =
  441. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  442. GFP_KERNEL);
  443. if (!htt->rx_ring.netbufs_ring)
  444. goto err_netbuf;
  445. size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
  446. vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
  447. if (!vaddr)
  448. goto err_dma_ring;
  449. htt->rx_ring.paddrs_ring = vaddr;
  450. htt->rx_ring.base_paddr = paddr;
  451. vaddr = dma_alloc_coherent(htt->ar->dev,
  452. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  453. &paddr, GFP_KERNEL);
  454. if (!vaddr)
  455. goto err_dma_idx;
  456. htt->rx_ring.alloc_idx.vaddr = vaddr;
  457. htt->rx_ring.alloc_idx.paddr = paddr;
  458. htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
  459. *htt->rx_ring.alloc_idx.vaddr = 0;
  460. /* Initialize the Rx refill retry timer */
  461. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  462. spin_lock_init(&htt->rx_ring.lock);
  463. htt->rx_ring.fill_cnt = 0;
  464. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  465. hash_init(htt->rx_ring.skb_table);
  466. tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
  467. (unsigned long)htt);
  468. skb_queue_head_init(&htt->tx_compl_q);
  469. skb_queue_head_init(&htt->rx_compl_q);
  470. skb_queue_head_init(&htt->rx_in_ord_compl_q);
  471. tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
  472. (unsigned long)htt);
  473. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  474. htt->rx_ring.size, htt->rx_ring.fill_level);
  475. return 0;
  476. err_dma_idx:
  477. dma_free_coherent(htt->ar->dev,
  478. (htt->rx_ring.size *
  479. sizeof(htt->rx_ring.paddrs_ring)),
  480. htt->rx_ring.paddrs_ring,
  481. htt->rx_ring.base_paddr);
  482. err_dma_ring:
  483. kfree(htt->rx_ring.netbufs_ring);
  484. err_netbuf:
  485. return -ENOMEM;
  486. }
  487. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  488. enum htt_rx_mpdu_encrypt_type type)
  489. {
  490. switch (type) {
  491. case HTT_RX_MPDU_ENCRYPT_NONE:
  492. return 0;
  493. case HTT_RX_MPDU_ENCRYPT_WEP40:
  494. case HTT_RX_MPDU_ENCRYPT_WEP104:
  495. return IEEE80211_WEP_IV_LEN;
  496. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  497. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  498. return IEEE80211_TKIP_IV_LEN;
  499. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  500. return IEEE80211_CCMP_HDR_LEN;
  501. case HTT_RX_MPDU_ENCRYPT_WEP128:
  502. case HTT_RX_MPDU_ENCRYPT_WAPI:
  503. break;
  504. }
  505. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  506. return 0;
  507. }
  508. #define MICHAEL_MIC_LEN 8
  509. static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
  510. enum htt_rx_mpdu_encrypt_type type)
  511. {
  512. switch (type) {
  513. case HTT_RX_MPDU_ENCRYPT_NONE:
  514. return 0;
  515. case HTT_RX_MPDU_ENCRYPT_WEP40:
  516. case HTT_RX_MPDU_ENCRYPT_WEP104:
  517. return IEEE80211_WEP_ICV_LEN;
  518. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  519. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  520. return IEEE80211_TKIP_ICV_LEN;
  521. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  522. return IEEE80211_CCMP_MIC_LEN;
  523. case HTT_RX_MPDU_ENCRYPT_WEP128:
  524. case HTT_RX_MPDU_ENCRYPT_WAPI:
  525. break;
  526. }
  527. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  528. return 0;
  529. }
  530. struct amsdu_subframe_hdr {
  531. u8 dst[ETH_ALEN];
  532. u8 src[ETH_ALEN];
  533. __be16 len;
  534. } __packed;
  535. #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
  536. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  537. struct ieee80211_rx_status *status,
  538. struct htt_rx_desc *rxd)
  539. {
  540. struct ieee80211_supported_band *sband;
  541. u8 cck, rate, bw, sgi, mcs, nss;
  542. u8 preamble = 0;
  543. u8 group_id;
  544. u32 info1, info2, info3;
  545. info1 = __le32_to_cpu(rxd->ppdu_start.info1);
  546. info2 = __le32_to_cpu(rxd->ppdu_start.info2);
  547. info3 = __le32_to_cpu(rxd->ppdu_start.info3);
  548. preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
  549. switch (preamble) {
  550. case HTT_RX_LEGACY:
  551. /* To get legacy rate index band is required. Since band can't
  552. * be undefined check if freq is non-zero.
  553. */
  554. if (!status->freq)
  555. return;
  556. cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
  557. rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
  558. rate &= ~RX_PPDU_START_RATE_FLAG;
  559. sband = &ar->mac.sbands[status->band];
  560. status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
  561. break;
  562. case HTT_RX_HT:
  563. case HTT_RX_HT_WITH_TXBF:
  564. /* HT-SIG - Table 20-11 in info2 and info3 */
  565. mcs = info2 & 0x1F;
  566. nss = mcs >> 3;
  567. bw = (info2 >> 7) & 1;
  568. sgi = (info3 >> 7) & 1;
  569. status->rate_idx = mcs;
  570. status->flag |= RX_FLAG_HT;
  571. if (sgi)
  572. status->flag |= RX_FLAG_SHORT_GI;
  573. if (bw)
  574. status->flag |= RX_FLAG_40MHZ;
  575. break;
  576. case HTT_RX_VHT:
  577. case HTT_RX_VHT_WITH_TXBF:
  578. /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
  579. TODO check this */
  580. bw = info2 & 3;
  581. sgi = info3 & 1;
  582. group_id = (info2 >> 4) & 0x3F;
  583. if (GROUP_ID_IS_SU_MIMO(group_id)) {
  584. mcs = (info3 >> 4) & 0x0F;
  585. nss = ((info2 >> 10) & 0x07) + 1;
  586. } else {
  587. /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
  588. * so it's impossible to decode MCS. Also since
  589. * firmware consumes Group Id Management frames host
  590. * has no knowledge regarding group/user position
  591. * mapping so it's impossible to pick the correct Nsts
  592. * from VHT-SIG-A1.
  593. *
  594. * Bandwidth and SGI are valid so report the rateinfo
  595. * on best-effort basis.
  596. */
  597. mcs = 0;
  598. nss = 1;
  599. }
  600. if (mcs > 0x09) {
  601. ath10k_warn(ar, "invalid MCS received %u\n", mcs);
  602. ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
  603. __le32_to_cpu(rxd->attention.flags),
  604. __le32_to_cpu(rxd->mpdu_start.info0),
  605. __le32_to_cpu(rxd->mpdu_start.info1),
  606. __le32_to_cpu(rxd->msdu_start.common.info0),
  607. __le32_to_cpu(rxd->msdu_start.common.info1),
  608. rxd->ppdu_start.info0,
  609. __le32_to_cpu(rxd->ppdu_start.info1),
  610. __le32_to_cpu(rxd->ppdu_start.info2),
  611. __le32_to_cpu(rxd->ppdu_start.info3),
  612. __le32_to_cpu(rxd->ppdu_start.info4));
  613. ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
  614. __le32_to_cpu(rxd->msdu_end.common.info0),
  615. __le32_to_cpu(rxd->mpdu_end.info0));
  616. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
  617. "rx desc msdu payload: ",
  618. rxd->msdu_payload, 50);
  619. }
  620. status->rate_idx = mcs;
  621. status->vht_nss = nss;
  622. if (sgi)
  623. status->flag |= RX_FLAG_SHORT_GI;
  624. switch (bw) {
  625. /* 20MHZ */
  626. case 0:
  627. break;
  628. /* 40MHZ */
  629. case 1:
  630. status->flag |= RX_FLAG_40MHZ;
  631. break;
  632. /* 80MHZ */
  633. case 2:
  634. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  635. }
  636. status->flag |= RX_FLAG_VHT;
  637. break;
  638. default:
  639. break;
  640. }
  641. }
  642. static struct ieee80211_channel *
  643. ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
  644. {
  645. struct ath10k_peer *peer;
  646. struct ath10k_vif *arvif;
  647. struct cfg80211_chan_def def;
  648. u16 peer_id;
  649. lockdep_assert_held(&ar->data_lock);
  650. if (!rxd)
  651. return NULL;
  652. if (rxd->attention.flags &
  653. __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
  654. return NULL;
  655. if (!(rxd->msdu_end.common.info0 &
  656. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
  657. return NULL;
  658. peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  659. RX_MPDU_START_INFO0_PEER_IDX);
  660. peer = ath10k_peer_find_by_id(ar, peer_id);
  661. if (!peer)
  662. return NULL;
  663. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  664. if (WARN_ON_ONCE(!arvif))
  665. return NULL;
  666. if (WARN_ON(ath10k_mac_vif_chan(arvif->vif, &def)))
  667. return NULL;
  668. return def.chan;
  669. }
  670. static struct ieee80211_channel *
  671. ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
  672. {
  673. struct ath10k_vif *arvif;
  674. struct cfg80211_chan_def def;
  675. lockdep_assert_held(&ar->data_lock);
  676. list_for_each_entry(arvif, &ar->arvifs, list) {
  677. if (arvif->vdev_id == vdev_id &&
  678. ath10k_mac_vif_chan(arvif->vif, &def) == 0)
  679. return def.chan;
  680. }
  681. return NULL;
  682. }
  683. static void
  684. ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
  685. struct ieee80211_chanctx_conf *conf,
  686. void *data)
  687. {
  688. struct cfg80211_chan_def *def = data;
  689. *def = conf->def;
  690. }
  691. static struct ieee80211_channel *
  692. ath10k_htt_rx_h_any_channel(struct ath10k *ar)
  693. {
  694. struct cfg80211_chan_def def = {};
  695. ieee80211_iter_chan_contexts_atomic(ar->hw,
  696. ath10k_htt_rx_h_any_chan_iter,
  697. &def);
  698. return def.chan;
  699. }
  700. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  701. struct ieee80211_rx_status *status,
  702. struct htt_rx_desc *rxd,
  703. u32 vdev_id)
  704. {
  705. struct ieee80211_channel *ch;
  706. spin_lock_bh(&ar->data_lock);
  707. ch = ar->scan_channel;
  708. if (!ch)
  709. ch = ar->rx_channel;
  710. if (!ch)
  711. ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
  712. if (!ch)
  713. ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
  714. if (!ch)
  715. ch = ath10k_htt_rx_h_any_channel(ar);
  716. spin_unlock_bh(&ar->data_lock);
  717. if (!ch)
  718. return false;
  719. status->band = ch->band;
  720. status->freq = ch->center_freq;
  721. return true;
  722. }
  723. static void ath10k_htt_rx_h_signal(struct ath10k *ar,
  724. struct ieee80211_rx_status *status,
  725. struct htt_rx_desc *rxd)
  726. {
  727. /* FIXME: Get real NF */
  728. status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  729. rxd->ppdu_start.rssi_comb;
  730. status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  731. }
  732. static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
  733. struct ieee80211_rx_status *status,
  734. struct htt_rx_desc *rxd)
  735. {
  736. /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
  737. * means all prior MSDUs in a PPDU are reported to mac80211 without the
  738. * TSF. Is it worth holding frames until end of PPDU is known?
  739. *
  740. * FIXME: Can we get/compute 64bit TSF?
  741. */
  742. status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
  743. status->flag |= RX_FLAG_MACTIME_END;
  744. }
  745. static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
  746. struct sk_buff_head *amsdu,
  747. struct ieee80211_rx_status *status,
  748. u32 vdev_id)
  749. {
  750. struct sk_buff *first;
  751. struct htt_rx_desc *rxd;
  752. bool is_first_ppdu;
  753. bool is_last_ppdu;
  754. if (skb_queue_empty(amsdu))
  755. return;
  756. first = skb_peek(amsdu);
  757. rxd = (void *)first->data - sizeof(*rxd);
  758. is_first_ppdu = !!(rxd->attention.flags &
  759. __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
  760. is_last_ppdu = !!(rxd->attention.flags &
  761. __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
  762. if (is_first_ppdu) {
  763. /* New PPDU starts so clear out the old per-PPDU status. */
  764. status->freq = 0;
  765. status->rate_idx = 0;
  766. status->vht_nss = 0;
  767. status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
  768. status->flag &= ~(RX_FLAG_HT |
  769. RX_FLAG_VHT |
  770. RX_FLAG_SHORT_GI |
  771. RX_FLAG_40MHZ |
  772. RX_FLAG_MACTIME_END);
  773. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  774. ath10k_htt_rx_h_signal(ar, status, rxd);
  775. ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
  776. ath10k_htt_rx_h_rates(ar, status, rxd);
  777. }
  778. if (is_last_ppdu)
  779. ath10k_htt_rx_h_mactime(ar, status, rxd);
  780. }
  781. static const char * const tid_to_ac[] = {
  782. "BE",
  783. "BK",
  784. "BK",
  785. "BE",
  786. "VI",
  787. "VI",
  788. "VO",
  789. "VO",
  790. };
  791. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  792. {
  793. u8 *qc;
  794. int tid;
  795. if (!ieee80211_is_data_qos(hdr->frame_control))
  796. return "";
  797. qc = ieee80211_get_qos_ctl(hdr);
  798. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  799. if (tid < 8)
  800. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  801. else
  802. snprintf(out, size, "tid %d", tid);
  803. return out;
  804. }
  805. static void ath10k_process_rx(struct ath10k *ar,
  806. struct ieee80211_rx_status *rx_status,
  807. struct sk_buff *skb)
  808. {
  809. struct ieee80211_rx_status *status;
  810. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  811. char tid[32];
  812. status = IEEE80211_SKB_RXCB(skb);
  813. *status = *rx_status;
  814. ath10k_dbg(ar, ATH10K_DBG_DATA,
  815. "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
  816. skb,
  817. skb->len,
  818. ieee80211_get_SA(hdr),
  819. ath10k_get_tid(hdr, tid, sizeof(tid)),
  820. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  821. "mcast" : "ucast",
  822. (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
  823. status->flag == 0 ? "legacy" : "",
  824. status->flag & RX_FLAG_HT ? "ht" : "",
  825. status->flag & RX_FLAG_VHT ? "vht" : "",
  826. status->flag & RX_FLAG_40MHZ ? "40" : "",
  827. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  828. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  829. status->rate_idx,
  830. status->vht_nss,
  831. status->freq,
  832. status->band, status->flag,
  833. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  834. !!(status->flag & RX_FLAG_MMIC_ERROR),
  835. !!(status->flag & RX_FLAG_AMSDU_MORE));
  836. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  837. skb->data, skb->len);
  838. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  839. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  840. ieee80211_rx(ar->hw, skb);
  841. }
  842. static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
  843. struct ieee80211_hdr *hdr)
  844. {
  845. int len = ieee80211_hdrlen(hdr->frame_control);
  846. if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
  847. ar->fw_features))
  848. len = round_up(len, 4);
  849. return len;
  850. }
  851. static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
  852. struct sk_buff *msdu,
  853. struct ieee80211_rx_status *status,
  854. enum htt_rx_mpdu_encrypt_type enctype,
  855. bool is_decrypted)
  856. {
  857. struct ieee80211_hdr *hdr;
  858. struct htt_rx_desc *rxd;
  859. size_t hdr_len;
  860. size_t crypto_len;
  861. bool is_first;
  862. bool is_last;
  863. rxd = (void *)msdu->data - sizeof(*rxd);
  864. is_first = !!(rxd->msdu_end.common.info0 &
  865. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  866. is_last = !!(rxd->msdu_end.common.info0 &
  867. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  868. /* Delivered decapped frame:
  869. * [802.11 header]
  870. * [crypto param] <-- can be trimmed if !fcs_err &&
  871. * !decrypt_err && !peer_idx_invalid
  872. * [amsdu header] <-- only if A-MSDU
  873. * [rfc1042/llc]
  874. * [payload]
  875. * [FCS] <-- at end, needs to be trimmed
  876. */
  877. /* This probably shouldn't happen but warn just in case */
  878. if (unlikely(WARN_ON_ONCE(!is_first)))
  879. return;
  880. /* This probably shouldn't happen but warn just in case */
  881. if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
  882. return;
  883. skb_trim(msdu, msdu->len - FCS_LEN);
  884. /* In most cases this will be true for sniffed frames. It makes sense
  885. * to deliver them as-is without stripping the crypto param. This is
  886. * necessary for software based decryption.
  887. *
  888. * If there's no error then the frame is decrypted. At least that is
  889. * the case for frames that come in via fragmented rx indication.
  890. */
  891. if (!is_decrypted)
  892. return;
  893. /* The payload is decrypted so strip crypto params. Start from tail
  894. * since hdr is used to compute some stuff.
  895. */
  896. hdr = (void *)msdu->data;
  897. /* Tail */
  898. skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype));
  899. /* MMIC */
  900. if (!ieee80211_has_morefrags(hdr->frame_control) &&
  901. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  902. skb_trim(msdu, msdu->len - 8);
  903. /* Head */
  904. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  905. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  906. memmove((void *)msdu->data + crypto_len,
  907. (void *)msdu->data, hdr_len);
  908. skb_pull(msdu, crypto_len);
  909. }
  910. static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
  911. struct sk_buff *msdu,
  912. struct ieee80211_rx_status *status,
  913. const u8 first_hdr[64])
  914. {
  915. struct ieee80211_hdr *hdr;
  916. size_t hdr_len;
  917. u8 da[ETH_ALEN];
  918. u8 sa[ETH_ALEN];
  919. /* Delivered decapped frame:
  920. * [nwifi 802.11 header] <-- replaced with 802.11 hdr
  921. * [rfc1042/llc]
  922. *
  923. * Note: The nwifi header doesn't have QoS Control and is
  924. * (always?) a 3addr frame.
  925. *
  926. * Note2: There's no A-MSDU subframe header. Even if it's part
  927. * of an A-MSDU.
  928. */
  929. /* pull decapped header and copy SA & DA */
  930. if ((ar->hw_params.hw_4addr_pad == ATH10K_HW_4ADDR_PAD_BEFORE) &&
  931. ieee80211_has_a4(((struct ieee80211_hdr *)first_hdr)->frame_control)) {
  932. /* The QCA99X0 4 address mode pad 2 bytes at the
  933. * beginning of MSDU
  934. */
  935. hdr = (struct ieee80211_hdr *)(msdu->data + 2);
  936. /* The skb length need be extended 2 as the 2 bytes at the tail
  937. * be excluded due to the padding
  938. */
  939. skb_put(msdu, 2);
  940. } else {
  941. hdr = (struct ieee80211_hdr *)(msdu->data);
  942. }
  943. hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
  944. ether_addr_copy(da, ieee80211_get_DA(hdr));
  945. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  946. skb_pull(msdu, hdr_len);
  947. /* push original 802.11 header */
  948. hdr = (struct ieee80211_hdr *)first_hdr;
  949. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  950. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  951. /* original 802.11 header has a different DA and in
  952. * case of 4addr it may also have different SA
  953. */
  954. hdr = (struct ieee80211_hdr *)msdu->data;
  955. ether_addr_copy(ieee80211_get_DA(hdr), da);
  956. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  957. }
  958. static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
  959. struct sk_buff *msdu,
  960. enum htt_rx_mpdu_encrypt_type enctype)
  961. {
  962. struct ieee80211_hdr *hdr;
  963. struct htt_rx_desc *rxd;
  964. size_t hdr_len, crypto_len;
  965. void *rfc1042;
  966. bool is_first, is_last, is_amsdu;
  967. rxd = (void *)msdu->data - sizeof(*rxd);
  968. hdr = (void *)rxd->rx_hdr_status;
  969. is_first = !!(rxd->msdu_end.common.info0 &
  970. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  971. is_last = !!(rxd->msdu_end.common.info0 &
  972. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  973. is_amsdu = !(is_first && is_last);
  974. rfc1042 = hdr;
  975. if (is_first) {
  976. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  977. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  978. rfc1042 += round_up(hdr_len, 4) +
  979. round_up(crypto_len, 4);
  980. }
  981. if (is_amsdu)
  982. rfc1042 += sizeof(struct amsdu_subframe_hdr);
  983. return rfc1042;
  984. }
  985. static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
  986. struct sk_buff *msdu,
  987. struct ieee80211_rx_status *status,
  988. const u8 first_hdr[64],
  989. enum htt_rx_mpdu_encrypt_type enctype)
  990. {
  991. struct ieee80211_hdr *hdr;
  992. struct ethhdr *eth;
  993. size_t hdr_len;
  994. void *rfc1042;
  995. u8 da[ETH_ALEN];
  996. u8 sa[ETH_ALEN];
  997. /* Delivered decapped frame:
  998. * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
  999. * [payload]
  1000. */
  1001. rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
  1002. if (WARN_ON_ONCE(!rfc1042))
  1003. return;
  1004. /* pull decapped header and copy SA & DA */
  1005. eth = (struct ethhdr *)msdu->data;
  1006. ether_addr_copy(da, eth->h_dest);
  1007. ether_addr_copy(sa, eth->h_source);
  1008. skb_pull(msdu, sizeof(struct ethhdr));
  1009. /* push rfc1042/llc/snap */
  1010. memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
  1011. sizeof(struct rfc1042_hdr));
  1012. /* push original 802.11 header */
  1013. hdr = (struct ieee80211_hdr *)first_hdr;
  1014. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1015. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1016. /* original 802.11 header has a different DA and in
  1017. * case of 4addr it may also have different SA
  1018. */
  1019. hdr = (struct ieee80211_hdr *)msdu->data;
  1020. ether_addr_copy(ieee80211_get_DA(hdr), da);
  1021. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  1022. }
  1023. static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
  1024. struct sk_buff *msdu,
  1025. struct ieee80211_rx_status *status,
  1026. const u8 first_hdr[64])
  1027. {
  1028. struct ieee80211_hdr *hdr;
  1029. size_t hdr_len;
  1030. /* Delivered decapped frame:
  1031. * [amsdu header] <-- replaced with 802.11 hdr
  1032. * [rfc1042/llc]
  1033. * [payload]
  1034. */
  1035. skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
  1036. hdr = (struct ieee80211_hdr *)first_hdr;
  1037. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1038. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1039. }
  1040. static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
  1041. struct sk_buff *msdu,
  1042. struct ieee80211_rx_status *status,
  1043. u8 first_hdr[64],
  1044. enum htt_rx_mpdu_encrypt_type enctype,
  1045. bool is_decrypted)
  1046. {
  1047. struct htt_rx_desc *rxd;
  1048. enum rx_msdu_decap_format decap;
  1049. /* First msdu's decapped header:
  1050. * [802.11 header] <-- padded to 4 bytes long
  1051. * [crypto param] <-- padded to 4 bytes long
  1052. * [amsdu header] <-- only if A-MSDU
  1053. * [rfc1042/llc]
  1054. *
  1055. * Other (2nd, 3rd, ..) msdu's decapped header:
  1056. * [amsdu header] <-- only if A-MSDU
  1057. * [rfc1042/llc]
  1058. */
  1059. rxd = (void *)msdu->data - sizeof(*rxd);
  1060. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1061. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1062. switch (decap) {
  1063. case RX_MSDU_DECAP_RAW:
  1064. ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
  1065. is_decrypted);
  1066. break;
  1067. case RX_MSDU_DECAP_NATIVE_WIFI:
  1068. ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
  1069. break;
  1070. case RX_MSDU_DECAP_ETHERNET2_DIX:
  1071. ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
  1072. break;
  1073. case RX_MSDU_DECAP_8023_SNAP_LLC:
  1074. ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
  1075. break;
  1076. }
  1077. }
  1078. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  1079. {
  1080. struct htt_rx_desc *rxd;
  1081. u32 flags, info;
  1082. bool is_ip4, is_ip6;
  1083. bool is_tcp, is_udp;
  1084. bool ip_csum_ok, tcpudp_csum_ok;
  1085. rxd = (void *)skb->data - sizeof(*rxd);
  1086. flags = __le32_to_cpu(rxd->attention.flags);
  1087. info = __le32_to_cpu(rxd->msdu_start.common.info1);
  1088. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  1089. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  1090. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  1091. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  1092. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  1093. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  1094. if (!is_ip4 && !is_ip6)
  1095. return CHECKSUM_NONE;
  1096. if (!is_tcp && !is_udp)
  1097. return CHECKSUM_NONE;
  1098. if (!ip_csum_ok)
  1099. return CHECKSUM_NONE;
  1100. if (!tcpudp_csum_ok)
  1101. return CHECKSUM_NONE;
  1102. return CHECKSUM_UNNECESSARY;
  1103. }
  1104. static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
  1105. {
  1106. msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
  1107. }
  1108. static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
  1109. struct sk_buff_head *amsdu,
  1110. struct ieee80211_rx_status *status)
  1111. {
  1112. struct sk_buff *first;
  1113. struct sk_buff *last;
  1114. struct sk_buff *msdu;
  1115. struct htt_rx_desc *rxd;
  1116. struct ieee80211_hdr *hdr;
  1117. enum htt_rx_mpdu_encrypt_type enctype;
  1118. u8 first_hdr[64];
  1119. u8 *qos;
  1120. size_t hdr_len;
  1121. bool has_fcs_err;
  1122. bool has_crypto_err;
  1123. bool has_tkip_err;
  1124. bool has_peer_idx_invalid;
  1125. bool is_decrypted;
  1126. u32 attention;
  1127. if (skb_queue_empty(amsdu))
  1128. return;
  1129. first = skb_peek(amsdu);
  1130. rxd = (void *)first->data - sizeof(*rxd);
  1131. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1132. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1133. /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
  1134. * decapped header. It'll be used for undecapping of each MSDU.
  1135. */
  1136. hdr = (void *)rxd->rx_hdr_status;
  1137. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1138. memcpy(first_hdr, hdr, hdr_len);
  1139. /* Each A-MSDU subframe will use the original header as the base and be
  1140. * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
  1141. */
  1142. hdr = (void *)first_hdr;
  1143. qos = ieee80211_get_qos_ctl(hdr);
  1144. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1145. /* Some attention flags are valid only in the last MSDU. */
  1146. last = skb_peek_tail(amsdu);
  1147. rxd = (void *)last->data - sizeof(*rxd);
  1148. attention = __le32_to_cpu(rxd->attention.flags);
  1149. has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
  1150. has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1151. has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1152. has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
  1153. /* Note: If hardware captures an encrypted frame that it can't decrypt,
  1154. * e.g. due to fcs error, missing peer or invalid key data it will
  1155. * report the frame as raw.
  1156. */
  1157. is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
  1158. !has_fcs_err &&
  1159. !has_crypto_err &&
  1160. !has_peer_idx_invalid);
  1161. /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
  1162. status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
  1163. RX_FLAG_MMIC_ERROR |
  1164. RX_FLAG_DECRYPTED |
  1165. RX_FLAG_IV_STRIPPED |
  1166. RX_FLAG_MMIC_STRIPPED);
  1167. if (has_fcs_err)
  1168. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1169. if (has_tkip_err)
  1170. status->flag |= RX_FLAG_MMIC_ERROR;
  1171. if (is_decrypted)
  1172. status->flag |= RX_FLAG_DECRYPTED |
  1173. RX_FLAG_IV_STRIPPED |
  1174. RX_FLAG_MMIC_STRIPPED;
  1175. skb_queue_walk(amsdu, msdu) {
  1176. ath10k_htt_rx_h_csum_offload(msdu);
  1177. ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
  1178. is_decrypted);
  1179. /* Undecapping involves copying the original 802.11 header back
  1180. * to sk_buff. If frame is protected and hardware has decrypted
  1181. * it then remove the protected bit.
  1182. */
  1183. if (!is_decrypted)
  1184. continue;
  1185. hdr = (void *)msdu->data;
  1186. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1187. }
  1188. }
  1189. static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
  1190. struct sk_buff_head *amsdu,
  1191. struct ieee80211_rx_status *status)
  1192. {
  1193. struct sk_buff *msdu;
  1194. while ((msdu = __skb_dequeue(amsdu))) {
  1195. /* Setup per-MSDU flags */
  1196. if (skb_queue_empty(amsdu))
  1197. status->flag &= ~RX_FLAG_AMSDU_MORE;
  1198. else
  1199. status->flag |= RX_FLAG_AMSDU_MORE;
  1200. ath10k_process_rx(ar, status, msdu);
  1201. }
  1202. }
  1203. static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
  1204. {
  1205. struct sk_buff *skb, *first;
  1206. int space;
  1207. int total_len = 0;
  1208. /* TODO: Might could optimize this by using
  1209. * skb_try_coalesce or similar method to
  1210. * decrease copying, or maybe get mac80211 to
  1211. * provide a way to just receive a list of
  1212. * skb?
  1213. */
  1214. first = __skb_dequeue(amsdu);
  1215. /* Allocate total length all at once. */
  1216. skb_queue_walk(amsdu, skb)
  1217. total_len += skb->len;
  1218. space = total_len - skb_tailroom(first);
  1219. if ((space > 0) &&
  1220. (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
  1221. /* TODO: bump some rx-oom error stat */
  1222. /* put it back together so we can free the
  1223. * whole list at once.
  1224. */
  1225. __skb_queue_head(amsdu, first);
  1226. return -1;
  1227. }
  1228. /* Walk list again, copying contents into
  1229. * msdu_head
  1230. */
  1231. while ((skb = __skb_dequeue(amsdu))) {
  1232. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  1233. skb->len);
  1234. dev_kfree_skb_any(skb);
  1235. }
  1236. __skb_queue_head(amsdu, first);
  1237. return 0;
  1238. }
  1239. static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
  1240. struct sk_buff_head *amsdu,
  1241. bool chained)
  1242. {
  1243. struct sk_buff *first;
  1244. struct htt_rx_desc *rxd;
  1245. enum rx_msdu_decap_format decap;
  1246. first = skb_peek(amsdu);
  1247. rxd = (void *)first->data - sizeof(*rxd);
  1248. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1249. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1250. if (!chained)
  1251. return;
  1252. /* FIXME: Current unchaining logic can only handle simple case of raw
  1253. * msdu chaining. If decapping is other than raw the chaining may be
  1254. * more complex and this isn't handled by the current code. Don't even
  1255. * try re-constructing such frames - it'll be pretty much garbage.
  1256. */
  1257. if (decap != RX_MSDU_DECAP_RAW ||
  1258. skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
  1259. __skb_queue_purge(amsdu);
  1260. return;
  1261. }
  1262. ath10k_unchain_msdu(amsdu);
  1263. }
  1264. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
  1265. struct sk_buff_head *amsdu,
  1266. struct ieee80211_rx_status *rx_status)
  1267. {
  1268. struct sk_buff *msdu;
  1269. struct htt_rx_desc *rxd;
  1270. bool is_mgmt;
  1271. bool has_fcs_err;
  1272. msdu = skb_peek(amsdu);
  1273. rxd = (void *)msdu->data - sizeof(*rxd);
  1274. /* FIXME: It might be a good idea to do some fuzzy-testing to drop
  1275. * invalid/dangerous frames.
  1276. */
  1277. if (!rx_status->freq) {
  1278. ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
  1279. return false;
  1280. }
  1281. is_mgmt = !!(rxd->attention.flags &
  1282. __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
  1283. has_fcs_err = !!(rxd->attention.flags &
  1284. __cpu_to_le32(RX_ATTENTION_FLAGS_FCS_ERR));
  1285. /* Management frames are handled via WMI events. The pros of such
  1286. * approach is that channel is explicitly provided in WMI events
  1287. * whereas HTT doesn't provide channel information for Rxed frames.
  1288. *
  1289. * However some firmware revisions don't report corrupted frames via
  1290. * WMI so don't drop them.
  1291. */
  1292. if (is_mgmt && !has_fcs_err) {
  1293. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
  1294. return false;
  1295. }
  1296. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1297. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
  1298. return false;
  1299. }
  1300. return true;
  1301. }
  1302. static void ath10k_htt_rx_h_filter(struct ath10k *ar,
  1303. struct sk_buff_head *amsdu,
  1304. struct ieee80211_rx_status *rx_status)
  1305. {
  1306. if (skb_queue_empty(amsdu))
  1307. return;
  1308. if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
  1309. return;
  1310. __skb_queue_purge(amsdu);
  1311. }
  1312. static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
  1313. struct htt_rx_indication *rx)
  1314. {
  1315. struct ath10k *ar = htt->ar;
  1316. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1317. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  1318. struct sk_buff_head amsdu;
  1319. int num_mpdu_ranges;
  1320. int fw_desc_len;
  1321. u8 *fw_desc;
  1322. int i, ret, mpdu_count = 0;
  1323. lockdep_assert_held(&htt->rx_ring.lock);
  1324. if (htt->rx_confused)
  1325. return;
  1326. fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
  1327. fw_desc = (u8 *)&rx->fw_desc;
  1328. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1329. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1330. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1331. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1332. rx, sizeof(*rx) +
  1333. (sizeof(struct htt_rx_indication_mpdu_range) *
  1334. num_mpdu_ranges));
  1335. for (i = 0; i < num_mpdu_ranges; i++)
  1336. mpdu_count += mpdu_ranges[i].mpdu_count;
  1337. while (mpdu_count--) {
  1338. __skb_queue_head_init(&amsdu);
  1339. ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
  1340. &fw_desc_len, &amsdu);
  1341. if (ret < 0) {
  1342. ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
  1343. __skb_queue_purge(&amsdu);
  1344. /* FIXME: It's probably a good idea to reboot the
  1345. * device instead of leaving it inoperable.
  1346. */
  1347. htt->rx_confused = true;
  1348. break;
  1349. }
  1350. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1351. ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
  1352. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
  1353. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
  1354. ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
  1355. }
  1356. tasklet_schedule(&htt->rx_replenish_task);
  1357. }
  1358. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
  1359. struct htt_rx_fragment_indication *frag)
  1360. {
  1361. struct ath10k *ar = htt->ar;
  1362. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1363. struct sk_buff_head amsdu;
  1364. int ret;
  1365. u8 *fw_desc;
  1366. int fw_desc_len;
  1367. fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
  1368. fw_desc = (u8 *)frag->fw_msdu_rx_desc;
  1369. __skb_queue_head_init(&amsdu);
  1370. spin_lock_bh(&htt->rx_ring.lock);
  1371. ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
  1372. &amsdu);
  1373. spin_unlock_bh(&htt->rx_ring.lock);
  1374. tasklet_schedule(&htt->rx_replenish_task);
  1375. ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
  1376. if (ret) {
  1377. ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
  1378. ret);
  1379. __skb_queue_purge(&amsdu);
  1380. return;
  1381. }
  1382. if (skb_queue_len(&amsdu) != 1) {
  1383. ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
  1384. __skb_queue_purge(&amsdu);
  1385. return;
  1386. }
  1387. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1388. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
  1389. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
  1390. ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
  1391. if (fw_desc_len > 0) {
  1392. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1393. "expecting more fragmented rx in one indication %d\n",
  1394. fw_desc_len);
  1395. }
  1396. }
  1397. static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
  1398. struct sk_buff *skb)
  1399. {
  1400. struct ath10k_htt *htt = &ar->htt;
  1401. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1402. struct htt_tx_done tx_done = {};
  1403. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1404. __le16 msdu_id;
  1405. int i;
  1406. switch (status) {
  1407. case HTT_DATA_TX_STATUS_NO_ACK:
  1408. tx_done.no_ack = true;
  1409. break;
  1410. case HTT_DATA_TX_STATUS_OK:
  1411. tx_done.success = true;
  1412. break;
  1413. case HTT_DATA_TX_STATUS_DISCARD:
  1414. case HTT_DATA_TX_STATUS_POSTPONE:
  1415. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1416. tx_done.discard = true;
  1417. break;
  1418. default:
  1419. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  1420. tx_done.discard = true;
  1421. break;
  1422. }
  1423. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1424. resp->data_tx_completion.num_msdus);
  1425. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1426. msdu_id = resp->data_tx_completion.msdus[i];
  1427. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1428. ath10k_txrx_tx_unref(htt, &tx_done);
  1429. }
  1430. }
  1431. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  1432. {
  1433. struct htt_rx_addba *ev = &resp->rx_addba;
  1434. struct ath10k_peer *peer;
  1435. struct ath10k_vif *arvif;
  1436. u16 info0, tid, peer_id;
  1437. info0 = __le16_to_cpu(ev->info0);
  1438. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1439. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1440. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1441. "htt rx addba tid %hu peer_id %hu size %hhu\n",
  1442. tid, peer_id, ev->window_size);
  1443. spin_lock_bh(&ar->data_lock);
  1444. peer = ath10k_peer_find_by_id(ar, peer_id);
  1445. if (!peer) {
  1446. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1447. peer_id);
  1448. spin_unlock_bh(&ar->data_lock);
  1449. return;
  1450. }
  1451. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1452. if (!arvif) {
  1453. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1454. peer->vdev_id);
  1455. spin_unlock_bh(&ar->data_lock);
  1456. return;
  1457. }
  1458. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1459. "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
  1460. peer->addr, tid, ev->window_size);
  1461. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1462. spin_unlock_bh(&ar->data_lock);
  1463. }
  1464. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  1465. {
  1466. struct htt_rx_delba *ev = &resp->rx_delba;
  1467. struct ath10k_peer *peer;
  1468. struct ath10k_vif *arvif;
  1469. u16 info0, tid, peer_id;
  1470. info0 = __le16_to_cpu(ev->info0);
  1471. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1472. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1473. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1474. "htt rx delba tid %hu peer_id %hu\n",
  1475. tid, peer_id);
  1476. spin_lock_bh(&ar->data_lock);
  1477. peer = ath10k_peer_find_by_id(ar, peer_id);
  1478. if (!peer) {
  1479. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1480. peer_id);
  1481. spin_unlock_bh(&ar->data_lock);
  1482. return;
  1483. }
  1484. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1485. if (!arvif) {
  1486. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1487. peer->vdev_id);
  1488. spin_unlock_bh(&ar->data_lock);
  1489. return;
  1490. }
  1491. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1492. "htt rx stop rx ba session sta %pM tid %hu\n",
  1493. peer->addr, tid);
  1494. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1495. spin_unlock_bh(&ar->data_lock);
  1496. }
  1497. static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
  1498. struct sk_buff_head *amsdu)
  1499. {
  1500. struct sk_buff *msdu;
  1501. struct htt_rx_desc *rxd;
  1502. if (skb_queue_empty(list))
  1503. return -ENOBUFS;
  1504. if (WARN_ON(!skb_queue_empty(amsdu)))
  1505. return -EINVAL;
  1506. while ((msdu = __skb_dequeue(list))) {
  1507. __skb_queue_tail(amsdu, msdu);
  1508. rxd = (void *)msdu->data - sizeof(*rxd);
  1509. if (rxd->msdu_end.common.info0 &
  1510. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
  1511. break;
  1512. }
  1513. msdu = skb_peek_tail(amsdu);
  1514. rxd = (void *)msdu->data - sizeof(*rxd);
  1515. if (!(rxd->msdu_end.common.info0 &
  1516. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
  1517. skb_queue_splice_init(amsdu, list);
  1518. return -EAGAIN;
  1519. }
  1520. return 0;
  1521. }
  1522. static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
  1523. struct sk_buff *skb)
  1524. {
  1525. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1526. if (!ieee80211_has_protected(hdr->frame_control))
  1527. return;
  1528. /* Offloaded frames are already decrypted but firmware insists they are
  1529. * protected in the 802.11 header. Strip the flag. Otherwise mac80211
  1530. * will drop the frame.
  1531. */
  1532. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1533. status->flag |= RX_FLAG_DECRYPTED |
  1534. RX_FLAG_IV_STRIPPED |
  1535. RX_FLAG_MMIC_STRIPPED;
  1536. }
  1537. static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
  1538. struct sk_buff_head *list)
  1539. {
  1540. struct ath10k_htt *htt = &ar->htt;
  1541. struct ieee80211_rx_status *status = &htt->rx_status;
  1542. struct htt_rx_offload_msdu *rx;
  1543. struct sk_buff *msdu;
  1544. size_t offset;
  1545. while ((msdu = __skb_dequeue(list))) {
  1546. /* Offloaded frames don't have Rx descriptor. Instead they have
  1547. * a short meta information header.
  1548. */
  1549. rx = (void *)msdu->data;
  1550. skb_put(msdu, sizeof(*rx));
  1551. skb_pull(msdu, sizeof(*rx));
  1552. if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
  1553. ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
  1554. dev_kfree_skb_any(msdu);
  1555. continue;
  1556. }
  1557. skb_put(msdu, __le16_to_cpu(rx->msdu_len));
  1558. /* Offloaded rx header length isn't multiple of 2 nor 4 so the
  1559. * actual payload is unaligned. Align the frame. Otherwise
  1560. * mac80211 complains. This shouldn't reduce performance much
  1561. * because these offloaded frames are rare.
  1562. */
  1563. offset = 4 - ((unsigned long)msdu->data & 3);
  1564. skb_put(msdu, offset);
  1565. memmove(msdu->data + offset, msdu->data, msdu->len);
  1566. skb_pull(msdu, offset);
  1567. /* FIXME: The frame is NWifi. Re-construct QoS Control
  1568. * if possible later.
  1569. */
  1570. memset(status, 0, sizeof(*status));
  1571. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1572. ath10k_htt_rx_h_rx_offload_prot(status, msdu);
  1573. ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
  1574. ath10k_process_rx(ar, status, msdu);
  1575. }
  1576. }
  1577. static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
  1578. {
  1579. struct ath10k_htt *htt = &ar->htt;
  1580. struct htt_resp *resp = (void *)skb->data;
  1581. struct ieee80211_rx_status *status = &htt->rx_status;
  1582. struct sk_buff_head list;
  1583. struct sk_buff_head amsdu;
  1584. u16 peer_id;
  1585. u16 msdu_count;
  1586. u8 vdev_id;
  1587. u8 tid;
  1588. bool offload;
  1589. bool frag;
  1590. int ret;
  1591. lockdep_assert_held(&htt->rx_ring.lock);
  1592. if (htt->rx_confused)
  1593. return;
  1594. skb_pull(skb, sizeof(resp->hdr));
  1595. skb_pull(skb, sizeof(resp->rx_in_ord_ind));
  1596. peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
  1597. msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
  1598. vdev_id = resp->rx_in_ord_ind.vdev_id;
  1599. tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
  1600. offload = !!(resp->rx_in_ord_ind.info &
  1601. HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  1602. frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
  1603. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1604. "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
  1605. vdev_id, peer_id, tid, offload, frag, msdu_count);
  1606. if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
  1607. ath10k_warn(ar, "dropping invalid in order rx indication\n");
  1608. return;
  1609. }
  1610. /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
  1611. * extracted and processed.
  1612. */
  1613. __skb_queue_head_init(&list);
  1614. ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
  1615. if (ret < 0) {
  1616. ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
  1617. htt->rx_confused = true;
  1618. return;
  1619. }
  1620. /* Offloaded frames are very different and need to be handled
  1621. * separately.
  1622. */
  1623. if (offload)
  1624. ath10k_htt_rx_h_rx_offload(ar, &list);
  1625. while (!skb_queue_empty(&list)) {
  1626. __skb_queue_head_init(&amsdu);
  1627. ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
  1628. switch (ret) {
  1629. case 0:
  1630. /* Note: The in-order indication may report interleaved
  1631. * frames from different PPDUs meaning reported rx rate
  1632. * to mac80211 isn't accurate/reliable. It's still
  1633. * better to report something than nothing though. This
  1634. * should still give an idea about rx rate to the user.
  1635. */
  1636. ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
  1637. ath10k_htt_rx_h_filter(ar, &amsdu, status);
  1638. ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
  1639. ath10k_htt_rx_h_deliver(ar, &amsdu, status);
  1640. break;
  1641. case -EAGAIN:
  1642. /* fall through */
  1643. default:
  1644. /* Should not happen. */
  1645. ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
  1646. htt->rx_confused = true;
  1647. __skb_queue_purge(&list);
  1648. return;
  1649. }
  1650. }
  1651. tasklet_schedule(&htt->rx_replenish_task);
  1652. }
  1653. void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1654. {
  1655. struct ath10k_htt *htt = &ar->htt;
  1656. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1657. enum htt_t2h_msg_type type;
  1658. /* confirm alignment */
  1659. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1660. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  1661. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1662. resp->hdr.msg_type);
  1663. if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
  1664. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
  1665. resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
  1666. dev_kfree_skb_any(skb);
  1667. return;
  1668. }
  1669. type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
  1670. switch (type) {
  1671. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1672. htt->target_version_major = resp->ver_resp.major;
  1673. htt->target_version_minor = resp->ver_resp.minor;
  1674. complete(&htt->target_version_received);
  1675. break;
  1676. }
  1677. case HTT_T2H_MSG_TYPE_RX_IND:
  1678. skb_queue_tail(&htt->rx_compl_q, skb);
  1679. tasklet_schedule(&htt->txrx_compl_task);
  1680. return;
  1681. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1682. struct htt_peer_map_event ev = {
  1683. .vdev_id = resp->peer_map.vdev_id,
  1684. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1685. };
  1686. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1687. ath10k_peer_map_event(htt, &ev);
  1688. break;
  1689. }
  1690. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1691. struct htt_peer_unmap_event ev = {
  1692. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1693. };
  1694. ath10k_peer_unmap_event(htt, &ev);
  1695. break;
  1696. }
  1697. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1698. struct htt_tx_done tx_done = {};
  1699. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1700. tx_done.msdu_id =
  1701. __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1702. switch (status) {
  1703. case HTT_MGMT_TX_STATUS_OK:
  1704. tx_done.success = true;
  1705. break;
  1706. case HTT_MGMT_TX_STATUS_RETRY:
  1707. tx_done.no_ack = true;
  1708. break;
  1709. case HTT_MGMT_TX_STATUS_DROP:
  1710. tx_done.discard = true;
  1711. break;
  1712. }
  1713. ath10k_txrx_tx_unref(htt, &tx_done);
  1714. break;
  1715. }
  1716. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1717. skb_queue_tail(&htt->tx_compl_q, skb);
  1718. tasklet_schedule(&htt->txrx_compl_task);
  1719. return;
  1720. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1721. struct ath10k *ar = htt->ar;
  1722. struct htt_security_indication *ev = &resp->security_indication;
  1723. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1724. "sec ind peer_id %d unicast %d type %d\n",
  1725. __le16_to_cpu(ev->peer_id),
  1726. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1727. MS(ev->flags, HTT_SECURITY_TYPE));
  1728. complete(&ar->install_key_done);
  1729. break;
  1730. }
  1731. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  1732. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1733. skb->data, skb->len);
  1734. ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
  1735. break;
  1736. }
  1737. case HTT_T2H_MSG_TYPE_TEST:
  1738. break;
  1739. case HTT_T2H_MSG_TYPE_STATS_CONF:
  1740. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  1741. break;
  1742. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  1743. /* Firmware can return tx frames if it's unable to fully
  1744. * process them and suspects host may be able to fix it. ath10k
  1745. * sends all tx frames as already inspected so this shouldn't
  1746. * happen unless fw has a bug.
  1747. */
  1748. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  1749. break;
  1750. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  1751. ath10k_htt_rx_addba(ar, resp);
  1752. break;
  1753. case HTT_T2H_MSG_TYPE_RX_DELBA:
  1754. ath10k_htt_rx_delba(ar, resp);
  1755. break;
  1756. case HTT_T2H_MSG_TYPE_PKTLOG: {
  1757. struct ath10k_pktlog_hdr *hdr =
  1758. (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
  1759. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  1760. sizeof(*hdr) +
  1761. __le16_to_cpu(hdr->size));
  1762. break;
  1763. }
  1764. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  1765. /* Ignore this event because mac80211 takes care of Rx
  1766. * aggregation reordering.
  1767. */
  1768. break;
  1769. }
  1770. case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
  1771. skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
  1772. tasklet_schedule(&htt->txrx_compl_task);
  1773. return;
  1774. }
  1775. case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
  1776. break;
  1777. case HTT_T2H_MSG_TYPE_CHAN_CHANGE:
  1778. break;
  1779. case HTT_T2H_MSG_TYPE_AGGR_CONF:
  1780. break;
  1781. case HTT_T2H_MSG_TYPE_TX_FETCH_IND:
  1782. case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
  1783. case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
  1784. /* TODO: Implement pull-push logic */
  1785. break;
  1786. case HTT_T2H_MSG_TYPE_EN_STATS:
  1787. default:
  1788. ath10k_warn(ar, "htt event (%d) not handled\n",
  1789. resp->hdr.msg_type);
  1790. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1791. skb->data, skb->len);
  1792. break;
  1793. };
  1794. /* Free the indication buffer */
  1795. dev_kfree_skb_any(skb);
  1796. }
  1797. EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
  1798. void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
  1799. struct sk_buff *skb)
  1800. {
  1801. trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
  1802. dev_kfree_skb_any(skb);
  1803. }
  1804. EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
  1805. static void ath10k_htt_txrx_compl_task(unsigned long ptr)
  1806. {
  1807. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  1808. struct ath10k *ar = htt->ar;
  1809. struct sk_buff_head tx_q;
  1810. struct sk_buff_head rx_q;
  1811. struct sk_buff_head rx_ind_q;
  1812. struct htt_resp *resp;
  1813. struct sk_buff *skb;
  1814. unsigned long flags;
  1815. __skb_queue_head_init(&tx_q);
  1816. __skb_queue_head_init(&rx_q);
  1817. __skb_queue_head_init(&rx_ind_q);
  1818. spin_lock_irqsave(&htt->tx_compl_q.lock, flags);
  1819. skb_queue_splice_init(&htt->tx_compl_q, &tx_q);
  1820. spin_unlock_irqrestore(&htt->tx_compl_q.lock, flags);
  1821. spin_lock_irqsave(&htt->rx_compl_q.lock, flags);
  1822. skb_queue_splice_init(&htt->rx_compl_q, &rx_q);
  1823. spin_unlock_irqrestore(&htt->rx_compl_q.lock, flags);
  1824. spin_lock_irqsave(&htt->rx_in_ord_compl_q.lock, flags);
  1825. skb_queue_splice_init(&htt->rx_in_ord_compl_q, &rx_ind_q);
  1826. spin_unlock_irqrestore(&htt->rx_in_ord_compl_q.lock, flags);
  1827. while ((skb = __skb_dequeue(&tx_q))) {
  1828. ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
  1829. dev_kfree_skb_any(skb);
  1830. }
  1831. while ((skb = __skb_dequeue(&rx_q))) {
  1832. resp = (struct htt_resp *)skb->data;
  1833. spin_lock_bh(&htt->rx_ring.lock);
  1834. ath10k_htt_rx_handler(htt, &resp->rx_ind);
  1835. spin_unlock_bh(&htt->rx_ring.lock);
  1836. dev_kfree_skb_any(skb);
  1837. }
  1838. while ((skb = __skb_dequeue(&rx_ind_q))) {
  1839. spin_lock_bh(&htt->rx_ring.lock);
  1840. ath10k_htt_rx_in_ord_ind(ar, skb);
  1841. spin_unlock_bh(&htt->rx_ring.lock);
  1842. dev_kfree_skb_any(skb);
  1843. }
  1844. }