en_netdev.c 85 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <net/busy_poll.h>
  41. #include <net/vxlan.h>
  42. #include <net/devlink.h>
  43. #include <linux/mlx4/driver.h>
  44. #include <linux/mlx4/device.h>
  45. #include <linux/mlx4/cmd.h>
  46. #include <linux/mlx4/cq.h>
  47. #include "mlx4_en.h"
  48. #include "en_port.h"
  49. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  50. {
  51. struct mlx4_en_priv *priv = netdev_priv(dev);
  52. int i;
  53. unsigned int offset = 0;
  54. if (up && up != MLX4_EN_NUM_UP)
  55. return -EINVAL;
  56. netdev_set_num_tc(dev, up);
  57. /* Partition Tx queues evenly amongst UP's */
  58. for (i = 0; i < up; i++) {
  59. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  60. offset += priv->num_tx_rings_p_up;
  61. }
  62. return 0;
  63. }
  64. static int __mlx4_en_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
  65. struct tc_to_netdev *tc)
  66. {
  67. if (tc->type != TC_SETUP_MQPRIO)
  68. return -EINVAL;
  69. return mlx4_en_setup_tc(dev, tc->tc);
  70. }
  71. #ifdef CONFIG_RFS_ACCEL
  72. struct mlx4_en_filter {
  73. struct list_head next;
  74. struct work_struct work;
  75. u8 ip_proto;
  76. __be32 src_ip;
  77. __be32 dst_ip;
  78. __be16 src_port;
  79. __be16 dst_port;
  80. int rxq_index;
  81. struct mlx4_en_priv *priv;
  82. u32 flow_id; /* RFS infrastructure id */
  83. int id; /* mlx4_en driver id */
  84. u64 reg_id; /* Flow steering API id */
  85. u8 activated; /* Used to prevent expiry before filter
  86. * is attached
  87. */
  88. struct hlist_node filter_chain;
  89. };
  90. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  91. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  92. {
  93. switch (ip_proto) {
  94. case IPPROTO_UDP:
  95. return MLX4_NET_TRANS_RULE_ID_UDP;
  96. case IPPROTO_TCP:
  97. return MLX4_NET_TRANS_RULE_ID_TCP;
  98. default:
  99. return MLX4_NET_TRANS_RULE_NUM;
  100. }
  101. };
  102. static void mlx4_en_filter_work(struct work_struct *work)
  103. {
  104. struct mlx4_en_filter *filter = container_of(work,
  105. struct mlx4_en_filter,
  106. work);
  107. struct mlx4_en_priv *priv = filter->priv;
  108. struct mlx4_spec_list spec_tcp_udp = {
  109. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  110. {
  111. .tcp_udp = {
  112. .dst_port = filter->dst_port,
  113. .dst_port_msk = (__force __be16)-1,
  114. .src_port = filter->src_port,
  115. .src_port_msk = (__force __be16)-1,
  116. },
  117. },
  118. };
  119. struct mlx4_spec_list spec_ip = {
  120. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  121. {
  122. .ipv4 = {
  123. .dst_ip = filter->dst_ip,
  124. .dst_ip_msk = (__force __be32)-1,
  125. .src_ip = filter->src_ip,
  126. .src_ip_msk = (__force __be32)-1,
  127. },
  128. },
  129. };
  130. struct mlx4_spec_list spec_eth = {
  131. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  132. };
  133. struct mlx4_net_trans_rule rule = {
  134. .list = LIST_HEAD_INIT(rule.list),
  135. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  136. .exclusive = 1,
  137. .allow_loopback = 1,
  138. .promisc_mode = MLX4_FS_REGULAR,
  139. .port = priv->port,
  140. .priority = MLX4_DOMAIN_RFS,
  141. };
  142. int rc;
  143. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  144. if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
  145. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  146. filter->ip_proto);
  147. goto ignore;
  148. }
  149. list_add_tail(&spec_eth.list, &rule.list);
  150. list_add_tail(&spec_ip.list, &rule.list);
  151. list_add_tail(&spec_tcp_udp.list, &rule.list);
  152. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  153. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  154. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  155. filter->activated = 0;
  156. if (filter->reg_id) {
  157. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  158. if (rc && rc != -ENOENT)
  159. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  160. }
  161. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  162. if (rc)
  163. en_err(priv, "Error attaching flow. err = %d\n", rc);
  164. ignore:
  165. mlx4_en_filter_rfs_expire(priv);
  166. filter->activated = 1;
  167. }
  168. static inline struct hlist_head *
  169. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  170. __be16 src_port, __be16 dst_port)
  171. {
  172. unsigned long l;
  173. int bucket_idx;
  174. l = (__force unsigned long)src_port |
  175. ((__force unsigned long)dst_port << 2);
  176. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  177. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  178. return &priv->filter_hash[bucket_idx];
  179. }
  180. static struct mlx4_en_filter *
  181. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  182. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  183. __be16 dst_port, u32 flow_id)
  184. {
  185. struct mlx4_en_filter *filter = NULL;
  186. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  187. if (!filter)
  188. return NULL;
  189. filter->priv = priv;
  190. filter->rxq_index = rxq_index;
  191. INIT_WORK(&filter->work, mlx4_en_filter_work);
  192. filter->src_ip = src_ip;
  193. filter->dst_ip = dst_ip;
  194. filter->ip_proto = ip_proto;
  195. filter->src_port = src_port;
  196. filter->dst_port = dst_port;
  197. filter->flow_id = flow_id;
  198. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  199. list_add_tail(&filter->next, &priv->filters);
  200. hlist_add_head(&filter->filter_chain,
  201. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  202. dst_port));
  203. return filter;
  204. }
  205. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  206. {
  207. struct mlx4_en_priv *priv = filter->priv;
  208. int rc;
  209. list_del(&filter->next);
  210. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  211. if (rc && rc != -ENOENT)
  212. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  213. kfree(filter);
  214. }
  215. static inline struct mlx4_en_filter *
  216. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  217. u8 ip_proto, __be16 src_port, __be16 dst_port)
  218. {
  219. struct mlx4_en_filter *filter;
  220. struct mlx4_en_filter *ret = NULL;
  221. hlist_for_each_entry(filter,
  222. filter_hash_bucket(priv, src_ip, dst_ip,
  223. src_port, dst_port),
  224. filter_chain) {
  225. if (filter->src_ip == src_ip &&
  226. filter->dst_ip == dst_ip &&
  227. filter->ip_proto == ip_proto &&
  228. filter->src_port == src_port &&
  229. filter->dst_port == dst_port) {
  230. ret = filter;
  231. break;
  232. }
  233. }
  234. return ret;
  235. }
  236. static int
  237. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  238. u16 rxq_index, u32 flow_id)
  239. {
  240. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  241. struct mlx4_en_filter *filter;
  242. const struct iphdr *ip;
  243. const __be16 *ports;
  244. u8 ip_proto;
  245. __be32 src_ip;
  246. __be32 dst_ip;
  247. __be16 src_port;
  248. __be16 dst_port;
  249. int nhoff = skb_network_offset(skb);
  250. int ret = 0;
  251. if (skb->protocol != htons(ETH_P_IP))
  252. return -EPROTONOSUPPORT;
  253. ip = (const struct iphdr *)(skb->data + nhoff);
  254. if (ip_is_fragment(ip))
  255. return -EPROTONOSUPPORT;
  256. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  257. return -EPROTONOSUPPORT;
  258. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  259. ip_proto = ip->protocol;
  260. src_ip = ip->saddr;
  261. dst_ip = ip->daddr;
  262. src_port = ports[0];
  263. dst_port = ports[1];
  264. spin_lock_bh(&priv->filters_lock);
  265. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  266. src_port, dst_port);
  267. if (filter) {
  268. if (filter->rxq_index == rxq_index)
  269. goto out;
  270. filter->rxq_index = rxq_index;
  271. } else {
  272. filter = mlx4_en_filter_alloc(priv, rxq_index,
  273. src_ip, dst_ip, ip_proto,
  274. src_port, dst_port, flow_id);
  275. if (!filter) {
  276. ret = -ENOMEM;
  277. goto err;
  278. }
  279. }
  280. queue_work(priv->mdev->workqueue, &filter->work);
  281. out:
  282. ret = filter->id;
  283. err:
  284. spin_unlock_bh(&priv->filters_lock);
  285. return ret;
  286. }
  287. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  288. {
  289. struct mlx4_en_filter *filter, *tmp;
  290. LIST_HEAD(del_list);
  291. spin_lock_bh(&priv->filters_lock);
  292. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  293. list_move(&filter->next, &del_list);
  294. hlist_del(&filter->filter_chain);
  295. }
  296. spin_unlock_bh(&priv->filters_lock);
  297. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  298. cancel_work_sync(&filter->work);
  299. mlx4_en_filter_free(filter);
  300. }
  301. }
  302. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  303. {
  304. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  305. LIST_HEAD(del_list);
  306. int i = 0;
  307. spin_lock_bh(&priv->filters_lock);
  308. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  309. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  310. break;
  311. if (filter->activated &&
  312. !work_pending(&filter->work) &&
  313. rps_may_expire_flow(priv->dev,
  314. filter->rxq_index, filter->flow_id,
  315. filter->id)) {
  316. list_move(&filter->next, &del_list);
  317. hlist_del(&filter->filter_chain);
  318. } else
  319. last_filter = filter;
  320. i++;
  321. }
  322. if (last_filter && (&last_filter->next != priv->filters.next))
  323. list_move(&priv->filters, &last_filter->next);
  324. spin_unlock_bh(&priv->filters_lock);
  325. list_for_each_entry_safe(filter, tmp, &del_list, next)
  326. mlx4_en_filter_free(filter);
  327. }
  328. #endif
  329. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  330. __be16 proto, u16 vid)
  331. {
  332. struct mlx4_en_priv *priv = netdev_priv(dev);
  333. struct mlx4_en_dev *mdev = priv->mdev;
  334. int err;
  335. int idx;
  336. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  337. set_bit(vid, priv->active_vlans);
  338. /* Add VID to port VLAN filter */
  339. mutex_lock(&mdev->state_lock);
  340. if (mdev->device_up && priv->port_up) {
  341. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  342. if (err)
  343. en_err(priv, "Failed configuring VLAN filter\n");
  344. }
  345. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  346. en_dbg(HW, priv, "failed adding vlan %d\n", vid);
  347. mutex_unlock(&mdev->state_lock);
  348. return 0;
  349. }
  350. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  351. __be16 proto, u16 vid)
  352. {
  353. struct mlx4_en_priv *priv = netdev_priv(dev);
  354. struct mlx4_en_dev *mdev = priv->mdev;
  355. int err;
  356. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  357. clear_bit(vid, priv->active_vlans);
  358. /* Remove VID from port VLAN filter */
  359. mutex_lock(&mdev->state_lock);
  360. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  361. if (mdev->device_up && priv->port_up) {
  362. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  363. if (err)
  364. en_err(priv, "Failed configuring VLAN filter\n");
  365. }
  366. mutex_unlock(&mdev->state_lock);
  367. return 0;
  368. }
  369. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  370. {
  371. int i;
  372. for (i = ETH_ALEN - 1; i >= 0; --i) {
  373. dst_mac[i] = src_mac & 0xff;
  374. src_mac >>= 8;
  375. }
  376. memset(&dst_mac[ETH_ALEN], 0, 2);
  377. }
  378. static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
  379. int qpn, u64 *reg_id)
  380. {
  381. int err;
  382. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
  383. priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
  384. return 0; /* do nothing */
  385. err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
  386. MLX4_DOMAIN_NIC, reg_id);
  387. if (err) {
  388. en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
  389. return err;
  390. }
  391. en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
  392. return 0;
  393. }
  394. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  395. unsigned char *mac, int *qpn, u64 *reg_id)
  396. {
  397. struct mlx4_en_dev *mdev = priv->mdev;
  398. struct mlx4_dev *dev = mdev->dev;
  399. int err;
  400. switch (dev->caps.steering_mode) {
  401. case MLX4_STEERING_MODE_B0: {
  402. struct mlx4_qp qp;
  403. u8 gid[16] = {0};
  404. qp.qpn = *qpn;
  405. memcpy(&gid[10], mac, ETH_ALEN);
  406. gid[5] = priv->port;
  407. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  408. break;
  409. }
  410. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  411. struct mlx4_spec_list spec_eth = { {NULL} };
  412. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  413. struct mlx4_net_trans_rule rule = {
  414. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  415. .exclusive = 0,
  416. .allow_loopback = 1,
  417. .promisc_mode = MLX4_FS_REGULAR,
  418. .priority = MLX4_DOMAIN_NIC,
  419. };
  420. rule.port = priv->port;
  421. rule.qpn = *qpn;
  422. INIT_LIST_HEAD(&rule.list);
  423. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  424. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  425. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  426. list_add_tail(&spec_eth.list, &rule.list);
  427. err = mlx4_flow_attach(dev, &rule, reg_id);
  428. break;
  429. }
  430. default:
  431. return -EINVAL;
  432. }
  433. if (err)
  434. en_warn(priv, "Failed Attaching Unicast\n");
  435. return err;
  436. }
  437. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  438. unsigned char *mac, int qpn, u64 reg_id)
  439. {
  440. struct mlx4_en_dev *mdev = priv->mdev;
  441. struct mlx4_dev *dev = mdev->dev;
  442. switch (dev->caps.steering_mode) {
  443. case MLX4_STEERING_MODE_B0: {
  444. struct mlx4_qp qp;
  445. u8 gid[16] = {0};
  446. qp.qpn = qpn;
  447. memcpy(&gid[10], mac, ETH_ALEN);
  448. gid[5] = priv->port;
  449. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  450. break;
  451. }
  452. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  453. mlx4_flow_detach(dev, reg_id);
  454. break;
  455. }
  456. default:
  457. en_err(priv, "Invalid steering mode.\n");
  458. }
  459. }
  460. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  461. {
  462. struct mlx4_en_dev *mdev = priv->mdev;
  463. struct mlx4_dev *dev = mdev->dev;
  464. int index = 0;
  465. int err = 0;
  466. int *qpn = &priv->base_qpn;
  467. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  468. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  469. priv->dev->dev_addr);
  470. index = mlx4_register_mac(dev, priv->port, mac);
  471. if (index < 0) {
  472. err = index;
  473. en_err(priv, "Failed adding MAC: %pM\n",
  474. priv->dev->dev_addr);
  475. return err;
  476. }
  477. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  478. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  479. *qpn = base_qpn + index;
  480. return 0;
  481. }
  482. err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP);
  483. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  484. if (err) {
  485. en_err(priv, "Failed to reserve qp for mac registration\n");
  486. mlx4_unregister_mac(dev, priv->port, mac);
  487. return err;
  488. }
  489. return 0;
  490. }
  491. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  492. {
  493. struct mlx4_en_dev *mdev = priv->mdev;
  494. struct mlx4_dev *dev = mdev->dev;
  495. int qpn = priv->base_qpn;
  496. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  497. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  498. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  499. priv->dev->dev_addr);
  500. mlx4_unregister_mac(dev, priv->port, mac);
  501. } else {
  502. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  503. priv->port, qpn);
  504. mlx4_qp_release_range(dev, qpn, 1);
  505. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  506. }
  507. }
  508. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  509. unsigned char *new_mac, unsigned char *prev_mac)
  510. {
  511. struct mlx4_en_dev *mdev = priv->mdev;
  512. struct mlx4_dev *dev = mdev->dev;
  513. int err = 0;
  514. u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
  515. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  516. struct hlist_head *bucket;
  517. unsigned int mac_hash;
  518. struct mlx4_mac_entry *entry;
  519. struct hlist_node *tmp;
  520. u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
  521. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  522. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  523. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  524. mlx4_en_uc_steer_release(priv, entry->mac,
  525. qpn, entry->reg_id);
  526. mlx4_unregister_mac(dev, priv->port,
  527. prev_mac_u64);
  528. hlist_del_rcu(&entry->hlist);
  529. synchronize_rcu();
  530. memcpy(entry->mac, new_mac, ETH_ALEN);
  531. entry->reg_id = 0;
  532. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  533. hlist_add_head_rcu(&entry->hlist,
  534. &priv->mac_hash[mac_hash]);
  535. mlx4_register_mac(dev, priv->port, new_mac_u64);
  536. err = mlx4_en_uc_steer_add(priv, new_mac,
  537. &qpn,
  538. &entry->reg_id);
  539. if (err)
  540. return err;
  541. if (priv->tunnel_reg_id) {
  542. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  543. priv->tunnel_reg_id = 0;
  544. }
  545. err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
  546. &priv->tunnel_reg_id);
  547. return err;
  548. }
  549. }
  550. return -EINVAL;
  551. }
  552. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  553. }
  554. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
  555. unsigned char new_mac[ETH_ALEN + 2])
  556. {
  557. int err = 0;
  558. if (priv->port_up) {
  559. /* Remove old MAC and insert the new one */
  560. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  561. new_mac, priv->current_mac);
  562. if (err)
  563. en_err(priv, "Failed changing HW MAC address\n");
  564. } else
  565. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  566. if (!err)
  567. memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
  568. return err;
  569. }
  570. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  571. {
  572. struct mlx4_en_priv *priv = netdev_priv(dev);
  573. struct mlx4_en_dev *mdev = priv->mdev;
  574. struct sockaddr *saddr = addr;
  575. unsigned char new_mac[ETH_ALEN + 2];
  576. int err;
  577. if (!is_valid_ether_addr(saddr->sa_data))
  578. return -EADDRNOTAVAIL;
  579. mutex_lock(&mdev->state_lock);
  580. memcpy(new_mac, saddr->sa_data, ETH_ALEN);
  581. err = mlx4_en_do_set_mac(priv, new_mac);
  582. if (!err)
  583. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  584. mutex_unlock(&mdev->state_lock);
  585. return err;
  586. }
  587. static void mlx4_en_clear_list(struct net_device *dev)
  588. {
  589. struct mlx4_en_priv *priv = netdev_priv(dev);
  590. struct mlx4_en_mc_list *tmp, *mc_to_del;
  591. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  592. list_del(&mc_to_del->list);
  593. kfree(mc_to_del);
  594. }
  595. }
  596. static void mlx4_en_cache_mclist(struct net_device *dev)
  597. {
  598. struct mlx4_en_priv *priv = netdev_priv(dev);
  599. struct netdev_hw_addr *ha;
  600. struct mlx4_en_mc_list *tmp;
  601. mlx4_en_clear_list(dev);
  602. netdev_for_each_mc_addr(ha, dev) {
  603. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  604. if (!tmp) {
  605. mlx4_en_clear_list(dev);
  606. return;
  607. }
  608. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  609. list_add_tail(&tmp->list, &priv->mc_list);
  610. }
  611. }
  612. static void update_mclist_flags(struct mlx4_en_priv *priv,
  613. struct list_head *dst,
  614. struct list_head *src)
  615. {
  616. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  617. bool found;
  618. /* Find all the entries that should be removed from dst,
  619. * These are the entries that are not found in src
  620. */
  621. list_for_each_entry(dst_tmp, dst, list) {
  622. found = false;
  623. list_for_each_entry(src_tmp, src, list) {
  624. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  625. found = true;
  626. break;
  627. }
  628. }
  629. if (!found)
  630. dst_tmp->action = MCLIST_REM;
  631. }
  632. /* Add entries that exist in src but not in dst
  633. * mark them as need to add
  634. */
  635. list_for_each_entry(src_tmp, src, list) {
  636. found = false;
  637. list_for_each_entry(dst_tmp, dst, list) {
  638. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  639. dst_tmp->action = MCLIST_NONE;
  640. found = true;
  641. break;
  642. }
  643. }
  644. if (!found) {
  645. new_mc = kmemdup(src_tmp,
  646. sizeof(struct mlx4_en_mc_list),
  647. GFP_KERNEL);
  648. if (!new_mc)
  649. return;
  650. new_mc->action = MCLIST_ADD;
  651. list_add_tail(&new_mc->list, dst);
  652. }
  653. }
  654. }
  655. static void mlx4_en_set_rx_mode(struct net_device *dev)
  656. {
  657. struct mlx4_en_priv *priv = netdev_priv(dev);
  658. if (!priv->port_up)
  659. return;
  660. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  661. }
  662. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  663. struct mlx4_en_dev *mdev)
  664. {
  665. int err = 0;
  666. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  667. if (netif_msg_rx_status(priv))
  668. en_warn(priv, "Entering promiscuous mode\n");
  669. priv->flags |= MLX4_EN_FLAG_PROMISC;
  670. /* Enable promiscouos mode */
  671. switch (mdev->dev->caps.steering_mode) {
  672. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  673. err = mlx4_flow_steer_promisc_add(mdev->dev,
  674. priv->port,
  675. priv->base_qpn,
  676. MLX4_FS_ALL_DEFAULT);
  677. if (err)
  678. en_err(priv, "Failed enabling promiscuous mode\n");
  679. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  680. break;
  681. case MLX4_STEERING_MODE_B0:
  682. err = mlx4_unicast_promisc_add(mdev->dev,
  683. priv->base_qpn,
  684. priv->port);
  685. if (err)
  686. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  687. /* Add the default qp number as multicast
  688. * promisc
  689. */
  690. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  691. err = mlx4_multicast_promisc_add(mdev->dev,
  692. priv->base_qpn,
  693. priv->port);
  694. if (err)
  695. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  696. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  697. }
  698. break;
  699. case MLX4_STEERING_MODE_A0:
  700. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  701. priv->port,
  702. priv->base_qpn,
  703. 1);
  704. if (err)
  705. en_err(priv, "Failed enabling promiscuous mode\n");
  706. break;
  707. }
  708. /* Disable port multicast filter (unconditionally) */
  709. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  710. 0, MLX4_MCAST_DISABLE);
  711. if (err)
  712. en_err(priv, "Failed disabling multicast filter\n");
  713. }
  714. }
  715. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  716. struct mlx4_en_dev *mdev)
  717. {
  718. int err = 0;
  719. if (netif_msg_rx_status(priv))
  720. en_warn(priv, "Leaving promiscuous mode\n");
  721. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  722. /* Disable promiscouos mode */
  723. switch (mdev->dev->caps.steering_mode) {
  724. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  725. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  726. priv->port,
  727. MLX4_FS_ALL_DEFAULT);
  728. if (err)
  729. en_err(priv, "Failed disabling promiscuous mode\n");
  730. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  731. break;
  732. case MLX4_STEERING_MODE_B0:
  733. err = mlx4_unicast_promisc_remove(mdev->dev,
  734. priv->base_qpn,
  735. priv->port);
  736. if (err)
  737. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  738. /* Disable Multicast promisc */
  739. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  740. err = mlx4_multicast_promisc_remove(mdev->dev,
  741. priv->base_qpn,
  742. priv->port);
  743. if (err)
  744. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  745. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  746. }
  747. break;
  748. case MLX4_STEERING_MODE_A0:
  749. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  750. priv->port,
  751. priv->base_qpn, 0);
  752. if (err)
  753. en_err(priv, "Failed disabling promiscuous mode\n");
  754. break;
  755. }
  756. }
  757. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  758. struct net_device *dev,
  759. struct mlx4_en_dev *mdev)
  760. {
  761. struct mlx4_en_mc_list *mclist, *tmp;
  762. u64 mcast_addr = 0;
  763. u8 mc_list[16] = {0};
  764. int err = 0;
  765. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  766. if (dev->flags & IFF_ALLMULTI) {
  767. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  768. 0, MLX4_MCAST_DISABLE);
  769. if (err)
  770. en_err(priv, "Failed disabling multicast filter\n");
  771. /* Add the default qp number as multicast promisc */
  772. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  773. switch (mdev->dev->caps.steering_mode) {
  774. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  775. err = mlx4_flow_steer_promisc_add(mdev->dev,
  776. priv->port,
  777. priv->base_qpn,
  778. MLX4_FS_MC_DEFAULT);
  779. break;
  780. case MLX4_STEERING_MODE_B0:
  781. err = mlx4_multicast_promisc_add(mdev->dev,
  782. priv->base_qpn,
  783. priv->port);
  784. break;
  785. case MLX4_STEERING_MODE_A0:
  786. break;
  787. }
  788. if (err)
  789. en_err(priv, "Failed entering multicast promisc mode\n");
  790. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  791. }
  792. } else {
  793. /* Disable Multicast promisc */
  794. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  795. switch (mdev->dev->caps.steering_mode) {
  796. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  797. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  798. priv->port,
  799. MLX4_FS_MC_DEFAULT);
  800. break;
  801. case MLX4_STEERING_MODE_B0:
  802. err = mlx4_multicast_promisc_remove(mdev->dev,
  803. priv->base_qpn,
  804. priv->port);
  805. break;
  806. case MLX4_STEERING_MODE_A0:
  807. break;
  808. }
  809. if (err)
  810. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  811. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  812. }
  813. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  814. 0, MLX4_MCAST_DISABLE);
  815. if (err)
  816. en_err(priv, "Failed disabling multicast filter\n");
  817. /* Flush mcast filter and init it with broadcast address */
  818. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  819. 1, MLX4_MCAST_CONFIG);
  820. /* Update multicast list - we cache all addresses so they won't
  821. * change while HW is updated holding the command semaphor */
  822. netif_addr_lock_bh(dev);
  823. mlx4_en_cache_mclist(dev);
  824. netif_addr_unlock_bh(dev);
  825. list_for_each_entry(mclist, &priv->mc_list, list) {
  826. mcast_addr = mlx4_mac_to_u64(mclist->addr);
  827. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  828. mcast_addr, 0, MLX4_MCAST_CONFIG);
  829. }
  830. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  831. 0, MLX4_MCAST_ENABLE);
  832. if (err)
  833. en_err(priv, "Failed enabling multicast filter\n");
  834. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  835. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  836. if (mclist->action == MCLIST_REM) {
  837. /* detach this address and delete from list */
  838. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  839. mc_list[5] = priv->port;
  840. err = mlx4_multicast_detach(mdev->dev,
  841. &priv->rss_map.indir_qp,
  842. mc_list,
  843. MLX4_PROT_ETH,
  844. mclist->reg_id);
  845. if (err)
  846. en_err(priv, "Fail to detach multicast address\n");
  847. if (mclist->tunnel_reg_id) {
  848. err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
  849. if (err)
  850. en_err(priv, "Failed to detach multicast address\n");
  851. }
  852. /* remove from list */
  853. list_del(&mclist->list);
  854. kfree(mclist);
  855. } else if (mclist->action == MCLIST_ADD) {
  856. /* attach the address */
  857. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  858. /* needed for B0 steering support */
  859. mc_list[5] = priv->port;
  860. err = mlx4_multicast_attach(mdev->dev,
  861. &priv->rss_map.indir_qp,
  862. mc_list,
  863. priv->port, 0,
  864. MLX4_PROT_ETH,
  865. &mclist->reg_id);
  866. if (err)
  867. en_err(priv, "Fail to attach multicast address\n");
  868. err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
  869. &mclist->tunnel_reg_id);
  870. if (err)
  871. en_err(priv, "Failed to attach multicast address\n");
  872. }
  873. }
  874. }
  875. }
  876. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  877. struct net_device *dev,
  878. struct mlx4_en_dev *mdev)
  879. {
  880. struct netdev_hw_addr *ha;
  881. struct mlx4_mac_entry *entry;
  882. struct hlist_node *tmp;
  883. bool found;
  884. u64 mac;
  885. int err = 0;
  886. struct hlist_head *bucket;
  887. unsigned int i;
  888. int removed = 0;
  889. u32 prev_flags;
  890. /* Note that we do not need to protect our mac_hash traversal with rcu,
  891. * since all modification code is protected by mdev->state_lock
  892. */
  893. /* find what to remove */
  894. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  895. bucket = &priv->mac_hash[i];
  896. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  897. found = false;
  898. netdev_for_each_uc_addr(ha, dev) {
  899. if (ether_addr_equal_64bits(entry->mac,
  900. ha->addr)) {
  901. found = true;
  902. break;
  903. }
  904. }
  905. /* MAC address of the port is not in uc list */
  906. if (ether_addr_equal_64bits(entry->mac,
  907. priv->current_mac))
  908. found = true;
  909. if (!found) {
  910. mac = mlx4_mac_to_u64(entry->mac);
  911. mlx4_en_uc_steer_release(priv, entry->mac,
  912. priv->base_qpn,
  913. entry->reg_id);
  914. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  915. hlist_del_rcu(&entry->hlist);
  916. kfree_rcu(entry, rcu);
  917. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  918. entry->mac, priv->port);
  919. ++removed;
  920. }
  921. }
  922. }
  923. /* if we didn't remove anything, there is no use in trying to add
  924. * again once we are in a forced promisc mode state
  925. */
  926. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  927. return;
  928. prev_flags = priv->flags;
  929. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  930. /* find what to add */
  931. netdev_for_each_uc_addr(ha, dev) {
  932. found = false;
  933. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  934. hlist_for_each_entry(entry, bucket, hlist) {
  935. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  936. found = true;
  937. break;
  938. }
  939. }
  940. if (!found) {
  941. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  942. if (!entry) {
  943. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  944. ha->addr, priv->port);
  945. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  946. break;
  947. }
  948. mac = mlx4_mac_to_u64(ha->addr);
  949. memcpy(entry->mac, ha->addr, ETH_ALEN);
  950. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  951. if (err < 0) {
  952. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  953. ha->addr, priv->port, err);
  954. kfree(entry);
  955. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  956. break;
  957. }
  958. err = mlx4_en_uc_steer_add(priv, ha->addr,
  959. &priv->base_qpn,
  960. &entry->reg_id);
  961. if (err) {
  962. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  963. ha->addr, priv->port, err);
  964. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  965. kfree(entry);
  966. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  967. break;
  968. } else {
  969. unsigned int mac_hash;
  970. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  971. ha->addr, priv->port);
  972. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  973. bucket = &priv->mac_hash[mac_hash];
  974. hlist_add_head_rcu(&entry->hlist, bucket);
  975. }
  976. }
  977. }
  978. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  979. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  980. priv->port);
  981. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  982. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  983. priv->port);
  984. }
  985. }
  986. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  987. {
  988. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  989. rx_mode_task);
  990. struct mlx4_en_dev *mdev = priv->mdev;
  991. struct net_device *dev = priv->dev;
  992. mutex_lock(&mdev->state_lock);
  993. if (!mdev->device_up) {
  994. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  995. goto out;
  996. }
  997. if (!priv->port_up) {
  998. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  999. goto out;
  1000. }
  1001. if (!netif_carrier_ok(dev)) {
  1002. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1003. if (priv->port_state.link_state) {
  1004. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1005. netif_carrier_on(dev);
  1006. en_dbg(LINK, priv, "Link Up\n");
  1007. }
  1008. }
  1009. }
  1010. if (dev->priv_flags & IFF_UNICAST_FLT)
  1011. mlx4_en_do_uc_filter(priv, dev, mdev);
  1012. /* Promsicuous mode: disable all filters */
  1013. if ((dev->flags & IFF_PROMISC) ||
  1014. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1015. mlx4_en_set_promisc_mode(priv, mdev);
  1016. goto out;
  1017. }
  1018. /* Not in promiscuous mode */
  1019. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1020. mlx4_en_clear_promisc_mode(priv, mdev);
  1021. mlx4_en_do_multicast(priv, dev, mdev);
  1022. out:
  1023. mutex_unlock(&mdev->state_lock);
  1024. }
  1025. #ifdef CONFIG_NET_POLL_CONTROLLER
  1026. static void mlx4_en_netpoll(struct net_device *dev)
  1027. {
  1028. struct mlx4_en_priv *priv = netdev_priv(dev);
  1029. struct mlx4_en_cq *cq;
  1030. int i;
  1031. for (i = 0; i < priv->rx_ring_num; i++) {
  1032. cq = priv->rx_cq[i];
  1033. napi_schedule(&cq->napi);
  1034. }
  1035. }
  1036. #endif
  1037. static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
  1038. {
  1039. u64 reg_id;
  1040. int err = 0;
  1041. int *qpn = &priv->base_qpn;
  1042. struct mlx4_mac_entry *entry;
  1043. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  1044. if (err)
  1045. return err;
  1046. err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
  1047. &priv->tunnel_reg_id);
  1048. if (err)
  1049. goto tunnel_err;
  1050. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1051. if (!entry) {
  1052. err = -ENOMEM;
  1053. goto alloc_err;
  1054. }
  1055. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  1056. memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
  1057. entry->reg_id = reg_id;
  1058. hlist_add_head_rcu(&entry->hlist,
  1059. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  1060. return 0;
  1061. alloc_err:
  1062. if (priv->tunnel_reg_id)
  1063. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1064. tunnel_err:
  1065. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  1066. return err;
  1067. }
  1068. static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
  1069. {
  1070. u64 mac;
  1071. unsigned int i;
  1072. int qpn = priv->base_qpn;
  1073. struct hlist_head *bucket;
  1074. struct hlist_node *tmp;
  1075. struct mlx4_mac_entry *entry;
  1076. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  1077. bucket = &priv->mac_hash[i];
  1078. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  1079. mac = mlx4_mac_to_u64(entry->mac);
  1080. en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
  1081. entry->mac);
  1082. mlx4_en_uc_steer_release(priv, entry->mac,
  1083. qpn, entry->reg_id);
  1084. mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
  1085. hlist_del_rcu(&entry->hlist);
  1086. kfree_rcu(entry, rcu);
  1087. }
  1088. }
  1089. if (priv->tunnel_reg_id) {
  1090. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1091. priv->tunnel_reg_id = 0;
  1092. }
  1093. }
  1094. static void mlx4_en_tx_timeout(struct net_device *dev)
  1095. {
  1096. struct mlx4_en_priv *priv = netdev_priv(dev);
  1097. struct mlx4_en_dev *mdev = priv->mdev;
  1098. int i;
  1099. if (netif_msg_timer(priv))
  1100. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1101. for (i = 0; i < priv->tx_ring_num; i++) {
  1102. if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
  1103. continue;
  1104. en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
  1105. i, priv->tx_ring[i]->qpn, priv->tx_ring[i]->cqn,
  1106. priv->tx_ring[i]->cons, priv->tx_ring[i]->prod);
  1107. }
  1108. priv->port_stats.tx_timeout++;
  1109. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1110. queue_work(mdev->workqueue, &priv->watchdog_task);
  1111. }
  1112. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1113. {
  1114. struct mlx4_en_priv *priv = netdev_priv(dev);
  1115. spin_lock_bh(&priv->stats_lock);
  1116. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1117. spin_unlock_bh(&priv->stats_lock);
  1118. return &priv->ret_stats;
  1119. }
  1120. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1121. {
  1122. struct mlx4_en_cq *cq;
  1123. int i;
  1124. /* If we haven't received a specific coalescing setting
  1125. * (module param), we set the moderation parameters as follows:
  1126. * - moder_cnt is set to the number of mtu sized packets to
  1127. * satisfy our coalescing target.
  1128. * - moder_time is set to a fixed value.
  1129. */
  1130. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1131. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1132. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1133. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1134. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1135. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1136. /* Setup cq moderation params */
  1137. for (i = 0; i < priv->rx_ring_num; i++) {
  1138. cq = priv->rx_cq[i];
  1139. cq->moder_cnt = priv->rx_frames;
  1140. cq->moder_time = priv->rx_usecs;
  1141. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1142. priv->last_moder_packets[i] = 0;
  1143. priv->last_moder_bytes[i] = 0;
  1144. }
  1145. for (i = 0; i < priv->tx_ring_num; i++) {
  1146. cq = priv->tx_cq[i];
  1147. cq->moder_cnt = priv->tx_frames;
  1148. cq->moder_time = priv->tx_usecs;
  1149. }
  1150. /* Reset auto-moderation params */
  1151. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1152. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1153. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1154. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1155. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1156. priv->adaptive_rx_coal = 1;
  1157. priv->last_moder_jiffies = 0;
  1158. priv->last_moder_tx_packets = 0;
  1159. }
  1160. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1161. {
  1162. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1163. struct mlx4_en_cq *cq;
  1164. unsigned long packets;
  1165. unsigned long rate;
  1166. unsigned long avg_pkt_size;
  1167. unsigned long rx_packets;
  1168. unsigned long rx_bytes;
  1169. unsigned long rx_pkt_diff;
  1170. int moder_time;
  1171. int ring, err;
  1172. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1173. return;
  1174. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1175. spin_lock_bh(&priv->stats_lock);
  1176. rx_packets = priv->rx_ring[ring]->packets;
  1177. rx_bytes = priv->rx_ring[ring]->bytes;
  1178. spin_unlock_bh(&priv->stats_lock);
  1179. rx_pkt_diff = ((unsigned long) (rx_packets -
  1180. priv->last_moder_packets[ring]));
  1181. packets = rx_pkt_diff;
  1182. rate = packets * HZ / period;
  1183. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1184. priv->last_moder_bytes[ring])) / packets : 0;
  1185. /* Apply auto-moderation only when packet rate
  1186. * exceeds a rate that it matters */
  1187. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1188. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1189. if (rate < priv->pkt_rate_low)
  1190. moder_time = priv->rx_usecs_low;
  1191. else if (rate > priv->pkt_rate_high)
  1192. moder_time = priv->rx_usecs_high;
  1193. else
  1194. moder_time = (rate - priv->pkt_rate_low) *
  1195. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1196. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1197. priv->rx_usecs_low;
  1198. } else {
  1199. moder_time = priv->rx_usecs_low;
  1200. }
  1201. if (moder_time != priv->last_moder_time[ring]) {
  1202. priv->last_moder_time[ring] = moder_time;
  1203. cq = priv->rx_cq[ring];
  1204. cq->moder_time = moder_time;
  1205. cq->moder_cnt = priv->rx_frames;
  1206. err = mlx4_en_set_cq_moder(priv, cq);
  1207. if (err)
  1208. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1209. ring);
  1210. }
  1211. priv->last_moder_packets[ring] = rx_packets;
  1212. priv->last_moder_bytes[ring] = rx_bytes;
  1213. }
  1214. priv->last_moder_jiffies = jiffies;
  1215. }
  1216. static void mlx4_en_do_get_stats(struct work_struct *work)
  1217. {
  1218. struct delayed_work *delay = to_delayed_work(work);
  1219. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1220. stats_task);
  1221. struct mlx4_en_dev *mdev = priv->mdev;
  1222. int err;
  1223. mutex_lock(&mdev->state_lock);
  1224. if (mdev->device_up) {
  1225. if (priv->port_up) {
  1226. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1227. if (err)
  1228. en_dbg(HW, priv, "Could not update stats\n");
  1229. mlx4_en_auto_moderation(priv);
  1230. }
  1231. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1232. }
  1233. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1234. mlx4_en_do_set_mac(priv, priv->current_mac);
  1235. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1236. }
  1237. mutex_unlock(&mdev->state_lock);
  1238. }
  1239. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1240. * periodically
  1241. */
  1242. static void mlx4_en_service_task(struct work_struct *work)
  1243. {
  1244. struct delayed_work *delay = to_delayed_work(work);
  1245. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1246. service_task);
  1247. struct mlx4_en_dev *mdev = priv->mdev;
  1248. mutex_lock(&mdev->state_lock);
  1249. if (mdev->device_up) {
  1250. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1251. mlx4_en_ptp_overflow_check(mdev);
  1252. mlx4_en_recover_from_oom(priv);
  1253. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1254. SERVICE_TASK_DELAY);
  1255. }
  1256. mutex_unlock(&mdev->state_lock);
  1257. }
  1258. static void mlx4_en_linkstate(struct work_struct *work)
  1259. {
  1260. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1261. linkstate_task);
  1262. struct mlx4_en_dev *mdev = priv->mdev;
  1263. int linkstate = priv->link_state;
  1264. mutex_lock(&mdev->state_lock);
  1265. /* If observable port state changed set carrier state and
  1266. * report to system log */
  1267. if (priv->last_link_state != linkstate) {
  1268. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1269. en_info(priv, "Link Down\n");
  1270. netif_carrier_off(priv->dev);
  1271. } else {
  1272. en_info(priv, "Link Up\n");
  1273. netif_carrier_on(priv->dev);
  1274. }
  1275. }
  1276. priv->last_link_state = linkstate;
  1277. mutex_unlock(&mdev->state_lock);
  1278. }
  1279. static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1280. {
  1281. struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
  1282. int numa_node = priv->mdev->dev->numa_node;
  1283. if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
  1284. return -ENOMEM;
  1285. cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
  1286. ring->affinity_mask);
  1287. return 0;
  1288. }
  1289. static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1290. {
  1291. free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
  1292. }
  1293. int mlx4_en_start_port(struct net_device *dev)
  1294. {
  1295. struct mlx4_en_priv *priv = netdev_priv(dev);
  1296. struct mlx4_en_dev *mdev = priv->mdev;
  1297. struct mlx4_en_cq *cq;
  1298. struct mlx4_en_tx_ring *tx_ring;
  1299. int rx_index = 0;
  1300. int tx_index = 0;
  1301. int err = 0;
  1302. int i;
  1303. int j;
  1304. u8 mc_list[16] = {0};
  1305. if (priv->port_up) {
  1306. en_dbg(DRV, priv, "start port called while port already up\n");
  1307. return 0;
  1308. }
  1309. INIT_LIST_HEAD(&priv->mc_list);
  1310. INIT_LIST_HEAD(&priv->curr_list);
  1311. INIT_LIST_HEAD(&priv->ethtool_list);
  1312. memset(&priv->ethtool_rules[0], 0,
  1313. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1314. /* Calculate Rx buf size */
  1315. dev->mtu = min(dev->mtu, priv->max_mtu);
  1316. mlx4_en_calc_rx_buf(dev);
  1317. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1318. /* Configure rx cq's and rings */
  1319. err = mlx4_en_activate_rx_rings(priv);
  1320. if (err) {
  1321. en_err(priv, "Failed to activate RX rings\n");
  1322. return err;
  1323. }
  1324. for (i = 0; i < priv->rx_ring_num; i++) {
  1325. cq = priv->rx_cq[i];
  1326. err = mlx4_en_init_affinity_hint(priv, i);
  1327. if (err) {
  1328. en_err(priv, "Failed preparing IRQ affinity hint\n");
  1329. goto cq_err;
  1330. }
  1331. err = mlx4_en_activate_cq(priv, cq, i);
  1332. if (err) {
  1333. en_err(priv, "Failed activating Rx CQ\n");
  1334. mlx4_en_free_affinity_hint(priv, i);
  1335. goto cq_err;
  1336. }
  1337. for (j = 0; j < cq->size; j++) {
  1338. struct mlx4_cqe *cqe = NULL;
  1339. cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
  1340. priv->cqe_factor;
  1341. cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1342. }
  1343. err = mlx4_en_set_cq_moder(priv, cq);
  1344. if (err) {
  1345. en_err(priv, "Failed setting cq moderation parameters\n");
  1346. mlx4_en_deactivate_cq(priv, cq);
  1347. mlx4_en_free_affinity_hint(priv, i);
  1348. goto cq_err;
  1349. }
  1350. mlx4_en_arm_cq(priv, cq);
  1351. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1352. ++rx_index;
  1353. }
  1354. /* Set qp number */
  1355. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1356. err = mlx4_en_get_qp(priv);
  1357. if (err) {
  1358. en_err(priv, "Failed getting eth qp\n");
  1359. goto cq_err;
  1360. }
  1361. mdev->mac_removed[priv->port] = 0;
  1362. priv->counter_index =
  1363. mlx4_get_default_counter_index(mdev->dev, priv->port);
  1364. err = mlx4_en_config_rss_steer(priv);
  1365. if (err) {
  1366. en_err(priv, "Failed configuring rss steering\n");
  1367. goto mac_err;
  1368. }
  1369. err = mlx4_en_create_drop_qp(priv);
  1370. if (err)
  1371. goto rss_err;
  1372. /* Configure tx cq's and rings */
  1373. for (i = 0; i < priv->tx_ring_num; i++) {
  1374. /* Configure cq */
  1375. cq = priv->tx_cq[i];
  1376. err = mlx4_en_activate_cq(priv, cq, i);
  1377. if (err) {
  1378. en_err(priv, "Failed allocating Tx CQ\n");
  1379. goto tx_err;
  1380. }
  1381. err = mlx4_en_set_cq_moder(priv, cq);
  1382. if (err) {
  1383. en_err(priv, "Failed setting cq moderation parameters\n");
  1384. mlx4_en_deactivate_cq(priv, cq);
  1385. goto tx_err;
  1386. }
  1387. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1388. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1389. /* Configure ring */
  1390. tx_ring = priv->tx_ring[i];
  1391. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1392. i / priv->num_tx_rings_p_up);
  1393. if (err) {
  1394. en_err(priv, "Failed allocating Tx ring\n");
  1395. mlx4_en_deactivate_cq(priv, cq);
  1396. goto tx_err;
  1397. }
  1398. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1399. /* Arm CQ for TX completions */
  1400. mlx4_en_arm_cq(priv, cq);
  1401. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1402. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1403. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1404. ++tx_index;
  1405. }
  1406. /* Configure port */
  1407. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1408. priv->rx_skb_size + ETH_FCS_LEN,
  1409. priv->prof->tx_pause,
  1410. priv->prof->tx_ppp,
  1411. priv->prof->rx_pause,
  1412. priv->prof->rx_ppp);
  1413. if (err) {
  1414. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1415. priv->port, err);
  1416. goto tx_err;
  1417. }
  1418. /* Set default qp number */
  1419. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1420. if (err) {
  1421. en_err(priv, "Failed setting default qp numbers\n");
  1422. goto tx_err;
  1423. }
  1424. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  1425. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  1426. if (err) {
  1427. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  1428. err);
  1429. goto tx_err;
  1430. }
  1431. }
  1432. /* Init port */
  1433. en_dbg(HW, priv, "Initializing port\n");
  1434. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1435. if (err) {
  1436. en_err(priv, "Failed Initializing port\n");
  1437. goto tx_err;
  1438. }
  1439. /* Set Unicast and VXLAN steering rules */
  1440. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
  1441. mlx4_en_set_rss_steer_rules(priv))
  1442. mlx4_warn(mdev, "Failed setting steering rules\n");
  1443. /* Attach rx QP to bradcast address */
  1444. eth_broadcast_addr(&mc_list[10]);
  1445. mc_list[5] = priv->port; /* needed for B0 steering support */
  1446. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1447. priv->port, 0, MLX4_PROT_ETH,
  1448. &priv->broadcast_id))
  1449. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1450. /* Must redo promiscuous mode setup. */
  1451. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1452. /* Schedule multicast task to populate multicast list */
  1453. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1454. #ifdef CONFIG_MLX4_EN_VXLAN
  1455. if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1456. vxlan_get_rx_port(dev);
  1457. #endif
  1458. priv->port_up = true;
  1459. netif_tx_start_all_queues(dev);
  1460. netif_device_attach(dev);
  1461. return 0;
  1462. tx_err:
  1463. while (tx_index--) {
  1464. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]);
  1465. mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]);
  1466. }
  1467. mlx4_en_destroy_drop_qp(priv);
  1468. rss_err:
  1469. mlx4_en_release_rss_steer(priv);
  1470. mac_err:
  1471. mlx4_en_put_qp(priv);
  1472. cq_err:
  1473. while (rx_index--) {
  1474. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1475. mlx4_en_free_affinity_hint(priv, rx_index);
  1476. }
  1477. for (i = 0; i < priv->rx_ring_num; i++)
  1478. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1479. return err; /* need to close devices */
  1480. }
  1481. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1482. {
  1483. struct mlx4_en_priv *priv = netdev_priv(dev);
  1484. struct mlx4_en_dev *mdev = priv->mdev;
  1485. struct mlx4_en_mc_list *mclist, *tmp;
  1486. struct ethtool_flow_id *flow, *tmp_flow;
  1487. int i;
  1488. u8 mc_list[16] = {0};
  1489. if (!priv->port_up) {
  1490. en_dbg(DRV, priv, "stop port called while port already down\n");
  1491. return;
  1492. }
  1493. /* close port*/
  1494. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1495. /* Synchronize with tx routine */
  1496. netif_tx_lock_bh(dev);
  1497. if (detach)
  1498. netif_device_detach(dev);
  1499. netif_tx_stop_all_queues(dev);
  1500. netif_tx_unlock_bh(dev);
  1501. netif_tx_disable(dev);
  1502. /* Set port as not active */
  1503. priv->port_up = false;
  1504. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  1505. /* Promsicuous mode */
  1506. if (mdev->dev->caps.steering_mode ==
  1507. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1508. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1509. MLX4_EN_FLAG_MC_PROMISC);
  1510. mlx4_flow_steer_promisc_remove(mdev->dev,
  1511. priv->port,
  1512. MLX4_FS_ALL_DEFAULT);
  1513. mlx4_flow_steer_promisc_remove(mdev->dev,
  1514. priv->port,
  1515. MLX4_FS_MC_DEFAULT);
  1516. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1517. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1518. /* Disable promiscouos mode */
  1519. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1520. priv->port);
  1521. /* Disable Multicast promisc */
  1522. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1523. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1524. priv->port);
  1525. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1526. }
  1527. }
  1528. /* Detach All multicasts */
  1529. eth_broadcast_addr(&mc_list[10]);
  1530. mc_list[5] = priv->port; /* needed for B0 steering support */
  1531. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1532. MLX4_PROT_ETH, priv->broadcast_id);
  1533. list_for_each_entry(mclist, &priv->curr_list, list) {
  1534. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1535. mc_list[5] = priv->port;
  1536. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1537. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1538. if (mclist->tunnel_reg_id)
  1539. mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
  1540. }
  1541. mlx4_en_clear_list(dev);
  1542. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1543. list_del(&mclist->list);
  1544. kfree(mclist);
  1545. }
  1546. /* Flush multicast filter */
  1547. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1548. /* Remove flow steering rules for the port*/
  1549. if (mdev->dev->caps.steering_mode ==
  1550. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1551. ASSERT_RTNL();
  1552. list_for_each_entry_safe(flow, tmp_flow,
  1553. &priv->ethtool_list, list) {
  1554. mlx4_flow_detach(mdev->dev, flow->id);
  1555. list_del(&flow->list);
  1556. }
  1557. }
  1558. mlx4_en_destroy_drop_qp(priv);
  1559. /* Free TX Rings */
  1560. for (i = 0; i < priv->tx_ring_num; i++) {
  1561. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]);
  1562. mlx4_en_deactivate_cq(priv, priv->tx_cq[i]);
  1563. }
  1564. msleep(10);
  1565. for (i = 0; i < priv->tx_ring_num; i++)
  1566. mlx4_en_free_tx_buf(dev, priv->tx_ring[i]);
  1567. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1568. mlx4_en_delete_rss_steer_rules(priv);
  1569. /* Free RSS qps */
  1570. mlx4_en_release_rss_steer(priv);
  1571. /* Unregister Mac address for the port */
  1572. mlx4_en_put_qp(priv);
  1573. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
  1574. mdev->mac_removed[priv->port] = 1;
  1575. /* Free RX Rings */
  1576. for (i = 0; i < priv->rx_ring_num; i++) {
  1577. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1578. napi_synchronize(&cq->napi);
  1579. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1580. mlx4_en_deactivate_cq(priv, cq);
  1581. mlx4_en_free_affinity_hint(priv, i);
  1582. }
  1583. }
  1584. static void mlx4_en_restart(struct work_struct *work)
  1585. {
  1586. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1587. watchdog_task);
  1588. struct mlx4_en_dev *mdev = priv->mdev;
  1589. struct net_device *dev = priv->dev;
  1590. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1591. mutex_lock(&mdev->state_lock);
  1592. if (priv->port_up) {
  1593. mlx4_en_stop_port(dev, 1);
  1594. if (mlx4_en_start_port(dev))
  1595. en_err(priv, "Failed restarting port %d\n", priv->port);
  1596. }
  1597. mutex_unlock(&mdev->state_lock);
  1598. }
  1599. static void mlx4_en_clear_stats(struct net_device *dev)
  1600. {
  1601. struct mlx4_en_priv *priv = netdev_priv(dev);
  1602. struct mlx4_en_dev *mdev = priv->mdev;
  1603. int i;
  1604. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1605. en_dbg(HW, priv, "Failed dumping statistics\n");
  1606. memset(&priv->stats, 0, sizeof(priv->stats));
  1607. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1608. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1609. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1610. memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
  1611. memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
  1612. memset(&priv->rx_priority_flowstats, 0,
  1613. sizeof(priv->rx_priority_flowstats));
  1614. memset(&priv->tx_priority_flowstats, 0,
  1615. sizeof(priv->tx_priority_flowstats));
  1616. memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
  1617. for (i = 0; i < priv->tx_ring_num; i++) {
  1618. priv->tx_ring[i]->bytes = 0;
  1619. priv->tx_ring[i]->packets = 0;
  1620. priv->tx_ring[i]->tx_csum = 0;
  1621. }
  1622. for (i = 0; i < priv->rx_ring_num; i++) {
  1623. priv->rx_ring[i]->bytes = 0;
  1624. priv->rx_ring[i]->packets = 0;
  1625. priv->rx_ring[i]->csum_ok = 0;
  1626. priv->rx_ring[i]->csum_none = 0;
  1627. priv->rx_ring[i]->csum_complete = 0;
  1628. }
  1629. }
  1630. static int mlx4_en_open(struct net_device *dev)
  1631. {
  1632. struct mlx4_en_priv *priv = netdev_priv(dev);
  1633. struct mlx4_en_dev *mdev = priv->mdev;
  1634. int err = 0;
  1635. mutex_lock(&mdev->state_lock);
  1636. if (!mdev->device_up) {
  1637. en_err(priv, "Cannot open - device down/disabled\n");
  1638. err = -EBUSY;
  1639. goto out;
  1640. }
  1641. /* Reset HW statistics and SW counters */
  1642. mlx4_en_clear_stats(dev);
  1643. err = mlx4_en_start_port(dev);
  1644. if (err)
  1645. en_err(priv, "Failed starting port:%d\n", priv->port);
  1646. out:
  1647. mutex_unlock(&mdev->state_lock);
  1648. return err;
  1649. }
  1650. static int mlx4_en_close(struct net_device *dev)
  1651. {
  1652. struct mlx4_en_priv *priv = netdev_priv(dev);
  1653. struct mlx4_en_dev *mdev = priv->mdev;
  1654. en_dbg(IFDOWN, priv, "Close port called\n");
  1655. mutex_lock(&mdev->state_lock);
  1656. mlx4_en_stop_port(dev, 0);
  1657. netif_carrier_off(dev);
  1658. mutex_unlock(&mdev->state_lock);
  1659. return 0;
  1660. }
  1661. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1662. {
  1663. int i;
  1664. #ifdef CONFIG_RFS_ACCEL
  1665. priv->dev->rx_cpu_rmap = NULL;
  1666. #endif
  1667. for (i = 0; i < priv->tx_ring_num; i++) {
  1668. if (priv->tx_ring && priv->tx_ring[i])
  1669. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1670. if (priv->tx_cq && priv->tx_cq[i])
  1671. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1672. }
  1673. for (i = 0; i < priv->rx_ring_num; i++) {
  1674. if (priv->rx_ring[i])
  1675. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1676. priv->prof->rx_ring_size, priv->stride);
  1677. if (priv->rx_cq[i])
  1678. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1679. }
  1680. }
  1681. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1682. {
  1683. struct mlx4_en_port_profile *prof = priv->prof;
  1684. int i;
  1685. int node;
  1686. /* Create tx Rings */
  1687. for (i = 0; i < priv->tx_ring_num; i++) {
  1688. node = cpu_to_node(i % num_online_cpus());
  1689. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1690. prof->tx_ring_size, i, TX, node))
  1691. goto err;
  1692. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
  1693. prof->tx_ring_size, TXBB_SIZE,
  1694. node, i))
  1695. goto err;
  1696. }
  1697. /* Create rx Rings */
  1698. for (i = 0; i < priv->rx_ring_num; i++) {
  1699. node = cpu_to_node(i % num_online_cpus());
  1700. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1701. prof->rx_ring_size, i, RX, node))
  1702. goto err;
  1703. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1704. prof->rx_ring_size, priv->stride,
  1705. node))
  1706. goto err;
  1707. }
  1708. #ifdef CONFIG_RFS_ACCEL
  1709. priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
  1710. #endif
  1711. return 0;
  1712. err:
  1713. en_err(priv, "Failed to allocate NIC resources\n");
  1714. for (i = 0; i < priv->rx_ring_num; i++) {
  1715. if (priv->rx_ring[i])
  1716. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1717. prof->rx_ring_size,
  1718. priv->stride);
  1719. if (priv->rx_cq[i])
  1720. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1721. }
  1722. for (i = 0; i < priv->tx_ring_num; i++) {
  1723. if (priv->tx_ring[i])
  1724. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1725. if (priv->tx_cq[i])
  1726. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1727. }
  1728. return -ENOMEM;
  1729. }
  1730. void mlx4_en_destroy_netdev(struct net_device *dev)
  1731. {
  1732. struct mlx4_en_priv *priv = netdev_priv(dev);
  1733. struct mlx4_en_dev *mdev = priv->mdev;
  1734. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1735. /* Unregister device - this will close the port if it was up */
  1736. if (priv->registered) {
  1737. devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
  1738. priv->port));
  1739. unregister_netdev(dev);
  1740. }
  1741. if (priv->allocated)
  1742. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1743. cancel_delayed_work(&priv->stats_task);
  1744. cancel_delayed_work(&priv->service_task);
  1745. /* flush any pending task for this netdev */
  1746. flush_workqueue(mdev->workqueue);
  1747. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1748. mlx4_en_remove_timestamp(mdev);
  1749. /* Detach the netdev so tasks would not attempt to access it */
  1750. mutex_lock(&mdev->state_lock);
  1751. mdev->pndev[priv->port] = NULL;
  1752. mdev->upper[priv->port] = NULL;
  1753. mutex_unlock(&mdev->state_lock);
  1754. mlx4_en_free_resources(priv);
  1755. kfree(priv->tx_ring);
  1756. kfree(priv->tx_cq);
  1757. free_netdev(dev);
  1758. }
  1759. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1760. {
  1761. struct mlx4_en_priv *priv = netdev_priv(dev);
  1762. struct mlx4_en_dev *mdev = priv->mdev;
  1763. int err = 0;
  1764. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1765. dev->mtu, new_mtu);
  1766. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1767. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1768. return -EPERM;
  1769. }
  1770. dev->mtu = new_mtu;
  1771. if (netif_running(dev)) {
  1772. mutex_lock(&mdev->state_lock);
  1773. if (!mdev->device_up) {
  1774. /* NIC is probably restarting - let watchdog task reset
  1775. * the port */
  1776. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1777. } else {
  1778. mlx4_en_stop_port(dev, 1);
  1779. err = mlx4_en_start_port(dev);
  1780. if (err) {
  1781. en_err(priv, "Failed restarting port:%d\n",
  1782. priv->port);
  1783. queue_work(mdev->workqueue, &priv->watchdog_task);
  1784. }
  1785. }
  1786. mutex_unlock(&mdev->state_lock);
  1787. }
  1788. return 0;
  1789. }
  1790. static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
  1791. {
  1792. struct mlx4_en_priv *priv = netdev_priv(dev);
  1793. struct mlx4_en_dev *mdev = priv->mdev;
  1794. struct hwtstamp_config config;
  1795. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1796. return -EFAULT;
  1797. /* reserved for future extensions */
  1798. if (config.flags)
  1799. return -EINVAL;
  1800. /* device doesn't support time stamping */
  1801. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  1802. return -EINVAL;
  1803. /* TX HW timestamp */
  1804. switch (config.tx_type) {
  1805. case HWTSTAMP_TX_OFF:
  1806. case HWTSTAMP_TX_ON:
  1807. break;
  1808. default:
  1809. return -ERANGE;
  1810. }
  1811. /* RX HW timestamp */
  1812. switch (config.rx_filter) {
  1813. case HWTSTAMP_FILTER_NONE:
  1814. break;
  1815. case HWTSTAMP_FILTER_ALL:
  1816. case HWTSTAMP_FILTER_SOME:
  1817. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  1818. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  1819. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  1820. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  1821. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  1822. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  1823. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  1824. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  1825. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  1826. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  1827. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  1828. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  1829. config.rx_filter = HWTSTAMP_FILTER_ALL;
  1830. break;
  1831. default:
  1832. return -ERANGE;
  1833. }
  1834. if (mlx4_en_reset_config(dev, config, dev->features)) {
  1835. config.tx_type = HWTSTAMP_TX_OFF;
  1836. config.rx_filter = HWTSTAMP_FILTER_NONE;
  1837. }
  1838. return copy_to_user(ifr->ifr_data, &config,
  1839. sizeof(config)) ? -EFAULT : 0;
  1840. }
  1841. static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
  1842. {
  1843. struct mlx4_en_priv *priv = netdev_priv(dev);
  1844. return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
  1845. sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
  1846. }
  1847. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1848. {
  1849. switch (cmd) {
  1850. case SIOCSHWTSTAMP:
  1851. return mlx4_en_hwtstamp_set(dev, ifr);
  1852. case SIOCGHWTSTAMP:
  1853. return mlx4_en_hwtstamp_get(dev, ifr);
  1854. default:
  1855. return -EOPNOTSUPP;
  1856. }
  1857. }
  1858. static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
  1859. netdev_features_t features)
  1860. {
  1861. struct mlx4_en_priv *en_priv = netdev_priv(netdev);
  1862. struct mlx4_en_dev *mdev = en_priv->mdev;
  1863. /* Since there is no support for separate RX C-TAG/S-TAG vlan accel
  1864. * enable/disable make sure S-TAG flag is always in same state as
  1865. * C-TAG.
  1866. */
  1867. if (features & NETIF_F_HW_VLAN_CTAG_RX &&
  1868. !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  1869. features |= NETIF_F_HW_VLAN_STAG_RX;
  1870. else
  1871. features &= ~NETIF_F_HW_VLAN_STAG_RX;
  1872. return features;
  1873. }
  1874. static int mlx4_en_set_features(struct net_device *netdev,
  1875. netdev_features_t features)
  1876. {
  1877. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1878. bool reset = false;
  1879. int ret = 0;
  1880. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
  1881. en_info(priv, "Turn %s RX-FCS\n",
  1882. (features & NETIF_F_RXFCS) ? "ON" : "OFF");
  1883. reset = true;
  1884. }
  1885. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
  1886. u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
  1887. en_info(priv, "Turn %s RX-ALL\n",
  1888. ignore_fcs_value ? "ON" : "OFF");
  1889. ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
  1890. priv->port, ignore_fcs_value);
  1891. if (ret)
  1892. return ret;
  1893. }
  1894. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  1895. en_info(priv, "Turn %s RX vlan strip offload\n",
  1896. (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
  1897. reset = true;
  1898. }
  1899. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
  1900. en_info(priv, "Turn %s TX vlan strip offload\n",
  1901. (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
  1902. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
  1903. en_info(priv, "Turn %s TX S-VLAN strip offload\n",
  1904. (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
  1905. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
  1906. en_info(priv, "Turn %s loopback\n",
  1907. (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
  1908. mlx4_en_update_loopback_state(netdev, features);
  1909. }
  1910. if (reset) {
  1911. ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
  1912. features);
  1913. if (ret)
  1914. return ret;
  1915. }
  1916. return 0;
  1917. }
  1918. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  1919. {
  1920. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1921. struct mlx4_en_dev *mdev = en_priv->mdev;
  1922. u64 mac_u64 = mlx4_mac_to_u64(mac);
  1923. if (is_multicast_ether_addr(mac))
  1924. return -EINVAL;
  1925. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
  1926. }
  1927. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
  1928. {
  1929. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1930. struct mlx4_en_dev *mdev = en_priv->mdev;
  1931. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
  1932. }
  1933. static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
  1934. int max_tx_rate)
  1935. {
  1936. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1937. struct mlx4_en_dev *mdev = en_priv->mdev;
  1938. return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
  1939. max_tx_rate);
  1940. }
  1941. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  1942. {
  1943. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1944. struct mlx4_en_dev *mdev = en_priv->mdev;
  1945. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  1946. }
  1947. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  1948. {
  1949. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1950. struct mlx4_en_dev *mdev = en_priv->mdev;
  1951. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  1952. }
  1953. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  1954. {
  1955. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1956. struct mlx4_en_dev *mdev = en_priv->mdev;
  1957. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  1958. }
  1959. static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
  1960. struct ifla_vf_stats *vf_stats)
  1961. {
  1962. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1963. struct mlx4_en_dev *mdev = en_priv->mdev;
  1964. return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
  1965. }
  1966. #define PORT_ID_BYTE_LEN 8
  1967. static int mlx4_en_get_phys_port_id(struct net_device *dev,
  1968. struct netdev_phys_item_id *ppid)
  1969. {
  1970. struct mlx4_en_priv *priv = netdev_priv(dev);
  1971. struct mlx4_dev *mdev = priv->mdev->dev;
  1972. int i;
  1973. u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
  1974. if (!phys_port_id)
  1975. return -EOPNOTSUPP;
  1976. ppid->id_len = sizeof(phys_port_id);
  1977. for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
  1978. ppid->id[i] = phys_port_id & 0xff;
  1979. phys_port_id >>= 8;
  1980. }
  1981. return 0;
  1982. }
  1983. #ifdef CONFIG_MLX4_EN_VXLAN
  1984. static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
  1985. {
  1986. int ret;
  1987. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1988. vxlan_add_task);
  1989. ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
  1990. if (ret)
  1991. goto out;
  1992. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  1993. VXLAN_STEER_BY_OUTER_MAC, 1);
  1994. out:
  1995. if (ret) {
  1996. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  1997. return;
  1998. }
  1999. /* set offloads */
  2000. priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  2001. NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL;
  2002. }
  2003. static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
  2004. {
  2005. int ret;
  2006. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  2007. vxlan_del_task);
  2008. /* unset offloads */
  2009. priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  2010. NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL);
  2011. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  2012. VXLAN_STEER_BY_OUTER_MAC, 0);
  2013. if (ret)
  2014. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  2015. priv->vxlan_port = 0;
  2016. }
  2017. static void mlx4_en_add_vxlan_port(struct net_device *dev,
  2018. sa_family_t sa_family, __be16 port)
  2019. {
  2020. struct mlx4_en_priv *priv = netdev_priv(dev);
  2021. __be16 current_port;
  2022. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2023. return;
  2024. if (sa_family == AF_INET6)
  2025. return;
  2026. current_port = priv->vxlan_port;
  2027. if (current_port && current_port != port) {
  2028. en_warn(priv, "vxlan port %d configured, can't add port %d\n",
  2029. ntohs(current_port), ntohs(port));
  2030. return;
  2031. }
  2032. priv->vxlan_port = port;
  2033. queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
  2034. }
  2035. static void mlx4_en_del_vxlan_port(struct net_device *dev,
  2036. sa_family_t sa_family, __be16 port)
  2037. {
  2038. struct mlx4_en_priv *priv = netdev_priv(dev);
  2039. __be16 current_port;
  2040. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2041. return;
  2042. if (sa_family == AF_INET6)
  2043. return;
  2044. current_port = priv->vxlan_port;
  2045. if (current_port != port) {
  2046. en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
  2047. return;
  2048. }
  2049. queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
  2050. }
  2051. static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
  2052. struct net_device *dev,
  2053. netdev_features_t features)
  2054. {
  2055. features = vlan_features_check(skb, features);
  2056. return vxlan_features_check(skb, features);
  2057. }
  2058. #endif
  2059. static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
  2060. {
  2061. struct mlx4_en_priv *priv = netdev_priv(dev);
  2062. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[queue_index];
  2063. struct mlx4_update_qp_params params;
  2064. int err;
  2065. if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
  2066. return -EOPNOTSUPP;
  2067. /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
  2068. if (maxrate >> 12) {
  2069. params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
  2070. params.rate_val = maxrate / 1000;
  2071. } else if (maxrate) {
  2072. params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
  2073. params.rate_val = maxrate;
  2074. } else { /* zero serves to revoke the QP rate-limitation */
  2075. params.rate_unit = 0;
  2076. params.rate_val = 0;
  2077. }
  2078. err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
  2079. &params);
  2080. return err;
  2081. }
  2082. static const struct net_device_ops mlx4_netdev_ops = {
  2083. .ndo_open = mlx4_en_open,
  2084. .ndo_stop = mlx4_en_close,
  2085. .ndo_start_xmit = mlx4_en_xmit,
  2086. .ndo_select_queue = mlx4_en_select_queue,
  2087. .ndo_get_stats = mlx4_en_get_stats,
  2088. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2089. .ndo_set_mac_address = mlx4_en_set_mac,
  2090. .ndo_validate_addr = eth_validate_addr,
  2091. .ndo_change_mtu = mlx4_en_change_mtu,
  2092. .ndo_do_ioctl = mlx4_en_ioctl,
  2093. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2094. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2095. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2096. #ifdef CONFIG_NET_POLL_CONTROLLER
  2097. .ndo_poll_controller = mlx4_en_netpoll,
  2098. #endif
  2099. .ndo_set_features = mlx4_en_set_features,
  2100. .ndo_fix_features = mlx4_en_fix_features,
  2101. .ndo_setup_tc = __mlx4_en_setup_tc,
  2102. #ifdef CONFIG_RFS_ACCEL
  2103. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2104. #endif
  2105. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2106. #ifdef CONFIG_MLX4_EN_VXLAN
  2107. .ndo_add_vxlan_port = mlx4_en_add_vxlan_port,
  2108. .ndo_del_vxlan_port = mlx4_en_del_vxlan_port,
  2109. .ndo_features_check = mlx4_en_features_check,
  2110. #endif
  2111. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2112. };
  2113. static const struct net_device_ops mlx4_netdev_ops_master = {
  2114. .ndo_open = mlx4_en_open,
  2115. .ndo_stop = mlx4_en_close,
  2116. .ndo_start_xmit = mlx4_en_xmit,
  2117. .ndo_select_queue = mlx4_en_select_queue,
  2118. .ndo_get_stats = mlx4_en_get_stats,
  2119. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2120. .ndo_set_mac_address = mlx4_en_set_mac,
  2121. .ndo_validate_addr = eth_validate_addr,
  2122. .ndo_change_mtu = mlx4_en_change_mtu,
  2123. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2124. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2125. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2126. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  2127. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  2128. .ndo_set_vf_rate = mlx4_en_set_vf_rate,
  2129. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  2130. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  2131. .ndo_get_vf_stats = mlx4_en_get_vf_stats,
  2132. .ndo_get_vf_config = mlx4_en_get_vf_config,
  2133. #ifdef CONFIG_NET_POLL_CONTROLLER
  2134. .ndo_poll_controller = mlx4_en_netpoll,
  2135. #endif
  2136. .ndo_set_features = mlx4_en_set_features,
  2137. .ndo_fix_features = mlx4_en_fix_features,
  2138. .ndo_setup_tc = __mlx4_en_setup_tc,
  2139. #ifdef CONFIG_RFS_ACCEL
  2140. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2141. #endif
  2142. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2143. #ifdef CONFIG_MLX4_EN_VXLAN
  2144. .ndo_add_vxlan_port = mlx4_en_add_vxlan_port,
  2145. .ndo_del_vxlan_port = mlx4_en_del_vxlan_port,
  2146. .ndo_features_check = mlx4_en_features_check,
  2147. #endif
  2148. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2149. };
  2150. struct mlx4_en_bond {
  2151. struct work_struct work;
  2152. struct mlx4_en_priv *priv;
  2153. int is_bonded;
  2154. struct mlx4_port_map port_map;
  2155. };
  2156. static void mlx4_en_bond_work(struct work_struct *work)
  2157. {
  2158. struct mlx4_en_bond *bond = container_of(work,
  2159. struct mlx4_en_bond,
  2160. work);
  2161. int err = 0;
  2162. struct mlx4_dev *dev = bond->priv->mdev->dev;
  2163. if (bond->is_bonded) {
  2164. if (!mlx4_is_bonded(dev)) {
  2165. err = mlx4_bond(dev);
  2166. if (err)
  2167. en_err(bond->priv, "Fail to bond device\n");
  2168. }
  2169. if (!err) {
  2170. err = mlx4_port_map_set(dev, &bond->port_map);
  2171. if (err)
  2172. en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
  2173. bond->port_map.port1,
  2174. bond->port_map.port2,
  2175. err);
  2176. }
  2177. } else if (mlx4_is_bonded(dev)) {
  2178. err = mlx4_unbond(dev);
  2179. if (err)
  2180. en_err(bond->priv, "Fail to unbond device\n");
  2181. }
  2182. dev_put(bond->priv->dev);
  2183. kfree(bond);
  2184. }
  2185. static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
  2186. u8 v2p_p1, u8 v2p_p2)
  2187. {
  2188. struct mlx4_en_bond *bond = NULL;
  2189. bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
  2190. if (!bond)
  2191. return -ENOMEM;
  2192. INIT_WORK(&bond->work, mlx4_en_bond_work);
  2193. bond->priv = priv;
  2194. bond->is_bonded = is_bonded;
  2195. bond->port_map.port1 = v2p_p1;
  2196. bond->port_map.port2 = v2p_p2;
  2197. dev_hold(priv->dev);
  2198. queue_work(priv->mdev->workqueue, &bond->work);
  2199. return 0;
  2200. }
  2201. int mlx4_en_netdev_event(struct notifier_block *this,
  2202. unsigned long event, void *ptr)
  2203. {
  2204. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  2205. u8 port = 0;
  2206. struct mlx4_en_dev *mdev;
  2207. struct mlx4_dev *dev;
  2208. int i, num_eth_ports = 0;
  2209. bool do_bond = true;
  2210. struct mlx4_en_priv *priv;
  2211. u8 v2p_port1 = 0;
  2212. u8 v2p_port2 = 0;
  2213. if (!net_eq(dev_net(ndev), &init_net))
  2214. return NOTIFY_DONE;
  2215. mdev = container_of(this, struct mlx4_en_dev, nb);
  2216. dev = mdev->dev;
  2217. /* Go into this mode only when two network devices set on two ports
  2218. * of the same mlx4 device are slaves of the same bonding master
  2219. */
  2220. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
  2221. ++num_eth_ports;
  2222. if (!port && (mdev->pndev[i] == ndev))
  2223. port = i;
  2224. mdev->upper[i] = mdev->pndev[i] ?
  2225. netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
  2226. /* condition not met: network device is a slave */
  2227. if (!mdev->upper[i])
  2228. do_bond = false;
  2229. if (num_eth_ports < 2)
  2230. continue;
  2231. /* condition not met: same master */
  2232. if (mdev->upper[i] != mdev->upper[i-1])
  2233. do_bond = false;
  2234. }
  2235. /* condition not met: 2 salves */
  2236. do_bond = (num_eth_ports == 2) ? do_bond : false;
  2237. /* handle only events that come with enough info */
  2238. if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
  2239. return NOTIFY_DONE;
  2240. priv = netdev_priv(ndev);
  2241. if (do_bond) {
  2242. struct netdev_notifier_bonding_info *notifier_info = ptr;
  2243. struct netdev_bonding_info *bonding_info =
  2244. &notifier_info->bonding_info;
  2245. /* required mode 1, 2 or 4 */
  2246. if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
  2247. (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
  2248. (bonding_info->master.bond_mode != BOND_MODE_8023AD))
  2249. do_bond = false;
  2250. /* require exactly 2 slaves */
  2251. if (bonding_info->master.num_slaves != 2)
  2252. do_bond = false;
  2253. /* calc v2p */
  2254. if (do_bond) {
  2255. if (bonding_info->master.bond_mode ==
  2256. BOND_MODE_ACTIVEBACKUP) {
  2257. /* in active-backup mode virtual ports are
  2258. * mapped to the physical port of the active
  2259. * slave */
  2260. if (bonding_info->slave.state ==
  2261. BOND_STATE_BACKUP) {
  2262. if (port == 1) {
  2263. v2p_port1 = 2;
  2264. v2p_port2 = 2;
  2265. } else {
  2266. v2p_port1 = 1;
  2267. v2p_port2 = 1;
  2268. }
  2269. } else { /* BOND_STATE_ACTIVE */
  2270. if (port == 1) {
  2271. v2p_port1 = 1;
  2272. v2p_port2 = 1;
  2273. } else {
  2274. v2p_port1 = 2;
  2275. v2p_port2 = 2;
  2276. }
  2277. }
  2278. } else { /* Active-Active */
  2279. /* in active-active mode a virtual port is
  2280. * mapped to the native physical port if and only
  2281. * if the physical port is up */
  2282. __s8 link = bonding_info->slave.link;
  2283. if (port == 1)
  2284. v2p_port2 = 2;
  2285. else
  2286. v2p_port1 = 1;
  2287. if ((link == BOND_LINK_UP) ||
  2288. (link == BOND_LINK_FAIL)) {
  2289. if (port == 1)
  2290. v2p_port1 = 1;
  2291. else
  2292. v2p_port2 = 2;
  2293. } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
  2294. if (port == 1)
  2295. v2p_port1 = 2;
  2296. else
  2297. v2p_port2 = 1;
  2298. }
  2299. }
  2300. }
  2301. }
  2302. mlx4_en_queue_bond_work(priv, do_bond,
  2303. v2p_port1, v2p_port2);
  2304. return NOTIFY_DONE;
  2305. }
  2306. void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
  2307. struct mlx4_en_stats_bitmap *stats_bitmap,
  2308. u8 rx_ppp, u8 rx_pause,
  2309. u8 tx_ppp, u8 tx_pause)
  2310. {
  2311. int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
  2312. if (!mlx4_is_slave(dev) &&
  2313. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
  2314. mutex_lock(&stats_bitmap->mutex);
  2315. bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
  2316. if (rx_ppp)
  2317. bitmap_set(stats_bitmap->bitmap, last_i,
  2318. NUM_FLOW_PRIORITY_STATS_RX);
  2319. last_i += NUM_FLOW_PRIORITY_STATS_RX;
  2320. if (rx_pause && !(rx_ppp))
  2321. bitmap_set(stats_bitmap->bitmap, last_i,
  2322. NUM_FLOW_STATS_RX);
  2323. last_i += NUM_FLOW_STATS_RX;
  2324. if (tx_ppp)
  2325. bitmap_set(stats_bitmap->bitmap, last_i,
  2326. NUM_FLOW_PRIORITY_STATS_TX);
  2327. last_i += NUM_FLOW_PRIORITY_STATS_TX;
  2328. if (tx_pause && !(tx_ppp))
  2329. bitmap_set(stats_bitmap->bitmap, last_i,
  2330. NUM_FLOW_STATS_TX);
  2331. last_i += NUM_FLOW_STATS_TX;
  2332. mutex_unlock(&stats_bitmap->mutex);
  2333. }
  2334. }
  2335. void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
  2336. struct mlx4_en_stats_bitmap *stats_bitmap,
  2337. u8 rx_ppp, u8 rx_pause,
  2338. u8 tx_ppp, u8 tx_pause)
  2339. {
  2340. int last_i = 0;
  2341. mutex_init(&stats_bitmap->mutex);
  2342. bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
  2343. if (mlx4_is_slave(dev)) {
  2344. bitmap_set(stats_bitmap->bitmap, last_i +
  2345. MLX4_FIND_NETDEV_STAT(rx_packets), 1);
  2346. bitmap_set(stats_bitmap->bitmap, last_i +
  2347. MLX4_FIND_NETDEV_STAT(tx_packets), 1);
  2348. bitmap_set(stats_bitmap->bitmap, last_i +
  2349. MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
  2350. bitmap_set(stats_bitmap->bitmap, last_i +
  2351. MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
  2352. bitmap_set(stats_bitmap->bitmap, last_i +
  2353. MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
  2354. bitmap_set(stats_bitmap->bitmap, last_i +
  2355. MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
  2356. } else {
  2357. bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
  2358. }
  2359. last_i += NUM_MAIN_STATS;
  2360. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
  2361. last_i += NUM_PORT_STATS;
  2362. if (mlx4_is_master(dev))
  2363. bitmap_set(stats_bitmap->bitmap, last_i,
  2364. NUM_PF_STATS);
  2365. last_i += NUM_PF_STATS;
  2366. mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
  2367. rx_ppp, rx_pause,
  2368. tx_ppp, tx_pause);
  2369. last_i += NUM_FLOW_STATS;
  2370. if (!mlx4_is_slave(dev))
  2371. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
  2372. }
  2373. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  2374. struct mlx4_en_port_profile *prof)
  2375. {
  2376. struct net_device *dev;
  2377. struct mlx4_en_priv *priv;
  2378. int i;
  2379. int err;
  2380. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  2381. MAX_TX_RINGS, MAX_RX_RINGS);
  2382. if (dev == NULL)
  2383. return -ENOMEM;
  2384. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  2385. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  2386. SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
  2387. dev->dev_port = port - 1;
  2388. /*
  2389. * Initialize driver private data
  2390. */
  2391. priv = netdev_priv(dev);
  2392. memset(priv, 0, sizeof(struct mlx4_en_priv));
  2393. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  2394. spin_lock_init(&priv->stats_lock);
  2395. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  2396. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  2397. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  2398. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  2399. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  2400. #ifdef CONFIG_MLX4_EN_VXLAN
  2401. INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
  2402. INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
  2403. #endif
  2404. #ifdef CONFIG_RFS_ACCEL
  2405. INIT_LIST_HEAD(&priv->filters);
  2406. spin_lock_init(&priv->filters_lock);
  2407. #endif
  2408. priv->dev = dev;
  2409. priv->mdev = mdev;
  2410. priv->ddev = &mdev->pdev->dev;
  2411. priv->prof = prof;
  2412. priv->port = port;
  2413. priv->port_up = false;
  2414. priv->flags = prof->flags;
  2415. priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
  2416. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  2417. MLX4_WQE_CTRL_SOLICITED);
  2418. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  2419. priv->tx_ring_num = prof->tx_ring_num;
  2420. priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
  2421. netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
  2422. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring *) * MAX_TX_RINGS,
  2423. GFP_KERNEL);
  2424. if (!priv->tx_ring) {
  2425. err = -ENOMEM;
  2426. goto out;
  2427. }
  2428. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq *) * MAX_TX_RINGS,
  2429. GFP_KERNEL);
  2430. if (!priv->tx_cq) {
  2431. err = -ENOMEM;
  2432. goto out;
  2433. }
  2434. priv->rx_ring_num = prof->rx_ring_num;
  2435. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  2436. priv->cqe_size = mdev->dev->caps.cqe_size;
  2437. priv->mac_index = -1;
  2438. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  2439. #ifdef CONFIG_MLX4_EN_DCB
  2440. if (!mlx4_is_slave(priv->mdev->dev)) {
  2441. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
  2442. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  2443. } else {
  2444. en_info(priv, "enabling only PFC DCB ops\n");
  2445. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  2446. }
  2447. }
  2448. #endif
  2449. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  2450. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  2451. /* Query for default mac and max mtu */
  2452. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  2453. if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
  2454. MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
  2455. priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
  2456. /* Set default MAC */
  2457. dev->addr_len = ETH_ALEN;
  2458. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  2459. if (!is_valid_ether_addr(dev->dev_addr)) {
  2460. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  2461. priv->port, dev->dev_addr);
  2462. err = -EINVAL;
  2463. goto out;
  2464. } else if (mlx4_is_slave(priv->mdev->dev) &&
  2465. (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
  2466. /* Random MAC was assigned in mlx4_slave_cap
  2467. * in mlx4_core module
  2468. */
  2469. dev->addr_assign_type |= NET_ADDR_RANDOM;
  2470. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  2471. }
  2472. memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
  2473. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  2474. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  2475. err = mlx4_en_alloc_resources(priv);
  2476. if (err)
  2477. goto out;
  2478. /* Initialize time stamping config */
  2479. priv->hwtstamp_config.flags = 0;
  2480. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  2481. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  2482. /* Allocate page for receive rings */
  2483. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  2484. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  2485. if (err) {
  2486. en_err(priv, "Failed to allocate page for rx qps\n");
  2487. goto out;
  2488. }
  2489. priv->allocated = 1;
  2490. /*
  2491. * Initialize netdev entry points
  2492. */
  2493. if (mlx4_is_master(priv->mdev->dev))
  2494. dev->netdev_ops = &mlx4_netdev_ops_master;
  2495. else
  2496. dev->netdev_ops = &mlx4_netdev_ops;
  2497. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  2498. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  2499. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  2500. dev->ethtool_ops = &mlx4_en_ethtool_ops;
  2501. /*
  2502. * Set driver features
  2503. */
  2504. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2505. if (mdev->LSO_support)
  2506. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  2507. dev->vlan_features = dev->hw_features;
  2508. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  2509. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  2510. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  2511. NETIF_F_HW_VLAN_CTAG_FILTER;
  2512. dev->hw_features |= NETIF_F_LOOPBACK |
  2513. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  2514. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
  2515. dev->features |= NETIF_F_HW_VLAN_STAG_RX |
  2516. NETIF_F_HW_VLAN_STAG_FILTER;
  2517. dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
  2518. }
  2519. if (mlx4_is_slave(mdev->dev)) {
  2520. int phv;
  2521. err = get_phv_bit(mdev->dev, port, &phv);
  2522. if (!err && phv) {
  2523. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2524. priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
  2525. }
  2526. } else {
  2527. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
  2528. !(mdev->dev->caps.flags2 &
  2529. MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  2530. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2531. }
  2532. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
  2533. dev->hw_features |= NETIF_F_RXFCS;
  2534. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
  2535. dev->hw_features |= NETIF_F_RXALL;
  2536. if (mdev->dev->caps.steering_mode ==
  2537. MLX4_STEERING_MODE_DEVICE_MANAGED &&
  2538. mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
  2539. dev->hw_features |= NETIF_F_NTUPLE;
  2540. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  2541. dev->priv_flags |= IFF_UNICAST_FLT;
  2542. /* Setting a default hash function value */
  2543. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
  2544. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2545. } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
  2546. priv->rss_hash_fn = ETH_RSS_HASH_XOR;
  2547. } else {
  2548. en_warn(priv,
  2549. "No RSS hash capabilities exposed, using Toeplitz\n");
  2550. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2551. }
  2552. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2553. dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL;
  2554. dev->features |= NETIF_F_GSO_UDP_TUNNEL;
  2555. }
  2556. mdev->pndev[port] = dev;
  2557. mdev->upper[port] = NULL;
  2558. netif_carrier_off(dev);
  2559. mlx4_en_set_default_moderation(priv);
  2560. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  2561. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  2562. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  2563. /* Configure port */
  2564. mlx4_en_calc_rx_buf(dev);
  2565. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  2566. priv->rx_skb_size + ETH_FCS_LEN,
  2567. prof->tx_pause, prof->tx_ppp,
  2568. prof->rx_pause, prof->rx_ppp);
  2569. if (err) {
  2570. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  2571. priv->port, err);
  2572. goto out;
  2573. }
  2574. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2575. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  2576. if (err) {
  2577. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  2578. err);
  2579. goto out;
  2580. }
  2581. }
  2582. /* Init port */
  2583. en_warn(priv, "Initializing port\n");
  2584. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  2585. if (err) {
  2586. en_err(priv, "Failed Initializing port\n");
  2587. goto out;
  2588. }
  2589. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  2590. /* Initialize time stamp mechanism */
  2591. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2592. mlx4_en_init_timestamp(mdev);
  2593. queue_delayed_work(mdev->workqueue, &priv->service_task,
  2594. SERVICE_TASK_DELAY);
  2595. mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
  2596. mdev->profile.prof[priv->port].rx_ppp,
  2597. mdev->profile.prof[priv->port].rx_pause,
  2598. mdev->profile.prof[priv->port].tx_ppp,
  2599. mdev->profile.prof[priv->port].tx_pause);
  2600. err = register_netdev(dev);
  2601. if (err) {
  2602. en_err(priv, "Netdev registration failed for port %d\n", port);
  2603. goto out;
  2604. }
  2605. priv->registered = 1;
  2606. devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
  2607. dev);
  2608. return 0;
  2609. out:
  2610. mlx4_en_destroy_netdev(dev);
  2611. return err;
  2612. }
  2613. int mlx4_en_reset_config(struct net_device *dev,
  2614. struct hwtstamp_config ts_config,
  2615. netdev_features_t features)
  2616. {
  2617. struct mlx4_en_priv *priv = netdev_priv(dev);
  2618. struct mlx4_en_dev *mdev = priv->mdev;
  2619. int port_up = 0;
  2620. int err = 0;
  2621. if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
  2622. priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
  2623. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  2624. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
  2625. return 0; /* Nothing to change */
  2626. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  2627. (features & NETIF_F_HW_VLAN_CTAG_RX) &&
  2628. (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
  2629. en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
  2630. return -EINVAL;
  2631. }
  2632. mutex_lock(&mdev->state_lock);
  2633. if (priv->port_up) {
  2634. port_up = 1;
  2635. mlx4_en_stop_port(dev, 1);
  2636. }
  2637. mlx4_en_free_resources(priv);
  2638. en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n",
  2639. ts_config.rx_filter, !!(features & NETIF_F_HW_VLAN_CTAG_RX));
  2640. priv->hwtstamp_config.tx_type = ts_config.tx_type;
  2641. priv->hwtstamp_config.rx_filter = ts_config.rx_filter;
  2642. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  2643. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  2644. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  2645. else
  2646. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  2647. } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
  2648. /* RX time-stamping is OFF, update the RX vlan offload
  2649. * to the latest wanted state
  2650. */
  2651. if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
  2652. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  2653. else
  2654. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  2655. }
  2656. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
  2657. if (features & NETIF_F_RXFCS)
  2658. dev->features |= NETIF_F_RXFCS;
  2659. else
  2660. dev->features &= ~NETIF_F_RXFCS;
  2661. }
  2662. /* RX vlan offload and RX time-stamping can't co-exist !
  2663. * Regardless of the caller's choice,
  2664. * Turn Off RX vlan offload in case of time-stamping is ON
  2665. */
  2666. if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
  2667. if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
  2668. en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
  2669. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  2670. }
  2671. err = mlx4_en_alloc_resources(priv);
  2672. if (err) {
  2673. en_err(priv, "Failed reallocating port resources\n");
  2674. goto out;
  2675. }
  2676. if (port_up) {
  2677. err = mlx4_en_start_port(dev);
  2678. if (err)
  2679. en_err(priv, "Failed starting port\n");
  2680. }
  2681. out:
  2682. mutex_unlock(&mdev->state_lock);
  2683. netdev_features_change(dev);
  2684. return err;
  2685. }