qib_rc.c 60 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/io.h>
  34. #include "qib.h"
  35. /* cut down ridiculously long IB macro names */
  36. #define OP(x) IB_OPCODE_RC_##x
  37. static void rc_timeout(unsigned long arg);
  38. static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe,
  39. u32 psn, u32 pmtu)
  40. {
  41. u32 len;
  42. len = ((psn - wqe->psn) & QIB_PSN_MASK) * pmtu;
  43. ss->sge = wqe->sg_list[0];
  44. ss->sg_list = wqe->sg_list + 1;
  45. ss->num_sge = wqe->wr.num_sge;
  46. ss->total_len = wqe->length;
  47. qib_skip_sge(ss, len, 0);
  48. return wqe->length - len;
  49. }
  50. static void start_timer(struct rvt_qp *qp)
  51. {
  52. qp->s_flags |= RVT_S_TIMER;
  53. qp->s_timer.function = rc_timeout;
  54. /* 4.096 usec. * (1 << qp->timeout) */
  55. qp->s_timer.expires = jiffies + qp->timeout_jiffies;
  56. add_timer(&qp->s_timer);
  57. }
  58. /**
  59. * qib_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  60. * @dev: the device for this QP
  61. * @qp: a pointer to the QP
  62. * @ohdr: a pointer to the IB header being constructed
  63. * @pmtu: the path MTU
  64. *
  65. * Return 1 if constructed; otherwise, return 0.
  66. * Note that we are in the responder's side of the QP context.
  67. * Note the QP s_lock must be held.
  68. */
  69. static int qib_make_rc_ack(struct qib_ibdev *dev, struct rvt_qp *qp,
  70. struct qib_other_headers *ohdr, u32 pmtu)
  71. {
  72. struct rvt_ack_entry *e;
  73. u32 hwords;
  74. u32 len;
  75. u32 bth0;
  76. u32 bth2;
  77. /* Don't send an ACK if we aren't supposed to. */
  78. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  79. goto bail;
  80. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  81. hwords = 5;
  82. switch (qp->s_ack_state) {
  83. case OP(RDMA_READ_RESPONSE_LAST):
  84. case OP(RDMA_READ_RESPONSE_ONLY):
  85. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  86. if (e->rdma_sge.mr) {
  87. rvt_put_mr(e->rdma_sge.mr);
  88. e->rdma_sge.mr = NULL;
  89. }
  90. /* FALLTHROUGH */
  91. case OP(ATOMIC_ACKNOWLEDGE):
  92. /*
  93. * We can increment the tail pointer now that the last
  94. * response has been sent instead of only being
  95. * constructed.
  96. */
  97. if (++qp->s_tail_ack_queue > QIB_MAX_RDMA_ATOMIC)
  98. qp->s_tail_ack_queue = 0;
  99. /* FALLTHROUGH */
  100. case OP(SEND_ONLY):
  101. case OP(ACKNOWLEDGE):
  102. /* Check for no next entry in the queue. */
  103. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  104. if (qp->s_flags & RVT_S_ACK_PENDING)
  105. goto normal;
  106. goto bail;
  107. }
  108. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  109. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  110. /*
  111. * If a RDMA read response is being resent and
  112. * we haven't seen the duplicate request yet,
  113. * then stop sending the remaining responses the
  114. * responder has seen until the requester resends it.
  115. */
  116. len = e->rdma_sge.sge_length;
  117. if (len && !e->rdma_sge.mr) {
  118. qp->s_tail_ack_queue = qp->r_head_ack_queue;
  119. goto bail;
  120. }
  121. /* Copy SGE state in case we need to resend */
  122. qp->s_rdma_mr = e->rdma_sge.mr;
  123. if (qp->s_rdma_mr)
  124. rvt_get_mr(qp->s_rdma_mr);
  125. qp->s_ack_rdma_sge.sge = e->rdma_sge;
  126. qp->s_ack_rdma_sge.num_sge = 1;
  127. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  128. if (len > pmtu) {
  129. len = pmtu;
  130. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  131. } else {
  132. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  133. e->sent = 1;
  134. }
  135. ohdr->u.aeth = qib_compute_aeth(qp);
  136. hwords++;
  137. qp->s_ack_rdma_psn = e->psn;
  138. bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK;
  139. } else {
  140. /* COMPARE_SWAP or FETCH_ADD */
  141. qp->s_cur_sge = NULL;
  142. len = 0;
  143. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  144. ohdr->u.at.aeth = qib_compute_aeth(qp);
  145. ohdr->u.at.atomic_ack_eth[0] =
  146. cpu_to_be32(e->atomic_data >> 32);
  147. ohdr->u.at.atomic_ack_eth[1] =
  148. cpu_to_be32(e->atomic_data);
  149. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  150. bth2 = e->psn & QIB_PSN_MASK;
  151. e->sent = 1;
  152. }
  153. bth0 = qp->s_ack_state << 24;
  154. break;
  155. case OP(RDMA_READ_RESPONSE_FIRST):
  156. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  157. /* FALLTHROUGH */
  158. case OP(RDMA_READ_RESPONSE_MIDDLE):
  159. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  160. qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr;
  161. if (qp->s_rdma_mr)
  162. rvt_get_mr(qp->s_rdma_mr);
  163. len = qp->s_ack_rdma_sge.sge.sge_length;
  164. if (len > pmtu)
  165. len = pmtu;
  166. else {
  167. ohdr->u.aeth = qib_compute_aeth(qp);
  168. hwords++;
  169. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  170. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  171. e->sent = 1;
  172. }
  173. bth0 = qp->s_ack_state << 24;
  174. bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK;
  175. break;
  176. default:
  177. normal:
  178. /*
  179. * Send a regular ACK.
  180. * Set the s_ack_state so we wait until after sending
  181. * the ACK before setting s_ack_state to ACKNOWLEDGE
  182. * (see above).
  183. */
  184. qp->s_ack_state = OP(SEND_ONLY);
  185. qp->s_flags &= ~RVT_S_ACK_PENDING;
  186. qp->s_cur_sge = NULL;
  187. if (qp->s_nak_state)
  188. ohdr->u.aeth =
  189. cpu_to_be32((qp->r_msn & QIB_MSN_MASK) |
  190. (qp->s_nak_state <<
  191. QIB_AETH_CREDIT_SHIFT));
  192. else
  193. ohdr->u.aeth = qib_compute_aeth(qp);
  194. hwords++;
  195. len = 0;
  196. bth0 = OP(ACKNOWLEDGE) << 24;
  197. bth2 = qp->s_ack_psn & QIB_PSN_MASK;
  198. }
  199. qp->s_rdma_ack_cnt++;
  200. qp->s_hdrwords = hwords;
  201. qp->s_cur_size = len;
  202. qib_make_ruc_header(qp, ohdr, bth0, bth2);
  203. return 1;
  204. bail:
  205. qp->s_ack_state = OP(ACKNOWLEDGE);
  206. qp->s_flags &= ~(RVT_S_RESP_PENDING | RVT_S_ACK_PENDING);
  207. return 0;
  208. }
  209. /**
  210. * qib_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  211. * @qp: a pointer to the QP
  212. *
  213. * Assumes the s_lock is held.
  214. *
  215. * Return 1 if constructed; otherwise, return 0.
  216. */
  217. int qib_make_rc_req(struct rvt_qp *qp)
  218. {
  219. struct qib_qp_priv *priv = qp->priv;
  220. struct qib_ibdev *dev = to_idev(qp->ibqp.device);
  221. struct qib_other_headers *ohdr;
  222. struct rvt_sge_state *ss;
  223. struct rvt_swqe *wqe;
  224. u32 hwords;
  225. u32 len;
  226. u32 bth0;
  227. u32 bth2;
  228. u32 pmtu = qp->pmtu;
  229. char newreq;
  230. int ret = 0;
  231. int delta;
  232. ohdr = &priv->s_hdr->u.oth;
  233. if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
  234. ohdr = &priv->s_hdr->u.l.oth;
  235. /* Sending responses has higher priority over sending requests. */
  236. if ((qp->s_flags & RVT_S_RESP_PENDING) &&
  237. qib_make_rc_ack(dev, qp, ohdr, pmtu))
  238. goto done;
  239. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
  240. if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
  241. goto bail;
  242. /* We are in the error state, flush the work request. */
  243. smp_read_barrier_depends(); /* see post_one_send() */
  244. if (qp->s_last == ACCESS_ONCE(qp->s_head))
  245. goto bail;
  246. /* If DMAs are in progress, we can't flush immediately. */
  247. if (atomic_read(&priv->s_dma_busy)) {
  248. qp->s_flags |= RVT_S_WAIT_DMA;
  249. goto bail;
  250. }
  251. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  252. qib_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
  253. IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
  254. /* will get called again */
  255. goto done;
  256. }
  257. if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK))
  258. goto bail;
  259. if (qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) {
  260. if (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
  261. qp->s_flags |= RVT_S_WAIT_PSN;
  262. goto bail;
  263. }
  264. qp->s_sending_psn = qp->s_psn;
  265. qp->s_sending_hpsn = qp->s_psn - 1;
  266. }
  267. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  268. hwords = 5;
  269. bth0 = 0;
  270. /* Send a request. */
  271. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  272. switch (qp->s_state) {
  273. default:
  274. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK))
  275. goto bail;
  276. /*
  277. * Resend an old request or start a new one.
  278. *
  279. * We keep track of the current SWQE so that
  280. * we don't reset the "furthest progress" state
  281. * if we need to back up.
  282. */
  283. newreq = 0;
  284. if (qp->s_cur == qp->s_tail) {
  285. /* Check if send work queue is empty. */
  286. if (qp->s_tail == qp->s_head)
  287. goto bail;
  288. /*
  289. * If a fence is requested, wait for previous
  290. * RDMA read and atomic operations to finish.
  291. */
  292. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  293. qp->s_num_rd_atomic) {
  294. qp->s_flags |= RVT_S_WAIT_FENCE;
  295. goto bail;
  296. }
  297. newreq = 1;
  298. qp->s_psn = wqe->psn;
  299. }
  300. /*
  301. * Note that we have to be careful not to modify the
  302. * original work request since we may need to resend
  303. * it.
  304. */
  305. len = wqe->length;
  306. ss = &qp->s_sge;
  307. bth2 = qp->s_psn & QIB_PSN_MASK;
  308. switch (wqe->wr.opcode) {
  309. case IB_WR_SEND:
  310. case IB_WR_SEND_WITH_IMM:
  311. /* If no credit, return. */
  312. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  313. qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
  314. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  315. goto bail;
  316. }
  317. if (len > pmtu) {
  318. qp->s_state = OP(SEND_FIRST);
  319. len = pmtu;
  320. break;
  321. }
  322. if (wqe->wr.opcode == IB_WR_SEND)
  323. qp->s_state = OP(SEND_ONLY);
  324. else {
  325. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  326. /* Immediate data comes after the BTH */
  327. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  328. hwords += 1;
  329. }
  330. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  331. bth0 |= IB_BTH_SOLICITED;
  332. bth2 |= IB_BTH_REQ_ACK;
  333. if (++qp->s_cur == qp->s_size)
  334. qp->s_cur = 0;
  335. break;
  336. case IB_WR_RDMA_WRITE:
  337. if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  338. qp->s_lsn++;
  339. /* FALLTHROUGH */
  340. case IB_WR_RDMA_WRITE_WITH_IMM:
  341. /* If no credit, return. */
  342. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  343. qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
  344. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  345. goto bail;
  346. }
  347. ohdr->u.rc.reth.vaddr =
  348. cpu_to_be64(wqe->rdma_wr.remote_addr);
  349. ohdr->u.rc.reth.rkey =
  350. cpu_to_be32(wqe->rdma_wr.rkey);
  351. ohdr->u.rc.reth.length = cpu_to_be32(len);
  352. hwords += sizeof(struct ib_reth) / sizeof(u32);
  353. if (len > pmtu) {
  354. qp->s_state = OP(RDMA_WRITE_FIRST);
  355. len = pmtu;
  356. break;
  357. }
  358. if (wqe->rdma_wr.wr.opcode == IB_WR_RDMA_WRITE)
  359. qp->s_state = OP(RDMA_WRITE_ONLY);
  360. else {
  361. qp->s_state = OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  362. /* Immediate data comes after RETH */
  363. ohdr->u.rc.imm_data =
  364. wqe->rdma_wr.wr.ex.imm_data;
  365. hwords += 1;
  366. if (wqe->rdma_wr.wr.send_flags & IB_SEND_SOLICITED)
  367. bth0 |= IB_BTH_SOLICITED;
  368. }
  369. bth2 |= IB_BTH_REQ_ACK;
  370. if (++qp->s_cur == qp->s_size)
  371. qp->s_cur = 0;
  372. break;
  373. case IB_WR_RDMA_READ:
  374. /*
  375. * Don't allow more operations to be started
  376. * than the QP limits allow.
  377. */
  378. if (newreq) {
  379. if (qp->s_num_rd_atomic >=
  380. qp->s_max_rd_atomic) {
  381. qp->s_flags |= RVT_S_WAIT_RDMAR;
  382. goto bail;
  383. }
  384. qp->s_num_rd_atomic++;
  385. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  386. qp->s_lsn++;
  387. }
  388. ohdr->u.rc.reth.vaddr =
  389. cpu_to_be64(wqe->rdma_wr.remote_addr);
  390. ohdr->u.rc.reth.rkey =
  391. cpu_to_be32(wqe->rdma_wr.rkey);
  392. ohdr->u.rc.reth.length = cpu_to_be32(len);
  393. qp->s_state = OP(RDMA_READ_REQUEST);
  394. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  395. ss = NULL;
  396. len = 0;
  397. bth2 |= IB_BTH_REQ_ACK;
  398. if (++qp->s_cur == qp->s_size)
  399. qp->s_cur = 0;
  400. break;
  401. case IB_WR_ATOMIC_CMP_AND_SWP:
  402. case IB_WR_ATOMIC_FETCH_AND_ADD:
  403. /*
  404. * Don't allow more operations to be started
  405. * than the QP limits allow.
  406. */
  407. if (newreq) {
  408. if (qp->s_num_rd_atomic >=
  409. qp->s_max_rd_atomic) {
  410. qp->s_flags |= RVT_S_WAIT_RDMAR;
  411. goto bail;
  412. }
  413. qp->s_num_rd_atomic++;
  414. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  415. qp->s_lsn++;
  416. }
  417. if (wqe->atomic_wr.wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  418. qp->s_state = OP(COMPARE_SWAP);
  419. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  420. wqe->atomic_wr.swap);
  421. ohdr->u.atomic_eth.compare_data = cpu_to_be64(
  422. wqe->atomic_wr.compare_add);
  423. } else {
  424. qp->s_state = OP(FETCH_ADD);
  425. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  426. wqe->atomic_wr.compare_add);
  427. ohdr->u.atomic_eth.compare_data = 0;
  428. }
  429. ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
  430. wqe->atomic_wr.remote_addr >> 32);
  431. ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
  432. wqe->atomic_wr.remote_addr);
  433. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  434. wqe->atomic_wr.rkey);
  435. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  436. ss = NULL;
  437. len = 0;
  438. bth2 |= IB_BTH_REQ_ACK;
  439. if (++qp->s_cur == qp->s_size)
  440. qp->s_cur = 0;
  441. break;
  442. default:
  443. goto bail;
  444. }
  445. qp->s_sge.sge = wqe->sg_list[0];
  446. qp->s_sge.sg_list = wqe->sg_list + 1;
  447. qp->s_sge.num_sge = wqe->wr.num_sge;
  448. qp->s_sge.total_len = wqe->length;
  449. qp->s_len = wqe->length;
  450. if (newreq) {
  451. qp->s_tail++;
  452. if (qp->s_tail >= qp->s_size)
  453. qp->s_tail = 0;
  454. }
  455. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  456. qp->s_psn = wqe->lpsn + 1;
  457. else
  458. qp->s_psn++;
  459. break;
  460. case OP(RDMA_READ_RESPONSE_FIRST):
  461. /*
  462. * qp->s_state is normally set to the opcode of the
  463. * last packet constructed for new requests and therefore
  464. * is never set to RDMA read response.
  465. * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
  466. * thread to indicate a SEND needs to be restarted from an
  467. * earlier PSN without interferring with the sending thread.
  468. * See qib_restart_rc().
  469. */
  470. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  471. /* FALLTHROUGH */
  472. case OP(SEND_FIRST):
  473. qp->s_state = OP(SEND_MIDDLE);
  474. /* FALLTHROUGH */
  475. case OP(SEND_MIDDLE):
  476. bth2 = qp->s_psn++ & QIB_PSN_MASK;
  477. ss = &qp->s_sge;
  478. len = qp->s_len;
  479. if (len > pmtu) {
  480. len = pmtu;
  481. break;
  482. }
  483. if (wqe->wr.opcode == IB_WR_SEND)
  484. qp->s_state = OP(SEND_LAST);
  485. else {
  486. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  487. /* Immediate data comes after the BTH */
  488. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  489. hwords += 1;
  490. }
  491. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  492. bth0 |= IB_BTH_SOLICITED;
  493. bth2 |= IB_BTH_REQ_ACK;
  494. qp->s_cur++;
  495. if (qp->s_cur >= qp->s_size)
  496. qp->s_cur = 0;
  497. break;
  498. case OP(RDMA_READ_RESPONSE_LAST):
  499. /*
  500. * qp->s_state is normally set to the opcode of the
  501. * last packet constructed for new requests and therefore
  502. * is never set to RDMA read response.
  503. * RDMA_READ_RESPONSE_LAST is used by the ACK processing
  504. * thread to indicate a RDMA write needs to be restarted from
  505. * an earlier PSN without interferring with the sending thread.
  506. * See qib_restart_rc().
  507. */
  508. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  509. /* FALLTHROUGH */
  510. case OP(RDMA_WRITE_FIRST):
  511. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  512. /* FALLTHROUGH */
  513. case OP(RDMA_WRITE_MIDDLE):
  514. bth2 = qp->s_psn++ & QIB_PSN_MASK;
  515. ss = &qp->s_sge;
  516. len = qp->s_len;
  517. if (len > pmtu) {
  518. len = pmtu;
  519. break;
  520. }
  521. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  522. qp->s_state = OP(RDMA_WRITE_LAST);
  523. else {
  524. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  525. /* Immediate data comes after the BTH */
  526. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  527. hwords += 1;
  528. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  529. bth0 |= IB_BTH_SOLICITED;
  530. }
  531. bth2 |= IB_BTH_REQ_ACK;
  532. qp->s_cur++;
  533. if (qp->s_cur >= qp->s_size)
  534. qp->s_cur = 0;
  535. break;
  536. case OP(RDMA_READ_RESPONSE_MIDDLE):
  537. /*
  538. * qp->s_state is normally set to the opcode of the
  539. * last packet constructed for new requests and therefore
  540. * is never set to RDMA read response.
  541. * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
  542. * thread to indicate a RDMA read needs to be restarted from
  543. * an earlier PSN without interferring with the sending thread.
  544. * See qib_restart_rc().
  545. */
  546. len = ((qp->s_psn - wqe->psn) & QIB_PSN_MASK) * pmtu;
  547. ohdr->u.rc.reth.vaddr =
  548. cpu_to_be64(wqe->rdma_wr.remote_addr + len);
  549. ohdr->u.rc.reth.rkey =
  550. cpu_to_be32(wqe->rdma_wr.rkey);
  551. ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
  552. qp->s_state = OP(RDMA_READ_REQUEST);
  553. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  554. bth2 = (qp->s_psn & QIB_PSN_MASK) | IB_BTH_REQ_ACK;
  555. qp->s_psn = wqe->lpsn + 1;
  556. ss = NULL;
  557. len = 0;
  558. qp->s_cur++;
  559. if (qp->s_cur == qp->s_size)
  560. qp->s_cur = 0;
  561. break;
  562. }
  563. qp->s_sending_hpsn = bth2;
  564. delta = (((int) bth2 - (int) wqe->psn) << 8) >> 8;
  565. if (delta && delta % QIB_PSN_CREDIT == 0)
  566. bth2 |= IB_BTH_REQ_ACK;
  567. if (qp->s_flags & RVT_S_SEND_ONE) {
  568. qp->s_flags &= ~RVT_S_SEND_ONE;
  569. qp->s_flags |= RVT_S_WAIT_ACK;
  570. bth2 |= IB_BTH_REQ_ACK;
  571. }
  572. qp->s_len -= len;
  573. qp->s_hdrwords = hwords;
  574. qp->s_cur_sge = ss;
  575. qp->s_cur_size = len;
  576. qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), bth2);
  577. done:
  578. return 1;
  579. bail:
  580. qp->s_flags &= ~RVT_S_BUSY;
  581. return ret;
  582. }
  583. /**
  584. * qib_send_rc_ack - Construct an ACK packet and send it
  585. * @qp: a pointer to the QP
  586. *
  587. * This is called from qib_rc_rcv() and qib_kreceive().
  588. * Note that RDMA reads and atomics are handled in the
  589. * send side QP state and tasklet.
  590. */
  591. void qib_send_rc_ack(struct rvt_qp *qp)
  592. {
  593. struct qib_devdata *dd = dd_from_ibdev(qp->ibqp.device);
  594. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  595. struct qib_pportdata *ppd = ppd_from_ibp(ibp);
  596. u64 pbc;
  597. u16 lrh0;
  598. u32 bth0;
  599. u32 hwords;
  600. u32 pbufn;
  601. u32 __iomem *piobuf;
  602. struct qib_ib_header hdr;
  603. struct qib_other_headers *ohdr;
  604. u32 control;
  605. unsigned long flags;
  606. spin_lock_irqsave(&qp->s_lock, flags);
  607. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  608. goto unlock;
  609. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  610. if ((qp->s_flags & RVT_S_RESP_PENDING) || qp->s_rdma_ack_cnt)
  611. goto queue_ack;
  612. /* Construct the header with s_lock held so APM doesn't change it. */
  613. ohdr = &hdr.u.oth;
  614. lrh0 = QIB_LRH_BTH;
  615. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
  616. hwords = 6;
  617. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  618. hwords += qib_make_grh(ibp, &hdr.u.l.grh,
  619. &qp->remote_ah_attr.grh, hwords, 0);
  620. ohdr = &hdr.u.l.oth;
  621. lrh0 = QIB_LRH_GRH;
  622. }
  623. /* read pkey_index w/o lock (its atomic) */
  624. bth0 = qib_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24);
  625. if (qp->s_mig_state == IB_MIG_MIGRATED)
  626. bth0 |= IB_BTH_MIG_REQ;
  627. if (qp->r_nak_state)
  628. ohdr->u.aeth = cpu_to_be32((qp->r_msn & QIB_MSN_MASK) |
  629. (qp->r_nak_state <<
  630. QIB_AETH_CREDIT_SHIFT));
  631. else
  632. ohdr->u.aeth = qib_compute_aeth(qp);
  633. lrh0 |= ibp->sl_to_vl[qp->remote_ah_attr.sl] << 12 |
  634. qp->remote_ah_attr.sl << 4;
  635. hdr.lrh[0] = cpu_to_be16(lrh0);
  636. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  637. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  638. hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
  639. ohdr->bth[0] = cpu_to_be32(bth0);
  640. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  641. ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & QIB_PSN_MASK);
  642. spin_unlock_irqrestore(&qp->s_lock, flags);
  643. /* Don't try to send ACKs if the link isn't ACTIVE */
  644. if (!(ppd->lflags & QIBL_LINKACTIVE))
  645. goto done;
  646. control = dd->f_setpbc_control(ppd, hwords + SIZE_OF_CRC,
  647. qp->s_srate, lrh0 >> 12);
  648. /* length is + 1 for the control dword */
  649. pbc = ((u64) control << 32) | (hwords + 1);
  650. piobuf = dd->f_getsendbuf(ppd, pbc, &pbufn);
  651. if (!piobuf) {
  652. /*
  653. * We are out of PIO buffers at the moment.
  654. * Pass responsibility for sending the ACK to the
  655. * send tasklet so that when a PIO buffer becomes
  656. * available, the ACK is sent ahead of other outgoing
  657. * packets.
  658. */
  659. spin_lock_irqsave(&qp->s_lock, flags);
  660. goto queue_ack;
  661. }
  662. /*
  663. * Write the pbc.
  664. * We have to flush after the PBC for correctness
  665. * on some cpus or WC buffer can be written out of order.
  666. */
  667. writeq(pbc, piobuf);
  668. if (dd->flags & QIB_PIO_FLUSH_WC) {
  669. u32 *hdrp = (u32 *) &hdr;
  670. qib_flush_wc();
  671. qib_pio_copy(piobuf + 2, hdrp, hwords - 1);
  672. qib_flush_wc();
  673. __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1);
  674. } else
  675. qib_pio_copy(piobuf + 2, (u32 *) &hdr, hwords);
  676. if (dd->flags & QIB_USE_SPCL_TRIG) {
  677. u32 spcl_off = (pbufn >= dd->piobcnt2k) ? 2047 : 1023;
  678. qib_flush_wc();
  679. __raw_writel(0xaebecede, piobuf + spcl_off);
  680. }
  681. qib_flush_wc();
  682. qib_sendbuf_done(dd, pbufn);
  683. this_cpu_inc(ibp->pmastats->n_unicast_xmit);
  684. goto done;
  685. queue_ack:
  686. if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
  687. this_cpu_inc(*ibp->rvp.rc_qacks);
  688. qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING;
  689. qp->s_nak_state = qp->r_nak_state;
  690. qp->s_ack_psn = qp->r_ack_psn;
  691. /* Schedule the send tasklet. */
  692. qib_schedule_send(qp);
  693. }
  694. unlock:
  695. spin_unlock_irqrestore(&qp->s_lock, flags);
  696. done:
  697. return;
  698. }
  699. /**
  700. * reset_psn - reset the QP state to send starting from PSN
  701. * @qp: the QP
  702. * @psn: the packet sequence number to restart at
  703. *
  704. * This is called from qib_rc_rcv() to process an incoming RC ACK
  705. * for the given QP.
  706. * Called at interrupt level with the QP s_lock held.
  707. */
  708. static void reset_psn(struct rvt_qp *qp, u32 psn)
  709. {
  710. u32 n = qp->s_acked;
  711. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n);
  712. u32 opcode;
  713. qp->s_cur = n;
  714. /*
  715. * If we are starting the request from the beginning,
  716. * let the normal send code handle initialization.
  717. */
  718. if (qib_cmp24(psn, wqe->psn) <= 0) {
  719. qp->s_state = OP(SEND_LAST);
  720. goto done;
  721. }
  722. /* Find the work request opcode corresponding to the given PSN. */
  723. opcode = wqe->wr.opcode;
  724. for (;;) {
  725. int diff;
  726. if (++n == qp->s_size)
  727. n = 0;
  728. if (n == qp->s_tail)
  729. break;
  730. wqe = rvt_get_swqe_ptr(qp, n);
  731. diff = qib_cmp24(psn, wqe->psn);
  732. if (diff < 0)
  733. break;
  734. qp->s_cur = n;
  735. /*
  736. * If we are starting the request from the beginning,
  737. * let the normal send code handle initialization.
  738. */
  739. if (diff == 0) {
  740. qp->s_state = OP(SEND_LAST);
  741. goto done;
  742. }
  743. opcode = wqe->wr.opcode;
  744. }
  745. /*
  746. * Set the state to restart in the middle of a request.
  747. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  748. * See qib_make_rc_req().
  749. */
  750. switch (opcode) {
  751. case IB_WR_SEND:
  752. case IB_WR_SEND_WITH_IMM:
  753. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  754. break;
  755. case IB_WR_RDMA_WRITE:
  756. case IB_WR_RDMA_WRITE_WITH_IMM:
  757. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  758. break;
  759. case IB_WR_RDMA_READ:
  760. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  761. break;
  762. default:
  763. /*
  764. * This case shouldn't happen since its only
  765. * one PSN per req.
  766. */
  767. qp->s_state = OP(SEND_LAST);
  768. }
  769. done:
  770. qp->s_psn = psn;
  771. /*
  772. * Set RVT_S_WAIT_PSN as qib_rc_complete() may start the timer
  773. * asynchronously before the send tasklet can get scheduled.
  774. * Doing it in qib_make_rc_req() is too late.
  775. */
  776. if ((qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
  777. (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
  778. qp->s_flags |= RVT_S_WAIT_PSN;
  779. }
  780. /*
  781. * Back up requester to resend the last un-ACKed request.
  782. * The QP r_lock and s_lock should be held and interrupts disabled.
  783. */
  784. static void qib_restart_rc(struct rvt_qp *qp, u32 psn, int wait)
  785. {
  786. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  787. struct qib_ibport *ibp;
  788. if (qp->s_retry == 0) {
  789. if (qp->s_mig_state == IB_MIG_ARMED) {
  790. qib_migrate_qp(qp);
  791. qp->s_retry = qp->s_retry_cnt;
  792. } else if (qp->s_last == qp->s_acked) {
  793. qib_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
  794. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  795. return;
  796. } else /* XXX need to handle delayed completion */
  797. return;
  798. } else
  799. qp->s_retry--;
  800. ibp = to_iport(qp->ibqp.device, qp->port_num);
  801. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  802. ibp->rvp.n_rc_resends++;
  803. else
  804. ibp->rvp.n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK;
  805. qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR |
  806. RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN |
  807. RVT_S_WAIT_ACK);
  808. if (wait)
  809. qp->s_flags |= RVT_S_SEND_ONE;
  810. reset_psn(qp, psn);
  811. }
  812. /*
  813. * This is called from s_timer for missing responses.
  814. */
  815. static void rc_timeout(unsigned long arg)
  816. {
  817. struct rvt_qp *qp = (struct rvt_qp *)arg;
  818. struct qib_ibport *ibp;
  819. unsigned long flags;
  820. spin_lock_irqsave(&qp->r_lock, flags);
  821. spin_lock(&qp->s_lock);
  822. if (qp->s_flags & RVT_S_TIMER) {
  823. ibp = to_iport(qp->ibqp.device, qp->port_num);
  824. ibp->rvp.n_rc_timeouts++;
  825. qp->s_flags &= ~RVT_S_TIMER;
  826. del_timer(&qp->s_timer);
  827. qib_restart_rc(qp, qp->s_last_psn + 1, 1);
  828. qib_schedule_send(qp);
  829. }
  830. spin_unlock(&qp->s_lock);
  831. spin_unlock_irqrestore(&qp->r_lock, flags);
  832. }
  833. /*
  834. * This is called from s_timer for RNR timeouts.
  835. */
  836. void qib_rc_rnr_retry(unsigned long arg)
  837. {
  838. struct rvt_qp *qp = (struct rvt_qp *)arg;
  839. unsigned long flags;
  840. spin_lock_irqsave(&qp->s_lock, flags);
  841. if (qp->s_flags & RVT_S_WAIT_RNR) {
  842. qp->s_flags &= ~RVT_S_WAIT_RNR;
  843. del_timer(&qp->s_timer);
  844. qib_schedule_send(qp);
  845. }
  846. spin_unlock_irqrestore(&qp->s_lock, flags);
  847. }
  848. /*
  849. * Set qp->s_sending_psn to the next PSN after the given one.
  850. * This would be psn+1 except when RDMA reads are present.
  851. */
  852. static void reset_sending_psn(struct rvt_qp *qp, u32 psn)
  853. {
  854. struct rvt_swqe *wqe;
  855. u32 n = qp->s_last;
  856. /* Find the work request corresponding to the given PSN. */
  857. for (;;) {
  858. wqe = rvt_get_swqe_ptr(qp, n);
  859. if (qib_cmp24(psn, wqe->lpsn) <= 0) {
  860. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  861. qp->s_sending_psn = wqe->lpsn + 1;
  862. else
  863. qp->s_sending_psn = psn + 1;
  864. break;
  865. }
  866. if (++n == qp->s_size)
  867. n = 0;
  868. if (n == qp->s_tail)
  869. break;
  870. }
  871. }
  872. /*
  873. * This should be called with the QP s_lock held and interrupts disabled.
  874. */
  875. void qib_rc_send_complete(struct rvt_qp *qp, struct qib_ib_header *hdr)
  876. {
  877. struct qib_other_headers *ohdr;
  878. struct rvt_swqe *wqe;
  879. struct ib_wc wc;
  880. unsigned i;
  881. u32 opcode;
  882. u32 psn;
  883. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_OR_FLUSH_SEND))
  884. return;
  885. /* Find out where the BTH is */
  886. if ((be16_to_cpu(hdr->lrh[0]) & 3) == QIB_LRH_BTH)
  887. ohdr = &hdr->u.oth;
  888. else
  889. ohdr = &hdr->u.l.oth;
  890. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  891. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  892. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  893. WARN_ON(!qp->s_rdma_ack_cnt);
  894. qp->s_rdma_ack_cnt--;
  895. return;
  896. }
  897. psn = be32_to_cpu(ohdr->bth[2]);
  898. reset_sending_psn(qp, psn);
  899. /*
  900. * Start timer after a packet requesting an ACK has been sent and
  901. * there are still requests that haven't been acked.
  902. */
  903. if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
  904. !(qp->s_flags & (RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) &&
  905. (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  906. start_timer(qp);
  907. while (qp->s_last != qp->s_acked) {
  908. u32 s_last;
  909. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  910. if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) >= 0 &&
  911. qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
  912. break;
  913. s_last = qp->s_last;
  914. if (++s_last >= qp->s_size)
  915. s_last = 0;
  916. qp->s_last = s_last;
  917. /* see post_send() */
  918. barrier();
  919. for (i = 0; i < wqe->wr.num_sge; i++) {
  920. struct rvt_sge *sge = &wqe->sg_list[i];
  921. rvt_put_mr(sge->mr);
  922. }
  923. /* Post a send completion queue entry if requested. */
  924. if (!(qp->s_flags & RVT_S_SIGNAL_REQ_WR) ||
  925. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  926. memset(&wc, 0, sizeof(wc));
  927. wc.wr_id = wqe->wr.wr_id;
  928. wc.status = IB_WC_SUCCESS;
  929. wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
  930. wc.byte_len = wqe->length;
  931. wc.qp = &qp->ibqp;
  932. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.send_cq), &wc, 0);
  933. }
  934. }
  935. /*
  936. * If we were waiting for sends to complete before resending,
  937. * and they are now complete, restart sending.
  938. */
  939. if (qp->s_flags & RVT_S_WAIT_PSN &&
  940. qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  941. qp->s_flags &= ~RVT_S_WAIT_PSN;
  942. qp->s_sending_psn = qp->s_psn;
  943. qp->s_sending_hpsn = qp->s_psn - 1;
  944. qib_schedule_send(qp);
  945. }
  946. }
  947. static inline void update_last_psn(struct rvt_qp *qp, u32 psn)
  948. {
  949. qp->s_last_psn = psn;
  950. }
  951. /*
  952. * Generate a SWQE completion.
  953. * This is similar to qib_send_complete but has to check to be sure
  954. * that the SGEs are not being referenced if the SWQE is being resent.
  955. */
  956. static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
  957. struct rvt_swqe *wqe,
  958. struct qib_ibport *ibp)
  959. {
  960. struct ib_wc wc;
  961. unsigned i;
  962. /*
  963. * Don't decrement refcount and don't generate a
  964. * completion if the SWQE is being resent until the send
  965. * is finished.
  966. */
  967. if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) < 0 ||
  968. qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  969. u32 s_last;
  970. for (i = 0; i < wqe->wr.num_sge; i++) {
  971. struct rvt_sge *sge = &wqe->sg_list[i];
  972. rvt_put_mr(sge->mr);
  973. }
  974. s_last = qp->s_last;
  975. if (++s_last >= qp->s_size)
  976. s_last = 0;
  977. qp->s_last = s_last;
  978. /* see post_send() */
  979. barrier();
  980. /* Post a send completion queue entry if requested. */
  981. if (!(qp->s_flags & RVT_S_SIGNAL_REQ_WR) ||
  982. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  983. memset(&wc, 0, sizeof(wc));
  984. wc.wr_id = wqe->wr.wr_id;
  985. wc.status = IB_WC_SUCCESS;
  986. wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
  987. wc.byte_len = wqe->length;
  988. wc.qp = &qp->ibqp;
  989. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.send_cq), &wc, 0);
  990. }
  991. } else
  992. this_cpu_inc(*ibp->rvp.rc_delayed_comp);
  993. qp->s_retry = qp->s_retry_cnt;
  994. update_last_psn(qp, wqe->lpsn);
  995. /*
  996. * If we are completing a request which is in the process of
  997. * being resent, we can stop resending it since we know the
  998. * responder has already seen it.
  999. */
  1000. if (qp->s_acked == qp->s_cur) {
  1001. if (++qp->s_cur >= qp->s_size)
  1002. qp->s_cur = 0;
  1003. qp->s_acked = qp->s_cur;
  1004. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  1005. if (qp->s_acked != qp->s_tail) {
  1006. qp->s_state = OP(SEND_LAST);
  1007. qp->s_psn = wqe->psn;
  1008. }
  1009. } else {
  1010. if (++qp->s_acked >= qp->s_size)
  1011. qp->s_acked = 0;
  1012. if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
  1013. qp->s_draining = 0;
  1014. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1015. }
  1016. return wqe;
  1017. }
  1018. /**
  1019. * do_rc_ack - process an incoming RC ACK
  1020. * @qp: the QP the ACK came in on
  1021. * @psn: the packet sequence number of the ACK
  1022. * @opcode: the opcode of the request that resulted in the ACK
  1023. *
  1024. * This is called from qib_rc_rcv_resp() to process an incoming RC ACK
  1025. * for the given QP.
  1026. * Called at interrupt level with the QP s_lock held.
  1027. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  1028. */
  1029. static int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode,
  1030. u64 val, struct qib_ctxtdata *rcd)
  1031. {
  1032. struct qib_ibport *ibp;
  1033. enum ib_wc_status status;
  1034. struct rvt_swqe *wqe;
  1035. int ret = 0;
  1036. u32 ack_psn;
  1037. int diff;
  1038. /* Remove QP from retry timer */
  1039. if (qp->s_flags & (RVT_S_TIMER | RVT_S_WAIT_RNR)) {
  1040. qp->s_flags &= ~(RVT_S_TIMER | RVT_S_WAIT_RNR);
  1041. del_timer(&qp->s_timer);
  1042. }
  1043. /*
  1044. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  1045. * requests and implicitly NAK RDMA read and atomic requests issued
  1046. * before the NAK'ed request. The MSN won't include the NAK'ed
  1047. * request but will include an ACK'ed request(s).
  1048. */
  1049. ack_psn = psn;
  1050. if (aeth >> 29)
  1051. ack_psn--;
  1052. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1053. ibp = to_iport(qp->ibqp.device, qp->port_num);
  1054. /*
  1055. * The MSN might be for a later WQE than the PSN indicates so
  1056. * only complete WQEs that the PSN finishes.
  1057. */
  1058. while ((diff = qib_cmp24(ack_psn, wqe->lpsn)) >= 0) {
  1059. /*
  1060. * RDMA_READ_RESPONSE_ONLY is a special case since
  1061. * we want to generate completion events for everything
  1062. * before the RDMA read, copy the data, then generate
  1063. * the completion for the read.
  1064. */
  1065. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  1066. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  1067. diff == 0) {
  1068. ret = 1;
  1069. goto bail;
  1070. }
  1071. /*
  1072. * If this request is a RDMA read or atomic, and the ACK is
  1073. * for a later operation, this ACK NAKs the RDMA read or
  1074. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  1075. * can ACK a RDMA read and likewise for atomic ops. Note
  1076. * that the NAK case can only happen if relaxed ordering is
  1077. * used and requests are sent after an RDMA read or atomic
  1078. * is sent but before the response is received.
  1079. */
  1080. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  1081. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  1082. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1083. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  1084. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  1085. /* Retry this request. */
  1086. if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) {
  1087. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1088. qib_restart_rc(qp, qp->s_last_psn + 1, 0);
  1089. if (list_empty(&qp->rspwait)) {
  1090. qp->r_flags |= RVT_R_RSP_SEND;
  1091. atomic_inc(&qp->refcount);
  1092. list_add_tail(&qp->rspwait,
  1093. &rcd->qp_wait_list);
  1094. }
  1095. }
  1096. /*
  1097. * No need to process the ACK/NAK since we are
  1098. * restarting an earlier request.
  1099. */
  1100. goto bail;
  1101. }
  1102. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1103. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
  1104. u64 *vaddr = wqe->sg_list[0].vaddr;
  1105. *vaddr = val;
  1106. }
  1107. if (qp->s_num_rd_atomic &&
  1108. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1109. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1110. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  1111. qp->s_num_rd_atomic--;
  1112. /* Restart sending task if fence is complete */
  1113. if ((qp->s_flags & RVT_S_WAIT_FENCE) &&
  1114. !qp->s_num_rd_atomic) {
  1115. qp->s_flags &= ~(RVT_S_WAIT_FENCE |
  1116. RVT_S_WAIT_ACK);
  1117. qib_schedule_send(qp);
  1118. } else if (qp->s_flags & RVT_S_WAIT_RDMAR) {
  1119. qp->s_flags &= ~(RVT_S_WAIT_RDMAR |
  1120. RVT_S_WAIT_ACK);
  1121. qib_schedule_send(qp);
  1122. }
  1123. }
  1124. wqe = do_rc_completion(qp, wqe, ibp);
  1125. if (qp->s_acked == qp->s_tail)
  1126. break;
  1127. }
  1128. switch (aeth >> 29) {
  1129. case 0: /* ACK */
  1130. this_cpu_inc(*ibp->rvp.rc_acks);
  1131. if (qp->s_acked != qp->s_tail) {
  1132. /*
  1133. * We are expecting more ACKs so
  1134. * reset the retransmit timer.
  1135. */
  1136. start_timer(qp);
  1137. /*
  1138. * We can stop resending the earlier packets and
  1139. * continue with the next packet the receiver wants.
  1140. */
  1141. if (qib_cmp24(qp->s_psn, psn) <= 0)
  1142. reset_psn(qp, psn + 1);
  1143. } else if (qib_cmp24(qp->s_psn, psn) <= 0) {
  1144. qp->s_state = OP(SEND_LAST);
  1145. qp->s_psn = psn + 1;
  1146. }
  1147. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1148. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1149. qib_schedule_send(qp);
  1150. }
  1151. qib_get_credit(qp, aeth);
  1152. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1153. qp->s_retry = qp->s_retry_cnt;
  1154. update_last_psn(qp, psn);
  1155. ret = 1;
  1156. goto bail;
  1157. case 1: /* RNR NAK */
  1158. ibp->rvp.n_rnr_naks++;
  1159. if (qp->s_acked == qp->s_tail)
  1160. goto bail;
  1161. if (qp->s_flags & RVT_S_WAIT_RNR)
  1162. goto bail;
  1163. if (qp->s_rnr_retry == 0) {
  1164. status = IB_WC_RNR_RETRY_EXC_ERR;
  1165. goto class_b;
  1166. }
  1167. if (qp->s_rnr_retry_cnt < 7)
  1168. qp->s_rnr_retry--;
  1169. /* The last valid PSN is the previous PSN. */
  1170. update_last_psn(qp, psn - 1);
  1171. ibp->rvp.n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK;
  1172. reset_psn(qp, psn);
  1173. qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK);
  1174. qp->s_flags |= RVT_S_WAIT_RNR;
  1175. qp->s_timer.function = qib_rc_rnr_retry;
  1176. qp->s_timer.expires = jiffies + usecs_to_jiffies(
  1177. ib_qib_rnr_table[(aeth >> QIB_AETH_CREDIT_SHIFT) &
  1178. QIB_AETH_CREDIT_MASK]);
  1179. add_timer(&qp->s_timer);
  1180. goto bail;
  1181. case 3: /* NAK */
  1182. if (qp->s_acked == qp->s_tail)
  1183. goto bail;
  1184. /* The last valid PSN is the previous PSN. */
  1185. update_last_psn(qp, psn - 1);
  1186. switch ((aeth >> QIB_AETH_CREDIT_SHIFT) &
  1187. QIB_AETH_CREDIT_MASK) {
  1188. case 0: /* PSN sequence error */
  1189. ibp->rvp.n_seq_naks++;
  1190. /*
  1191. * Back up to the responder's expected PSN.
  1192. * Note that we might get a NAK in the middle of an
  1193. * RDMA READ response which terminates the RDMA
  1194. * READ.
  1195. */
  1196. qib_restart_rc(qp, psn, 0);
  1197. qib_schedule_send(qp);
  1198. break;
  1199. case 1: /* Invalid Request */
  1200. status = IB_WC_REM_INV_REQ_ERR;
  1201. ibp->rvp.n_other_naks++;
  1202. goto class_b;
  1203. case 2: /* Remote Access Error */
  1204. status = IB_WC_REM_ACCESS_ERR;
  1205. ibp->rvp.n_other_naks++;
  1206. goto class_b;
  1207. case 3: /* Remote Operation Error */
  1208. status = IB_WC_REM_OP_ERR;
  1209. ibp->rvp.n_other_naks++;
  1210. class_b:
  1211. if (qp->s_last == qp->s_acked) {
  1212. qib_send_complete(qp, wqe, status);
  1213. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1214. }
  1215. break;
  1216. default:
  1217. /* Ignore other reserved NAK error codes */
  1218. goto reserved;
  1219. }
  1220. qp->s_retry = qp->s_retry_cnt;
  1221. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1222. goto bail;
  1223. default: /* 2: reserved */
  1224. reserved:
  1225. /* Ignore reserved NAK codes. */
  1226. goto bail;
  1227. }
  1228. bail:
  1229. return ret;
  1230. }
  1231. /*
  1232. * We have seen an out of sequence RDMA read middle or last packet.
  1233. * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
  1234. */
  1235. static void rdma_seq_err(struct rvt_qp *qp, struct qib_ibport *ibp, u32 psn,
  1236. struct qib_ctxtdata *rcd)
  1237. {
  1238. struct rvt_swqe *wqe;
  1239. /* Remove QP from retry timer */
  1240. if (qp->s_flags & (RVT_S_TIMER | RVT_S_WAIT_RNR)) {
  1241. qp->s_flags &= ~(RVT_S_TIMER | RVT_S_WAIT_RNR);
  1242. del_timer(&qp->s_timer);
  1243. }
  1244. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1245. while (qib_cmp24(psn, wqe->lpsn) > 0) {
  1246. if (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1247. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1248. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  1249. break;
  1250. wqe = do_rc_completion(qp, wqe, ibp);
  1251. }
  1252. ibp->rvp.n_rdma_seq++;
  1253. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1254. qib_restart_rc(qp, qp->s_last_psn + 1, 0);
  1255. if (list_empty(&qp->rspwait)) {
  1256. qp->r_flags |= RVT_R_RSP_SEND;
  1257. atomic_inc(&qp->refcount);
  1258. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1259. }
  1260. }
  1261. /**
  1262. * qib_rc_rcv_resp - process an incoming RC response packet
  1263. * @ibp: the port this packet came in on
  1264. * @ohdr: the other headers for this packet
  1265. * @data: the packet data
  1266. * @tlen: the packet length
  1267. * @qp: the QP for this packet
  1268. * @opcode: the opcode for this packet
  1269. * @psn: the packet sequence number for this packet
  1270. * @hdrsize: the header length
  1271. * @pmtu: the path MTU
  1272. *
  1273. * This is called from qib_rc_rcv() to process an incoming RC response
  1274. * packet for the given QP.
  1275. * Called at interrupt level.
  1276. */
  1277. static void qib_rc_rcv_resp(struct qib_ibport *ibp,
  1278. struct qib_other_headers *ohdr,
  1279. void *data, u32 tlen,
  1280. struct rvt_qp *qp,
  1281. u32 opcode,
  1282. u32 psn, u32 hdrsize, u32 pmtu,
  1283. struct qib_ctxtdata *rcd)
  1284. {
  1285. struct rvt_swqe *wqe;
  1286. struct qib_pportdata *ppd = ppd_from_ibp(ibp);
  1287. enum ib_wc_status status;
  1288. unsigned long flags;
  1289. int diff;
  1290. u32 pad;
  1291. u32 aeth;
  1292. u64 val;
  1293. if (opcode != OP(RDMA_READ_RESPONSE_MIDDLE)) {
  1294. /*
  1295. * If ACK'd PSN on SDMA busy list try to make progress to
  1296. * reclaim SDMA credits.
  1297. */
  1298. if ((qib_cmp24(psn, qp->s_sending_psn) >= 0) &&
  1299. (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)) {
  1300. /*
  1301. * If send tasklet not running attempt to progress
  1302. * SDMA queue.
  1303. */
  1304. if (!(qp->s_flags & RVT_S_BUSY)) {
  1305. /* Acquire SDMA Lock */
  1306. spin_lock_irqsave(&ppd->sdma_lock, flags);
  1307. /* Invoke sdma make progress */
  1308. qib_sdma_make_progress(ppd);
  1309. /* Release SDMA Lock */
  1310. spin_unlock_irqrestore(&ppd->sdma_lock, flags);
  1311. }
  1312. }
  1313. }
  1314. spin_lock_irqsave(&qp->s_lock, flags);
  1315. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  1316. goto ack_done;
  1317. /* Ignore invalid responses. */
  1318. smp_read_barrier_depends(); /* see post_one_send */
  1319. if (qib_cmp24(psn, ACCESS_ONCE(qp->s_next_psn)) >= 0)
  1320. goto ack_done;
  1321. /* Ignore duplicate responses. */
  1322. diff = qib_cmp24(psn, qp->s_last_psn);
  1323. if (unlikely(diff <= 0)) {
  1324. /* Update credits for "ghost" ACKs */
  1325. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1326. aeth = be32_to_cpu(ohdr->u.aeth);
  1327. if ((aeth >> 29) == 0)
  1328. qib_get_credit(qp, aeth);
  1329. }
  1330. goto ack_done;
  1331. }
  1332. /*
  1333. * Skip everything other than the PSN we expect, if we are waiting
  1334. * for a reply to a restarted RDMA read or atomic op.
  1335. */
  1336. if (qp->r_flags & RVT_R_RDMAR_SEQ) {
  1337. if (qib_cmp24(psn, qp->s_last_psn + 1) != 0)
  1338. goto ack_done;
  1339. qp->r_flags &= ~RVT_R_RDMAR_SEQ;
  1340. }
  1341. if (unlikely(qp->s_acked == qp->s_tail))
  1342. goto ack_done;
  1343. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1344. status = IB_WC_SUCCESS;
  1345. switch (opcode) {
  1346. case OP(ACKNOWLEDGE):
  1347. case OP(ATOMIC_ACKNOWLEDGE):
  1348. case OP(RDMA_READ_RESPONSE_FIRST):
  1349. aeth = be32_to_cpu(ohdr->u.aeth);
  1350. if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
  1351. __be32 *p = ohdr->u.at.atomic_ack_eth;
  1352. val = ((u64) be32_to_cpu(p[0]) << 32) |
  1353. be32_to_cpu(p[1]);
  1354. } else
  1355. val = 0;
  1356. if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
  1357. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1358. goto ack_done;
  1359. hdrsize += 4;
  1360. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1361. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1362. goto ack_op_err;
  1363. /*
  1364. * If this is a response to a resent RDMA read, we
  1365. * have to be careful to copy the data to the right
  1366. * location.
  1367. */
  1368. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1369. wqe, psn, pmtu);
  1370. goto read_middle;
  1371. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1372. /* no AETH, no ACK */
  1373. if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1)))
  1374. goto ack_seq_err;
  1375. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1376. goto ack_op_err;
  1377. read_middle:
  1378. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1379. goto ack_len_err;
  1380. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1381. goto ack_len_err;
  1382. /*
  1383. * We got a response so update the timeout.
  1384. * 4.096 usec. * (1 << qp->timeout)
  1385. */
  1386. qp->s_flags |= RVT_S_TIMER;
  1387. mod_timer(&qp->s_timer, jiffies + qp->timeout_jiffies);
  1388. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1389. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1390. qib_schedule_send(qp);
  1391. }
  1392. if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
  1393. qp->s_retry = qp->s_retry_cnt;
  1394. /*
  1395. * Update the RDMA receive state but do the copy w/o
  1396. * holding the locks and blocking interrupts.
  1397. */
  1398. qp->s_rdma_read_len -= pmtu;
  1399. update_last_psn(qp, psn);
  1400. spin_unlock_irqrestore(&qp->s_lock, flags);
  1401. qib_copy_sge(&qp->s_rdma_read_sge, data, pmtu, 0);
  1402. goto bail;
  1403. case OP(RDMA_READ_RESPONSE_ONLY):
  1404. aeth = be32_to_cpu(ohdr->u.aeth);
  1405. if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
  1406. goto ack_done;
  1407. /* Get the number of bytes the message was padded by. */
  1408. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1409. /*
  1410. * Check that the data size is >= 0 && <= pmtu.
  1411. * Remember to account for the AETH header (4) and
  1412. * ICRC (4).
  1413. */
  1414. if (unlikely(tlen < (hdrsize + pad + 8)))
  1415. goto ack_len_err;
  1416. /*
  1417. * If this is a response to a resent RDMA read, we
  1418. * have to be careful to copy the data to the right
  1419. * location.
  1420. */
  1421. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1422. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1423. wqe, psn, pmtu);
  1424. goto read_last;
  1425. case OP(RDMA_READ_RESPONSE_LAST):
  1426. /* ACKs READ req. */
  1427. if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1)))
  1428. goto ack_seq_err;
  1429. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1430. goto ack_op_err;
  1431. /* Get the number of bytes the message was padded by. */
  1432. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1433. /*
  1434. * Check that the data size is >= 1 && <= pmtu.
  1435. * Remember to account for the AETH header (4) and
  1436. * ICRC (4).
  1437. */
  1438. if (unlikely(tlen <= (hdrsize + pad + 8)))
  1439. goto ack_len_err;
  1440. read_last:
  1441. tlen -= hdrsize + pad + 8;
  1442. if (unlikely(tlen != qp->s_rdma_read_len))
  1443. goto ack_len_err;
  1444. aeth = be32_to_cpu(ohdr->u.aeth);
  1445. qib_copy_sge(&qp->s_rdma_read_sge, data, tlen, 0);
  1446. WARN_ON(qp->s_rdma_read_sge.num_sge);
  1447. (void) do_rc_ack(qp, aeth, psn,
  1448. OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
  1449. goto ack_done;
  1450. }
  1451. ack_op_err:
  1452. status = IB_WC_LOC_QP_OP_ERR;
  1453. goto ack_err;
  1454. ack_seq_err:
  1455. rdma_seq_err(qp, ibp, psn, rcd);
  1456. goto ack_done;
  1457. ack_len_err:
  1458. status = IB_WC_LOC_LEN_ERR;
  1459. ack_err:
  1460. if (qp->s_last == qp->s_acked) {
  1461. qib_send_complete(qp, wqe, status);
  1462. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1463. }
  1464. ack_done:
  1465. spin_unlock_irqrestore(&qp->s_lock, flags);
  1466. bail:
  1467. return;
  1468. }
  1469. /**
  1470. * qib_rc_rcv_error - process an incoming duplicate or error RC packet
  1471. * @ohdr: the other headers for this packet
  1472. * @data: the packet data
  1473. * @qp: the QP for this packet
  1474. * @opcode: the opcode for this packet
  1475. * @psn: the packet sequence number for this packet
  1476. * @diff: the difference between the PSN and the expected PSN
  1477. *
  1478. * This is called from qib_rc_rcv() to process an unexpected
  1479. * incoming RC packet for the given QP.
  1480. * Called at interrupt level.
  1481. * Return 1 if no more processing is needed; otherwise return 0 to
  1482. * schedule a response to be sent.
  1483. */
  1484. static int qib_rc_rcv_error(struct qib_other_headers *ohdr,
  1485. void *data,
  1486. struct rvt_qp *qp,
  1487. u32 opcode,
  1488. u32 psn,
  1489. int diff,
  1490. struct qib_ctxtdata *rcd)
  1491. {
  1492. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  1493. struct rvt_ack_entry *e;
  1494. unsigned long flags;
  1495. u8 i, prev;
  1496. int old_req;
  1497. if (diff > 0) {
  1498. /*
  1499. * Packet sequence error.
  1500. * A NAK will ACK earlier sends and RDMA writes.
  1501. * Don't queue the NAK if we already sent one.
  1502. */
  1503. if (!qp->r_nak_state) {
  1504. ibp->rvp.n_rc_seqnak++;
  1505. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1506. /* Use the expected PSN. */
  1507. qp->r_ack_psn = qp->r_psn;
  1508. /*
  1509. * Wait to send the sequence NAK until all packets
  1510. * in the receive queue have been processed.
  1511. * Otherwise, we end up propagating congestion.
  1512. */
  1513. if (list_empty(&qp->rspwait)) {
  1514. qp->r_flags |= RVT_R_RSP_NAK;
  1515. atomic_inc(&qp->refcount);
  1516. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1517. }
  1518. }
  1519. goto done;
  1520. }
  1521. /*
  1522. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1523. * write or atomic op. Don't NAK errors, just silently drop
  1524. * the duplicate request. Note that r_sge, r_len, and
  1525. * r_rcv_len may be in use so don't modify them.
  1526. *
  1527. * We are supposed to ACK the earliest duplicate PSN but we
  1528. * can coalesce an outstanding duplicate ACK. We have to
  1529. * send the earliest so that RDMA reads can be restarted at
  1530. * the requester's expected PSN.
  1531. *
  1532. * First, find where this duplicate PSN falls within the
  1533. * ACKs previously sent.
  1534. * old_req is true if there is an older response that is scheduled
  1535. * to be sent before sending this one.
  1536. */
  1537. e = NULL;
  1538. old_req = 1;
  1539. ibp->rvp.n_rc_dupreq++;
  1540. spin_lock_irqsave(&qp->s_lock, flags);
  1541. for (i = qp->r_head_ack_queue; ; i = prev) {
  1542. if (i == qp->s_tail_ack_queue)
  1543. old_req = 0;
  1544. if (i)
  1545. prev = i - 1;
  1546. else
  1547. prev = QIB_MAX_RDMA_ATOMIC;
  1548. if (prev == qp->r_head_ack_queue) {
  1549. e = NULL;
  1550. break;
  1551. }
  1552. e = &qp->s_ack_queue[prev];
  1553. if (!e->opcode) {
  1554. e = NULL;
  1555. break;
  1556. }
  1557. if (qib_cmp24(psn, e->psn) >= 0) {
  1558. if (prev == qp->s_tail_ack_queue &&
  1559. qib_cmp24(psn, e->lpsn) <= 0)
  1560. old_req = 0;
  1561. break;
  1562. }
  1563. }
  1564. switch (opcode) {
  1565. case OP(RDMA_READ_REQUEST): {
  1566. struct ib_reth *reth;
  1567. u32 offset;
  1568. u32 len;
  1569. /*
  1570. * If we didn't find the RDMA read request in the ack queue,
  1571. * we can ignore this request.
  1572. */
  1573. if (!e || e->opcode != OP(RDMA_READ_REQUEST))
  1574. goto unlock_done;
  1575. /* RETH comes after BTH */
  1576. reth = &ohdr->u.rc.reth;
  1577. /*
  1578. * Address range must be a subset of the original
  1579. * request and start on pmtu boundaries.
  1580. * We reuse the old ack_queue slot since the requester
  1581. * should not back up and request an earlier PSN for the
  1582. * same request.
  1583. */
  1584. offset = ((psn - e->psn) & QIB_PSN_MASK) *
  1585. qp->pmtu;
  1586. len = be32_to_cpu(reth->length);
  1587. if (unlikely(offset + len != e->rdma_sge.sge_length))
  1588. goto unlock_done;
  1589. if (e->rdma_sge.mr) {
  1590. rvt_put_mr(e->rdma_sge.mr);
  1591. e->rdma_sge.mr = NULL;
  1592. }
  1593. if (len != 0) {
  1594. u32 rkey = be32_to_cpu(reth->rkey);
  1595. u64 vaddr = be64_to_cpu(reth->vaddr);
  1596. int ok;
  1597. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
  1598. IB_ACCESS_REMOTE_READ);
  1599. if (unlikely(!ok))
  1600. goto unlock_done;
  1601. } else {
  1602. e->rdma_sge.vaddr = NULL;
  1603. e->rdma_sge.length = 0;
  1604. e->rdma_sge.sge_length = 0;
  1605. }
  1606. e->psn = psn;
  1607. if (old_req)
  1608. goto unlock_done;
  1609. qp->s_tail_ack_queue = prev;
  1610. break;
  1611. }
  1612. case OP(COMPARE_SWAP):
  1613. case OP(FETCH_ADD): {
  1614. /*
  1615. * If we didn't find the atomic request in the ack queue
  1616. * or the send tasklet is already backed up to send an
  1617. * earlier entry, we can ignore this request.
  1618. */
  1619. if (!e || e->opcode != (u8) opcode || old_req)
  1620. goto unlock_done;
  1621. qp->s_tail_ack_queue = prev;
  1622. break;
  1623. }
  1624. default:
  1625. /*
  1626. * Ignore this operation if it doesn't request an ACK
  1627. * or an earlier RDMA read or atomic is going to be resent.
  1628. */
  1629. if (!(psn & IB_BTH_REQ_ACK) || old_req)
  1630. goto unlock_done;
  1631. /*
  1632. * Resend the most recent ACK if this request is
  1633. * after all the previous RDMA reads and atomics.
  1634. */
  1635. if (i == qp->r_head_ack_queue) {
  1636. spin_unlock_irqrestore(&qp->s_lock, flags);
  1637. qp->r_nak_state = 0;
  1638. qp->r_ack_psn = qp->r_psn - 1;
  1639. goto send_ack;
  1640. }
  1641. /*
  1642. * Try to send a simple ACK to work around a Mellanox bug
  1643. * which doesn't accept a RDMA read response or atomic
  1644. * response as an ACK for earlier SENDs or RDMA writes.
  1645. */
  1646. if (!(qp->s_flags & RVT_S_RESP_PENDING)) {
  1647. spin_unlock_irqrestore(&qp->s_lock, flags);
  1648. qp->r_nak_state = 0;
  1649. qp->r_ack_psn = qp->s_ack_queue[i].psn - 1;
  1650. goto send_ack;
  1651. }
  1652. /*
  1653. * Resend the RDMA read or atomic op which
  1654. * ACKs this duplicate request.
  1655. */
  1656. qp->s_tail_ack_queue = i;
  1657. break;
  1658. }
  1659. qp->s_ack_state = OP(ACKNOWLEDGE);
  1660. qp->s_flags |= RVT_S_RESP_PENDING;
  1661. qp->r_nak_state = 0;
  1662. qib_schedule_send(qp);
  1663. unlock_done:
  1664. spin_unlock_irqrestore(&qp->s_lock, flags);
  1665. done:
  1666. return 1;
  1667. send_ack:
  1668. return 0;
  1669. }
  1670. void qib_rc_error(struct rvt_qp *qp, enum ib_wc_status err)
  1671. {
  1672. unsigned long flags;
  1673. int lastwqe;
  1674. spin_lock_irqsave(&qp->s_lock, flags);
  1675. lastwqe = rvt_error_qp(qp, err);
  1676. spin_unlock_irqrestore(&qp->s_lock, flags);
  1677. if (lastwqe) {
  1678. struct ib_event ev;
  1679. ev.device = qp->ibqp.device;
  1680. ev.element.qp = &qp->ibqp;
  1681. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  1682. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  1683. }
  1684. }
  1685. static inline void qib_update_ack_queue(struct rvt_qp *qp, unsigned n)
  1686. {
  1687. unsigned next;
  1688. next = n + 1;
  1689. if (next > QIB_MAX_RDMA_ATOMIC)
  1690. next = 0;
  1691. qp->s_tail_ack_queue = next;
  1692. qp->s_ack_state = OP(ACKNOWLEDGE);
  1693. }
  1694. /**
  1695. * qib_rc_rcv - process an incoming RC packet
  1696. * @rcd: the context pointer
  1697. * @hdr: the header of this packet
  1698. * @has_grh: true if the header has a GRH
  1699. * @data: the packet data
  1700. * @tlen: the packet length
  1701. * @qp: the QP for this packet
  1702. *
  1703. * This is called from qib_qp_rcv() to process an incoming RC packet
  1704. * for the given QP.
  1705. * Called at interrupt level.
  1706. */
  1707. void qib_rc_rcv(struct qib_ctxtdata *rcd, struct qib_ib_header *hdr,
  1708. int has_grh, void *data, u32 tlen, struct rvt_qp *qp)
  1709. {
  1710. struct qib_ibport *ibp = &rcd->ppd->ibport_data;
  1711. struct qib_other_headers *ohdr;
  1712. u32 opcode;
  1713. u32 hdrsize;
  1714. u32 psn;
  1715. u32 pad;
  1716. struct ib_wc wc;
  1717. u32 pmtu = qp->pmtu;
  1718. int diff;
  1719. struct ib_reth *reth;
  1720. unsigned long flags;
  1721. int ret;
  1722. /* Check for GRH */
  1723. if (!has_grh) {
  1724. ohdr = &hdr->u.oth;
  1725. hdrsize = 8 + 12; /* LRH + BTH */
  1726. } else {
  1727. ohdr = &hdr->u.l.oth;
  1728. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  1729. }
  1730. opcode = be32_to_cpu(ohdr->bth[0]);
  1731. if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode))
  1732. return;
  1733. psn = be32_to_cpu(ohdr->bth[2]);
  1734. opcode >>= 24;
  1735. /*
  1736. * Process responses (ACKs) before anything else. Note that the
  1737. * packet sequence number will be for something in the send work
  1738. * queue rather than the expected receive packet sequence number.
  1739. * In other words, this QP is the requester.
  1740. */
  1741. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1742. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1743. qib_rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn,
  1744. hdrsize, pmtu, rcd);
  1745. return;
  1746. }
  1747. /* Compute 24 bits worth of difference. */
  1748. diff = qib_cmp24(psn, qp->r_psn);
  1749. if (unlikely(diff)) {
  1750. if (qib_rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
  1751. return;
  1752. goto send_ack;
  1753. }
  1754. /* Check for opcode sequence errors. */
  1755. switch (qp->r_state) {
  1756. case OP(SEND_FIRST):
  1757. case OP(SEND_MIDDLE):
  1758. if (opcode == OP(SEND_MIDDLE) ||
  1759. opcode == OP(SEND_LAST) ||
  1760. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  1761. break;
  1762. goto nack_inv;
  1763. case OP(RDMA_WRITE_FIRST):
  1764. case OP(RDMA_WRITE_MIDDLE):
  1765. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1766. opcode == OP(RDMA_WRITE_LAST) ||
  1767. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1768. break;
  1769. goto nack_inv;
  1770. default:
  1771. if (opcode == OP(SEND_MIDDLE) ||
  1772. opcode == OP(SEND_LAST) ||
  1773. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1774. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1775. opcode == OP(RDMA_WRITE_LAST) ||
  1776. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1777. goto nack_inv;
  1778. /*
  1779. * Note that it is up to the requester to not send a new
  1780. * RDMA read or atomic operation before receiving an ACK
  1781. * for the previous operation.
  1782. */
  1783. break;
  1784. }
  1785. if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST)) {
  1786. qp->r_flags |= RVT_R_COMM_EST;
  1787. if (qp->ibqp.event_handler) {
  1788. struct ib_event ev;
  1789. ev.device = qp->ibqp.device;
  1790. ev.element.qp = &qp->ibqp;
  1791. ev.event = IB_EVENT_COMM_EST;
  1792. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  1793. }
  1794. }
  1795. /* OK, process the packet. */
  1796. switch (opcode) {
  1797. case OP(SEND_FIRST):
  1798. ret = qib_get_rwqe(qp, 0);
  1799. if (ret < 0)
  1800. goto nack_op_err;
  1801. if (!ret)
  1802. goto rnr_nak;
  1803. qp->r_rcv_len = 0;
  1804. /* FALLTHROUGH */
  1805. case OP(SEND_MIDDLE):
  1806. case OP(RDMA_WRITE_MIDDLE):
  1807. send_middle:
  1808. /* Check for invalid length PMTU or posted rwqe len. */
  1809. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1810. goto nack_inv;
  1811. qp->r_rcv_len += pmtu;
  1812. if (unlikely(qp->r_rcv_len > qp->r_len))
  1813. goto nack_inv;
  1814. qib_copy_sge(&qp->r_sge, data, pmtu, 1);
  1815. break;
  1816. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1817. /* consume RWQE */
  1818. ret = qib_get_rwqe(qp, 1);
  1819. if (ret < 0)
  1820. goto nack_op_err;
  1821. if (!ret)
  1822. goto rnr_nak;
  1823. goto send_last_imm;
  1824. case OP(SEND_ONLY):
  1825. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1826. ret = qib_get_rwqe(qp, 0);
  1827. if (ret < 0)
  1828. goto nack_op_err;
  1829. if (!ret)
  1830. goto rnr_nak;
  1831. qp->r_rcv_len = 0;
  1832. if (opcode == OP(SEND_ONLY))
  1833. goto no_immediate_data;
  1834. /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */
  1835. case OP(SEND_LAST_WITH_IMMEDIATE):
  1836. send_last_imm:
  1837. wc.ex.imm_data = ohdr->u.imm_data;
  1838. hdrsize += 4;
  1839. wc.wc_flags = IB_WC_WITH_IMM;
  1840. goto send_last;
  1841. case OP(SEND_LAST):
  1842. case OP(RDMA_WRITE_LAST):
  1843. no_immediate_data:
  1844. wc.wc_flags = 0;
  1845. wc.ex.imm_data = 0;
  1846. send_last:
  1847. /* Get the number of bytes the message was padded by. */
  1848. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1849. /* Check for invalid length. */
  1850. /* XXX LAST len should be >= 1 */
  1851. if (unlikely(tlen < (hdrsize + pad + 4)))
  1852. goto nack_inv;
  1853. /* Don't count the CRC. */
  1854. tlen -= (hdrsize + pad + 4);
  1855. wc.byte_len = tlen + qp->r_rcv_len;
  1856. if (unlikely(wc.byte_len > qp->r_len))
  1857. goto nack_inv;
  1858. qib_copy_sge(&qp->r_sge, data, tlen, 1);
  1859. rvt_put_ss(&qp->r_sge);
  1860. qp->r_msn++;
  1861. if (!test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags))
  1862. break;
  1863. wc.wr_id = qp->r_wr_id;
  1864. wc.status = IB_WC_SUCCESS;
  1865. if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
  1866. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  1867. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  1868. else
  1869. wc.opcode = IB_WC_RECV;
  1870. wc.qp = &qp->ibqp;
  1871. wc.src_qp = qp->remote_qpn;
  1872. wc.slid = qp->remote_ah_attr.dlid;
  1873. wc.sl = qp->remote_ah_attr.sl;
  1874. /* zero fields that are N/A */
  1875. wc.vendor_err = 0;
  1876. wc.pkey_index = 0;
  1877. wc.dlid_path_bits = 0;
  1878. wc.port_num = 0;
  1879. /* Signal completion event if the solicited bit is set. */
  1880. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
  1881. (ohdr->bth[0] &
  1882. cpu_to_be32(IB_BTH_SOLICITED)) != 0);
  1883. break;
  1884. case OP(RDMA_WRITE_FIRST):
  1885. case OP(RDMA_WRITE_ONLY):
  1886. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1887. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
  1888. goto nack_inv;
  1889. /* consume RWQE */
  1890. reth = &ohdr->u.rc.reth;
  1891. hdrsize += sizeof(*reth);
  1892. qp->r_len = be32_to_cpu(reth->length);
  1893. qp->r_rcv_len = 0;
  1894. qp->r_sge.sg_list = NULL;
  1895. if (qp->r_len != 0) {
  1896. u32 rkey = be32_to_cpu(reth->rkey);
  1897. u64 vaddr = be64_to_cpu(reth->vaddr);
  1898. int ok;
  1899. /* Check rkey & NAK */
  1900. ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
  1901. rkey, IB_ACCESS_REMOTE_WRITE);
  1902. if (unlikely(!ok))
  1903. goto nack_acc;
  1904. qp->r_sge.num_sge = 1;
  1905. } else {
  1906. qp->r_sge.num_sge = 0;
  1907. qp->r_sge.sge.mr = NULL;
  1908. qp->r_sge.sge.vaddr = NULL;
  1909. qp->r_sge.sge.length = 0;
  1910. qp->r_sge.sge.sge_length = 0;
  1911. }
  1912. if (opcode == OP(RDMA_WRITE_FIRST))
  1913. goto send_middle;
  1914. else if (opcode == OP(RDMA_WRITE_ONLY))
  1915. goto no_immediate_data;
  1916. ret = qib_get_rwqe(qp, 1);
  1917. if (ret < 0)
  1918. goto nack_op_err;
  1919. if (!ret)
  1920. goto rnr_nak;
  1921. wc.ex.imm_data = ohdr->u.rc.imm_data;
  1922. hdrsize += 4;
  1923. wc.wc_flags = IB_WC_WITH_IMM;
  1924. goto send_last;
  1925. case OP(RDMA_READ_REQUEST): {
  1926. struct rvt_ack_entry *e;
  1927. u32 len;
  1928. u8 next;
  1929. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  1930. goto nack_inv;
  1931. next = qp->r_head_ack_queue + 1;
  1932. /* s_ack_queue is size QIB_MAX_RDMA_ATOMIC+1 so use > not >= */
  1933. if (next > QIB_MAX_RDMA_ATOMIC)
  1934. next = 0;
  1935. spin_lock_irqsave(&qp->s_lock, flags);
  1936. if (unlikely(next == qp->s_tail_ack_queue)) {
  1937. if (!qp->s_ack_queue[next].sent)
  1938. goto nack_inv_unlck;
  1939. qib_update_ack_queue(qp, next);
  1940. }
  1941. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1942. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  1943. rvt_put_mr(e->rdma_sge.mr);
  1944. e->rdma_sge.mr = NULL;
  1945. }
  1946. reth = &ohdr->u.rc.reth;
  1947. len = be32_to_cpu(reth->length);
  1948. if (len) {
  1949. u32 rkey = be32_to_cpu(reth->rkey);
  1950. u64 vaddr = be64_to_cpu(reth->vaddr);
  1951. int ok;
  1952. /* Check rkey & NAK */
  1953. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  1954. rkey, IB_ACCESS_REMOTE_READ);
  1955. if (unlikely(!ok))
  1956. goto nack_acc_unlck;
  1957. /*
  1958. * Update the next expected PSN. We add 1 later
  1959. * below, so only add the remainder here.
  1960. */
  1961. if (len > pmtu)
  1962. qp->r_psn += (len - 1) / pmtu;
  1963. } else {
  1964. e->rdma_sge.mr = NULL;
  1965. e->rdma_sge.vaddr = NULL;
  1966. e->rdma_sge.length = 0;
  1967. e->rdma_sge.sge_length = 0;
  1968. }
  1969. e->opcode = opcode;
  1970. e->sent = 0;
  1971. e->psn = psn;
  1972. e->lpsn = qp->r_psn;
  1973. /*
  1974. * We need to increment the MSN here instead of when we
  1975. * finish sending the result since a duplicate request would
  1976. * increment it more than once.
  1977. */
  1978. qp->r_msn++;
  1979. qp->r_psn++;
  1980. qp->r_state = opcode;
  1981. qp->r_nak_state = 0;
  1982. qp->r_head_ack_queue = next;
  1983. /* Schedule the send tasklet. */
  1984. qp->s_flags |= RVT_S_RESP_PENDING;
  1985. qib_schedule_send(qp);
  1986. goto sunlock;
  1987. }
  1988. case OP(COMPARE_SWAP):
  1989. case OP(FETCH_ADD): {
  1990. struct ib_atomic_eth *ateth;
  1991. struct rvt_ack_entry *e;
  1992. u64 vaddr;
  1993. atomic64_t *maddr;
  1994. u64 sdata;
  1995. u32 rkey;
  1996. u8 next;
  1997. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
  1998. goto nack_inv;
  1999. next = qp->r_head_ack_queue + 1;
  2000. if (next > QIB_MAX_RDMA_ATOMIC)
  2001. next = 0;
  2002. spin_lock_irqsave(&qp->s_lock, flags);
  2003. if (unlikely(next == qp->s_tail_ack_queue)) {
  2004. if (!qp->s_ack_queue[next].sent)
  2005. goto nack_inv_unlck;
  2006. qib_update_ack_queue(qp, next);
  2007. }
  2008. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2009. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2010. rvt_put_mr(e->rdma_sge.mr);
  2011. e->rdma_sge.mr = NULL;
  2012. }
  2013. ateth = &ohdr->u.atomic_eth;
  2014. vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
  2015. be32_to_cpu(ateth->vaddr[1]);
  2016. if (unlikely(vaddr & (sizeof(u64) - 1)))
  2017. goto nack_inv_unlck;
  2018. rkey = be32_to_cpu(ateth->rkey);
  2019. /* Check rkey & NAK */
  2020. if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
  2021. vaddr, rkey,
  2022. IB_ACCESS_REMOTE_ATOMIC)))
  2023. goto nack_acc_unlck;
  2024. /* Perform atomic OP and save result. */
  2025. maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
  2026. sdata = be64_to_cpu(ateth->swap_data);
  2027. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  2028. (u64) atomic64_add_return(sdata, maddr) - sdata :
  2029. (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
  2030. be64_to_cpu(ateth->compare_data),
  2031. sdata);
  2032. rvt_put_mr(qp->r_sge.sge.mr);
  2033. qp->r_sge.num_sge = 0;
  2034. e->opcode = opcode;
  2035. e->sent = 0;
  2036. e->psn = psn;
  2037. e->lpsn = psn;
  2038. qp->r_msn++;
  2039. qp->r_psn++;
  2040. qp->r_state = opcode;
  2041. qp->r_nak_state = 0;
  2042. qp->r_head_ack_queue = next;
  2043. /* Schedule the send tasklet. */
  2044. qp->s_flags |= RVT_S_RESP_PENDING;
  2045. qib_schedule_send(qp);
  2046. goto sunlock;
  2047. }
  2048. default:
  2049. /* NAK unknown opcodes. */
  2050. goto nack_inv;
  2051. }
  2052. qp->r_psn++;
  2053. qp->r_state = opcode;
  2054. qp->r_ack_psn = psn;
  2055. qp->r_nak_state = 0;
  2056. /* Send an ACK if requested or required. */
  2057. if (psn & (1 << 31))
  2058. goto send_ack;
  2059. return;
  2060. rnr_nak:
  2061. qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
  2062. qp->r_ack_psn = qp->r_psn;
  2063. /* Queue RNR NAK for later */
  2064. if (list_empty(&qp->rspwait)) {
  2065. qp->r_flags |= RVT_R_RSP_NAK;
  2066. atomic_inc(&qp->refcount);
  2067. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  2068. }
  2069. return;
  2070. nack_op_err:
  2071. qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2072. qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
  2073. qp->r_ack_psn = qp->r_psn;
  2074. /* Queue NAK for later */
  2075. if (list_empty(&qp->rspwait)) {
  2076. qp->r_flags |= RVT_R_RSP_NAK;
  2077. atomic_inc(&qp->refcount);
  2078. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  2079. }
  2080. return;
  2081. nack_inv_unlck:
  2082. spin_unlock_irqrestore(&qp->s_lock, flags);
  2083. nack_inv:
  2084. qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2085. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  2086. qp->r_ack_psn = qp->r_psn;
  2087. /* Queue NAK for later */
  2088. if (list_empty(&qp->rspwait)) {
  2089. qp->r_flags |= RVT_R_RSP_NAK;
  2090. atomic_inc(&qp->refcount);
  2091. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  2092. }
  2093. return;
  2094. nack_acc_unlck:
  2095. spin_unlock_irqrestore(&qp->s_lock, flags);
  2096. nack_acc:
  2097. qib_rc_error(qp, IB_WC_LOC_PROT_ERR);
  2098. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  2099. qp->r_ack_psn = qp->r_psn;
  2100. send_ack:
  2101. qib_send_rc_ack(qp);
  2102. return;
  2103. sunlock:
  2104. spin_unlock_irqrestore(&qp->s_lock, flags);
  2105. }