mr.c 12 KB

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  1. /*
  2. * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/slab.h>
  34. #include <rdma/ib_user_verbs.h>
  35. #include "mlx4_ib.h"
  36. static u32 convert_access(int acc)
  37. {
  38. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX4_PERM_ATOMIC : 0) |
  39. (acc & IB_ACCESS_REMOTE_WRITE ? MLX4_PERM_REMOTE_WRITE : 0) |
  40. (acc & IB_ACCESS_REMOTE_READ ? MLX4_PERM_REMOTE_READ : 0) |
  41. (acc & IB_ACCESS_LOCAL_WRITE ? MLX4_PERM_LOCAL_WRITE : 0) |
  42. (acc & IB_ACCESS_MW_BIND ? MLX4_PERM_BIND_MW : 0) |
  43. MLX4_PERM_LOCAL_READ;
  44. }
  45. static enum mlx4_mw_type to_mlx4_type(enum ib_mw_type type)
  46. {
  47. switch (type) {
  48. case IB_MW_TYPE_1: return MLX4_MW_TYPE_1;
  49. case IB_MW_TYPE_2: return MLX4_MW_TYPE_2;
  50. default: return -1;
  51. }
  52. }
  53. struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc)
  54. {
  55. struct mlx4_ib_mr *mr;
  56. int err;
  57. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  58. if (!mr)
  59. return ERR_PTR(-ENOMEM);
  60. err = mlx4_mr_alloc(to_mdev(pd->device)->dev, to_mpd(pd)->pdn, 0,
  61. ~0ull, convert_access(acc), 0, 0, &mr->mmr);
  62. if (err)
  63. goto err_free;
  64. err = mlx4_mr_enable(to_mdev(pd->device)->dev, &mr->mmr);
  65. if (err)
  66. goto err_mr;
  67. mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
  68. mr->umem = NULL;
  69. return &mr->ibmr;
  70. err_mr:
  71. (void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
  72. err_free:
  73. kfree(mr);
  74. return ERR_PTR(err);
  75. }
  76. int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
  77. struct ib_umem *umem)
  78. {
  79. u64 *pages;
  80. int i, k, entry;
  81. int n;
  82. int len;
  83. int err = 0;
  84. struct scatterlist *sg;
  85. pages = (u64 *) __get_free_page(GFP_KERNEL);
  86. if (!pages)
  87. return -ENOMEM;
  88. i = n = 0;
  89. for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
  90. len = sg_dma_len(sg) >> mtt->page_shift;
  91. for (k = 0; k < len; ++k) {
  92. pages[i++] = sg_dma_address(sg) +
  93. umem->page_size * k;
  94. /*
  95. * Be friendly to mlx4_write_mtt() and
  96. * pass it chunks of appropriate size.
  97. */
  98. if (i == PAGE_SIZE / sizeof (u64)) {
  99. err = mlx4_write_mtt(dev->dev, mtt, n,
  100. i, pages);
  101. if (err)
  102. goto out;
  103. n += i;
  104. i = 0;
  105. }
  106. }
  107. }
  108. if (i)
  109. err = mlx4_write_mtt(dev->dev, mtt, n, i, pages);
  110. out:
  111. free_page((unsigned long) pages);
  112. return err;
  113. }
  114. struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  115. u64 virt_addr, int access_flags,
  116. struct ib_udata *udata)
  117. {
  118. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  119. struct mlx4_ib_mr *mr;
  120. int shift;
  121. int err;
  122. int n;
  123. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  124. if (!mr)
  125. return ERR_PTR(-ENOMEM);
  126. /* Force registering the memory as writable. */
  127. /* Used for memory re-registeration. HCA protects the access */
  128. mr->umem = ib_umem_get(pd->uobject->context, start, length,
  129. access_flags | IB_ACCESS_LOCAL_WRITE, 0);
  130. if (IS_ERR(mr->umem)) {
  131. err = PTR_ERR(mr->umem);
  132. goto err_free;
  133. }
  134. n = ib_umem_page_count(mr->umem);
  135. shift = ilog2(mr->umem->page_size);
  136. err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, virt_addr, length,
  137. convert_access(access_flags), n, shift, &mr->mmr);
  138. if (err)
  139. goto err_umem;
  140. err = mlx4_ib_umem_write_mtt(dev, &mr->mmr.mtt, mr->umem);
  141. if (err)
  142. goto err_mr;
  143. err = mlx4_mr_enable(dev->dev, &mr->mmr);
  144. if (err)
  145. goto err_mr;
  146. mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
  147. return &mr->ibmr;
  148. err_mr:
  149. (void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr);
  150. err_umem:
  151. ib_umem_release(mr->umem);
  152. err_free:
  153. kfree(mr);
  154. return ERR_PTR(err);
  155. }
  156. int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
  157. u64 start, u64 length, u64 virt_addr,
  158. int mr_access_flags, struct ib_pd *pd,
  159. struct ib_udata *udata)
  160. {
  161. struct mlx4_ib_dev *dev = to_mdev(mr->device);
  162. struct mlx4_ib_mr *mmr = to_mmr(mr);
  163. struct mlx4_mpt_entry *mpt_entry;
  164. struct mlx4_mpt_entry **pmpt_entry = &mpt_entry;
  165. int err;
  166. /* Since we synchronize this call and mlx4_ib_dereg_mr via uverbs,
  167. * we assume that the calls can't run concurrently. Otherwise, a
  168. * race exists.
  169. */
  170. err = mlx4_mr_hw_get_mpt(dev->dev, &mmr->mmr, &pmpt_entry);
  171. if (err)
  172. return err;
  173. if (flags & IB_MR_REREG_PD) {
  174. err = mlx4_mr_hw_change_pd(dev->dev, *pmpt_entry,
  175. to_mpd(pd)->pdn);
  176. if (err)
  177. goto release_mpt_entry;
  178. }
  179. if (flags & IB_MR_REREG_ACCESS) {
  180. err = mlx4_mr_hw_change_access(dev->dev, *pmpt_entry,
  181. convert_access(mr_access_flags));
  182. if (err)
  183. goto release_mpt_entry;
  184. }
  185. if (flags & IB_MR_REREG_TRANS) {
  186. int shift;
  187. int n;
  188. mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
  189. ib_umem_release(mmr->umem);
  190. mmr->umem = ib_umem_get(mr->uobject->context, start, length,
  191. mr_access_flags |
  192. IB_ACCESS_LOCAL_WRITE,
  193. 0);
  194. if (IS_ERR(mmr->umem)) {
  195. err = PTR_ERR(mmr->umem);
  196. /* Prevent mlx4_ib_dereg_mr from free'ing invalid pointer */
  197. mmr->umem = NULL;
  198. goto release_mpt_entry;
  199. }
  200. n = ib_umem_page_count(mmr->umem);
  201. shift = ilog2(mmr->umem->page_size);
  202. err = mlx4_mr_rereg_mem_write(dev->dev, &mmr->mmr,
  203. virt_addr, length, n, shift,
  204. *pmpt_entry);
  205. if (err) {
  206. ib_umem_release(mmr->umem);
  207. goto release_mpt_entry;
  208. }
  209. mmr->mmr.iova = virt_addr;
  210. mmr->mmr.size = length;
  211. err = mlx4_ib_umem_write_mtt(dev, &mmr->mmr.mtt, mmr->umem);
  212. if (err) {
  213. mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr);
  214. ib_umem_release(mmr->umem);
  215. goto release_mpt_entry;
  216. }
  217. }
  218. /* If we couldn't transfer the MR to the HCA, just remember to
  219. * return a failure. But dereg_mr will free the resources.
  220. */
  221. err = mlx4_mr_hw_write_mpt(dev->dev, &mmr->mmr, pmpt_entry);
  222. if (!err && flags & IB_MR_REREG_ACCESS)
  223. mmr->mmr.access = mr_access_flags;
  224. release_mpt_entry:
  225. mlx4_mr_hw_put_mpt(dev->dev, pmpt_entry);
  226. return err;
  227. }
  228. static int
  229. mlx4_alloc_priv_pages(struct ib_device *device,
  230. struct mlx4_ib_mr *mr,
  231. int max_pages)
  232. {
  233. int size = max_pages * sizeof(u64);
  234. int add_size;
  235. int ret;
  236. add_size = max_t(int, MLX4_MR_PAGES_ALIGN - ARCH_KMALLOC_MINALIGN, 0);
  237. mr->pages_alloc = kzalloc(size + add_size, GFP_KERNEL);
  238. if (!mr->pages_alloc)
  239. return -ENOMEM;
  240. mr->pages = PTR_ALIGN(mr->pages_alloc, MLX4_MR_PAGES_ALIGN);
  241. mr->page_map = dma_map_single(device->dma_device, mr->pages,
  242. size, DMA_TO_DEVICE);
  243. if (dma_mapping_error(device->dma_device, mr->page_map)) {
  244. ret = -ENOMEM;
  245. goto err;
  246. }
  247. return 0;
  248. err:
  249. kfree(mr->pages_alloc);
  250. return ret;
  251. }
  252. static void
  253. mlx4_free_priv_pages(struct mlx4_ib_mr *mr)
  254. {
  255. if (mr->pages) {
  256. struct ib_device *device = mr->ibmr.device;
  257. int size = mr->max_pages * sizeof(u64);
  258. dma_unmap_single(device->dma_device, mr->page_map,
  259. size, DMA_TO_DEVICE);
  260. kfree(mr->pages_alloc);
  261. mr->pages = NULL;
  262. }
  263. }
  264. int mlx4_ib_dereg_mr(struct ib_mr *ibmr)
  265. {
  266. struct mlx4_ib_mr *mr = to_mmr(ibmr);
  267. int ret;
  268. mlx4_free_priv_pages(mr);
  269. ret = mlx4_mr_free(to_mdev(ibmr->device)->dev, &mr->mmr);
  270. if (ret)
  271. return ret;
  272. if (mr->umem)
  273. ib_umem_release(mr->umem);
  274. kfree(mr);
  275. return 0;
  276. }
  277. struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type,
  278. struct ib_udata *udata)
  279. {
  280. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  281. struct mlx4_ib_mw *mw;
  282. int err;
  283. mw = kmalloc(sizeof(*mw), GFP_KERNEL);
  284. if (!mw)
  285. return ERR_PTR(-ENOMEM);
  286. err = mlx4_mw_alloc(dev->dev, to_mpd(pd)->pdn,
  287. to_mlx4_type(type), &mw->mmw);
  288. if (err)
  289. goto err_free;
  290. err = mlx4_mw_enable(dev->dev, &mw->mmw);
  291. if (err)
  292. goto err_mw;
  293. mw->ibmw.rkey = mw->mmw.key;
  294. return &mw->ibmw;
  295. err_mw:
  296. mlx4_mw_free(dev->dev, &mw->mmw);
  297. err_free:
  298. kfree(mw);
  299. return ERR_PTR(err);
  300. }
  301. int mlx4_ib_dealloc_mw(struct ib_mw *ibmw)
  302. {
  303. struct mlx4_ib_mw *mw = to_mmw(ibmw);
  304. mlx4_mw_free(to_mdev(ibmw->device)->dev, &mw->mmw);
  305. kfree(mw);
  306. return 0;
  307. }
  308. struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd,
  309. enum ib_mr_type mr_type,
  310. u32 max_num_sg)
  311. {
  312. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  313. struct mlx4_ib_mr *mr;
  314. int err;
  315. if (mr_type != IB_MR_TYPE_MEM_REG ||
  316. max_num_sg > MLX4_MAX_FAST_REG_PAGES)
  317. return ERR_PTR(-EINVAL);
  318. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  319. if (!mr)
  320. return ERR_PTR(-ENOMEM);
  321. err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, 0, 0, 0,
  322. max_num_sg, 0, &mr->mmr);
  323. if (err)
  324. goto err_free;
  325. err = mlx4_alloc_priv_pages(pd->device, mr, max_num_sg);
  326. if (err)
  327. goto err_free_mr;
  328. mr->max_pages = max_num_sg;
  329. err = mlx4_mr_enable(dev->dev, &mr->mmr);
  330. if (err)
  331. goto err_free_pl;
  332. mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key;
  333. mr->umem = NULL;
  334. return &mr->ibmr;
  335. err_free_pl:
  336. mlx4_free_priv_pages(mr);
  337. err_free_mr:
  338. (void) mlx4_mr_free(dev->dev, &mr->mmr);
  339. err_free:
  340. kfree(mr);
  341. return ERR_PTR(err);
  342. }
  343. struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int acc,
  344. struct ib_fmr_attr *fmr_attr)
  345. {
  346. struct mlx4_ib_dev *dev = to_mdev(pd->device);
  347. struct mlx4_ib_fmr *fmr;
  348. int err = -ENOMEM;
  349. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  350. if (!fmr)
  351. return ERR_PTR(-ENOMEM);
  352. err = mlx4_fmr_alloc(dev->dev, to_mpd(pd)->pdn, convert_access(acc),
  353. fmr_attr->max_pages, fmr_attr->max_maps,
  354. fmr_attr->page_shift, &fmr->mfmr);
  355. if (err)
  356. goto err_free;
  357. err = mlx4_fmr_enable(to_mdev(pd->device)->dev, &fmr->mfmr);
  358. if (err)
  359. goto err_mr;
  360. fmr->ibfmr.rkey = fmr->ibfmr.lkey = fmr->mfmr.mr.key;
  361. return &fmr->ibfmr;
  362. err_mr:
  363. (void) mlx4_mr_free(to_mdev(pd->device)->dev, &fmr->mfmr.mr);
  364. err_free:
  365. kfree(fmr);
  366. return ERR_PTR(err);
  367. }
  368. int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  369. int npages, u64 iova)
  370. {
  371. struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
  372. struct mlx4_ib_dev *dev = to_mdev(ifmr->ibfmr.device);
  373. return mlx4_map_phys_fmr(dev->dev, &ifmr->mfmr, page_list, npages, iova,
  374. &ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey);
  375. }
  376. int mlx4_ib_unmap_fmr(struct list_head *fmr_list)
  377. {
  378. struct ib_fmr *ibfmr;
  379. int err;
  380. struct mlx4_dev *mdev = NULL;
  381. list_for_each_entry(ibfmr, fmr_list, list) {
  382. if (mdev && to_mdev(ibfmr->device)->dev != mdev)
  383. return -EINVAL;
  384. mdev = to_mdev(ibfmr->device)->dev;
  385. }
  386. if (!mdev)
  387. return 0;
  388. list_for_each_entry(ibfmr, fmr_list, list) {
  389. struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
  390. mlx4_fmr_unmap(mdev, &ifmr->mfmr, &ifmr->ibfmr.lkey, &ifmr->ibfmr.rkey);
  391. }
  392. /*
  393. * Make sure all MPT status updates are visible before issuing
  394. * SYNC_TPT firmware command.
  395. */
  396. wmb();
  397. err = mlx4_SYNC_TPT(mdev);
  398. if (err)
  399. pr_warn("SYNC_TPT error %d when "
  400. "unmapping FMRs\n", err);
  401. return 0;
  402. }
  403. int mlx4_ib_fmr_dealloc(struct ib_fmr *ibfmr)
  404. {
  405. struct mlx4_ib_fmr *ifmr = to_mfmr(ibfmr);
  406. struct mlx4_ib_dev *dev = to_mdev(ibfmr->device);
  407. int err;
  408. err = mlx4_fmr_free(dev->dev, &ifmr->mfmr);
  409. if (!err)
  410. kfree(ifmr);
  411. return err;
  412. }
  413. static int mlx4_set_page(struct ib_mr *ibmr, u64 addr)
  414. {
  415. struct mlx4_ib_mr *mr = to_mmr(ibmr);
  416. if (unlikely(mr->npages == mr->max_pages))
  417. return -ENOMEM;
  418. mr->pages[mr->npages++] = cpu_to_be64(addr | MLX4_MTT_FLAG_PRESENT);
  419. return 0;
  420. }
  421. int mlx4_ib_map_mr_sg(struct ib_mr *ibmr,
  422. struct scatterlist *sg,
  423. int sg_nents)
  424. {
  425. struct mlx4_ib_mr *mr = to_mmr(ibmr);
  426. int rc;
  427. mr->npages = 0;
  428. ib_dma_sync_single_for_cpu(ibmr->device, mr->page_map,
  429. sizeof(u64) * mr->max_pages,
  430. DMA_TO_DEVICE);
  431. rc = ib_sg_to_pages(ibmr, sg, sg_nents, mlx4_set_page);
  432. ib_dma_sync_single_for_device(ibmr->device, mr->page_map,
  433. sizeof(u64) * mr->max_pages,
  434. DMA_TO_DEVICE);
  435. return rc;
  436. }