i40iw_utils.c 34 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/ethtool.h>
  39. #include <linux/mii.h>
  40. #include <linux/if_vlan.h>
  41. #include <linux/crc32.h>
  42. #include <linux/in.h>
  43. #include <linux/ip.h>
  44. #include <linux/tcp.h>
  45. #include <linux/init.h>
  46. #include <linux/io.h>
  47. #include <asm/irq.h>
  48. #include <asm/byteorder.h>
  49. #include <net/netevent.h>
  50. #include <net/neighbour.h>
  51. #include "i40iw.h"
  52. /**
  53. * i40iw_arp_table - manage arp table
  54. * @iwdev: iwarp device
  55. * @ip_addr: ip address for device
  56. * @mac_addr: mac address ptr
  57. * @action: modify, delete or add
  58. */
  59. int i40iw_arp_table(struct i40iw_device *iwdev,
  60. __be32 *ip_addr,
  61. bool ipv4,
  62. u8 *mac_addr,
  63. u32 action)
  64. {
  65. int arp_index;
  66. int err;
  67. u32 ip[4];
  68. if (ipv4) {
  69. memset(ip, 0, sizeof(ip));
  70. ip[0] = *ip_addr;
  71. } else {
  72. memcpy(ip, ip_addr, sizeof(ip));
  73. }
  74. for (arp_index = 0; (u32)arp_index < iwdev->arp_table_size; arp_index++)
  75. if (memcmp(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip)) == 0)
  76. break;
  77. switch (action) {
  78. case I40IW_ARP_ADD:
  79. if (arp_index != iwdev->arp_table_size)
  80. return -1;
  81. arp_index = 0;
  82. err = i40iw_alloc_resource(iwdev, iwdev->allocated_arps,
  83. iwdev->arp_table_size,
  84. (u32 *)&arp_index,
  85. &iwdev->next_arp_index);
  86. if (err)
  87. return err;
  88. memcpy(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip));
  89. ether_addr_copy(iwdev->arp_table[arp_index].mac_addr, mac_addr);
  90. break;
  91. case I40IW_ARP_RESOLVE:
  92. if (arp_index == iwdev->arp_table_size)
  93. return -1;
  94. break;
  95. case I40IW_ARP_DELETE:
  96. if (arp_index == iwdev->arp_table_size)
  97. return -1;
  98. memset(iwdev->arp_table[arp_index].ip_addr, 0,
  99. sizeof(iwdev->arp_table[arp_index].ip_addr));
  100. eth_zero_addr(iwdev->arp_table[arp_index].mac_addr);
  101. i40iw_free_resource(iwdev, iwdev->allocated_arps, arp_index);
  102. break;
  103. default:
  104. return -1;
  105. }
  106. return arp_index;
  107. }
  108. /**
  109. * i40iw_wr32 - write 32 bits to hw register
  110. * @hw: hardware information including registers
  111. * @reg: register offset
  112. * @value: vvalue to write to register
  113. */
  114. inline void i40iw_wr32(struct i40iw_hw *hw, u32 reg, u32 value)
  115. {
  116. writel(value, hw->hw_addr + reg);
  117. }
  118. /**
  119. * i40iw_rd32 - read a 32 bit hw register
  120. * @hw: hardware information including registers
  121. * @reg: register offset
  122. *
  123. * Return value of register content
  124. */
  125. inline u32 i40iw_rd32(struct i40iw_hw *hw, u32 reg)
  126. {
  127. return readl(hw->hw_addr + reg);
  128. }
  129. /**
  130. * i40iw_inetaddr_event - system notifier for netdev events
  131. * @notfier: not used
  132. * @event: event for notifier
  133. * @ptr: if address
  134. */
  135. int i40iw_inetaddr_event(struct notifier_block *notifier,
  136. unsigned long event,
  137. void *ptr)
  138. {
  139. struct in_ifaddr *ifa = ptr;
  140. struct net_device *event_netdev = ifa->ifa_dev->dev;
  141. struct net_device *netdev;
  142. struct net_device *upper_dev;
  143. struct i40iw_device *iwdev;
  144. struct i40iw_handler *hdl;
  145. __be32 local_ipaddr;
  146. hdl = i40iw_find_netdev(event_netdev);
  147. if (!hdl)
  148. return NOTIFY_DONE;
  149. iwdev = &hdl->device;
  150. netdev = iwdev->ldev->netdev;
  151. upper_dev = netdev_master_upper_dev_get(netdev);
  152. if (netdev != event_netdev)
  153. return NOTIFY_DONE;
  154. switch (event) {
  155. case NETDEV_DOWN:
  156. if (upper_dev)
  157. local_ipaddr =
  158. ((struct in_device *)upper_dev->ip_ptr)->ifa_list->ifa_address;
  159. else
  160. local_ipaddr = ifa->ifa_address;
  161. local_ipaddr = ntohl(local_ipaddr);
  162. i40iw_manage_arp_cache(iwdev,
  163. netdev->dev_addr,
  164. &local_ipaddr,
  165. true,
  166. I40IW_ARP_DELETE);
  167. return NOTIFY_OK;
  168. case NETDEV_UP:
  169. if (upper_dev)
  170. local_ipaddr =
  171. ((struct in_device *)upper_dev->ip_ptr)->ifa_list->ifa_address;
  172. else
  173. local_ipaddr = ifa->ifa_address;
  174. local_ipaddr = ntohl(local_ipaddr);
  175. i40iw_manage_arp_cache(iwdev,
  176. netdev->dev_addr,
  177. &local_ipaddr,
  178. true,
  179. I40IW_ARP_ADD);
  180. break;
  181. case NETDEV_CHANGEADDR:
  182. /* Add the address to the IP table */
  183. if (upper_dev)
  184. local_ipaddr =
  185. ((struct in_device *)upper_dev->ip_ptr)->ifa_list->ifa_address;
  186. else
  187. local_ipaddr = ifa->ifa_address;
  188. local_ipaddr = ntohl(local_ipaddr);
  189. i40iw_manage_arp_cache(iwdev,
  190. netdev->dev_addr,
  191. &local_ipaddr,
  192. true,
  193. I40IW_ARP_ADD);
  194. break;
  195. default:
  196. break;
  197. }
  198. return NOTIFY_DONE;
  199. }
  200. /**
  201. * i40iw_inet6addr_event - system notifier for ipv6 netdev events
  202. * @notfier: not used
  203. * @event: event for notifier
  204. * @ptr: if address
  205. */
  206. int i40iw_inet6addr_event(struct notifier_block *notifier,
  207. unsigned long event,
  208. void *ptr)
  209. {
  210. struct inet6_ifaddr *ifa = (struct inet6_ifaddr *)ptr;
  211. struct net_device *event_netdev = ifa->idev->dev;
  212. struct net_device *netdev;
  213. struct i40iw_device *iwdev;
  214. struct i40iw_handler *hdl;
  215. __be32 local_ipaddr6[4];
  216. hdl = i40iw_find_netdev(event_netdev);
  217. if (!hdl)
  218. return NOTIFY_DONE;
  219. iwdev = &hdl->device;
  220. netdev = iwdev->ldev->netdev;
  221. if (netdev != event_netdev)
  222. return NOTIFY_DONE;
  223. switch (event) {
  224. case NETDEV_DOWN:
  225. i40iw_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32);
  226. i40iw_manage_arp_cache(iwdev,
  227. netdev->dev_addr,
  228. local_ipaddr6,
  229. false,
  230. I40IW_ARP_DELETE);
  231. return NOTIFY_OK;
  232. case NETDEV_UP:
  233. /* Fall through */
  234. case NETDEV_CHANGEADDR:
  235. i40iw_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32);
  236. i40iw_manage_arp_cache(iwdev,
  237. netdev->dev_addr,
  238. local_ipaddr6,
  239. false,
  240. I40IW_ARP_ADD);
  241. break;
  242. default:
  243. break;
  244. }
  245. return NOTIFY_DONE;
  246. }
  247. /**
  248. * i40iw_net_event - system notifier for net events
  249. * @notfier: not used
  250. * @event: event for notifier
  251. * @ptr: neighbor
  252. */
  253. int i40iw_net_event(struct notifier_block *notifier, unsigned long event, void *ptr)
  254. {
  255. struct neighbour *neigh = ptr;
  256. struct i40iw_device *iwdev;
  257. struct i40iw_handler *iwhdl;
  258. __be32 *p;
  259. u32 local_ipaddr[4];
  260. switch (event) {
  261. case NETEVENT_NEIGH_UPDATE:
  262. iwhdl = i40iw_find_netdev((struct net_device *)neigh->dev);
  263. if (!iwhdl)
  264. return NOTIFY_DONE;
  265. iwdev = &iwhdl->device;
  266. p = (__be32 *)neigh->primary_key;
  267. i40iw_copy_ip_ntohl(local_ipaddr, p);
  268. if (neigh->nud_state & NUD_VALID) {
  269. i40iw_manage_arp_cache(iwdev,
  270. neigh->ha,
  271. local_ipaddr,
  272. false,
  273. I40IW_ARP_ADD);
  274. } else {
  275. i40iw_manage_arp_cache(iwdev,
  276. neigh->ha,
  277. local_ipaddr,
  278. false,
  279. I40IW_ARP_DELETE);
  280. }
  281. break;
  282. default:
  283. break;
  284. }
  285. return NOTIFY_DONE;
  286. }
  287. /**
  288. * i40iw_get_cqp_request - get cqp struct
  289. * @cqp: device cqp ptr
  290. * @wait: cqp to be used in wait mode
  291. */
  292. struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait)
  293. {
  294. struct i40iw_cqp_request *cqp_request = NULL;
  295. unsigned long flags;
  296. spin_lock_irqsave(&cqp->req_lock, flags);
  297. if (!list_empty(&cqp->cqp_avail_reqs)) {
  298. cqp_request = list_entry(cqp->cqp_avail_reqs.next,
  299. struct i40iw_cqp_request, list);
  300. list_del_init(&cqp_request->list);
  301. }
  302. spin_unlock_irqrestore(&cqp->req_lock, flags);
  303. if (!cqp_request) {
  304. cqp_request = kzalloc(sizeof(*cqp_request), GFP_ATOMIC);
  305. if (cqp_request) {
  306. cqp_request->dynamic = true;
  307. INIT_LIST_HEAD(&cqp_request->list);
  308. init_waitqueue_head(&cqp_request->waitq);
  309. }
  310. }
  311. if (!cqp_request) {
  312. i40iw_pr_err("CQP Request Fail: No Memory");
  313. return NULL;
  314. }
  315. if (wait) {
  316. atomic_set(&cqp_request->refcount, 2);
  317. cqp_request->waiting = true;
  318. } else {
  319. atomic_set(&cqp_request->refcount, 1);
  320. }
  321. return cqp_request;
  322. }
  323. /**
  324. * i40iw_free_cqp_request - free cqp request
  325. * @cqp: cqp ptr
  326. * @cqp_request: to be put back in cqp list
  327. */
  328. void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request)
  329. {
  330. unsigned long flags;
  331. if (cqp_request->dynamic) {
  332. kfree(cqp_request);
  333. } else {
  334. cqp_request->request_done = false;
  335. cqp_request->callback_fcn = NULL;
  336. cqp_request->waiting = false;
  337. spin_lock_irqsave(&cqp->req_lock, flags);
  338. list_add_tail(&cqp_request->list, &cqp->cqp_avail_reqs);
  339. spin_unlock_irqrestore(&cqp->req_lock, flags);
  340. }
  341. }
  342. /**
  343. * i40iw_put_cqp_request - dec ref count and free if 0
  344. * @cqp: cqp ptr
  345. * @cqp_request: to be put back in cqp list
  346. */
  347. void i40iw_put_cqp_request(struct i40iw_cqp *cqp,
  348. struct i40iw_cqp_request *cqp_request)
  349. {
  350. if (atomic_dec_and_test(&cqp_request->refcount))
  351. i40iw_free_cqp_request(cqp, cqp_request);
  352. }
  353. /**
  354. * i40iw_free_qp - callback after destroy cqp completes
  355. * @cqp_request: cqp request for destroy qp
  356. * @num: not used
  357. */
  358. static void i40iw_free_qp(struct i40iw_cqp_request *cqp_request, u32 num)
  359. {
  360. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)cqp_request->param;
  361. struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp;
  362. struct i40iw_device *iwdev;
  363. u32 qp_num = iwqp->ibqp.qp_num;
  364. iwdev = iwqp->iwdev;
  365. i40iw_rem_pdusecount(iwqp->iwpd, iwdev);
  366. i40iw_free_qp_resources(iwdev, iwqp, qp_num);
  367. }
  368. /**
  369. * i40iw_wait_event - wait for completion
  370. * @iwdev: iwarp device
  371. * @cqp_request: cqp request to wait
  372. */
  373. static int i40iw_wait_event(struct i40iw_device *iwdev,
  374. struct i40iw_cqp_request *cqp_request)
  375. {
  376. struct cqp_commands_info *info = &cqp_request->info;
  377. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  378. bool cqp_error = false;
  379. int err_code = 0;
  380. int timeout_ret = 0;
  381. timeout_ret = wait_event_timeout(cqp_request->waitq,
  382. cqp_request->request_done,
  383. I40IW_EVENT_TIMEOUT);
  384. if (!timeout_ret) {
  385. i40iw_pr_err("error cqp command 0x%x timed out ret = %d\n",
  386. info->cqp_cmd, timeout_ret);
  387. err_code = -ETIME;
  388. i40iw_request_reset(iwdev);
  389. goto done;
  390. }
  391. cqp_error = cqp_request->compl_info.error;
  392. if (cqp_error) {
  393. i40iw_pr_err("error cqp command 0x%x completion maj = 0x%x min=0x%x\n",
  394. info->cqp_cmd, cqp_request->compl_info.maj_err_code,
  395. cqp_request->compl_info.min_err_code);
  396. err_code = -EPROTO;
  397. goto done;
  398. }
  399. done:
  400. i40iw_put_cqp_request(iwcqp, cqp_request);
  401. return err_code;
  402. }
  403. /**
  404. * i40iw_handle_cqp_op - process cqp command
  405. * @iwdev: iwarp device
  406. * @cqp_request: cqp request to process
  407. */
  408. enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
  409. struct i40iw_cqp_request
  410. *cqp_request)
  411. {
  412. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  413. enum i40iw_status_code status;
  414. struct cqp_commands_info *info = &cqp_request->info;
  415. int err_code = 0;
  416. status = i40iw_process_cqp_cmd(dev, info);
  417. if (status) {
  418. i40iw_pr_err("error cqp command 0x%x failed\n", info->cqp_cmd);
  419. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  420. return status;
  421. }
  422. if (cqp_request->waiting)
  423. err_code = i40iw_wait_event(iwdev, cqp_request);
  424. if (err_code)
  425. status = I40IW_ERR_CQP_COMPL_ERROR;
  426. return status;
  427. }
  428. /**
  429. * i40iw_add_pdusecount - add pd refcount
  430. * @iwpd: pd for refcount
  431. */
  432. void i40iw_add_pdusecount(struct i40iw_pd *iwpd)
  433. {
  434. atomic_inc(&iwpd->usecount);
  435. }
  436. /**
  437. * i40iw_rem_pdusecount - decrement refcount for pd and free if 0
  438. * @iwpd: pd for refcount
  439. * @iwdev: iwarp device
  440. */
  441. void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev)
  442. {
  443. if (!atomic_dec_and_test(&iwpd->usecount))
  444. return;
  445. i40iw_free_resource(iwdev, iwdev->allocated_pds, iwpd->sc_pd.pd_id);
  446. kfree(iwpd);
  447. }
  448. /**
  449. * i40iw_add_ref - add refcount for qp
  450. * @ibqp: iqarp qp
  451. */
  452. void i40iw_add_ref(struct ib_qp *ibqp)
  453. {
  454. struct i40iw_qp *iwqp = (struct i40iw_qp *)ibqp;
  455. atomic_inc(&iwqp->refcount);
  456. }
  457. /**
  458. * i40iw_rem_ref - rem refcount for qp and free if 0
  459. * @ibqp: iqarp qp
  460. */
  461. void i40iw_rem_ref(struct ib_qp *ibqp)
  462. {
  463. struct i40iw_qp *iwqp;
  464. enum i40iw_status_code status;
  465. struct i40iw_cqp_request *cqp_request;
  466. struct cqp_commands_info *cqp_info;
  467. struct i40iw_device *iwdev;
  468. u32 qp_num;
  469. iwqp = to_iwqp(ibqp);
  470. if (!atomic_dec_and_test(&iwqp->refcount))
  471. return;
  472. iwdev = iwqp->iwdev;
  473. qp_num = iwqp->ibqp.qp_num;
  474. iwdev->qp_table[qp_num] = NULL;
  475. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  476. if (!cqp_request)
  477. return;
  478. cqp_request->callback_fcn = i40iw_free_qp;
  479. cqp_request->param = (void *)&iwqp->sc_qp;
  480. cqp_info = &cqp_request->info;
  481. cqp_info->cqp_cmd = OP_QP_DESTROY;
  482. cqp_info->post_sq = 1;
  483. cqp_info->in.u.qp_destroy.qp = &iwqp->sc_qp;
  484. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  485. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  486. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  487. if (status)
  488. i40iw_pr_err("CQP-OP Destroy QP fail");
  489. }
  490. /**
  491. * i40iw_get_qp - get qp address
  492. * @device: iwarp device
  493. * @qpn: qp number
  494. */
  495. struct ib_qp *i40iw_get_qp(struct ib_device *device, int qpn)
  496. {
  497. struct i40iw_device *iwdev = to_iwdev(device);
  498. if ((qpn < IW_FIRST_QPN) || (qpn >= iwdev->max_qp))
  499. return NULL;
  500. return &iwdev->qp_table[qpn]->ibqp;
  501. }
  502. /**
  503. * i40iw_debug_buf - print debug msg and buffer is mask set
  504. * @dev: hardware control device structure
  505. * @mask: mask to compare if to print debug buffer
  506. * @buf: points buffer addr
  507. * @size: saize of buffer to print
  508. */
  509. void i40iw_debug_buf(struct i40iw_sc_dev *dev,
  510. enum i40iw_debug_flag mask,
  511. char *desc,
  512. u64 *buf,
  513. u32 size)
  514. {
  515. u32 i;
  516. if (!(dev->debug_mask & mask))
  517. return;
  518. i40iw_debug(dev, mask, "%s\n", desc);
  519. i40iw_debug(dev, mask, "starting address virt=%p phy=%llxh\n", buf,
  520. (unsigned long long)virt_to_phys(buf));
  521. for (i = 0; i < size; i += 8)
  522. i40iw_debug(dev, mask, "index %03d val: %016llx\n", i, buf[i / 8]);
  523. }
  524. /**
  525. * i40iw_get_hw_addr - return hw addr
  526. * @par: points to shared dev
  527. */
  528. u8 __iomem *i40iw_get_hw_addr(void *par)
  529. {
  530. struct i40iw_sc_dev *dev = (struct i40iw_sc_dev *)par;
  531. return dev->hw->hw_addr;
  532. }
  533. /**
  534. * i40iw_remove_head - return head entry and remove from list
  535. * @list: list for entry
  536. */
  537. void *i40iw_remove_head(struct list_head *list)
  538. {
  539. struct list_head *entry;
  540. if (list_empty(list))
  541. return NULL;
  542. entry = (void *)list->next;
  543. list_del(entry);
  544. return (void *)entry;
  545. }
  546. /**
  547. * i40iw_allocate_dma_mem - Memory alloc helper fn
  548. * @hw: pointer to the HW structure
  549. * @mem: ptr to mem struct to fill out
  550. * @size: size of memory requested
  551. * @alignment: what to align the allocation to
  552. */
  553. enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw,
  554. struct i40iw_dma_mem *mem,
  555. u64 size,
  556. u32 alignment)
  557. {
  558. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  559. if (!mem)
  560. return I40IW_ERR_PARAM;
  561. mem->size = ALIGN(size, alignment);
  562. mem->va = dma_zalloc_coherent(&pcidev->dev, mem->size,
  563. (dma_addr_t *)&mem->pa, GFP_KERNEL);
  564. if (!mem->va)
  565. return I40IW_ERR_NO_MEMORY;
  566. return 0;
  567. }
  568. /**
  569. * i40iw_free_dma_mem - Memory free helper fn
  570. * @hw: pointer to the HW structure
  571. * @mem: ptr to mem struct to free
  572. */
  573. void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem)
  574. {
  575. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  576. if (!mem || !mem->va)
  577. return;
  578. dma_free_coherent(&pcidev->dev, mem->size,
  579. mem->va, (dma_addr_t)mem->pa);
  580. mem->va = NULL;
  581. }
  582. /**
  583. * i40iw_allocate_virt_mem - virtual memory alloc helper fn
  584. * @hw: pointer to the HW structure
  585. * @mem: ptr to mem struct to fill out
  586. * @size: size of memory requested
  587. */
  588. enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw,
  589. struct i40iw_virt_mem *mem,
  590. u32 size)
  591. {
  592. if (!mem)
  593. return I40IW_ERR_PARAM;
  594. mem->size = size;
  595. mem->va = kzalloc(size, GFP_KERNEL);
  596. if (mem->va)
  597. return 0;
  598. else
  599. return I40IW_ERR_NO_MEMORY;
  600. }
  601. /**
  602. * i40iw_free_virt_mem - virtual memory free helper fn
  603. * @hw: pointer to the HW structure
  604. * @mem: ptr to mem struct to free
  605. */
  606. enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw,
  607. struct i40iw_virt_mem *mem)
  608. {
  609. if (!mem)
  610. return I40IW_ERR_PARAM;
  611. kfree(mem->va);
  612. mem->va = NULL;
  613. return 0;
  614. }
  615. /**
  616. * i40iw_cqp_sds_cmd - create cqp command for sd
  617. * @dev: hardware control device structure
  618. * @sd_info: information for sd cqp
  619. *
  620. */
  621. enum i40iw_status_code i40iw_cqp_sds_cmd(struct i40iw_sc_dev *dev,
  622. struct i40iw_update_sds_info *sdinfo)
  623. {
  624. enum i40iw_status_code status;
  625. struct i40iw_cqp_request *cqp_request;
  626. struct cqp_commands_info *cqp_info;
  627. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  628. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  629. if (!cqp_request)
  630. return I40IW_ERR_NO_MEMORY;
  631. cqp_info = &cqp_request->info;
  632. memcpy(&cqp_info->in.u.update_pe_sds.info, sdinfo,
  633. sizeof(cqp_info->in.u.update_pe_sds.info));
  634. cqp_info->cqp_cmd = OP_UPDATE_PE_SDS;
  635. cqp_info->post_sq = 1;
  636. cqp_info->in.u.update_pe_sds.dev = dev;
  637. cqp_info->in.u.update_pe_sds.scratch = (uintptr_t)cqp_request;
  638. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  639. if (status)
  640. i40iw_pr_err("CQP-OP Update SD's fail");
  641. return status;
  642. }
  643. /**
  644. * i40iw_term_modify_qp - modify qp for term message
  645. * @qp: hardware control qp
  646. * @next_state: qp's next state
  647. * @term: terminate code
  648. * @term_len: length
  649. */
  650. void i40iw_term_modify_qp(struct i40iw_sc_qp *qp, u8 next_state, u8 term, u8 term_len)
  651. {
  652. struct i40iw_qp *iwqp;
  653. iwqp = (struct i40iw_qp *)qp->back_qp;
  654. i40iw_next_iw_state(iwqp, next_state, 0, term, term_len);
  655. };
  656. /**
  657. * i40iw_terminate_done - after terminate is completed
  658. * @qp: hardware control qp
  659. * @timeout_occurred: indicates if terminate timer expired
  660. */
  661. void i40iw_terminate_done(struct i40iw_sc_qp *qp, int timeout_occurred)
  662. {
  663. struct i40iw_qp *iwqp;
  664. u32 next_iwarp_state = I40IW_QP_STATE_ERROR;
  665. u8 hte = 0;
  666. bool first_time;
  667. unsigned long flags;
  668. iwqp = (struct i40iw_qp *)qp->back_qp;
  669. spin_lock_irqsave(&iwqp->lock, flags);
  670. if (iwqp->hte_added) {
  671. iwqp->hte_added = 0;
  672. hte = 1;
  673. }
  674. first_time = !(qp->term_flags & I40IW_TERM_DONE);
  675. qp->term_flags |= I40IW_TERM_DONE;
  676. spin_unlock_irqrestore(&iwqp->lock, flags);
  677. if (first_time) {
  678. if (!timeout_occurred)
  679. i40iw_terminate_del_timer(qp);
  680. else
  681. next_iwarp_state = I40IW_QP_STATE_CLOSING;
  682. i40iw_next_iw_state(iwqp, next_iwarp_state, hte, 0, 0);
  683. i40iw_cm_disconn(iwqp);
  684. }
  685. }
  686. /**
  687. * i40iw_terminate_imeout - timeout happened
  688. * @context: points to iwarp qp
  689. */
  690. static void i40iw_terminate_timeout(unsigned long context)
  691. {
  692. struct i40iw_qp *iwqp = (struct i40iw_qp *)context;
  693. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)&iwqp->sc_qp;
  694. i40iw_terminate_done(qp, 1);
  695. }
  696. /**
  697. * i40iw_terminate_start_timer - start terminate timeout
  698. * @qp: hardware control qp
  699. */
  700. void i40iw_terminate_start_timer(struct i40iw_sc_qp *qp)
  701. {
  702. struct i40iw_qp *iwqp;
  703. iwqp = (struct i40iw_qp *)qp->back_qp;
  704. init_timer(&iwqp->terminate_timer);
  705. iwqp->terminate_timer.function = i40iw_terminate_timeout;
  706. iwqp->terminate_timer.expires = jiffies + HZ;
  707. iwqp->terminate_timer.data = (unsigned long)iwqp;
  708. add_timer(&iwqp->terminate_timer);
  709. }
  710. /**
  711. * i40iw_terminate_del_timer - delete terminate timeout
  712. * @qp: hardware control qp
  713. */
  714. void i40iw_terminate_del_timer(struct i40iw_sc_qp *qp)
  715. {
  716. struct i40iw_qp *iwqp;
  717. iwqp = (struct i40iw_qp *)qp->back_qp;
  718. del_timer(&iwqp->terminate_timer);
  719. }
  720. /**
  721. * i40iw_cqp_generic_worker - generic worker for cqp
  722. * @work: work pointer
  723. */
  724. static void i40iw_cqp_generic_worker(struct work_struct *work)
  725. {
  726. struct i40iw_virtchnl_work_info *work_info =
  727. &((struct virtchnl_work *)work)->work_info;
  728. if (work_info->worker_vf_dev)
  729. work_info->callback_fcn(work_info->worker_vf_dev);
  730. }
  731. /**
  732. * i40iw_cqp_spawn_worker - spawn worket thread
  733. * @iwdev: device struct pointer
  734. * @work_info: work request info
  735. * @iw_vf_idx: virtual function index
  736. */
  737. void i40iw_cqp_spawn_worker(struct i40iw_sc_dev *dev,
  738. struct i40iw_virtchnl_work_info *work_info,
  739. u32 iw_vf_idx)
  740. {
  741. struct virtchnl_work *work;
  742. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  743. work = &iwdev->virtchnl_w[iw_vf_idx];
  744. memcpy(&work->work_info, work_info, sizeof(*work_info));
  745. INIT_WORK(&work->work, i40iw_cqp_generic_worker);
  746. queue_work(iwdev->virtchnl_wq, &work->work);
  747. }
  748. /**
  749. * i40iw_cqp_manage_hmc_fcn_worker -
  750. * @work: work pointer for hmc info
  751. */
  752. static void i40iw_cqp_manage_hmc_fcn_worker(struct work_struct *work)
  753. {
  754. struct i40iw_cqp_request *cqp_request =
  755. ((struct virtchnl_work *)work)->cqp_request;
  756. struct i40iw_ccq_cqe_info ccq_cqe_info;
  757. struct i40iw_hmc_fcn_info *hmcfcninfo =
  758. &cqp_request->info.in.u.manage_hmc_pm.info;
  759. struct i40iw_device *iwdev =
  760. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->back_dev;
  761. ccq_cqe_info.cqp = NULL;
  762. ccq_cqe_info.maj_err_code = cqp_request->compl_info.maj_err_code;
  763. ccq_cqe_info.min_err_code = cqp_request->compl_info.min_err_code;
  764. ccq_cqe_info.op_code = cqp_request->compl_info.op_code;
  765. ccq_cqe_info.op_ret_val = cqp_request->compl_info.op_ret_val;
  766. ccq_cqe_info.scratch = 0;
  767. ccq_cqe_info.error = cqp_request->compl_info.error;
  768. hmcfcninfo->callback_fcn(cqp_request->info.in.u.manage_hmc_pm.dev,
  769. hmcfcninfo->cqp_callback_param, &ccq_cqe_info);
  770. i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
  771. }
  772. /**
  773. * i40iw_cqp_manage_hmc_fcn_callback - called function after cqp completion
  774. * @cqp_request: cqp request info struct for hmc fun
  775. * @unused: unused param of callback
  776. */
  777. static void i40iw_cqp_manage_hmc_fcn_callback(struct i40iw_cqp_request *cqp_request,
  778. u32 unused)
  779. {
  780. struct virtchnl_work *work;
  781. struct i40iw_hmc_fcn_info *hmcfcninfo =
  782. &cqp_request->info.in.u.manage_hmc_pm.info;
  783. struct i40iw_device *iwdev =
  784. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->
  785. back_dev;
  786. if (hmcfcninfo && hmcfcninfo->callback_fcn) {
  787. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s1\n", __func__);
  788. atomic_inc(&cqp_request->refcount);
  789. work = &iwdev->virtchnl_w[hmcfcninfo->iw_vf_idx];
  790. work->cqp_request = cqp_request;
  791. INIT_WORK(&work->work, i40iw_cqp_manage_hmc_fcn_worker);
  792. queue_work(iwdev->virtchnl_wq, &work->work);
  793. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s2\n", __func__);
  794. } else {
  795. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s: Something wrong\n", __func__);
  796. }
  797. }
  798. /**
  799. * i40iw_cqp_manage_hmc_fcn_cmd - issue cqp command to manage hmc
  800. * @dev: hardware control device structure
  801. * @hmcfcninfo: info for hmc
  802. */
  803. enum i40iw_status_code i40iw_cqp_manage_hmc_fcn_cmd(struct i40iw_sc_dev *dev,
  804. struct i40iw_hmc_fcn_info *hmcfcninfo)
  805. {
  806. enum i40iw_status_code status;
  807. struct i40iw_cqp_request *cqp_request;
  808. struct cqp_commands_info *cqp_info;
  809. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  810. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s\n", __func__);
  811. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  812. if (!cqp_request)
  813. return I40IW_ERR_NO_MEMORY;
  814. cqp_info = &cqp_request->info;
  815. cqp_request->callback_fcn = i40iw_cqp_manage_hmc_fcn_callback;
  816. cqp_request->param = hmcfcninfo;
  817. memcpy(&cqp_info->in.u.manage_hmc_pm.info, hmcfcninfo,
  818. sizeof(*hmcfcninfo));
  819. cqp_info->in.u.manage_hmc_pm.dev = dev;
  820. cqp_info->cqp_cmd = OP_MANAGE_HMC_PM_FUNC_TABLE;
  821. cqp_info->post_sq = 1;
  822. cqp_info->in.u.manage_hmc_pm.scratch = (uintptr_t)cqp_request;
  823. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  824. if (status)
  825. i40iw_pr_err("CQP-OP Manage HMC fail");
  826. return status;
  827. }
  828. /**
  829. * i40iw_cqp_query_fpm_values_cmd - send cqp command for fpm
  830. * @iwdev: function device struct
  831. * @values_mem: buffer for fpm
  832. * @hmc_fn_id: function id for fpm
  833. */
  834. enum i40iw_status_code i40iw_cqp_query_fpm_values_cmd(struct i40iw_sc_dev *dev,
  835. struct i40iw_dma_mem *values_mem,
  836. u8 hmc_fn_id)
  837. {
  838. enum i40iw_status_code status;
  839. struct i40iw_cqp_request *cqp_request;
  840. struct cqp_commands_info *cqp_info;
  841. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  842. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  843. if (!cqp_request)
  844. return I40IW_ERR_NO_MEMORY;
  845. cqp_info = &cqp_request->info;
  846. cqp_request->param = NULL;
  847. cqp_info->in.u.query_fpm_values.cqp = dev->cqp;
  848. cqp_info->in.u.query_fpm_values.fpm_values_pa = values_mem->pa;
  849. cqp_info->in.u.query_fpm_values.fpm_values_va = values_mem->va;
  850. cqp_info->in.u.query_fpm_values.hmc_fn_id = hmc_fn_id;
  851. cqp_info->cqp_cmd = OP_QUERY_FPM_VALUES;
  852. cqp_info->post_sq = 1;
  853. cqp_info->in.u.query_fpm_values.scratch = (uintptr_t)cqp_request;
  854. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  855. if (status)
  856. i40iw_pr_err("CQP-OP Query FPM fail");
  857. return status;
  858. }
  859. /**
  860. * i40iw_cqp_commit_fpm_values_cmd - commit fpm values in hw
  861. * @dev: hardware control device structure
  862. * @values_mem: buffer with fpm values
  863. * @hmc_fn_id: function id for fpm
  864. */
  865. enum i40iw_status_code i40iw_cqp_commit_fpm_values_cmd(struct i40iw_sc_dev *dev,
  866. struct i40iw_dma_mem *values_mem,
  867. u8 hmc_fn_id)
  868. {
  869. enum i40iw_status_code status;
  870. struct i40iw_cqp_request *cqp_request;
  871. struct cqp_commands_info *cqp_info;
  872. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  873. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  874. if (!cqp_request)
  875. return I40IW_ERR_NO_MEMORY;
  876. cqp_info = &cqp_request->info;
  877. cqp_request->param = NULL;
  878. cqp_info->in.u.commit_fpm_values.cqp = dev->cqp;
  879. cqp_info->in.u.commit_fpm_values.fpm_values_pa = values_mem->pa;
  880. cqp_info->in.u.commit_fpm_values.fpm_values_va = values_mem->va;
  881. cqp_info->in.u.commit_fpm_values.hmc_fn_id = hmc_fn_id;
  882. cqp_info->cqp_cmd = OP_COMMIT_FPM_VALUES;
  883. cqp_info->post_sq = 1;
  884. cqp_info->in.u.commit_fpm_values.scratch = (uintptr_t)cqp_request;
  885. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  886. if (status)
  887. i40iw_pr_err("CQP-OP Commit FPM fail");
  888. return status;
  889. }
  890. /**
  891. * i40iw_vf_wait_vchnl_resp - wait for channel msg
  892. * @iwdev: function's device struct
  893. */
  894. enum i40iw_status_code i40iw_vf_wait_vchnl_resp(struct i40iw_sc_dev *dev)
  895. {
  896. struct i40iw_device *iwdev = dev->back_dev;
  897. enum i40iw_status_code err_code = 0;
  898. int timeout_ret;
  899. i40iw_debug(dev, I40IW_DEBUG_VIRT, "%s[%u] dev %p, iwdev %p\n",
  900. __func__, __LINE__, dev, iwdev);
  901. atomic_add(2, &iwdev->vchnl_msgs);
  902. timeout_ret = wait_event_timeout(iwdev->vchnl_waitq,
  903. (atomic_read(&iwdev->vchnl_msgs) == 1),
  904. I40IW_VCHNL_EVENT_TIMEOUT);
  905. atomic_dec(&iwdev->vchnl_msgs);
  906. if (!timeout_ret) {
  907. i40iw_pr_err("virt channel completion timeout = 0x%x\n", timeout_ret);
  908. err_code = I40IW_ERR_TIMEOUT;
  909. }
  910. return err_code;
  911. }
  912. /**
  913. * i40iw_ieq_mpa_crc_ae - generate AE for crc error
  914. * @dev: hardware control device structure
  915. * @qp: hardware control qp
  916. */
  917. void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  918. {
  919. struct i40iw_qp_flush_info info;
  920. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  921. i40iw_debug(dev, I40IW_DEBUG_AEQ, "%s entered\n", __func__);
  922. memset(&info, 0, sizeof(info));
  923. info.ae_code = I40IW_AE_LLP_RECEIVED_MPA_CRC_ERROR;
  924. info.generate_ae = true;
  925. info.ae_source = 0x3;
  926. (void)i40iw_hw_flush_wqes(iwdev, qp, &info, false);
  927. }
  928. /**
  929. * i40iw_init_hash_desc - initialize hash for crc calculation
  930. * @desc: cryption type
  931. */
  932. enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc)
  933. {
  934. struct crypto_shash *tfm;
  935. struct shash_desc *tdesc;
  936. tfm = crypto_alloc_shash("crc32c", 0, 0);
  937. if (IS_ERR(tfm))
  938. return I40IW_ERR_MPA_CRC;
  939. tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm),
  940. GFP_KERNEL);
  941. if (!tdesc) {
  942. crypto_free_shash(tfm);
  943. return I40IW_ERR_MPA_CRC;
  944. }
  945. tdesc->tfm = tfm;
  946. *desc = tdesc;
  947. return 0;
  948. }
  949. /**
  950. * i40iw_free_hash_desc - free hash desc
  951. * @desc: to be freed
  952. */
  953. void i40iw_free_hash_desc(struct shash_desc *desc)
  954. {
  955. if (desc) {
  956. crypto_free_shash(desc->tfm);
  957. kfree(desc);
  958. }
  959. }
  960. /**
  961. * i40iw_alloc_query_fpm_buf - allocate buffer for fpm
  962. * @dev: hardware control device structure
  963. * @mem: buffer ptr for fpm to be allocated
  964. * @return: memory allocation status
  965. */
  966. enum i40iw_status_code i40iw_alloc_query_fpm_buf(struct i40iw_sc_dev *dev,
  967. struct i40iw_dma_mem *mem)
  968. {
  969. enum i40iw_status_code status;
  970. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  971. status = i40iw_obj_aligned_mem(iwdev, mem, I40IW_QUERY_FPM_BUF_SIZE,
  972. I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
  973. return status;
  974. }
  975. /**
  976. * i40iw_ieq_check_mpacrc - check if mpa crc is OK
  977. * @desc: desc for hash
  978. * @addr: address of buffer for crc
  979. * @length: length of buffer
  980. * @value: value to be compared
  981. */
  982. enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
  983. void *addr,
  984. u32 length,
  985. u32 value)
  986. {
  987. u32 crc = 0;
  988. int ret;
  989. enum i40iw_status_code ret_code = 0;
  990. crypto_shash_init(desc);
  991. ret = crypto_shash_update(desc, addr, length);
  992. if (!ret)
  993. crypto_shash_final(desc, (u8 *)&crc);
  994. if (crc != value) {
  995. i40iw_pr_err("mpa crc check fail\n");
  996. ret_code = I40IW_ERR_MPA_CRC;
  997. }
  998. return ret_code;
  999. }
  1000. /**
  1001. * i40iw_ieq_get_qp - get qp based on quad in puda buffer
  1002. * @dev: hardware control device structure
  1003. * @buf: receive puda buffer on exception q
  1004. */
  1005. struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev,
  1006. struct i40iw_puda_buf *buf)
  1007. {
  1008. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1009. struct i40iw_qp *iwqp;
  1010. struct i40iw_cm_node *cm_node;
  1011. u32 loc_addr[4], rem_addr[4];
  1012. u16 loc_port, rem_port;
  1013. struct ipv6hdr *ip6h;
  1014. struct iphdr *iph = (struct iphdr *)buf->iph;
  1015. struct tcphdr *tcph = (struct tcphdr *)buf->tcph;
  1016. if (iph->version == 4) {
  1017. memset(loc_addr, 0, sizeof(loc_addr));
  1018. loc_addr[0] = ntohl(iph->daddr);
  1019. memset(rem_addr, 0, sizeof(rem_addr));
  1020. rem_addr[0] = ntohl(iph->saddr);
  1021. } else {
  1022. ip6h = (struct ipv6hdr *)buf->iph;
  1023. i40iw_copy_ip_ntohl(loc_addr, ip6h->daddr.in6_u.u6_addr32);
  1024. i40iw_copy_ip_ntohl(rem_addr, ip6h->saddr.in6_u.u6_addr32);
  1025. }
  1026. loc_port = ntohs(tcph->dest);
  1027. rem_port = ntohs(tcph->source);
  1028. cm_node = i40iw_find_node(&iwdev->cm_core, rem_port, rem_addr, loc_port,
  1029. loc_addr, false);
  1030. if (!cm_node)
  1031. return NULL;
  1032. iwqp = cm_node->iwqp;
  1033. return &iwqp->sc_qp;
  1034. }
  1035. /**
  1036. * i40iw_ieq_update_tcpip_info - update tcpip in the buffer
  1037. * @buf: puda to update
  1038. * @length: length of buffer
  1039. * @seqnum: seq number for tcp
  1040. */
  1041. void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length, u32 seqnum)
  1042. {
  1043. struct tcphdr *tcph;
  1044. struct iphdr *iph;
  1045. u16 iphlen;
  1046. u16 packetsize;
  1047. u8 *addr = (u8 *)buf->mem.va;
  1048. iphlen = (buf->ipv4) ? 20 : 40;
  1049. iph = (struct iphdr *)(addr + buf->maclen);
  1050. tcph = (struct tcphdr *)(addr + buf->maclen + iphlen);
  1051. packetsize = length + buf->tcphlen + iphlen;
  1052. iph->tot_len = htons(packetsize);
  1053. tcph->seq = htonl(seqnum);
  1054. }
  1055. /**
  1056. * i40iw_puda_get_tcpip_info - get tcpip info from puda buffer
  1057. * @info: to get information
  1058. * @buf: puda buffer
  1059. */
  1060. enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
  1061. struct i40iw_puda_buf *buf)
  1062. {
  1063. struct iphdr *iph;
  1064. struct ipv6hdr *ip6h;
  1065. struct tcphdr *tcph;
  1066. u16 iphlen;
  1067. u16 pkt_len;
  1068. u8 *mem = (u8 *)buf->mem.va;
  1069. struct ethhdr *ethh = (struct ethhdr *)buf->mem.va;
  1070. if (ethh->h_proto == htons(0x8100)) {
  1071. info->vlan_valid = true;
  1072. buf->vlan_id = ntohs(((struct vlan_ethhdr *)ethh)->h_vlan_TCI) & VLAN_VID_MASK;
  1073. }
  1074. buf->maclen = (info->vlan_valid) ? 18 : 14;
  1075. iphlen = (info->l3proto) ? 40 : 20;
  1076. buf->ipv4 = (info->l3proto) ? false : true;
  1077. buf->iph = mem + buf->maclen;
  1078. iph = (struct iphdr *)buf->iph;
  1079. buf->tcph = buf->iph + iphlen;
  1080. tcph = (struct tcphdr *)buf->tcph;
  1081. if (buf->ipv4) {
  1082. pkt_len = ntohs(iph->tot_len);
  1083. } else {
  1084. ip6h = (struct ipv6hdr *)buf->iph;
  1085. pkt_len = ntohs(ip6h->payload_len) + iphlen;
  1086. }
  1087. buf->totallen = pkt_len + buf->maclen;
  1088. if (info->payload_len < buf->totallen - 4) {
  1089. i40iw_pr_err("payload_len = 0x%x totallen expected0x%x\n",
  1090. info->payload_len, buf->totallen);
  1091. return I40IW_ERR_INVALID_SIZE;
  1092. }
  1093. buf->tcphlen = (tcph->doff) << 2;
  1094. buf->datalen = pkt_len - iphlen - buf->tcphlen;
  1095. buf->data = (buf->datalen) ? buf->tcph + buf->tcphlen : NULL;
  1096. buf->hdrlen = buf->maclen + iphlen + buf->tcphlen;
  1097. buf->seqnum = ntohl(tcph->seq);
  1098. return 0;
  1099. }
  1100. /**
  1101. * i40iw_hw_stats_timeout - Stats timer-handler which updates all HW stats
  1102. * @dev: hardware control device structure
  1103. */
  1104. static void i40iw_hw_stats_timeout(unsigned long dev)
  1105. {
  1106. struct i40iw_sc_dev *pf_dev = (struct i40iw_sc_dev *)dev;
  1107. struct i40iw_dev_pestat *pf_devstat = &pf_dev->dev_pestat;
  1108. struct i40iw_dev_pestat *vf_devstat = NULL;
  1109. u16 iw_vf_idx;
  1110. unsigned long flags;
  1111. /*PF*/
  1112. pf_devstat->ops.iw_hw_stat_read_all(pf_devstat, &pf_devstat->hw_stats);
  1113. for (iw_vf_idx = 0; iw_vf_idx < I40IW_MAX_PE_ENABLED_VF_COUNT; iw_vf_idx++) {
  1114. spin_lock_irqsave(&pf_devstat->stats_lock, flags);
  1115. if (pf_dev->vf_dev[iw_vf_idx]) {
  1116. if (pf_dev->vf_dev[iw_vf_idx]->stats_initialized) {
  1117. vf_devstat = &pf_dev->vf_dev[iw_vf_idx]->dev_pestat;
  1118. vf_devstat->ops.iw_hw_stat_read_all(vf_devstat, &vf_devstat->hw_stats);
  1119. }
  1120. }
  1121. spin_unlock_irqrestore(&pf_devstat->stats_lock, flags);
  1122. }
  1123. mod_timer(&pf_devstat->stats_timer,
  1124. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1125. }
  1126. /**
  1127. * i40iw_hw_stats_start_timer - Start periodic stats timer
  1128. * @dev: hardware control device structure
  1129. */
  1130. void i40iw_hw_stats_start_timer(struct i40iw_sc_dev *dev)
  1131. {
  1132. struct i40iw_dev_pestat *devstat = &dev->dev_pestat;
  1133. init_timer(&devstat->stats_timer);
  1134. devstat->stats_timer.function = i40iw_hw_stats_timeout;
  1135. devstat->stats_timer.data = (unsigned long)dev;
  1136. mod_timer(&devstat->stats_timer,
  1137. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1138. }
  1139. /**
  1140. * i40iw_hw_stats_del_timer - Delete periodic stats timer
  1141. * @dev: hardware control device structure
  1142. */
  1143. void i40iw_hw_stats_del_timer(struct i40iw_sc_dev *dev)
  1144. {
  1145. struct i40iw_dev_pestat *devstat = &dev->dev_pestat;
  1146. del_timer_sync(&devstat->stats_timer);
  1147. }