i40iw_main.c 53 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/ip.h>
  39. #include <linux/tcp.h>
  40. #include <linux/if_vlan.h>
  41. #include <net/addrconf.h>
  42. #include "i40iw.h"
  43. #include "i40iw_register.h"
  44. #include <net/netevent.h>
  45. #define CLIENT_IW_INTERFACE_VERSION_MAJOR 0
  46. #define CLIENT_IW_INTERFACE_VERSION_MINOR 01
  47. #define CLIENT_IW_INTERFACE_VERSION_BUILD 00
  48. #define DRV_VERSION_MAJOR 0
  49. #define DRV_VERSION_MINOR 5
  50. #define DRV_VERSION_BUILD 123
  51. #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
  52. __stringify(DRV_VERSION_MINOR) "." __stringify(DRV_VERSION_BUILD)
  53. static int push_mode;
  54. module_param(push_mode, int, 0644);
  55. MODULE_PARM_DESC(push_mode, "Low latency mode: 0=disabled (default), 1=enabled)");
  56. static int debug;
  57. module_param(debug, int, 0644);
  58. MODULE_PARM_DESC(debug, "debug flags: 0=disabled (default), 0x7fffffff=all");
  59. static int resource_profile;
  60. module_param(resource_profile, int, 0644);
  61. MODULE_PARM_DESC(resource_profile,
  62. "Resource Profile: 0=no VF RDMA support (default), 1=Weighted VF, 2=Even Distribution");
  63. static int max_rdma_vfs = 32;
  64. module_param(max_rdma_vfs, int, 0644);
  65. MODULE_PARM_DESC(max_rdma_vfs, "Maximum VF count: 0-32 32=default");
  66. static int mpa_version = 2;
  67. module_param(mpa_version, int, 0644);
  68. MODULE_PARM_DESC(mpa_version, "MPA version to be used in MPA Req/Resp 1 or 2");
  69. MODULE_AUTHOR("Intel Corporation, <e1000-rdma@lists.sourceforge.net>");
  70. MODULE_DESCRIPTION("Intel(R) Ethernet Connection X722 iWARP RDMA Driver");
  71. MODULE_LICENSE("Dual BSD/GPL");
  72. MODULE_VERSION(DRV_VERSION);
  73. static struct i40e_client i40iw_client;
  74. static char i40iw_client_name[I40E_CLIENT_STR_LENGTH] = "i40iw";
  75. static LIST_HEAD(i40iw_handlers);
  76. static spinlock_t i40iw_handler_lock;
  77. static enum i40iw_status_code i40iw_virtchnl_send(struct i40iw_sc_dev *dev,
  78. u32 vf_id, u8 *msg, u16 len);
  79. static struct notifier_block i40iw_inetaddr_notifier = {
  80. .notifier_call = i40iw_inetaddr_event
  81. };
  82. static struct notifier_block i40iw_inetaddr6_notifier = {
  83. .notifier_call = i40iw_inet6addr_event
  84. };
  85. static struct notifier_block i40iw_net_notifier = {
  86. .notifier_call = i40iw_net_event
  87. };
  88. static int i40iw_notifiers_registered;
  89. /**
  90. * i40iw_find_i40e_handler - find a handler given a client info
  91. * @ldev: pointer to a client info
  92. */
  93. static struct i40iw_handler *i40iw_find_i40e_handler(struct i40e_info *ldev)
  94. {
  95. struct i40iw_handler *hdl;
  96. unsigned long flags;
  97. spin_lock_irqsave(&i40iw_handler_lock, flags);
  98. list_for_each_entry(hdl, &i40iw_handlers, list) {
  99. if (hdl->ldev.netdev == ldev->netdev) {
  100. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  101. return hdl;
  102. }
  103. }
  104. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  105. return NULL;
  106. }
  107. /**
  108. * i40iw_find_netdev - find a handler given a netdev
  109. * @netdev: pointer to net_device
  110. */
  111. struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev)
  112. {
  113. struct i40iw_handler *hdl;
  114. unsigned long flags;
  115. spin_lock_irqsave(&i40iw_handler_lock, flags);
  116. list_for_each_entry(hdl, &i40iw_handlers, list) {
  117. if (hdl->ldev.netdev == netdev) {
  118. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  119. return hdl;
  120. }
  121. }
  122. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  123. return NULL;
  124. }
  125. /**
  126. * i40iw_add_handler - add a handler to the list
  127. * @hdl: handler to be added to the handler list
  128. */
  129. static void i40iw_add_handler(struct i40iw_handler *hdl)
  130. {
  131. unsigned long flags;
  132. spin_lock_irqsave(&i40iw_handler_lock, flags);
  133. list_add(&hdl->list, &i40iw_handlers);
  134. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  135. }
  136. /**
  137. * i40iw_del_handler - delete a handler from the list
  138. * @hdl: handler to be deleted from the handler list
  139. */
  140. static int i40iw_del_handler(struct i40iw_handler *hdl)
  141. {
  142. unsigned long flags;
  143. spin_lock_irqsave(&i40iw_handler_lock, flags);
  144. list_del(&hdl->list);
  145. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  146. return 0;
  147. }
  148. /**
  149. * i40iw_enable_intr - set up device interrupts
  150. * @dev: hardware control device structure
  151. * @msix_id: id of the interrupt to be enabled
  152. */
  153. static void i40iw_enable_intr(struct i40iw_sc_dev *dev, u32 msix_id)
  154. {
  155. u32 val;
  156. val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
  157. I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
  158. (3 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
  159. if (dev->is_pf)
  160. i40iw_wr32(dev->hw, I40E_PFINT_DYN_CTLN(msix_id - 1), val);
  161. else
  162. i40iw_wr32(dev->hw, I40E_VFINT_DYN_CTLN1(msix_id - 1), val);
  163. }
  164. /**
  165. * i40iw_dpc - tasklet for aeq and ceq 0
  166. * @data: iwarp device
  167. */
  168. static void i40iw_dpc(unsigned long data)
  169. {
  170. struct i40iw_device *iwdev = (struct i40iw_device *)data;
  171. if (iwdev->msix_shared)
  172. i40iw_process_ceq(iwdev, iwdev->ceqlist);
  173. i40iw_process_aeq(iwdev);
  174. i40iw_enable_intr(&iwdev->sc_dev, iwdev->iw_msixtbl[0].idx);
  175. }
  176. /**
  177. * i40iw_ceq_dpc - dpc handler for CEQ
  178. * @data: data points to CEQ
  179. */
  180. static void i40iw_ceq_dpc(unsigned long data)
  181. {
  182. struct i40iw_ceq *iwceq = (struct i40iw_ceq *)data;
  183. struct i40iw_device *iwdev = iwceq->iwdev;
  184. i40iw_process_ceq(iwdev, iwceq);
  185. i40iw_enable_intr(&iwdev->sc_dev, iwceq->msix_idx);
  186. }
  187. /**
  188. * i40iw_irq_handler - interrupt handler for aeq and ceq0
  189. * @irq: Interrupt request number
  190. * @data: iwarp device
  191. */
  192. static irqreturn_t i40iw_irq_handler(int irq, void *data)
  193. {
  194. struct i40iw_device *iwdev = (struct i40iw_device *)data;
  195. tasklet_schedule(&iwdev->dpc_tasklet);
  196. return IRQ_HANDLED;
  197. }
  198. /**
  199. * i40iw_destroy_cqp - destroy control qp
  200. * @iwdev: iwarp device
  201. * @create_done: 1 if cqp create poll was success
  202. *
  203. * Issue destroy cqp request and
  204. * free the resources associated with the cqp
  205. */
  206. static void i40iw_destroy_cqp(struct i40iw_device *iwdev, bool free_hwcqp)
  207. {
  208. enum i40iw_status_code status = 0;
  209. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  210. struct i40iw_cqp *cqp = &iwdev->cqp;
  211. if (free_hwcqp && dev->cqp_ops->cqp_destroy)
  212. status = dev->cqp_ops->cqp_destroy(dev->cqp);
  213. if (status)
  214. i40iw_pr_err("destroy cqp failed");
  215. i40iw_free_dma_mem(dev->hw, &cqp->sq);
  216. kfree(cqp->scratch_array);
  217. iwdev->cqp.scratch_array = NULL;
  218. kfree(cqp->cqp_requests);
  219. cqp->cqp_requests = NULL;
  220. }
  221. /**
  222. * i40iw_disable_irqs - disable device interrupts
  223. * @dev: hardware control device structure
  224. * @msic_vec: msix vector to disable irq
  225. * @dev_id: parameter to pass to free_irq (used during irq setup)
  226. *
  227. * The function is called when destroying aeq/ceq
  228. */
  229. static void i40iw_disable_irq(struct i40iw_sc_dev *dev,
  230. struct i40iw_msix_vector *msix_vec,
  231. void *dev_id)
  232. {
  233. if (dev->is_pf)
  234. i40iw_wr32(dev->hw, I40E_PFINT_DYN_CTLN(msix_vec->idx - 1), 0);
  235. else
  236. i40iw_wr32(dev->hw, I40E_VFINT_DYN_CTLN1(msix_vec->idx - 1), 0);
  237. synchronize_irq(msix_vec->irq);
  238. free_irq(msix_vec->irq, dev_id);
  239. }
  240. /**
  241. * i40iw_destroy_aeq - destroy aeq
  242. * @iwdev: iwarp device
  243. * @reset: true if called before reset
  244. *
  245. * Issue a destroy aeq request and
  246. * free the resources associated with the aeq
  247. * The function is called during driver unload
  248. */
  249. static void i40iw_destroy_aeq(struct i40iw_device *iwdev, bool reset)
  250. {
  251. enum i40iw_status_code status = I40IW_ERR_NOT_READY;
  252. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  253. struct i40iw_aeq *aeq = &iwdev->aeq;
  254. if (!iwdev->msix_shared)
  255. i40iw_disable_irq(dev, iwdev->iw_msixtbl, (void *)iwdev);
  256. if (reset)
  257. goto exit;
  258. if (!dev->aeq_ops->aeq_destroy(&aeq->sc_aeq, 0, 1))
  259. status = dev->aeq_ops->aeq_destroy_done(&aeq->sc_aeq);
  260. if (status)
  261. i40iw_pr_err("destroy aeq failed %d\n", status);
  262. exit:
  263. i40iw_free_dma_mem(dev->hw, &aeq->mem);
  264. }
  265. /**
  266. * i40iw_destroy_ceq - destroy ceq
  267. * @iwdev: iwarp device
  268. * @iwceq: ceq to be destroyed
  269. * @reset: true if called before reset
  270. *
  271. * Issue a destroy ceq request and
  272. * free the resources associated with the ceq
  273. */
  274. static void i40iw_destroy_ceq(struct i40iw_device *iwdev,
  275. struct i40iw_ceq *iwceq,
  276. bool reset)
  277. {
  278. enum i40iw_status_code status;
  279. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  280. if (reset)
  281. goto exit;
  282. status = dev->ceq_ops->ceq_destroy(&iwceq->sc_ceq, 0, 1);
  283. if (status) {
  284. i40iw_pr_err("ceq destroy command failed %d\n", status);
  285. goto exit;
  286. }
  287. status = dev->ceq_ops->cceq_destroy_done(&iwceq->sc_ceq);
  288. if (status)
  289. i40iw_pr_err("ceq destroy completion failed %d\n", status);
  290. exit:
  291. i40iw_free_dma_mem(dev->hw, &iwceq->mem);
  292. }
  293. /**
  294. * i40iw_dele_ceqs - destroy all ceq's
  295. * @iwdev: iwarp device
  296. * @reset: true if called before reset
  297. *
  298. * Go through all of the device ceq's and for each ceq
  299. * disable the ceq interrupt and destroy the ceq
  300. */
  301. static void i40iw_dele_ceqs(struct i40iw_device *iwdev, bool reset)
  302. {
  303. u32 i = 0;
  304. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  305. struct i40iw_ceq *iwceq = iwdev->ceqlist;
  306. struct i40iw_msix_vector *msix_vec = iwdev->iw_msixtbl;
  307. if (iwdev->msix_shared) {
  308. i40iw_disable_irq(dev, msix_vec, (void *)iwdev);
  309. i40iw_destroy_ceq(iwdev, iwceq, reset);
  310. iwceq++;
  311. i++;
  312. }
  313. for (msix_vec++; i < iwdev->ceqs_count; i++, msix_vec++, iwceq++) {
  314. i40iw_disable_irq(dev, msix_vec, (void *)iwceq);
  315. i40iw_destroy_ceq(iwdev, iwceq, reset);
  316. }
  317. }
  318. /**
  319. * i40iw_destroy_ccq - destroy control cq
  320. * @iwdev: iwarp device
  321. * @reset: true if called before reset
  322. *
  323. * Issue destroy ccq request and
  324. * free the resources associated with the ccq
  325. */
  326. static void i40iw_destroy_ccq(struct i40iw_device *iwdev, bool reset)
  327. {
  328. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  329. struct i40iw_ccq *ccq = &iwdev->ccq;
  330. enum i40iw_status_code status = 0;
  331. if (!reset)
  332. status = dev->ccq_ops->ccq_destroy(dev->ccq, 0, true);
  333. if (status)
  334. i40iw_pr_err("ccq destroy failed %d\n", status);
  335. i40iw_free_dma_mem(dev->hw, &ccq->mem_cq);
  336. }
  337. /* types of hmc objects */
  338. static enum i40iw_hmc_rsrc_type iw_hmc_obj_types[] = {
  339. I40IW_HMC_IW_QP,
  340. I40IW_HMC_IW_CQ,
  341. I40IW_HMC_IW_HTE,
  342. I40IW_HMC_IW_ARP,
  343. I40IW_HMC_IW_APBVT_ENTRY,
  344. I40IW_HMC_IW_MR,
  345. I40IW_HMC_IW_XF,
  346. I40IW_HMC_IW_XFFL,
  347. I40IW_HMC_IW_Q1,
  348. I40IW_HMC_IW_Q1FL,
  349. I40IW_HMC_IW_TIMER,
  350. };
  351. /**
  352. * i40iw_close_hmc_objects_type - delete hmc objects of a given type
  353. * @iwdev: iwarp device
  354. * @obj_type: the hmc object type to be deleted
  355. * @is_pf: true if the function is PF otherwise false
  356. * @reset: true if called before reset
  357. */
  358. static void i40iw_close_hmc_objects_type(struct i40iw_sc_dev *dev,
  359. enum i40iw_hmc_rsrc_type obj_type,
  360. struct i40iw_hmc_info *hmc_info,
  361. bool is_pf,
  362. bool reset)
  363. {
  364. struct i40iw_hmc_del_obj_info info;
  365. memset(&info, 0, sizeof(info));
  366. info.hmc_info = hmc_info;
  367. info.rsrc_type = obj_type;
  368. info.count = hmc_info->hmc_obj[obj_type].cnt;
  369. info.is_pf = is_pf;
  370. if (dev->hmc_ops->del_hmc_object(dev, &info, reset))
  371. i40iw_pr_err("del obj of type %d failed\n", obj_type);
  372. }
  373. /**
  374. * i40iw_del_hmc_objects - remove all device hmc objects
  375. * @dev: iwarp device
  376. * @hmc_info: hmc_info to free
  377. * @is_pf: true if hmc_info belongs to PF, not vf nor allocated
  378. * by PF on behalf of VF
  379. * @reset: true if called before reset
  380. */
  381. static void i40iw_del_hmc_objects(struct i40iw_sc_dev *dev,
  382. struct i40iw_hmc_info *hmc_info,
  383. bool is_pf,
  384. bool reset)
  385. {
  386. unsigned int i;
  387. for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++)
  388. i40iw_close_hmc_objects_type(dev, iw_hmc_obj_types[i], hmc_info, is_pf, reset);
  389. }
  390. /**
  391. * i40iw_ceq_handler - interrupt handler for ceq
  392. * @data: ceq pointer
  393. */
  394. static irqreturn_t i40iw_ceq_handler(int irq, void *data)
  395. {
  396. struct i40iw_ceq *iwceq = (struct i40iw_ceq *)data;
  397. if (iwceq->irq != irq)
  398. i40iw_pr_err("expected irq = %d received irq = %d\n", iwceq->irq, irq);
  399. tasklet_schedule(&iwceq->dpc_tasklet);
  400. return IRQ_HANDLED;
  401. }
  402. /**
  403. * i40iw_create_hmc_obj_type - create hmc object of a given type
  404. * @dev: hardware control device structure
  405. * @info: information for the hmc object to create
  406. */
  407. static enum i40iw_status_code i40iw_create_hmc_obj_type(struct i40iw_sc_dev *dev,
  408. struct i40iw_hmc_create_obj_info *info)
  409. {
  410. return dev->hmc_ops->create_hmc_object(dev, info);
  411. }
  412. /**
  413. * i40iw_create_hmc_objs - create all hmc objects for the device
  414. * @iwdev: iwarp device
  415. * @is_pf: true if the function is PF otherwise false
  416. *
  417. * Create the device hmc objects and allocate hmc pages
  418. * Return 0 if successful, otherwise clean up and return error
  419. */
  420. static enum i40iw_status_code i40iw_create_hmc_objs(struct i40iw_device *iwdev,
  421. bool is_pf)
  422. {
  423. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  424. struct i40iw_hmc_create_obj_info info;
  425. enum i40iw_status_code status;
  426. int i;
  427. memset(&info, 0, sizeof(info));
  428. info.hmc_info = dev->hmc_info;
  429. info.is_pf = is_pf;
  430. info.entry_type = iwdev->sd_type;
  431. for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++) {
  432. info.rsrc_type = iw_hmc_obj_types[i];
  433. info.count = dev->hmc_info->hmc_obj[info.rsrc_type].cnt;
  434. status = i40iw_create_hmc_obj_type(dev, &info);
  435. if (status) {
  436. i40iw_pr_err("create obj type %d status = %d\n",
  437. iw_hmc_obj_types[i], status);
  438. break;
  439. }
  440. }
  441. if (!status)
  442. return (dev->cqp_misc_ops->static_hmc_pages_allocated(dev->cqp, 0,
  443. dev->hmc_fn_id,
  444. true, true));
  445. while (i) {
  446. i--;
  447. /* destroy the hmc objects of a given type */
  448. i40iw_close_hmc_objects_type(dev,
  449. iw_hmc_obj_types[i],
  450. dev->hmc_info,
  451. is_pf,
  452. false);
  453. }
  454. return status;
  455. }
  456. /**
  457. * i40iw_obj_aligned_mem - get aligned memory from device allocated memory
  458. * @iwdev: iwarp device
  459. * @memptr: points to the memory addresses
  460. * @size: size of memory needed
  461. * @mask: mask for the aligned memory
  462. *
  463. * Get aligned memory of the requested size and
  464. * update the memptr to point to the new aligned memory
  465. * Return 0 if successful, otherwise return no memory error
  466. */
  467. enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
  468. struct i40iw_dma_mem *memptr,
  469. u32 size,
  470. u32 mask)
  471. {
  472. unsigned long va, newva;
  473. unsigned long extra;
  474. va = (unsigned long)iwdev->obj_next.va;
  475. newva = va;
  476. if (mask)
  477. newva = ALIGN(va, (mask + 1));
  478. extra = newva - va;
  479. memptr->va = (u8 *)va + extra;
  480. memptr->pa = iwdev->obj_next.pa + extra;
  481. memptr->size = size;
  482. if ((memptr->va + size) > (iwdev->obj_mem.va + iwdev->obj_mem.size))
  483. return I40IW_ERR_NO_MEMORY;
  484. iwdev->obj_next.va = memptr->va + size;
  485. iwdev->obj_next.pa = memptr->pa + size;
  486. return 0;
  487. }
  488. /**
  489. * i40iw_create_cqp - create control qp
  490. * @iwdev: iwarp device
  491. *
  492. * Return 0, if the cqp and all the resources associated with it
  493. * are successfully created, otherwise return error
  494. */
  495. static enum i40iw_status_code i40iw_create_cqp(struct i40iw_device *iwdev)
  496. {
  497. enum i40iw_status_code status;
  498. u32 sqsize = I40IW_CQP_SW_SQSIZE_2048;
  499. struct i40iw_dma_mem mem;
  500. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  501. struct i40iw_cqp_init_info cqp_init_info;
  502. struct i40iw_cqp *cqp = &iwdev->cqp;
  503. u16 maj_err, min_err;
  504. int i;
  505. cqp->cqp_requests = kcalloc(sqsize, sizeof(*cqp->cqp_requests), GFP_KERNEL);
  506. if (!cqp->cqp_requests)
  507. return I40IW_ERR_NO_MEMORY;
  508. cqp->scratch_array = kcalloc(sqsize, sizeof(*cqp->scratch_array), GFP_KERNEL);
  509. if (!cqp->scratch_array) {
  510. kfree(cqp->cqp_requests);
  511. return I40IW_ERR_NO_MEMORY;
  512. }
  513. dev->cqp = &cqp->sc_cqp;
  514. dev->cqp->dev = dev;
  515. memset(&cqp_init_info, 0, sizeof(cqp_init_info));
  516. status = i40iw_allocate_dma_mem(dev->hw, &cqp->sq,
  517. (sizeof(struct i40iw_cqp_sq_wqe) * sqsize),
  518. I40IW_CQP_ALIGNMENT);
  519. if (status)
  520. goto exit;
  521. status = i40iw_obj_aligned_mem(iwdev, &mem, sizeof(struct i40iw_cqp_ctx),
  522. I40IW_HOST_CTX_ALIGNMENT_MASK);
  523. if (status)
  524. goto exit;
  525. dev->cqp->host_ctx_pa = mem.pa;
  526. dev->cqp->host_ctx = mem.va;
  527. /* populate the cqp init info */
  528. cqp_init_info.dev = dev;
  529. cqp_init_info.sq_size = sqsize;
  530. cqp_init_info.sq = cqp->sq.va;
  531. cqp_init_info.sq_pa = cqp->sq.pa;
  532. cqp_init_info.host_ctx_pa = mem.pa;
  533. cqp_init_info.host_ctx = mem.va;
  534. cqp_init_info.hmc_profile = iwdev->resource_profile;
  535. cqp_init_info.enabled_vf_count = iwdev->max_rdma_vfs;
  536. cqp_init_info.scratch_array = cqp->scratch_array;
  537. status = dev->cqp_ops->cqp_init(dev->cqp, &cqp_init_info);
  538. if (status) {
  539. i40iw_pr_err("cqp init status %d maj_err %d min_err %d\n",
  540. status, maj_err, min_err);
  541. goto exit;
  542. }
  543. status = dev->cqp_ops->cqp_create(dev->cqp, true, &maj_err, &min_err);
  544. if (status) {
  545. i40iw_pr_err("cqp create status %d maj_err %d min_err %d\n",
  546. status, maj_err, min_err);
  547. goto exit;
  548. }
  549. spin_lock_init(&cqp->req_lock);
  550. INIT_LIST_HEAD(&cqp->cqp_avail_reqs);
  551. INIT_LIST_HEAD(&cqp->cqp_pending_reqs);
  552. /* init the waitq of the cqp_requests and add them to the list */
  553. for (i = 0; i < I40IW_CQP_SW_SQSIZE_2048; i++) {
  554. init_waitqueue_head(&cqp->cqp_requests[i].waitq);
  555. list_add_tail(&cqp->cqp_requests[i].list, &cqp->cqp_avail_reqs);
  556. }
  557. return 0;
  558. exit:
  559. /* clean up the created resources */
  560. i40iw_destroy_cqp(iwdev, false);
  561. return status;
  562. }
  563. /**
  564. * i40iw_create_ccq - create control cq
  565. * @iwdev: iwarp device
  566. *
  567. * Return 0, if the ccq and the resources associated with it
  568. * are successfully created, otherwise return error
  569. */
  570. static enum i40iw_status_code i40iw_create_ccq(struct i40iw_device *iwdev)
  571. {
  572. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  573. struct i40iw_dma_mem mem;
  574. enum i40iw_status_code status;
  575. struct i40iw_ccq_init_info info;
  576. struct i40iw_ccq *ccq = &iwdev->ccq;
  577. memset(&info, 0, sizeof(info));
  578. dev->ccq = &ccq->sc_cq;
  579. dev->ccq->dev = dev;
  580. info.dev = dev;
  581. ccq->shadow_area.size = sizeof(struct i40iw_cq_shadow_area);
  582. ccq->mem_cq.size = sizeof(struct i40iw_cqe) * IW_CCQ_SIZE;
  583. status = i40iw_allocate_dma_mem(dev->hw, &ccq->mem_cq,
  584. ccq->mem_cq.size, I40IW_CQ0_ALIGNMENT);
  585. if (status)
  586. goto exit;
  587. status = i40iw_obj_aligned_mem(iwdev, &mem, ccq->shadow_area.size,
  588. I40IW_SHADOWAREA_MASK);
  589. if (status)
  590. goto exit;
  591. ccq->sc_cq.back_cq = (void *)ccq;
  592. /* populate the ccq init info */
  593. info.cq_base = ccq->mem_cq.va;
  594. info.cq_pa = ccq->mem_cq.pa;
  595. info.num_elem = IW_CCQ_SIZE;
  596. info.shadow_area = mem.va;
  597. info.shadow_area_pa = mem.pa;
  598. info.ceqe_mask = false;
  599. info.ceq_id_valid = true;
  600. info.shadow_read_threshold = 16;
  601. status = dev->ccq_ops->ccq_init(dev->ccq, &info);
  602. if (!status)
  603. status = dev->ccq_ops->ccq_create(dev->ccq, 0, true, true);
  604. exit:
  605. if (status)
  606. i40iw_free_dma_mem(dev->hw, &ccq->mem_cq);
  607. return status;
  608. }
  609. /**
  610. * i40iw_configure_ceq_vector - set up the msix interrupt vector for ceq
  611. * @iwdev: iwarp device
  612. * @msix_vec: interrupt vector information
  613. * @iwceq: ceq associated with the vector
  614. * @ceq_id: the id number of the iwceq
  615. *
  616. * Allocate interrupt resources and enable irq handling
  617. * Return 0 if successful, otherwise return error
  618. */
  619. static enum i40iw_status_code i40iw_configure_ceq_vector(struct i40iw_device *iwdev,
  620. struct i40iw_ceq *iwceq,
  621. u32 ceq_id,
  622. struct i40iw_msix_vector *msix_vec)
  623. {
  624. enum i40iw_status_code status;
  625. if (iwdev->msix_shared && !ceq_id) {
  626. tasklet_init(&iwdev->dpc_tasklet, i40iw_dpc, (unsigned long)iwdev);
  627. status = request_irq(msix_vec->irq, i40iw_irq_handler, 0, "AEQCEQ", iwdev);
  628. } else {
  629. tasklet_init(&iwceq->dpc_tasklet, i40iw_ceq_dpc, (unsigned long)iwceq);
  630. status = request_irq(msix_vec->irq, i40iw_ceq_handler, 0, "CEQ", iwceq);
  631. }
  632. if (status) {
  633. i40iw_pr_err("ceq irq config fail\n");
  634. return I40IW_ERR_CONFIG;
  635. }
  636. msix_vec->ceq_id = ceq_id;
  637. msix_vec->cpu_affinity = 0;
  638. return 0;
  639. }
  640. /**
  641. * i40iw_create_ceq - create completion event queue
  642. * @iwdev: iwarp device
  643. * @iwceq: pointer to the ceq resources to be created
  644. * @ceq_id: the id number of the iwceq
  645. *
  646. * Return 0, if the ceq and the resources associated with it
  647. * are successfully created, otherwise return error
  648. */
  649. static enum i40iw_status_code i40iw_create_ceq(struct i40iw_device *iwdev,
  650. struct i40iw_ceq *iwceq,
  651. u32 ceq_id)
  652. {
  653. enum i40iw_status_code status;
  654. struct i40iw_ceq_init_info info;
  655. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  656. u64 scratch;
  657. memset(&info, 0, sizeof(info));
  658. info.ceq_id = ceq_id;
  659. iwceq->iwdev = iwdev;
  660. iwceq->mem.size = sizeof(struct i40iw_ceqe) *
  661. iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
  662. status = i40iw_allocate_dma_mem(dev->hw, &iwceq->mem, iwceq->mem.size,
  663. I40IW_CEQ_ALIGNMENT);
  664. if (status)
  665. goto exit;
  666. info.ceq_id = ceq_id;
  667. info.ceqe_base = iwceq->mem.va;
  668. info.ceqe_pa = iwceq->mem.pa;
  669. info.elem_cnt = iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
  670. iwceq->sc_ceq.ceq_id = ceq_id;
  671. info.dev = dev;
  672. scratch = (uintptr_t)&iwdev->cqp.sc_cqp;
  673. status = dev->ceq_ops->ceq_init(&iwceq->sc_ceq, &info);
  674. if (!status)
  675. status = dev->ceq_ops->cceq_create(&iwceq->sc_ceq, scratch);
  676. exit:
  677. if (status)
  678. i40iw_free_dma_mem(dev->hw, &iwceq->mem);
  679. return status;
  680. }
  681. void i40iw_request_reset(struct i40iw_device *iwdev)
  682. {
  683. struct i40e_info *ldev = iwdev->ldev;
  684. ldev->ops->request_reset(ldev, iwdev->client, 1);
  685. }
  686. /**
  687. * i40iw_setup_ceqs - manage the device ceq's and their interrupt resources
  688. * @iwdev: iwarp device
  689. * @ldev: i40e lan device
  690. *
  691. * Allocate a list for all device completion event queues
  692. * Create the ceq's and configure their msix interrupt vectors
  693. * Return 0, if at least one ceq is successfully set up, otherwise return error
  694. */
  695. static enum i40iw_status_code i40iw_setup_ceqs(struct i40iw_device *iwdev,
  696. struct i40e_info *ldev)
  697. {
  698. u32 i;
  699. u32 ceq_id;
  700. struct i40iw_ceq *iwceq;
  701. struct i40iw_msix_vector *msix_vec;
  702. enum i40iw_status_code status = 0;
  703. u32 num_ceqs;
  704. if (ldev && ldev->ops && ldev->ops->setup_qvlist) {
  705. status = ldev->ops->setup_qvlist(ldev, &i40iw_client,
  706. iwdev->iw_qvlist);
  707. if (status)
  708. goto exit;
  709. } else {
  710. status = I40IW_ERR_BAD_PTR;
  711. goto exit;
  712. }
  713. num_ceqs = min(iwdev->msix_count, iwdev->sc_dev.hmc_fpm_misc.max_ceqs);
  714. iwdev->ceqlist = kcalloc(num_ceqs, sizeof(*iwdev->ceqlist), GFP_KERNEL);
  715. if (!iwdev->ceqlist) {
  716. status = I40IW_ERR_NO_MEMORY;
  717. goto exit;
  718. }
  719. i = (iwdev->msix_shared) ? 0 : 1;
  720. for (ceq_id = 0; i < num_ceqs; i++, ceq_id++) {
  721. iwceq = &iwdev->ceqlist[ceq_id];
  722. status = i40iw_create_ceq(iwdev, iwceq, ceq_id);
  723. if (status) {
  724. i40iw_pr_err("create ceq status = %d\n", status);
  725. break;
  726. }
  727. msix_vec = &iwdev->iw_msixtbl[i];
  728. iwceq->irq = msix_vec->irq;
  729. iwceq->msix_idx = msix_vec->idx;
  730. status = i40iw_configure_ceq_vector(iwdev, iwceq, ceq_id, msix_vec);
  731. if (status) {
  732. i40iw_destroy_ceq(iwdev, iwceq, false);
  733. break;
  734. }
  735. i40iw_enable_intr(&iwdev->sc_dev, msix_vec->idx);
  736. iwdev->ceqs_count++;
  737. }
  738. exit:
  739. if (status) {
  740. if (!iwdev->ceqs_count) {
  741. kfree(iwdev->ceqlist);
  742. iwdev->ceqlist = NULL;
  743. } else {
  744. status = 0;
  745. }
  746. }
  747. return status;
  748. }
  749. /**
  750. * i40iw_configure_aeq_vector - set up the msix vector for aeq
  751. * @iwdev: iwarp device
  752. *
  753. * Allocate interrupt resources and enable irq handling
  754. * Return 0 if successful, otherwise return error
  755. */
  756. static enum i40iw_status_code i40iw_configure_aeq_vector(struct i40iw_device *iwdev)
  757. {
  758. struct i40iw_msix_vector *msix_vec = iwdev->iw_msixtbl;
  759. u32 ret = 0;
  760. if (!iwdev->msix_shared) {
  761. tasklet_init(&iwdev->dpc_tasklet, i40iw_dpc, (unsigned long)iwdev);
  762. ret = request_irq(msix_vec->irq, i40iw_irq_handler, 0, "i40iw", iwdev);
  763. }
  764. if (ret) {
  765. i40iw_pr_err("aeq irq config fail\n");
  766. return I40IW_ERR_CONFIG;
  767. }
  768. return 0;
  769. }
  770. /**
  771. * i40iw_create_aeq - create async event queue
  772. * @iwdev: iwarp device
  773. *
  774. * Return 0, if the aeq and the resources associated with it
  775. * are successfully created, otherwise return error
  776. */
  777. static enum i40iw_status_code i40iw_create_aeq(struct i40iw_device *iwdev)
  778. {
  779. enum i40iw_status_code status;
  780. struct i40iw_aeq_init_info info;
  781. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  782. struct i40iw_aeq *aeq = &iwdev->aeq;
  783. u64 scratch = 0;
  784. u32 aeq_size;
  785. aeq_size = 2 * iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_QP].cnt +
  786. iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
  787. memset(&info, 0, sizeof(info));
  788. aeq->mem.size = sizeof(struct i40iw_sc_aeqe) * aeq_size;
  789. status = i40iw_allocate_dma_mem(dev->hw, &aeq->mem, aeq->mem.size,
  790. I40IW_AEQ_ALIGNMENT);
  791. if (status)
  792. goto exit;
  793. info.aeqe_base = aeq->mem.va;
  794. info.aeq_elem_pa = aeq->mem.pa;
  795. info.elem_cnt = aeq_size;
  796. info.dev = dev;
  797. status = dev->aeq_ops->aeq_init(&aeq->sc_aeq, &info);
  798. if (status)
  799. goto exit;
  800. status = dev->aeq_ops->aeq_create(&aeq->sc_aeq, scratch, 1);
  801. if (!status)
  802. status = dev->aeq_ops->aeq_create_done(&aeq->sc_aeq);
  803. exit:
  804. if (status)
  805. i40iw_free_dma_mem(dev->hw, &aeq->mem);
  806. return status;
  807. }
  808. /**
  809. * i40iw_setup_aeq - set up the device aeq
  810. * @iwdev: iwarp device
  811. *
  812. * Create the aeq and configure its msix interrupt vector
  813. * Return 0 if successful, otherwise return error
  814. */
  815. static enum i40iw_status_code i40iw_setup_aeq(struct i40iw_device *iwdev)
  816. {
  817. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  818. enum i40iw_status_code status;
  819. status = i40iw_create_aeq(iwdev);
  820. if (status)
  821. return status;
  822. status = i40iw_configure_aeq_vector(iwdev);
  823. if (status) {
  824. i40iw_destroy_aeq(iwdev, false);
  825. return status;
  826. }
  827. if (!iwdev->msix_shared)
  828. i40iw_enable_intr(dev, iwdev->iw_msixtbl[0].idx);
  829. return 0;
  830. }
  831. /**
  832. * i40iw_initialize_ilq - create iwarp local queue for cm
  833. * @iwdev: iwarp device
  834. *
  835. * Return 0 if successful, otherwise return error
  836. */
  837. static enum i40iw_status_code i40iw_initialize_ilq(struct i40iw_device *iwdev)
  838. {
  839. struct i40iw_puda_rsrc_info info;
  840. enum i40iw_status_code status;
  841. info.type = I40IW_PUDA_RSRC_TYPE_ILQ;
  842. info.cq_id = 1;
  843. info.qp_id = 0;
  844. info.count = 1;
  845. info.pd_id = 1;
  846. info.sq_size = 8192;
  847. info.rq_size = 8192;
  848. info.buf_size = 1024;
  849. info.tx_buf_cnt = 16384;
  850. info.mss = iwdev->mss;
  851. info.receive = i40iw_receive_ilq;
  852. info.xmit_complete = i40iw_free_sqbuf;
  853. status = i40iw_puda_create_rsrc(&iwdev->sc_dev, &info);
  854. if (status)
  855. i40iw_pr_err("ilq create fail\n");
  856. return status;
  857. }
  858. /**
  859. * i40iw_initialize_ieq - create iwarp exception queue
  860. * @iwdev: iwarp device
  861. *
  862. * Return 0 if successful, otherwise return error
  863. */
  864. static enum i40iw_status_code i40iw_initialize_ieq(struct i40iw_device *iwdev)
  865. {
  866. struct i40iw_puda_rsrc_info info;
  867. enum i40iw_status_code status;
  868. info.type = I40IW_PUDA_RSRC_TYPE_IEQ;
  869. info.cq_id = 2;
  870. info.qp_id = iwdev->sc_dev.exception_lan_queue;
  871. info.count = 1;
  872. info.pd_id = 2;
  873. info.sq_size = 8192;
  874. info.rq_size = 8192;
  875. info.buf_size = 2048;
  876. info.mss = iwdev->mss;
  877. info.tx_buf_cnt = 16384;
  878. status = i40iw_puda_create_rsrc(&iwdev->sc_dev, &info);
  879. if (status)
  880. i40iw_pr_err("ieq create fail\n");
  881. return status;
  882. }
  883. /**
  884. * i40iw_hmc_setup - create hmc objects for the device
  885. * @iwdev: iwarp device
  886. *
  887. * Set up the device private memory space for the number and size of
  888. * the hmc objects and create the objects
  889. * Return 0 if successful, otherwise return error
  890. */
  891. static enum i40iw_status_code i40iw_hmc_setup(struct i40iw_device *iwdev)
  892. {
  893. enum i40iw_status_code status;
  894. iwdev->sd_type = I40IW_SD_TYPE_DIRECT;
  895. status = i40iw_config_fpm_values(&iwdev->sc_dev, IW_CFG_FPM_QP_COUNT);
  896. if (status)
  897. goto exit;
  898. status = i40iw_create_hmc_objs(iwdev, true);
  899. if (status)
  900. goto exit;
  901. iwdev->init_state = HMC_OBJS_CREATED;
  902. exit:
  903. return status;
  904. }
  905. /**
  906. * i40iw_del_init_mem - deallocate memory resources
  907. * @iwdev: iwarp device
  908. */
  909. static void i40iw_del_init_mem(struct i40iw_device *iwdev)
  910. {
  911. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  912. i40iw_free_dma_mem(&iwdev->hw, &iwdev->obj_mem);
  913. kfree(dev->hmc_info->sd_table.sd_entry);
  914. dev->hmc_info->sd_table.sd_entry = NULL;
  915. kfree(iwdev->mem_resources);
  916. iwdev->mem_resources = NULL;
  917. kfree(iwdev->ceqlist);
  918. iwdev->ceqlist = NULL;
  919. kfree(iwdev->iw_msixtbl);
  920. iwdev->iw_msixtbl = NULL;
  921. kfree(iwdev->hmc_info_mem);
  922. iwdev->hmc_info_mem = NULL;
  923. }
  924. /**
  925. * i40iw_del_macip_entry - remove a mac ip address entry from the hw table
  926. * @iwdev: iwarp device
  927. * @idx: the index of the mac ip address to delete
  928. */
  929. static void i40iw_del_macip_entry(struct i40iw_device *iwdev, u8 idx)
  930. {
  931. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  932. struct i40iw_cqp_request *cqp_request;
  933. struct cqp_commands_info *cqp_info;
  934. enum i40iw_status_code status = 0;
  935. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  936. if (!cqp_request) {
  937. i40iw_pr_err("cqp_request memory failed\n");
  938. return;
  939. }
  940. cqp_info = &cqp_request->info;
  941. cqp_info->cqp_cmd = OP_DELETE_LOCAL_MAC_IPADDR_ENTRY;
  942. cqp_info->post_sq = 1;
  943. cqp_info->in.u.del_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
  944. cqp_info->in.u.del_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
  945. cqp_info->in.u.del_local_mac_ipaddr_entry.entry_idx = idx;
  946. cqp_info->in.u.del_local_mac_ipaddr_entry.ignore_ref_count = 0;
  947. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  948. if (status)
  949. i40iw_pr_err("CQP-OP Del MAC Ip entry fail");
  950. }
  951. /**
  952. * i40iw_add_mac_ipaddr_entry - add a mac ip address entry to the hw table
  953. * @iwdev: iwarp device
  954. * @mac_addr: pointer to mac address
  955. * @idx: the index of the mac ip address to add
  956. */
  957. static enum i40iw_status_code i40iw_add_mac_ipaddr_entry(struct i40iw_device *iwdev,
  958. u8 *mac_addr,
  959. u8 idx)
  960. {
  961. struct i40iw_local_mac_ipaddr_entry_info *info;
  962. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  963. struct i40iw_cqp_request *cqp_request;
  964. struct cqp_commands_info *cqp_info;
  965. enum i40iw_status_code status = 0;
  966. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  967. if (!cqp_request) {
  968. i40iw_pr_err("cqp_request memory failed\n");
  969. return I40IW_ERR_NO_MEMORY;
  970. }
  971. cqp_info = &cqp_request->info;
  972. cqp_info->post_sq = 1;
  973. info = &cqp_info->in.u.add_local_mac_ipaddr_entry.info;
  974. ether_addr_copy(info->mac_addr, mac_addr);
  975. info->entry_idx = idx;
  976. cqp_info->in.u.add_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
  977. cqp_info->cqp_cmd = OP_ADD_LOCAL_MAC_IPADDR_ENTRY;
  978. cqp_info->in.u.add_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
  979. cqp_info->in.u.add_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
  980. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  981. if (status)
  982. i40iw_pr_err("CQP-OP Add MAC Ip entry fail");
  983. return status;
  984. }
  985. /**
  986. * i40iw_alloc_local_mac_ipaddr_entry - allocate a mac ip address entry
  987. * @iwdev: iwarp device
  988. * @mac_ip_tbl_idx: the index of the new mac ip address
  989. *
  990. * Allocate a mac ip address entry and update the mac_ip_tbl_idx
  991. * to hold the index of the newly created mac ip address
  992. * Return 0 if successful, otherwise return error
  993. */
  994. static enum i40iw_status_code i40iw_alloc_local_mac_ipaddr_entry(struct i40iw_device *iwdev,
  995. u16 *mac_ip_tbl_idx)
  996. {
  997. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  998. struct i40iw_cqp_request *cqp_request;
  999. struct cqp_commands_info *cqp_info;
  1000. enum i40iw_status_code status = 0;
  1001. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1002. if (!cqp_request) {
  1003. i40iw_pr_err("cqp_request memory failed\n");
  1004. return I40IW_ERR_NO_MEMORY;
  1005. }
  1006. /* increment refcount, because we need the cqp request ret value */
  1007. atomic_inc(&cqp_request->refcount);
  1008. cqp_info = &cqp_request->info;
  1009. cqp_info->cqp_cmd = OP_ALLOC_LOCAL_MAC_IPADDR_ENTRY;
  1010. cqp_info->post_sq = 1;
  1011. cqp_info->in.u.alloc_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
  1012. cqp_info->in.u.alloc_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
  1013. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1014. if (!status)
  1015. *mac_ip_tbl_idx = cqp_request->compl_info.op_ret_val;
  1016. else
  1017. i40iw_pr_err("CQP-OP Alloc MAC Ip entry fail");
  1018. /* decrement refcount and free the cqp request, if no longer used */
  1019. i40iw_put_cqp_request(iwcqp, cqp_request);
  1020. return status;
  1021. }
  1022. /**
  1023. * i40iw_alloc_set_mac_ipaddr - set up a mac ip address table entry
  1024. * @iwdev: iwarp device
  1025. * @macaddr: pointer to mac address
  1026. *
  1027. * Allocate a mac ip address entry and add it to the hw table
  1028. * Return 0 if successful, otherwise return error
  1029. */
  1030. static enum i40iw_status_code i40iw_alloc_set_mac_ipaddr(struct i40iw_device *iwdev,
  1031. u8 *macaddr)
  1032. {
  1033. enum i40iw_status_code status;
  1034. status = i40iw_alloc_local_mac_ipaddr_entry(iwdev, &iwdev->mac_ip_table_idx);
  1035. if (!status) {
  1036. status = i40iw_add_mac_ipaddr_entry(iwdev, macaddr,
  1037. (u8)iwdev->mac_ip_table_idx);
  1038. if (!status)
  1039. status = i40iw_add_mac_ipaddr_entry(iwdev, macaddr,
  1040. (u8)iwdev->mac_ip_table_idx);
  1041. else
  1042. i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
  1043. }
  1044. return status;
  1045. }
  1046. /**
  1047. * i40iw_add_ipv6_addr - add ipv6 address to the hw arp table
  1048. * @iwdev: iwarp device
  1049. */
  1050. static void i40iw_add_ipv6_addr(struct i40iw_device *iwdev)
  1051. {
  1052. struct net_device *ip_dev;
  1053. struct inet6_dev *idev;
  1054. struct inet6_ifaddr *ifp;
  1055. __be32 local_ipaddr6[4];
  1056. rcu_read_lock();
  1057. for_each_netdev_rcu(&init_net, ip_dev) {
  1058. if ((((rdma_vlan_dev_vlan_id(ip_dev) < 0xFFFF) &&
  1059. (rdma_vlan_dev_real_dev(ip_dev) == iwdev->netdev)) ||
  1060. (ip_dev == iwdev->netdev)) && (ip_dev->flags & IFF_UP)) {
  1061. idev = __in6_dev_get(ip_dev);
  1062. if (!idev) {
  1063. i40iw_pr_err("ipv6 inet device not found\n");
  1064. break;
  1065. }
  1066. list_for_each_entry(ifp, &idev->addr_list, if_list) {
  1067. i40iw_pr_info("IP=%pI6, vlan_id=%d, MAC=%pM\n", &ifp->addr,
  1068. rdma_vlan_dev_vlan_id(ip_dev), ip_dev->dev_addr);
  1069. i40iw_copy_ip_ntohl(local_ipaddr6,
  1070. ifp->addr.in6_u.u6_addr32);
  1071. i40iw_manage_arp_cache(iwdev,
  1072. ip_dev->dev_addr,
  1073. local_ipaddr6,
  1074. false,
  1075. I40IW_ARP_ADD);
  1076. }
  1077. }
  1078. }
  1079. rcu_read_unlock();
  1080. }
  1081. /**
  1082. * i40iw_add_ipv4_addr - add ipv4 address to the hw arp table
  1083. * @iwdev: iwarp device
  1084. */
  1085. static void i40iw_add_ipv4_addr(struct i40iw_device *iwdev)
  1086. {
  1087. struct net_device *dev;
  1088. struct in_device *idev;
  1089. bool got_lock = true;
  1090. u32 ip_addr;
  1091. if (!rtnl_trylock())
  1092. got_lock = false;
  1093. for_each_netdev(&init_net, dev) {
  1094. if ((((rdma_vlan_dev_vlan_id(dev) < 0xFFFF) &&
  1095. (rdma_vlan_dev_real_dev(dev) == iwdev->netdev)) ||
  1096. (dev == iwdev->netdev)) && (dev->flags & IFF_UP)) {
  1097. idev = in_dev_get(dev);
  1098. for_ifa(idev) {
  1099. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_CM,
  1100. "IP=%pI4, vlan_id=%d, MAC=%pM\n", &ifa->ifa_address,
  1101. rdma_vlan_dev_vlan_id(dev), dev->dev_addr);
  1102. ip_addr = ntohl(ifa->ifa_address);
  1103. i40iw_manage_arp_cache(iwdev,
  1104. dev->dev_addr,
  1105. &ip_addr,
  1106. true,
  1107. I40IW_ARP_ADD);
  1108. }
  1109. endfor_ifa(idev);
  1110. in_dev_put(idev);
  1111. }
  1112. }
  1113. if (got_lock)
  1114. rtnl_unlock();
  1115. }
  1116. /**
  1117. * i40iw_add_mac_ip - add mac and ip addresses
  1118. * @iwdev: iwarp device
  1119. *
  1120. * Create and add a mac ip address entry to the hw table and
  1121. * ipv4/ipv6 addresses to the arp cache
  1122. * Return 0 if successful, otherwise return error
  1123. */
  1124. static enum i40iw_status_code i40iw_add_mac_ip(struct i40iw_device *iwdev)
  1125. {
  1126. struct net_device *netdev = iwdev->netdev;
  1127. enum i40iw_status_code status;
  1128. status = i40iw_alloc_set_mac_ipaddr(iwdev, (u8 *)netdev->dev_addr);
  1129. if (status)
  1130. return status;
  1131. i40iw_add_ipv4_addr(iwdev);
  1132. i40iw_add_ipv6_addr(iwdev);
  1133. return 0;
  1134. }
  1135. /**
  1136. * i40iw_wait_pe_ready - Check if firmware is ready
  1137. * @hw: provides access to registers
  1138. */
  1139. static void i40iw_wait_pe_ready(struct i40iw_hw *hw)
  1140. {
  1141. u32 statusfw;
  1142. u32 statuscpu0;
  1143. u32 statuscpu1;
  1144. u32 statuscpu2;
  1145. u32 retrycount = 0;
  1146. do {
  1147. statusfw = i40iw_rd32(hw, I40E_GLPE_FWLDSTATUS);
  1148. i40iw_pr_info("[%04d] fm load status[x%04X]\n", __LINE__, statusfw);
  1149. statuscpu0 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS0);
  1150. i40iw_pr_info("[%04d] CSR_CQP status[x%04X]\n", __LINE__, statuscpu0);
  1151. statuscpu1 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS1);
  1152. i40iw_pr_info("[%04d] I40E_GLPE_CPUSTATUS1 status[x%04X]\n",
  1153. __LINE__, statuscpu1);
  1154. statuscpu2 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS2);
  1155. i40iw_pr_info("[%04d] I40E_GLPE_CPUSTATUS2 status[x%04X]\n",
  1156. __LINE__, statuscpu2);
  1157. if ((statuscpu0 == 0x80) && (statuscpu1 == 0x80) && (statuscpu2 == 0x80))
  1158. break; /* SUCCESS */
  1159. mdelay(1000);
  1160. retrycount++;
  1161. } while (retrycount < 14);
  1162. i40iw_wr32(hw, 0xb4040, 0x4C104C5);
  1163. }
  1164. /**
  1165. * i40iw_initialize_dev - initialize device
  1166. * @iwdev: iwarp device
  1167. * @ldev: lan device information
  1168. *
  1169. * Allocate memory for the hmc objects and initialize iwdev
  1170. * Return 0 if successful, otherwise clean up the resources
  1171. * and return error
  1172. */
  1173. static enum i40iw_status_code i40iw_initialize_dev(struct i40iw_device *iwdev,
  1174. struct i40e_info *ldev)
  1175. {
  1176. enum i40iw_status_code status;
  1177. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  1178. struct i40iw_device_init_info info;
  1179. struct i40iw_dma_mem mem;
  1180. u32 size;
  1181. memset(&info, 0, sizeof(info));
  1182. size = sizeof(struct i40iw_hmc_pble_rsrc) + sizeof(struct i40iw_hmc_info) +
  1183. (sizeof(struct i40iw_hmc_obj_info) * I40IW_HMC_IW_MAX);
  1184. iwdev->hmc_info_mem = kzalloc(size, GFP_KERNEL);
  1185. if (!iwdev->hmc_info_mem) {
  1186. i40iw_pr_err("memory alloc fail\n");
  1187. return I40IW_ERR_NO_MEMORY;
  1188. }
  1189. iwdev->pble_rsrc = (struct i40iw_hmc_pble_rsrc *)iwdev->hmc_info_mem;
  1190. dev->hmc_info = &iwdev->hw.hmc;
  1191. dev->hmc_info->hmc_obj = (struct i40iw_hmc_obj_info *)(iwdev->pble_rsrc + 1);
  1192. status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_QUERY_FPM_BUF_SIZE,
  1193. I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
  1194. if (status)
  1195. goto exit;
  1196. info.fpm_query_buf_pa = mem.pa;
  1197. info.fpm_query_buf = mem.va;
  1198. status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_COMMIT_FPM_BUF_SIZE,
  1199. I40IW_FPM_COMMIT_BUF_ALIGNMENT_MASK);
  1200. if (status)
  1201. goto exit;
  1202. info.fpm_commit_buf_pa = mem.pa;
  1203. info.fpm_commit_buf = mem.va;
  1204. info.hmc_fn_id = ldev->fid;
  1205. info.is_pf = (ldev->ftype) ? false : true;
  1206. info.bar0 = ldev->hw_addr;
  1207. info.hw = &iwdev->hw;
  1208. info.debug_mask = debug;
  1209. info.qs_handle = ldev->params.qos.prio_qos[0].qs_handle;
  1210. info.exception_lan_queue = 1;
  1211. info.vchnl_send = i40iw_virtchnl_send;
  1212. status = i40iw_device_init(&iwdev->sc_dev, &info);
  1213. exit:
  1214. if (status) {
  1215. kfree(iwdev->hmc_info_mem);
  1216. iwdev->hmc_info_mem = NULL;
  1217. }
  1218. return status;
  1219. }
  1220. /**
  1221. * i40iw_register_notifiers - register tcp ip notifiers
  1222. */
  1223. static void i40iw_register_notifiers(void)
  1224. {
  1225. if (!i40iw_notifiers_registered) {
  1226. register_inetaddr_notifier(&i40iw_inetaddr_notifier);
  1227. register_inet6addr_notifier(&i40iw_inetaddr6_notifier);
  1228. register_netevent_notifier(&i40iw_net_notifier);
  1229. }
  1230. i40iw_notifiers_registered++;
  1231. }
  1232. /**
  1233. * i40iw_save_msix_info - copy msix vector information to iwarp device
  1234. * @iwdev: iwarp device
  1235. * @ldev: lan device information
  1236. *
  1237. * Allocate iwdev msix table and copy the ldev msix info to the table
  1238. * Return 0 if successful, otherwise return error
  1239. */
  1240. static enum i40iw_status_code i40iw_save_msix_info(struct i40iw_device *iwdev,
  1241. struct i40e_info *ldev)
  1242. {
  1243. struct i40e_qvlist_info *iw_qvlist;
  1244. struct i40e_qv_info *iw_qvinfo;
  1245. u32 ceq_idx;
  1246. u32 i;
  1247. u32 size;
  1248. iwdev->msix_count = ldev->msix_count;
  1249. size = sizeof(struct i40iw_msix_vector) * iwdev->msix_count;
  1250. size += sizeof(struct i40e_qvlist_info);
  1251. size += sizeof(struct i40e_qv_info) * iwdev->msix_count - 1;
  1252. iwdev->iw_msixtbl = kzalloc(size, GFP_KERNEL);
  1253. if (!iwdev->iw_msixtbl)
  1254. return I40IW_ERR_NO_MEMORY;
  1255. iwdev->iw_qvlist = (struct i40e_qvlist_info *)(&iwdev->iw_msixtbl[iwdev->msix_count]);
  1256. iw_qvlist = iwdev->iw_qvlist;
  1257. iw_qvinfo = iw_qvlist->qv_info;
  1258. iw_qvlist->num_vectors = iwdev->msix_count;
  1259. if (iwdev->msix_count <= num_online_cpus())
  1260. iwdev->msix_shared = true;
  1261. for (i = 0, ceq_idx = 0; i < iwdev->msix_count; i++, iw_qvinfo++) {
  1262. iwdev->iw_msixtbl[i].idx = ldev->msix_entries[i].entry;
  1263. iwdev->iw_msixtbl[i].irq = ldev->msix_entries[i].vector;
  1264. if (i == 0) {
  1265. iw_qvinfo->aeq_idx = 0;
  1266. if (iwdev->msix_shared)
  1267. iw_qvinfo->ceq_idx = ceq_idx++;
  1268. else
  1269. iw_qvinfo->ceq_idx = I40E_QUEUE_INVALID_IDX;
  1270. } else {
  1271. iw_qvinfo->aeq_idx = I40E_QUEUE_INVALID_IDX;
  1272. iw_qvinfo->ceq_idx = ceq_idx++;
  1273. }
  1274. iw_qvinfo->itr_idx = 3;
  1275. iw_qvinfo->v_idx = iwdev->iw_msixtbl[i].idx;
  1276. }
  1277. return 0;
  1278. }
  1279. /**
  1280. * i40iw_deinit_device - clean up the device resources
  1281. * @iwdev: iwarp device
  1282. * @reset: true if called before reset
  1283. * @del_hdl: true if delete hdl entry
  1284. *
  1285. * Destroy the ib device interface, remove the mac ip entry and ipv4/ipv6 addresses,
  1286. * destroy the device queues and free the pble and the hmc objects
  1287. */
  1288. static void i40iw_deinit_device(struct i40iw_device *iwdev, bool reset, bool del_hdl)
  1289. {
  1290. struct i40e_info *ldev = iwdev->ldev;
  1291. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  1292. i40iw_pr_info("state = %d\n", iwdev->init_state);
  1293. switch (iwdev->init_state) {
  1294. case RDMA_DEV_REGISTERED:
  1295. iwdev->iw_status = 0;
  1296. i40iw_port_ibevent(iwdev);
  1297. i40iw_destroy_rdma_device(iwdev->iwibdev);
  1298. /* fallthrough */
  1299. case IP_ADDR_REGISTERED:
  1300. if (!reset)
  1301. i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
  1302. /* fallthrough */
  1303. case INET_NOTIFIER:
  1304. if (i40iw_notifiers_registered > 0) {
  1305. i40iw_notifiers_registered--;
  1306. unregister_netevent_notifier(&i40iw_net_notifier);
  1307. unregister_inetaddr_notifier(&i40iw_inetaddr_notifier);
  1308. unregister_inet6addr_notifier(&i40iw_inetaddr6_notifier);
  1309. }
  1310. /* fallthrough */
  1311. case CEQ_CREATED:
  1312. i40iw_dele_ceqs(iwdev, reset);
  1313. /* fallthrough */
  1314. case AEQ_CREATED:
  1315. i40iw_destroy_aeq(iwdev, reset);
  1316. /* fallthrough */
  1317. case IEQ_CREATED:
  1318. i40iw_puda_dele_resources(dev, I40IW_PUDA_RSRC_TYPE_IEQ, reset);
  1319. /* fallthrough */
  1320. case ILQ_CREATED:
  1321. i40iw_puda_dele_resources(dev, I40IW_PUDA_RSRC_TYPE_ILQ, reset);
  1322. /* fallthrough */
  1323. case CCQ_CREATED:
  1324. i40iw_destroy_ccq(iwdev, reset);
  1325. /* fallthrough */
  1326. case PBLE_CHUNK_MEM:
  1327. i40iw_destroy_pble_pool(dev, iwdev->pble_rsrc);
  1328. /* fallthrough */
  1329. case HMC_OBJS_CREATED:
  1330. i40iw_del_hmc_objects(dev, dev->hmc_info, true, reset);
  1331. /* fallthrough */
  1332. case CQP_CREATED:
  1333. i40iw_destroy_cqp(iwdev, !reset);
  1334. /* fallthrough */
  1335. case INITIAL_STATE:
  1336. i40iw_cleanup_cm_core(&iwdev->cm_core);
  1337. if (dev->is_pf)
  1338. i40iw_hw_stats_del_timer(dev);
  1339. i40iw_del_init_mem(iwdev);
  1340. break;
  1341. case INVALID_STATE:
  1342. /* fallthrough */
  1343. default:
  1344. i40iw_pr_err("bad init_state = %d\n", iwdev->init_state);
  1345. break;
  1346. }
  1347. if (del_hdl)
  1348. i40iw_del_handler(i40iw_find_i40e_handler(ldev));
  1349. kfree(iwdev->hdl);
  1350. }
  1351. /**
  1352. * i40iw_setup_init_state - set up the initial device struct
  1353. * @hdl: handler for iwarp device - one per instance
  1354. * @ldev: lan device information
  1355. * @client: iwarp client information, provided during registration
  1356. *
  1357. * Initialize the iwarp device and its hdl information
  1358. * using the ldev and client information
  1359. * Return 0 if successful, otherwise return error
  1360. */
  1361. static enum i40iw_status_code i40iw_setup_init_state(struct i40iw_handler *hdl,
  1362. struct i40e_info *ldev,
  1363. struct i40e_client *client)
  1364. {
  1365. struct i40iw_device *iwdev = &hdl->device;
  1366. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  1367. enum i40iw_status_code status;
  1368. memcpy(&hdl->ldev, ldev, sizeof(*ldev));
  1369. if (resource_profile == 1)
  1370. resource_profile = 2;
  1371. iwdev->mpa_version = mpa_version;
  1372. iwdev->resource_profile = (resource_profile < I40IW_HMC_PROFILE_EQUAL) ?
  1373. (u8)resource_profile + I40IW_HMC_PROFILE_DEFAULT :
  1374. I40IW_HMC_PROFILE_DEFAULT;
  1375. iwdev->max_rdma_vfs =
  1376. (iwdev->resource_profile != I40IW_HMC_PROFILE_DEFAULT) ? max_rdma_vfs : 0;
  1377. iwdev->netdev = ldev->netdev;
  1378. hdl->client = client;
  1379. iwdev->mss = (!ldev->params.mtu) ? I40IW_DEFAULT_MSS : ldev->params.mtu - I40IW_MTU_TO_MSS;
  1380. if (!ldev->ftype)
  1381. iwdev->db_start = pci_resource_start(ldev->pcidev, 0) + I40IW_DB_ADDR_OFFSET;
  1382. else
  1383. iwdev->db_start = pci_resource_start(ldev->pcidev, 0) + I40IW_VF_DB_ADDR_OFFSET;
  1384. status = i40iw_save_msix_info(iwdev, ldev);
  1385. if (status)
  1386. goto exit;
  1387. iwdev->hw.dev_context = (void *)ldev->pcidev;
  1388. iwdev->hw.hw_addr = ldev->hw_addr;
  1389. status = i40iw_allocate_dma_mem(&iwdev->hw,
  1390. &iwdev->obj_mem, 8192, 4096);
  1391. if (status)
  1392. goto exit;
  1393. iwdev->obj_next = iwdev->obj_mem;
  1394. iwdev->push_mode = push_mode;
  1395. init_waitqueue_head(&iwdev->vchnl_waitq);
  1396. status = i40iw_initialize_dev(iwdev, ldev);
  1397. exit:
  1398. if (status) {
  1399. kfree(iwdev->iw_msixtbl);
  1400. i40iw_free_dma_mem(dev->hw, &iwdev->obj_mem);
  1401. iwdev->iw_msixtbl = NULL;
  1402. }
  1403. return status;
  1404. }
  1405. /**
  1406. * i40iw_open - client interface operation open for iwarp/uda device
  1407. * @ldev: lan device information
  1408. * @client: iwarp client information, provided during registration
  1409. *
  1410. * Called by the lan driver during the processing of client register
  1411. * Create device resources, set up queues, pble and hmc objects and
  1412. * register the device with the ib verbs interface
  1413. * Return 0 if successful, otherwise return error
  1414. */
  1415. static int i40iw_open(struct i40e_info *ldev, struct i40e_client *client)
  1416. {
  1417. struct i40iw_device *iwdev;
  1418. struct i40iw_sc_dev *dev;
  1419. enum i40iw_status_code status;
  1420. struct i40iw_handler *hdl;
  1421. hdl = kzalloc(sizeof(*hdl), GFP_KERNEL);
  1422. if (!hdl)
  1423. return -ENOMEM;
  1424. iwdev = &hdl->device;
  1425. iwdev->hdl = hdl;
  1426. dev = &iwdev->sc_dev;
  1427. i40iw_setup_cm_core(iwdev);
  1428. dev->back_dev = (void *)iwdev;
  1429. iwdev->ldev = &hdl->ldev;
  1430. iwdev->client = client;
  1431. mutex_init(&iwdev->pbl_mutex);
  1432. i40iw_add_handler(hdl);
  1433. do {
  1434. status = i40iw_setup_init_state(hdl, ldev, client);
  1435. if (status)
  1436. break;
  1437. iwdev->init_state = INITIAL_STATE;
  1438. if (dev->is_pf)
  1439. i40iw_wait_pe_ready(dev->hw);
  1440. status = i40iw_create_cqp(iwdev);
  1441. if (status)
  1442. break;
  1443. iwdev->init_state = CQP_CREATED;
  1444. status = i40iw_hmc_setup(iwdev);
  1445. if (status)
  1446. break;
  1447. status = i40iw_create_ccq(iwdev);
  1448. if (status)
  1449. break;
  1450. iwdev->init_state = CCQ_CREATED;
  1451. status = i40iw_initialize_ilq(iwdev);
  1452. if (status)
  1453. break;
  1454. iwdev->init_state = ILQ_CREATED;
  1455. status = i40iw_initialize_ieq(iwdev);
  1456. if (status)
  1457. break;
  1458. iwdev->init_state = IEQ_CREATED;
  1459. status = i40iw_setup_aeq(iwdev);
  1460. if (status)
  1461. break;
  1462. iwdev->init_state = AEQ_CREATED;
  1463. status = i40iw_setup_ceqs(iwdev, ldev);
  1464. if (status)
  1465. break;
  1466. iwdev->init_state = CEQ_CREATED;
  1467. status = i40iw_initialize_hw_resources(iwdev);
  1468. if (status)
  1469. break;
  1470. dev->ccq_ops->ccq_arm(dev->ccq);
  1471. status = i40iw_hmc_init_pble(&iwdev->sc_dev, iwdev->pble_rsrc);
  1472. if (status)
  1473. break;
  1474. iwdev->virtchnl_wq = create_singlethread_workqueue("iwvch");
  1475. i40iw_register_notifiers();
  1476. iwdev->init_state = INET_NOTIFIER;
  1477. status = i40iw_add_mac_ip(iwdev);
  1478. if (status)
  1479. break;
  1480. iwdev->init_state = IP_ADDR_REGISTERED;
  1481. if (i40iw_register_rdma_device(iwdev)) {
  1482. i40iw_pr_err("register rdma device fail\n");
  1483. break;
  1484. };
  1485. iwdev->init_state = RDMA_DEV_REGISTERED;
  1486. iwdev->iw_status = 1;
  1487. i40iw_port_ibevent(iwdev);
  1488. i40iw_pr_info("i40iw_open completed\n");
  1489. return 0;
  1490. } while (0);
  1491. i40iw_pr_err("status = %d last completion = %d\n", status, iwdev->init_state);
  1492. i40iw_deinit_device(iwdev, false, false);
  1493. return -ERESTART;
  1494. }
  1495. /**
  1496. * i40iw_l2param_change : handle qs handles for qos and mss change
  1497. * @ldev: lan device information
  1498. * @client: client for paramater change
  1499. * @params: new parameters from L2
  1500. */
  1501. static void i40iw_l2param_change(struct i40e_info *ldev,
  1502. struct i40e_client *client,
  1503. struct i40e_params *params)
  1504. {
  1505. struct i40iw_handler *hdl;
  1506. struct i40iw_device *iwdev;
  1507. hdl = i40iw_find_i40e_handler(ldev);
  1508. if (!hdl)
  1509. return;
  1510. iwdev = &hdl->device;
  1511. if (params->mtu)
  1512. iwdev->mss = params->mtu - I40IW_MTU_TO_MSS;
  1513. }
  1514. /**
  1515. * i40iw_close - client interface operation close for iwarp/uda device
  1516. * @ldev: lan device information
  1517. * @client: client to close
  1518. *
  1519. * Called by the lan driver during the processing of client unregister
  1520. * Destroy and clean up the driver resources
  1521. */
  1522. static void i40iw_close(struct i40e_info *ldev, struct i40e_client *client, bool reset)
  1523. {
  1524. struct i40iw_device *iwdev;
  1525. struct i40iw_handler *hdl;
  1526. hdl = i40iw_find_i40e_handler(ldev);
  1527. if (!hdl)
  1528. return;
  1529. iwdev = &hdl->device;
  1530. destroy_workqueue(iwdev->virtchnl_wq);
  1531. i40iw_deinit_device(iwdev, reset, true);
  1532. }
  1533. /**
  1534. * i40iw_vf_reset - process VF reset
  1535. * @ldev: lan device information
  1536. * @client: client interface instance
  1537. * @vf_id: virtual function id
  1538. *
  1539. * Called when a VF is reset by the PF
  1540. * Destroy and clean up the VF resources
  1541. */
  1542. static void i40iw_vf_reset(struct i40e_info *ldev, struct i40e_client *client, u32 vf_id)
  1543. {
  1544. struct i40iw_handler *hdl;
  1545. struct i40iw_sc_dev *dev;
  1546. struct i40iw_hmc_fcn_info hmc_fcn_info;
  1547. struct i40iw_virt_mem vf_dev_mem;
  1548. struct i40iw_vfdev *tmp_vfdev;
  1549. unsigned int i;
  1550. unsigned long flags;
  1551. hdl = i40iw_find_i40e_handler(ldev);
  1552. if (!hdl)
  1553. return;
  1554. dev = &hdl->device.sc_dev;
  1555. for (i = 0; i < I40IW_MAX_PE_ENABLED_VF_COUNT; i++) {
  1556. if (!dev->vf_dev[i] || (dev->vf_dev[i]->vf_id != vf_id))
  1557. continue;
  1558. /* free all resources allocated on behalf of vf */
  1559. tmp_vfdev = dev->vf_dev[i];
  1560. spin_lock_irqsave(&dev->dev_pestat.stats_lock, flags);
  1561. dev->vf_dev[i] = NULL;
  1562. spin_unlock_irqrestore(&dev->dev_pestat.stats_lock, flags);
  1563. i40iw_del_hmc_objects(dev, &tmp_vfdev->hmc_info, false, false);
  1564. /* remove vf hmc function */
  1565. memset(&hmc_fcn_info, 0, sizeof(hmc_fcn_info));
  1566. hmc_fcn_info.vf_id = vf_id;
  1567. hmc_fcn_info.iw_vf_idx = tmp_vfdev->iw_vf_idx;
  1568. hmc_fcn_info.free_fcn = true;
  1569. i40iw_cqp_manage_hmc_fcn_cmd(dev, &hmc_fcn_info);
  1570. /* free vf_dev */
  1571. vf_dev_mem.va = tmp_vfdev;
  1572. vf_dev_mem.size = sizeof(struct i40iw_vfdev) +
  1573. sizeof(struct i40iw_hmc_obj_info) * I40IW_HMC_IW_MAX;
  1574. i40iw_free_virt_mem(dev->hw, &vf_dev_mem);
  1575. break;
  1576. }
  1577. }
  1578. /**
  1579. * i40iw_vf_enable - enable a number of VFs
  1580. * @ldev: lan device information
  1581. * @client: client interface instance
  1582. * @num_vfs: number of VFs for the PF
  1583. *
  1584. * Called when the number of VFs changes
  1585. */
  1586. static void i40iw_vf_enable(struct i40e_info *ldev,
  1587. struct i40e_client *client,
  1588. u32 num_vfs)
  1589. {
  1590. struct i40iw_handler *hdl;
  1591. hdl = i40iw_find_i40e_handler(ldev);
  1592. if (!hdl)
  1593. return;
  1594. if (num_vfs > I40IW_MAX_PE_ENABLED_VF_COUNT)
  1595. hdl->device.max_enabled_vfs = I40IW_MAX_PE_ENABLED_VF_COUNT;
  1596. else
  1597. hdl->device.max_enabled_vfs = num_vfs;
  1598. }
  1599. /**
  1600. * i40iw_vf_capable - check if VF capable
  1601. * @ldev: lan device information
  1602. * @client: client interface instance
  1603. * @vf_id: virtual function id
  1604. *
  1605. * Return 1 if a VF slot is available or if VF is already RDMA enabled
  1606. * Return 0 otherwise
  1607. */
  1608. static int i40iw_vf_capable(struct i40e_info *ldev,
  1609. struct i40e_client *client,
  1610. u32 vf_id)
  1611. {
  1612. struct i40iw_handler *hdl;
  1613. struct i40iw_sc_dev *dev;
  1614. unsigned int i;
  1615. hdl = i40iw_find_i40e_handler(ldev);
  1616. if (!hdl)
  1617. return 0;
  1618. dev = &hdl->device.sc_dev;
  1619. for (i = 0; i < hdl->device.max_enabled_vfs; i++) {
  1620. if (!dev->vf_dev[i] || (dev->vf_dev[i]->vf_id == vf_id))
  1621. return 1;
  1622. }
  1623. return 0;
  1624. }
  1625. /**
  1626. * i40iw_virtchnl_receive - receive a message through the virtual channel
  1627. * @ldev: lan device information
  1628. * @client: client interface instance
  1629. * @vf_id: virtual function id associated with the message
  1630. * @msg: message buffer pointer
  1631. * @len: length of the message
  1632. *
  1633. * Invoke virtual channel receive operation for the given msg
  1634. * Return 0 if successful, otherwise return error
  1635. */
  1636. static int i40iw_virtchnl_receive(struct i40e_info *ldev,
  1637. struct i40e_client *client,
  1638. u32 vf_id,
  1639. u8 *msg,
  1640. u16 len)
  1641. {
  1642. struct i40iw_handler *hdl;
  1643. struct i40iw_sc_dev *dev;
  1644. struct i40iw_device *iwdev;
  1645. int ret_code = I40IW_NOT_SUPPORTED;
  1646. if (!len || !msg)
  1647. return I40IW_ERR_PARAM;
  1648. hdl = i40iw_find_i40e_handler(ldev);
  1649. if (!hdl)
  1650. return I40IW_ERR_PARAM;
  1651. dev = &hdl->device.sc_dev;
  1652. iwdev = dev->back_dev;
  1653. i40iw_debug(dev, I40IW_DEBUG_VIRT, "msg %p, message length %u\n", msg, len);
  1654. if (dev->vchnl_if.vchnl_recv) {
  1655. ret_code = dev->vchnl_if.vchnl_recv(dev, vf_id, msg, len);
  1656. if (!dev->is_pf) {
  1657. atomic_dec(&iwdev->vchnl_msgs);
  1658. wake_up(&iwdev->vchnl_waitq);
  1659. }
  1660. }
  1661. return ret_code;
  1662. }
  1663. /**
  1664. * i40iw_virtchnl_send - send a message through the virtual channel
  1665. * @dev: iwarp device
  1666. * @vf_id: virtual function id associated with the message
  1667. * @msg: virtual channel message buffer pointer
  1668. * @len: length of the message
  1669. *
  1670. * Invoke virtual channel send operation for the given msg
  1671. * Return 0 if successful, otherwise return error
  1672. */
  1673. static enum i40iw_status_code i40iw_virtchnl_send(struct i40iw_sc_dev *dev,
  1674. u32 vf_id,
  1675. u8 *msg,
  1676. u16 len)
  1677. {
  1678. struct i40iw_device *iwdev;
  1679. struct i40e_info *ldev;
  1680. enum i40iw_status_code ret_code = I40IW_ERR_BAD_PTR;
  1681. if (!dev || !dev->back_dev)
  1682. return ret_code;
  1683. iwdev = dev->back_dev;
  1684. ldev = iwdev->ldev;
  1685. if (ldev && ldev->ops && ldev->ops->virtchnl_send)
  1686. ret_code = ldev->ops->virtchnl_send(ldev, &i40iw_client, vf_id, msg, len);
  1687. return ret_code;
  1688. }
  1689. /* client interface functions */
  1690. static struct i40e_client_ops i40e_ops = {
  1691. .open = i40iw_open,
  1692. .close = i40iw_close,
  1693. .l2_param_change = i40iw_l2param_change,
  1694. .virtchnl_receive = i40iw_virtchnl_receive,
  1695. .vf_reset = i40iw_vf_reset,
  1696. .vf_enable = i40iw_vf_enable,
  1697. .vf_capable = i40iw_vf_capable
  1698. };
  1699. /**
  1700. * i40iw_init_module - driver initialization function
  1701. *
  1702. * First function to call when the driver is loaded
  1703. * Register the driver as i40e client and port mapper client
  1704. */
  1705. static int __init i40iw_init_module(void)
  1706. {
  1707. int ret;
  1708. memset(&i40iw_client, 0, sizeof(i40iw_client));
  1709. i40iw_client.version.major = CLIENT_IW_INTERFACE_VERSION_MAJOR;
  1710. i40iw_client.version.minor = CLIENT_IW_INTERFACE_VERSION_MINOR;
  1711. i40iw_client.version.build = CLIENT_IW_INTERFACE_VERSION_BUILD;
  1712. i40iw_client.ops = &i40e_ops;
  1713. memcpy(i40iw_client.name, i40iw_client_name, I40E_CLIENT_STR_LENGTH);
  1714. i40iw_client.type = I40E_CLIENT_IWARP;
  1715. spin_lock_init(&i40iw_handler_lock);
  1716. ret = i40e_register_client(&i40iw_client);
  1717. return ret;
  1718. }
  1719. /**
  1720. * i40iw_exit_module - driver exit clean up function
  1721. *
  1722. * The function is called just before the driver is unloaded
  1723. * Unregister the driver as i40e client and port mapper client
  1724. */
  1725. static void __exit i40iw_exit_module(void)
  1726. {
  1727. i40e_unregister_client(&i40iw_client);
  1728. }
  1729. module_init(i40iw_init_module);
  1730. module_exit(i40iw_exit_module);