etnaviv_drv.c 16 KB

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  1. /*
  2. * Copyright (C) 2015 Etnaviv Project
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License version 2 as published by
  6. * the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #include <linux/component.h>
  17. #include <linux/of_platform.h>
  18. #include "etnaviv_drv.h"
  19. #include "etnaviv_gpu.h"
  20. #include "etnaviv_gem.h"
  21. #include "etnaviv_mmu.h"
  22. #include "etnaviv_gem.h"
  23. #ifdef CONFIG_DRM_ETNAVIV_REGISTER_LOGGING
  24. static bool reglog;
  25. MODULE_PARM_DESC(reglog, "Enable register read/write logging");
  26. module_param(reglog, bool, 0600);
  27. #else
  28. #define reglog 0
  29. #endif
  30. void __iomem *etnaviv_ioremap(struct platform_device *pdev, const char *name,
  31. const char *dbgname)
  32. {
  33. struct resource *res;
  34. void __iomem *ptr;
  35. if (name)
  36. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  37. else
  38. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  39. ptr = devm_ioremap_resource(&pdev->dev, res);
  40. if (IS_ERR(ptr)) {
  41. dev_err(&pdev->dev, "failed to ioremap %s: %ld\n", name,
  42. PTR_ERR(ptr));
  43. return ptr;
  44. }
  45. if (reglog)
  46. dev_printk(KERN_DEBUG, &pdev->dev, "IO:region %s 0x%p %08zx\n",
  47. dbgname, ptr, (size_t)resource_size(res));
  48. return ptr;
  49. }
  50. void etnaviv_writel(u32 data, void __iomem *addr)
  51. {
  52. if (reglog)
  53. printk(KERN_DEBUG "IO:W %p %08x\n", addr, data);
  54. writel(data, addr);
  55. }
  56. u32 etnaviv_readl(const void __iomem *addr)
  57. {
  58. u32 val = readl(addr);
  59. if (reglog)
  60. printk(KERN_DEBUG "IO:R %p %08x\n", addr, val);
  61. return val;
  62. }
  63. /*
  64. * DRM operations:
  65. */
  66. static void load_gpu(struct drm_device *dev)
  67. {
  68. struct etnaviv_drm_private *priv = dev->dev_private;
  69. unsigned int i;
  70. for (i = 0; i < ETNA_MAX_PIPES; i++) {
  71. struct etnaviv_gpu *g = priv->gpu[i];
  72. if (g) {
  73. int ret;
  74. ret = etnaviv_gpu_init(g);
  75. if (ret) {
  76. dev_err(g->dev, "hw init failed: %d\n", ret);
  77. priv->gpu[i] = NULL;
  78. }
  79. }
  80. }
  81. }
  82. static int etnaviv_open(struct drm_device *dev, struct drm_file *file)
  83. {
  84. struct etnaviv_file_private *ctx;
  85. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  86. if (!ctx)
  87. return -ENOMEM;
  88. file->driver_priv = ctx;
  89. return 0;
  90. }
  91. static void etnaviv_preclose(struct drm_device *dev, struct drm_file *file)
  92. {
  93. struct etnaviv_drm_private *priv = dev->dev_private;
  94. struct etnaviv_file_private *ctx = file->driver_priv;
  95. unsigned int i;
  96. for (i = 0; i < ETNA_MAX_PIPES; i++) {
  97. struct etnaviv_gpu *gpu = priv->gpu[i];
  98. if (gpu) {
  99. mutex_lock(&gpu->lock);
  100. if (gpu->lastctx == ctx)
  101. gpu->lastctx = NULL;
  102. mutex_unlock(&gpu->lock);
  103. }
  104. }
  105. kfree(ctx);
  106. }
  107. /*
  108. * DRM debugfs:
  109. */
  110. #ifdef CONFIG_DEBUG_FS
  111. static int etnaviv_gem_show(struct drm_device *dev, struct seq_file *m)
  112. {
  113. struct etnaviv_drm_private *priv = dev->dev_private;
  114. etnaviv_gem_describe_objects(priv, m);
  115. return 0;
  116. }
  117. static int etnaviv_mm_show(struct drm_device *dev, struct seq_file *m)
  118. {
  119. int ret;
  120. read_lock(&dev->vma_offset_manager->vm_lock);
  121. ret = drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
  122. read_unlock(&dev->vma_offset_manager->vm_lock);
  123. return ret;
  124. }
  125. static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m)
  126. {
  127. seq_printf(m, "Active Objects (%s):\n", dev_name(gpu->dev));
  128. mutex_lock(&gpu->mmu->lock);
  129. drm_mm_dump_table(m, &gpu->mmu->mm);
  130. mutex_unlock(&gpu->mmu->lock);
  131. return 0;
  132. }
  133. static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m)
  134. {
  135. struct etnaviv_cmdbuf *buf = gpu->buffer;
  136. u32 size = buf->size;
  137. u32 *ptr = buf->vaddr;
  138. u32 i;
  139. seq_printf(m, "virt %p - phys 0x%llx - free 0x%08x\n",
  140. buf->vaddr, (u64)buf->paddr, size - buf->user_size);
  141. for (i = 0; i < size / 4; i++) {
  142. if (i && !(i % 4))
  143. seq_puts(m, "\n");
  144. if (i % 4 == 0)
  145. seq_printf(m, "\t0x%p: ", ptr + i);
  146. seq_printf(m, "%08x ", *(ptr + i));
  147. }
  148. seq_puts(m, "\n");
  149. }
  150. static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m)
  151. {
  152. seq_printf(m, "Ring Buffer (%s): ", dev_name(gpu->dev));
  153. mutex_lock(&gpu->lock);
  154. etnaviv_buffer_dump(gpu, m);
  155. mutex_unlock(&gpu->lock);
  156. return 0;
  157. }
  158. static int show_unlocked(struct seq_file *m, void *arg)
  159. {
  160. struct drm_info_node *node = (struct drm_info_node *) m->private;
  161. struct drm_device *dev = node->minor->dev;
  162. int (*show)(struct drm_device *dev, struct seq_file *m) =
  163. node->info_ent->data;
  164. return show(dev, m);
  165. }
  166. static int show_each_gpu(struct seq_file *m, void *arg)
  167. {
  168. struct drm_info_node *node = (struct drm_info_node *) m->private;
  169. struct drm_device *dev = node->minor->dev;
  170. struct etnaviv_drm_private *priv = dev->dev_private;
  171. struct etnaviv_gpu *gpu;
  172. int (*show)(struct etnaviv_gpu *gpu, struct seq_file *m) =
  173. node->info_ent->data;
  174. unsigned int i;
  175. int ret = 0;
  176. for (i = 0; i < ETNA_MAX_PIPES; i++) {
  177. gpu = priv->gpu[i];
  178. if (!gpu)
  179. continue;
  180. ret = show(gpu, m);
  181. if (ret < 0)
  182. break;
  183. }
  184. return ret;
  185. }
  186. static struct drm_info_list etnaviv_debugfs_list[] = {
  187. {"gpu", show_each_gpu, 0, etnaviv_gpu_debugfs},
  188. {"gem", show_unlocked, 0, etnaviv_gem_show},
  189. { "mm", show_unlocked, 0, etnaviv_mm_show },
  190. {"mmu", show_each_gpu, 0, etnaviv_mmu_show},
  191. {"ring", show_each_gpu, 0, etnaviv_ring_show},
  192. };
  193. static int etnaviv_debugfs_init(struct drm_minor *minor)
  194. {
  195. struct drm_device *dev = minor->dev;
  196. int ret;
  197. ret = drm_debugfs_create_files(etnaviv_debugfs_list,
  198. ARRAY_SIZE(etnaviv_debugfs_list),
  199. minor->debugfs_root, minor);
  200. if (ret) {
  201. dev_err(dev->dev, "could not install etnaviv_debugfs_list\n");
  202. return ret;
  203. }
  204. return ret;
  205. }
  206. static void etnaviv_debugfs_cleanup(struct drm_minor *minor)
  207. {
  208. drm_debugfs_remove_files(etnaviv_debugfs_list,
  209. ARRAY_SIZE(etnaviv_debugfs_list), minor);
  210. }
  211. #endif
  212. /*
  213. * DRM ioctls:
  214. */
  215. static int etnaviv_ioctl_get_param(struct drm_device *dev, void *data,
  216. struct drm_file *file)
  217. {
  218. struct etnaviv_drm_private *priv = dev->dev_private;
  219. struct drm_etnaviv_param *args = data;
  220. struct etnaviv_gpu *gpu;
  221. if (args->pipe >= ETNA_MAX_PIPES)
  222. return -EINVAL;
  223. gpu = priv->gpu[args->pipe];
  224. if (!gpu)
  225. return -ENXIO;
  226. return etnaviv_gpu_get_param(gpu, args->param, &args->value);
  227. }
  228. static int etnaviv_ioctl_gem_new(struct drm_device *dev, void *data,
  229. struct drm_file *file)
  230. {
  231. struct drm_etnaviv_gem_new *args = data;
  232. if (args->flags & ~(ETNA_BO_CACHED | ETNA_BO_WC | ETNA_BO_UNCACHED |
  233. ETNA_BO_FORCE_MMU))
  234. return -EINVAL;
  235. return etnaviv_gem_new_handle(dev, file, args->size,
  236. args->flags, &args->handle);
  237. }
  238. #define TS(t) ((struct timespec){ \
  239. .tv_sec = (t).tv_sec, \
  240. .tv_nsec = (t).tv_nsec \
  241. })
  242. static int etnaviv_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
  243. struct drm_file *file)
  244. {
  245. struct drm_etnaviv_gem_cpu_prep *args = data;
  246. struct drm_gem_object *obj;
  247. int ret;
  248. if (args->op & ~(ETNA_PREP_READ | ETNA_PREP_WRITE | ETNA_PREP_NOSYNC))
  249. return -EINVAL;
  250. obj = drm_gem_object_lookup(dev, file, args->handle);
  251. if (!obj)
  252. return -ENOENT;
  253. ret = etnaviv_gem_cpu_prep(obj, args->op, &TS(args->timeout));
  254. drm_gem_object_unreference_unlocked(obj);
  255. return ret;
  256. }
  257. static int etnaviv_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
  258. struct drm_file *file)
  259. {
  260. struct drm_etnaviv_gem_cpu_fini *args = data;
  261. struct drm_gem_object *obj;
  262. int ret;
  263. if (args->flags)
  264. return -EINVAL;
  265. obj = drm_gem_object_lookup(dev, file, args->handle);
  266. if (!obj)
  267. return -ENOENT;
  268. ret = etnaviv_gem_cpu_fini(obj);
  269. drm_gem_object_unreference_unlocked(obj);
  270. return ret;
  271. }
  272. static int etnaviv_ioctl_gem_info(struct drm_device *dev, void *data,
  273. struct drm_file *file)
  274. {
  275. struct drm_etnaviv_gem_info *args = data;
  276. struct drm_gem_object *obj;
  277. int ret;
  278. if (args->pad)
  279. return -EINVAL;
  280. obj = drm_gem_object_lookup(dev, file, args->handle);
  281. if (!obj)
  282. return -ENOENT;
  283. ret = etnaviv_gem_mmap_offset(obj, &args->offset);
  284. drm_gem_object_unreference_unlocked(obj);
  285. return ret;
  286. }
  287. static int etnaviv_ioctl_wait_fence(struct drm_device *dev, void *data,
  288. struct drm_file *file)
  289. {
  290. struct drm_etnaviv_wait_fence *args = data;
  291. struct etnaviv_drm_private *priv = dev->dev_private;
  292. struct timespec *timeout = &TS(args->timeout);
  293. struct etnaviv_gpu *gpu;
  294. if (args->flags & ~(ETNA_WAIT_NONBLOCK))
  295. return -EINVAL;
  296. if (args->pipe >= ETNA_MAX_PIPES)
  297. return -EINVAL;
  298. gpu = priv->gpu[args->pipe];
  299. if (!gpu)
  300. return -ENXIO;
  301. if (args->flags & ETNA_WAIT_NONBLOCK)
  302. timeout = NULL;
  303. return etnaviv_gpu_wait_fence_interruptible(gpu, args->fence,
  304. timeout);
  305. }
  306. static int etnaviv_ioctl_gem_userptr(struct drm_device *dev, void *data,
  307. struct drm_file *file)
  308. {
  309. struct drm_etnaviv_gem_userptr *args = data;
  310. int access;
  311. if (args->flags & ~(ETNA_USERPTR_READ|ETNA_USERPTR_WRITE) ||
  312. args->flags == 0)
  313. return -EINVAL;
  314. if (offset_in_page(args->user_ptr | args->user_size) ||
  315. (uintptr_t)args->user_ptr != args->user_ptr ||
  316. (u32)args->user_size != args->user_size ||
  317. args->user_ptr & ~PAGE_MASK)
  318. return -EINVAL;
  319. if (args->flags & ETNA_USERPTR_WRITE)
  320. access = VERIFY_WRITE;
  321. else
  322. access = VERIFY_READ;
  323. if (!access_ok(access, (void __user *)(unsigned long)args->user_ptr,
  324. args->user_size))
  325. return -EFAULT;
  326. return etnaviv_gem_new_userptr(dev, file, args->user_ptr,
  327. args->user_size, args->flags,
  328. &args->handle);
  329. }
  330. static int etnaviv_ioctl_gem_wait(struct drm_device *dev, void *data,
  331. struct drm_file *file)
  332. {
  333. struct etnaviv_drm_private *priv = dev->dev_private;
  334. struct drm_etnaviv_gem_wait *args = data;
  335. struct timespec *timeout = &TS(args->timeout);
  336. struct drm_gem_object *obj;
  337. struct etnaviv_gpu *gpu;
  338. int ret;
  339. if (args->flags & ~(ETNA_WAIT_NONBLOCK))
  340. return -EINVAL;
  341. if (args->pipe >= ETNA_MAX_PIPES)
  342. return -EINVAL;
  343. gpu = priv->gpu[args->pipe];
  344. if (!gpu)
  345. return -ENXIO;
  346. obj = drm_gem_object_lookup(dev, file, args->handle);
  347. if (!obj)
  348. return -ENOENT;
  349. if (args->flags & ETNA_WAIT_NONBLOCK)
  350. timeout = NULL;
  351. ret = etnaviv_gem_wait_bo(gpu, obj, timeout);
  352. drm_gem_object_unreference_unlocked(obj);
  353. return ret;
  354. }
  355. static const struct drm_ioctl_desc etnaviv_ioctls[] = {
  356. #define ETNA_IOCTL(n, func, flags) \
  357. DRM_IOCTL_DEF_DRV(ETNAVIV_##n, etnaviv_ioctl_##func, flags)
  358. ETNA_IOCTL(GET_PARAM, get_param, DRM_AUTH|DRM_RENDER_ALLOW),
  359. ETNA_IOCTL(GEM_NEW, gem_new, DRM_AUTH|DRM_RENDER_ALLOW),
  360. ETNA_IOCTL(GEM_INFO, gem_info, DRM_AUTH|DRM_RENDER_ALLOW),
  361. ETNA_IOCTL(GEM_CPU_PREP, gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  362. ETNA_IOCTL(GEM_CPU_FINI, gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  363. ETNA_IOCTL(GEM_SUBMIT, gem_submit, DRM_AUTH|DRM_RENDER_ALLOW),
  364. ETNA_IOCTL(WAIT_FENCE, wait_fence, DRM_AUTH|DRM_RENDER_ALLOW),
  365. ETNA_IOCTL(GEM_USERPTR, gem_userptr, DRM_AUTH|DRM_RENDER_ALLOW),
  366. ETNA_IOCTL(GEM_WAIT, gem_wait, DRM_AUTH|DRM_RENDER_ALLOW),
  367. };
  368. static const struct vm_operations_struct vm_ops = {
  369. .fault = etnaviv_gem_fault,
  370. .open = drm_gem_vm_open,
  371. .close = drm_gem_vm_close,
  372. };
  373. static const struct file_operations fops = {
  374. .owner = THIS_MODULE,
  375. .open = drm_open,
  376. .release = drm_release,
  377. .unlocked_ioctl = drm_ioctl,
  378. #ifdef CONFIG_COMPAT
  379. .compat_ioctl = drm_compat_ioctl,
  380. #endif
  381. .poll = drm_poll,
  382. .read = drm_read,
  383. .llseek = no_llseek,
  384. .mmap = etnaviv_gem_mmap,
  385. };
  386. static struct drm_driver etnaviv_drm_driver = {
  387. .driver_features = DRIVER_HAVE_IRQ |
  388. DRIVER_GEM |
  389. DRIVER_PRIME |
  390. DRIVER_RENDER,
  391. .open = etnaviv_open,
  392. .preclose = etnaviv_preclose,
  393. .set_busid = drm_platform_set_busid,
  394. .gem_free_object = etnaviv_gem_free_object,
  395. .gem_vm_ops = &vm_ops,
  396. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  397. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  398. .gem_prime_export = drm_gem_prime_export,
  399. .gem_prime_import = drm_gem_prime_import,
  400. .gem_prime_pin = etnaviv_gem_prime_pin,
  401. .gem_prime_unpin = etnaviv_gem_prime_unpin,
  402. .gem_prime_get_sg_table = etnaviv_gem_prime_get_sg_table,
  403. .gem_prime_import_sg_table = etnaviv_gem_prime_import_sg_table,
  404. .gem_prime_vmap = etnaviv_gem_prime_vmap,
  405. .gem_prime_vunmap = etnaviv_gem_prime_vunmap,
  406. #ifdef CONFIG_DEBUG_FS
  407. .debugfs_init = etnaviv_debugfs_init,
  408. .debugfs_cleanup = etnaviv_debugfs_cleanup,
  409. #endif
  410. .ioctls = etnaviv_ioctls,
  411. .num_ioctls = DRM_ETNAVIV_NUM_IOCTLS,
  412. .fops = &fops,
  413. .name = "etnaviv",
  414. .desc = "etnaviv DRM",
  415. .date = "20151214",
  416. .major = 1,
  417. .minor = 0,
  418. };
  419. /*
  420. * Platform driver:
  421. */
  422. static int etnaviv_bind(struct device *dev)
  423. {
  424. struct etnaviv_drm_private *priv;
  425. struct drm_device *drm;
  426. int ret;
  427. drm = drm_dev_alloc(&etnaviv_drm_driver, dev);
  428. if (!drm)
  429. return -ENOMEM;
  430. drm->platformdev = to_platform_device(dev);
  431. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  432. if (!priv) {
  433. dev_err(dev, "failed to allocate private data\n");
  434. ret = -ENOMEM;
  435. goto out_unref;
  436. }
  437. drm->dev_private = priv;
  438. priv->wq = alloc_ordered_workqueue("etnaviv", 0);
  439. if (!priv->wq) {
  440. ret = -ENOMEM;
  441. goto out_wq;
  442. }
  443. mutex_init(&priv->gem_lock);
  444. INIT_LIST_HEAD(&priv->gem_list);
  445. priv->num_gpus = 0;
  446. dev_set_drvdata(dev, drm);
  447. ret = component_bind_all(dev, drm);
  448. if (ret < 0)
  449. goto out_bind;
  450. load_gpu(drm);
  451. ret = drm_dev_register(drm, 0);
  452. if (ret)
  453. goto out_register;
  454. return 0;
  455. out_register:
  456. component_unbind_all(dev, drm);
  457. out_bind:
  458. flush_workqueue(priv->wq);
  459. destroy_workqueue(priv->wq);
  460. out_wq:
  461. kfree(priv);
  462. out_unref:
  463. drm_dev_unref(drm);
  464. return ret;
  465. }
  466. static void etnaviv_unbind(struct device *dev)
  467. {
  468. struct drm_device *drm = dev_get_drvdata(dev);
  469. struct etnaviv_drm_private *priv = drm->dev_private;
  470. drm_dev_unregister(drm);
  471. flush_workqueue(priv->wq);
  472. destroy_workqueue(priv->wq);
  473. component_unbind_all(dev, drm);
  474. drm->dev_private = NULL;
  475. kfree(priv);
  476. drm_put_dev(drm);
  477. }
  478. static const struct component_master_ops etnaviv_master_ops = {
  479. .bind = etnaviv_bind,
  480. .unbind = etnaviv_unbind,
  481. };
  482. static int compare_of(struct device *dev, void *data)
  483. {
  484. struct device_node *np = data;
  485. return dev->of_node == np;
  486. }
  487. static int compare_str(struct device *dev, void *data)
  488. {
  489. return !strcmp(dev_name(dev), data);
  490. }
  491. static int etnaviv_pdev_probe(struct platform_device *pdev)
  492. {
  493. struct device *dev = &pdev->dev;
  494. struct device_node *node = dev->of_node;
  495. struct component_match *match = NULL;
  496. dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  497. if (node) {
  498. struct device_node *core_node;
  499. int i;
  500. for (i = 0; ; i++) {
  501. core_node = of_parse_phandle(node, "cores", i);
  502. if (!core_node)
  503. break;
  504. component_match_add(&pdev->dev, &match, compare_of,
  505. core_node);
  506. of_node_put(core_node);
  507. }
  508. } else if (dev->platform_data) {
  509. char **names = dev->platform_data;
  510. unsigned i;
  511. for (i = 0; names[i]; i++)
  512. component_match_add(dev, &match, compare_str, names[i]);
  513. }
  514. return component_master_add_with_match(dev, &etnaviv_master_ops, match);
  515. }
  516. static int etnaviv_pdev_remove(struct platform_device *pdev)
  517. {
  518. component_master_del(&pdev->dev, &etnaviv_master_ops);
  519. return 0;
  520. }
  521. static const struct of_device_id dt_match[] = {
  522. { .compatible = "fsl,imx-gpu-subsystem" },
  523. { .compatible = "marvell,dove-gpu-subsystem" },
  524. {}
  525. };
  526. MODULE_DEVICE_TABLE(of, dt_match);
  527. static struct platform_driver etnaviv_platform_driver = {
  528. .probe = etnaviv_pdev_probe,
  529. .remove = etnaviv_pdev_remove,
  530. .driver = {
  531. .name = "etnaviv",
  532. .of_match_table = dt_match,
  533. },
  534. };
  535. static int __init etnaviv_init(void)
  536. {
  537. int ret;
  538. etnaviv_validate_init();
  539. ret = platform_driver_register(&etnaviv_gpu_driver);
  540. if (ret != 0)
  541. return ret;
  542. ret = platform_driver_register(&etnaviv_platform_driver);
  543. if (ret != 0)
  544. platform_driver_unregister(&etnaviv_gpu_driver);
  545. return ret;
  546. }
  547. module_init(etnaviv_init);
  548. static void __exit etnaviv_exit(void)
  549. {
  550. platform_driver_unregister(&etnaviv_gpu_driver);
  551. platform_driver_unregister(&etnaviv_platform_driver);
  552. }
  553. module_exit(etnaviv_exit);
  554. MODULE_AUTHOR("Christian Gmeiner <christian.gmeiner@gmail.com>");
  555. MODULE_AUTHOR("Russell King <rmk+kernel@arm.linux.org.uk>");
  556. MODULE_AUTHOR("Lucas Stach <l.stach@pengutronix.de>");
  557. MODULE_DESCRIPTION("etnaviv DRM Driver");
  558. MODULE_LICENSE("GPL v2");
  559. MODULE_ALIAS("platform:etnaviv");