gpio-menz127.c 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199
  1. /*
  2. * MEN 16Z127 GPIO driver
  3. *
  4. * Copyright (C) 2016 MEN Mikroelektronik GmbH (www.men.de)
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; version 2 of the License.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/io.h>
  13. #include <linux/err.h>
  14. #include <linux/mcb.h>
  15. #include <linux/bitops.h>
  16. #include <linux/gpio/driver.h>
  17. #define MEN_Z127_CTRL 0x00
  18. #define MEN_Z127_PSR 0x04
  19. #define MEN_Z127_IRQR 0x08
  20. #define MEN_Z127_GPIODR 0x0c
  21. #define MEN_Z127_IER1 0x10
  22. #define MEN_Z127_IER2 0x14
  23. #define MEN_Z127_DBER 0x18
  24. #define MEN_Z127_ODER 0x1C
  25. #define GPIO_TO_DBCNT_REG(gpio) ((gpio * 4) + 0x80)
  26. #define MEN_Z127_DB_MIN_US 50
  27. /* 16 bit compare register. Each bit represents 50us */
  28. #define MEN_Z127_DB_MAX_US (0xffff * MEN_Z127_DB_MIN_US)
  29. #define MEN_Z127_DB_IN_RANGE(db) ((db >= MEN_Z127_DB_MIN_US) && \
  30. (db <= MEN_Z127_DB_MAX_US))
  31. struct men_z127_gpio {
  32. struct gpio_chip gc;
  33. void __iomem *reg_base;
  34. struct mcb_device *mdev;
  35. struct resource *mem;
  36. };
  37. static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio,
  38. unsigned debounce)
  39. {
  40. struct men_z127_gpio *priv = gpiochip_get_data(gc);
  41. struct device *dev = &priv->mdev->dev;
  42. unsigned int rnd;
  43. u32 db_en, db_cnt;
  44. if (!MEN_Z127_DB_IN_RANGE(debounce)) {
  45. dev_err(dev, "debounce value %u out of range", debounce);
  46. return -EINVAL;
  47. }
  48. if (debounce > 0) {
  49. /* round up or down depending on MSB-1 */
  50. rnd = fls(debounce) - 1;
  51. if (rnd && (debounce & BIT(rnd - 1)))
  52. debounce = round_up(debounce, MEN_Z127_DB_MIN_US);
  53. else
  54. debounce = round_down(debounce, MEN_Z127_DB_MIN_US);
  55. if (debounce > MEN_Z127_DB_MAX_US)
  56. debounce = MEN_Z127_DB_MAX_US;
  57. /* 50us per register unit */
  58. debounce /= 50;
  59. }
  60. spin_lock(&gc->bgpio_lock);
  61. db_en = readl(priv->reg_base + MEN_Z127_DBER);
  62. if (debounce == 0) {
  63. db_en &= ~BIT(gpio);
  64. db_cnt = 0;
  65. } else {
  66. db_en |= BIT(gpio);
  67. db_cnt = debounce;
  68. }
  69. writel(db_en, priv->reg_base + MEN_Z127_DBER);
  70. writel(db_cnt, priv->reg_base + GPIO_TO_DBCNT_REG(gpio));
  71. spin_unlock(&gc->bgpio_lock);
  72. return 0;
  73. }
  74. static int men_z127_request(struct gpio_chip *gc, unsigned gpio_pin)
  75. {
  76. struct men_z127_gpio *priv = gpiochip_get_data(gc);
  77. u32 od_en;
  78. if (gpio_pin >= gc->ngpio)
  79. return -EINVAL;
  80. spin_lock(&gc->bgpio_lock);
  81. od_en = readl(priv->reg_base + MEN_Z127_ODER);
  82. if (gpiochip_line_is_open_drain(gc, gpio_pin))
  83. od_en |= BIT(gpio_pin);
  84. else
  85. od_en &= ~BIT(gpio_pin);
  86. writel(od_en, priv->reg_base + MEN_Z127_ODER);
  87. spin_unlock(&gc->bgpio_lock);
  88. return 0;
  89. }
  90. static int men_z127_probe(struct mcb_device *mdev,
  91. const struct mcb_device_id *id)
  92. {
  93. struct men_z127_gpio *men_z127_gpio;
  94. struct device *dev = &mdev->dev;
  95. int ret;
  96. men_z127_gpio = devm_kzalloc(dev, sizeof(struct men_z127_gpio),
  97. GFP_KERNEL);
  98. if (!men_z127_gpio)
  99. return -ENOMEM;
  100. men_z127_gpio->mem = mcb_request_mem(mdev, dev_name(dev));
  101. if (IS_ERR(men_z127_gpio->mem)) {
  102. dev_err(dev, "failed to request device memory");
  103. return PTR_ERR(men_z127_gpio->mem);
  104. }
  105. men_z127_gpio->reg_base = ioremap(men_z127_gpio->mem->start,
  106. resource_size(men_z127_gpio->mem));
  107. if (men_z127_gpio->reg_base == NULL) {
  108. ret = -ENXIO;
  109. goto err_release;
  110. }
  111. men_z127_gpio->mdev = mdev;
  112. mcb_set_drvdata(mdev, men_z127_gpio);
  113. ret = bgpio_init(&men_z127_gpio->gc, &mdev->dev, 4,
  114. men_z127_gpio->reg_base + MEN_Z127_PSR,
  115. men_z127_gpio->reg_base + MEN_Z127_CTRL,
  116. NULL,
  117. men_z127_gpio->reg_base + MEN_Z127_GPIODR,
  118. NULL, 0);
  119. if (ret)
  120. goto err_unmap;
  121. men_z127_gpio->gc.set_debounce = men_z127_debounce;
  122. men_z127_gpio->gc.request = men_z127_request;
  123. ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio);
  124. if (ret) {
  125. dev_err(dev, "failed to register MEN 16Z127 GPIO controller");
  126. goto err_unmap;
  127. }
  128. dev_info(dev, "MEN 16Z127 GPIO driver registered");
  129. return 0;
  130. err_unmap:
  131. iounmap(men_z127_gpio->reg_base);
  132. err_release:
  133. mcb_release_mem(men_z127_gpio->mem);
  134. return ret;
  135. }
  136. static void men_z127_remove(struct mcb_device *mdev)
  137. {
  138. struct men_z127_gpio *men_z127_gpio = mcb_get_drvdata(mdev);
  139. gpiochip_remove(&men_z127_gpio->gc);
  140. iounmap(men_z127_gpio->reg_base);
  141. mcb_release_mem(men_z127_gpio->mem);
  142. }
  143. static const struct mcb_device_id men_z127_ids[] = {
  144. { .device = 0x7f },
  145. { }
  146. };
  147. MODULE_DEVICE_TABLE(mcb, men_z127_ids);
  148. static struct mcb_driver men_z127_driver = {
  149. .driver = {
  150. .name = "z127-gpio",
  151. .owner = THIS_MODULE,
  152. },
  153. .probe = men_z127_probe,
  154. .remove = men_z127_remove,
  155. .id_table = men_z127_ids,
  156. };
  157. module_mcb_driver(men_z127_driver);
  158. MODULE_AUTHOR("Andreas Werner <andreas.werner@men.de>");
  159. MODULE_DESCRIPTION("MEN 16z127 GPIO Controller");
  160. MODULE_LICENSE("GPL v2");
  161. MODULE_ALIAS("mcb:16z127");