gpio-it87.c 9.0 KB

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  1. /*
  2. * GPIO interface for IT87xx Super I/O chips
  3. *
  4. * Author: Diego Elio Pettenò <flameeyes@flameeyes.eu>
  5. *
  6. * Based on it87_wdt.c by Oliver Schuster
  7. * gpio-it8761e.c by Denis Turischev
  8. * gpio-stmpe.c by Rabin Vincent
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License 2 as published
  12. * by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; see the file COPYING. If not, write to
  21. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/io.h>
  28. #include <linux/errno.h>
  29. #include <linux/ioport.h>
  30. #include <linux/slab.h>
  31. #include <linux/gpio.h>
  32. /* Chip Id numbers */
  33. #define NO_DEV_ID 0xffff
  34. #define IT8728_ID 0x8728
  35. #define IT8732_ID 0x8732
  36. #define IT8761_ID 0x8761
  37. /* IO Ports */
  38. #define REG 0x2e
  39. #define VAL 0x2f
  40. /* Logical device Numbers LDN */
  41. #define GPIO 0x07
  42. /* Configuration Registers and Functions */
  43. #define LDNREG 0x07
  44. #define CHIPID 0x20
  45. #define CHIPREV 0x22
  46. /**
  47. * struct it87_gpio - it87-specific GPIO chip
  48. * @chip the underlying gpio_chip structure
  49. * @lock a lock to avoid races between operations
  50. * @io_base base address for gpio ports
  51. * @io_size size of the port rage starting from io_base.
  52. * @output_base Super I/O register address for Output Enable register
  53. * @simple_base Super I/O 'Simple I/O' Enable register
  54. * @simple_size Super IO 'Simple I/O' Enable register size; this is
  55. * required because IT87xx chips might only provide Simple I/O
  56. * switches on a subset of lines, whereas the others keep the
  57. * same status all time.
  58. */
  59. struct it87_gpio {
  60. struct gpio_chip chip;
  61. spinlock_t lock;
  62. u16 io_base;
  63. u16 io_size;
  64. u8 output_base;
  65. u8 simple_base;
  66. u8 simple_size;
  67. };
  68. static struct it87_gpio it87_gpio_chip = {
  69. .lock = __SPIN_LOCK_UNLOCKED(it87_gpio_chip.lock),
  70. };
  71. /* Superio chip access functions; copied from wdt_it87 */
  72. static inline int superio_enter(void)
  73. {
  74. /*
  75. * Try to reserve REG and REG + 1 for exclusive access.
  76. */
  77. if (!request_muxed_region(REG, 2, KBUILD_MODNAME))
  78. return -EBUSY;
  79. outb(0x87, REG);
  80. outb(0x01, REG);
  81. outb(0x55, REG);
  82. outb(0x55, REG);
  83. return 0;
  84. }
  85. static inline void superio_exit(void)
  86. {
  87. outb(0x02, REG);
  88. outb(0x02, VAL);
  89. release_region(REG, 2);
  90. }
  91. static inline void superio_select(int ldn)
  92. {
  93. outb(LDNREG, REG);
  94. outb(ldn, VAL);
  95. }
  96. static inline int superio_inb(int reg)
  97. {
  98. outb(reg, REG);
  99. return inb(VAL);
  100. }
  101. static inline void superio_outb(int val, int reg)
  102. {
  103. outb(reg, REG);
  104. outb(val, VAL);
  105. }
  106. static inline int superio_inw(int reg)
  107. {
  108. int val;
  109. outb(reg++, REG);
  110. val = inb(VAL) << 8;
  111. outb(reg, REG);
  112. val |= inb(VAL);
  113. return val;
  114. }
  115. static inline void superio_outw(int val, int reg)
  116. {
  117. outb(reg++, REG);
  118. outb(val >> 8, VAL);
  119. outb(reg, REG);
  120. outb(val, VAL);
  121. }
  122. static inline void superio_set_mask(int mask, int reg)
  123. {
  124. u8 curr_val = superio_inb(reg);
  125. u8 new_val = curr_val | mask;
  126. if (curr_val != new_val)
  127. superio_outb(new_val, reg);
  128. }
  129. static inline void superio_clear_mask(int mask, int reg)
  130. {
  131. u8 curr_val = superio_inb(reg);
  132. u8 new_val = curr_val & ~mask;
  133. if (curr_val != new_val)
  134. superio_outb(new_val, reg);
  135. }
  136. static int it87_gpio_request(struct gpio_chip *chip, unsigned gpio_num)
  137. {
  138. u8 mask, group;
  139. int rc = 0;
  140. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  141. mask = 1 << (gpio_num % 8);
  142. group = (gpio_num / 8);
  143. spin_lock(&it87_gpio->lock);
  144. rc = superio_enter();
  145. if (rc)
  146. goto exit;
  147. /* not all the IT87xx chips support Simple I/O and not all of
  148. * them allow all the lines to be set/unset to Simple I/O.
  149. */
  150. if (group < it87_gpio->simple_size)
  151. superio_set_mask(mask, group + it87_gpio->simple_base);
  152. /* clear output enable, setting the pin to input, as all the
  153. * newly-exported GPIO interfaces are set to input.
  154. */
  155. superio_clear_mask(mask, group + it87_gpio->output_base);
  156. superio_exit();
  157. exit:
  158. spin_unlock(&it87_gpio->lock);
  159. return rc;
  160. }
  161. static int it87_gpio_get(struct gpio_chip *chip, unsigned gpio_num)
  162. {
  163. u16 reg;
  164. u8 mask;
  165. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  166. mask = 1 << (gpio_num % 8);
  167. reg = (gpio_num / 8) + it87_gpio->io_base;
  168. return !!(inb(reg) & mask);
  169. }
  170. static int it87_gpio_direction_in(struct gpio_chip *chip, unsigned gpio_num)
  171. {
  172. u8 mask, group;
  173. int rc = 0;
  174. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  175. mask = 1 << (gpio_num % 8);
  176. group = (gpio_num / 8);
  177. spin_lock(&it87_gpio->lock);
  178. rc = superio_enter();
  179. if (rc)
  180. goto exit;
  181. /* clear the output enable bit */
  182. superio_clear_mask(mask, group + it87_gpio->output_base);
  183. superio_exit();
  184. exit:
  185. spin_unlock(&it87_gpio->lock);
  186. return rc;
  187. }
  188. static void it87_gpio_set(struct gpio_chip *chip,
  189. unsigned gpio_num, int val)
  190. {
  191. u8 mask, curr_vals;
  192. u16 reg;
  193. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  194. mask = 1 << (gpio_num % 8);
  195. reg = (gpio_num / 8) + it87_gpio->io_base;
  196. curr_vals = inb(reg);
  197. if (val)
  198. outb(curr_vals | mask, reg);
  199. else
  200. outb(curr_vals & ~mask, reg);
  201. }
  202. static int it87_gpio_direction_out(struct gpio_chip *chip,
  203. unsigned gpio_num, int val)
  204. {
  205. u8 mask, group;
  206. int rc = 0;
  207. struct it87_gpio *it87_gpio = gpiochip_get_data(chip);
  208. mask = 1 << (gpio_num % 8);
  209. group = (gpio_num / 8);
  210. spin_lock(&it87_gpio->lock);
  211. rc = superio_enter();
  212. if (rc)
  213. goto exit;
  214. /* set the output enable bit */
  215. superio_set_mask(mask, group + it87_gpio->output_base);
  216. it87_gpio_set(chip, gpio_num, val);
  217. superio_exit();
  218. exit:
  219. spin_unlock(&it87_gpio->lock);
  220. return rc;
  221. }
  222. static struct gpio_chip it87_template_chip = {
  223. .label = KBUILD_MODNAME,
  224. .owner = THIS_MODULE,
  225. .request = it87_gpio_request,
  226. .get = it87_gpio_get,
  227. .direction_input = it87_gpio_direction_in,
  228. .set = it87_gpio_set,
  229. .direction_output = it87_gpio_direction_out,
  230. .base = -1
  231. };
  232. static int __init it87_gpio_init(void)
  233. {
  234. int rc = 0, i;
  235. u16 chip_type;
  236. u8 chip_rev, gpio_ba_reg;
  237. char *labels, **labels_table;
  238. struct it87_gpio *it87_gpio = &it87_gpio_chip;
  239. rc = superio_enter();
  240. if (rc)
  241. return rc;
  242. chip_type = superio_inw(CHIPID);
  243. chip_rev = superio_inb(CHIPREV) & 0x0f;
  244. superio_exit();
  245. it87_gpio->chip = it87_template_chip;
  246. switch (chip_type) {
  247. case IT8728_ID:
  248. case IT8732_ID:
  249. gpio_ba_reg = 0x62;
  250. it87_gpio->io_size = 8;
  251. it87_gpio->output_base = 0xc8;
  252. it87_gpio->simple_base = 0xc0;
  253. it87_gpio->simple_size = 5;
  254. it87_gpio->chip.ngpio = 64;
  255. break;
  256. case IT8761_ID:
  257. gpio_ba_reg = 0x60;
  258. it87_gpio->io_size = 4;
  259. it87_gpio->output_base = 0xf0;
  260. it87_gpio->simple_size = 0;
  261. it87_gpio->chip.ngpio = 16;
  262. break;
  263. case NO_DEV_ID:
  264. pr_err("no device\n");
  265. return -ENODEV;
  266. default:
  267. pr_err("Unknown Chip found, Chip %04x Revision %x\n",
  268. chip_type, chip_rev);
  269. return -ENODEV;
  270. }
  271. rc = superio_enter();
  272. if (rc)
  273. return rc;
  274. superio_select(GPIO);
  275. /* fetch GPIO base address */
  276. it87_gpio->io_base = superio_inw(gpio_ba_reg);
  277. superio_exit();
  278. pr_info("Found Chip IT%04x rev %x. %u GPIO lines starting at %04xh\n",
  279. chip_type, chip_rev, it87_gpio->chip.ngpio,
  280. it87_gpio->io_base);
  281. if (!request_region(it87_gpio->io_base, it87_gpio->io_size,
  282. KBUILD_MODNAME))
  283. return -EBUSY;
  284. /* Set up aliases for the GPIO connection.
  285. *
  286. * ITE documentation for recent chips such as the IT8728F
  287. * refers to the GPIO lines as GPxy, with a coordinates system
  288. * where x is the GPIO group (starting from 1) and y is the
  289. * bit within the group.
  290. *
  291. * By creating these aliases, we make it easier to understand
  292. * to which GPIO pin we're referring to.
  293. */
  294. labels = kcalloc(it87_gpio->chip.ngpio, sizeof("it87_gpXY"),
  295. GFP_KERNEL);
  296. labels_table = kcalloc(it87_gpio->chip.ngpio, sizeof(const char *),
  297. GFP_KERNEL);
  298. if (!labels || !labels_table) {
  299. rc = -ENOMEM;
  300. goto labels_free;
  301. }
  302. for (i = 0; i < it87_gpio->chip.ngpio; i++) {
  303. char *label = &labels[i * sizeof("it87_gpXY")];
  304. sprintf(label, "it87_gp%u%u", 1+(i/8), i%8);
  305. labels_table[i] = label;
  306. }
  307. it87_gpio->chip.names = (const char *const*)labels_table;
  308. rc = gpiochip_add_data(&it87_gpio->chip, it87_gpio);
  309. if (rc)
  310. goto labels_free;
  311. return 0;
  312. labels_free:
  313. kfree(labels_table);
  314. kfree(labels);
  315. release_region(it87_gpio->io_base, it87_gpio->io_size);
  316. return rc;
  317. }
  318. static void __exit it87_gpio_exit(void)
  319. {
  320. struct it87_gpio *it87_gpio = &it87_gpio_chip;
  321. gpiochip_remove(&it87_gpio->chip);
  322. release_region(it87_gpio->io_base, it87_gpio->io_size);
  323. kfree(it87_gpio->chip.names[0]);
  324. kfree(it87_gpio->chip.names);
  325. }
  326. module_init(it87_gpio_init);
  327. module_exit(it87_gpio_exit);
  328. MODULE_AUTHOR("Diego Elio Pettenò <flameeyes@flameeyes.eu>");
  329. MODULE_DESCRIPTION("GPIO interface for IT87xx Super I/O chips");
  330. MODULE_LICENSE("GPL");