gpio-104-idi-48.c 8.1 KB

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  1. /*
  2. * GPIO driver for the ACCES 104-IDI-48 family
  3. * Copyright (C) 2015 William Breathitt Gray
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License, version 2, as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. */
  14. #include <linux/bitops.h>
  15. #include <linux/device.h>
  16. #include <linux/errno.h>
  17. #include <linux/gpio/driver.h>
  18. #include <linux/io.h>
  19. #include <linux/ioport.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/irqdesc.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/spinlock.h>
  27. static unsigned idi_48_base;
  28. module_param(idi_48_base, uint, 0);
  29. MODULE_PARM_DESC(idi_48_base, "ACCES 104-IDI-48 base address");
  30. static unsigned idi_48_irq;
  31. module_param(idi_48_irq, uint, 0);
  32. MODULE_PARM_DESC(idi_48_irq, "ACCES 104-IDI-48 interrupt line number");
  33. /**
  34. * struct idi_48_gpio - GPIO device private data structure
  35. * @chip: instance of the gpio_chip
  36. * @lock: synchronization lock to prevent I/O race conditions
  37. * @ack_lock: synchronization lock to prevent IRQ handler race conditions
  38. * @irq_mask: input bits affected by interrupts
  39. * @base: base port address of the GPIO device
  40. * @irq: Interrupt line number
  41. * @cos_enb: Change-Of-State IRQ enable boundaries mask
  42. */
  43. struct idi_48_gpio {
  44. struct gpio_chip chip;
  45. spinlock_t lock;
  46. spinlock_t ack_lock;
  47. unsigned char irq_mask[6];
  48. unsigned base;
  49. unsigned irq;
  50. unsigned char cos_enb;
  51. };
  52. static int idi_48_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
  53. {
  54. return 1;
  55. }
  56. static int idi_48_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  57. {
  58. return 0;
  59. }
  60. static int idi_48_gpio_get(struct gpio_chip *chip, unsigned offset)
  61. {
  62. struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip);
  63. unsigned i;
  64. const unsigned register_offset[6] = { 0, 1, 2, 4, 5, 6 };
  65. unsigned base_offset;
  66. unsigned mask;
  67. for (i = 0; i < 48; i += 8)
  68. if (offset < i + 8) {
  69. base_offset = register_offset[i / 8];
  70. mask = BIT(offset - i);
  71. return !!(inb(idi48gpio->base + base_offset) & mask);
  72. }
  73. /* The following line should never execute since offset < 48 */
  74. return 0;
  75. }
  76. static void idi_48_irq_ack(struct irq_data *data)
  77. {
  78. }
  79. static void idi_48_irq_mask(struct irq_data *data)
  80. {
  81. struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
  82. struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip);
  83. const unsigned offset = irqd_to_hwirq(data);
  84. unsigned i;
  85. unsigned mask;
  86. unsigned boundary;
  87. unsigned long flags;
  88. for (i = 0; i < 48; i += 8)
  89. if (offset < i + 8) {
  90. mask = BIT(offset - i);
  91. boundary = i / 8;
  92. idi48gpio->irq_mask[boundary] &= ~mask;
  93. if (!idi48gpio->irq_mask[boundary]) {
  94. idi48gpio->cos_enb &= ~BIT(boundary);
  95. spin_lock_irqsave(&idi48gpio->lock, flags);
  96. outb(idi48gpio->cos_enb, idi48gpio->base + 7);
  97. spin_unlock_irqrestore(&idi48gpio->lock, flags);
  98. }
  99. return;
  100. }
  101. }
  102. static void idi_48_irq_unmask(struct irq_data *data)
  103. {
  104. struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
  105. struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip);
  106. const unsigned offset = irqd_to_hwirq(data);
  107. unsigned i;
  108. unsigned mask;
  109. unsigned boundary;
  110. unsigned prev_irq_mask;
  111. unsigned long flags;
  112. for (i = 0; i < 48; i += 8)
  113. if (offset < i + 8) {
  114. mask = BIT(offset - i);
  115. boundary = i / 8;
  116. prev_irq_mask = idi48gpio->irq_mask[boundary];
  117. idi48gpio->irq_mask[boundary] |= mask;
  118. if (!prev_irq_mask) {
  119. idi48gpio->cos_enb |= BIT(boundary);
  120. spin_lock_irqsave(&idi48gpio->lock, flags);
  121. outb(idi48gpio->cos_enb, idi48gpio->base + 7);
  122. spin_unlock_irqrestore(&idi48gpio->lock, flags);
  123. }
  124. return;
  125. }
  126. }
  127. static int idi_48_irq_set_type(struct irq_data *data, unsigned flow_type)
  128. {
  129. /* The only valid irq types are none and both-edges */
  130. if (flow_type != IRQ_TYPE_NONE &&
  131. (flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH)
  132. return -EINVAL;
  133. return 0;
  134. }
  135. static struct irq_chip idi_48_irqchip = {
  136. .name = "104-idi-48",
  137. .irq_ack = idi_48_irq_ack,
  138. .irq_mask = idi_48_irq_mask,
  139. .irq_unmask = idi_48_irq_unmask,
  140. .irq_set_type = idi_48_irq_set_type
  141. };
  142. static irqreturn_t idi_48_irq_handler(int irq, void *dev_id)
  143. {
  144. struct idi_48_gpio *const idi48gpio = dev_id;
  145. unsigned long cos_status;
  146. unsigned long boundary;
  147. unsigned long irq_mask;
  148. unsigned long bit_num;
  149. unsigned long gpio;
  150. struct gpio_chip *const chip = &idi48gpio->chip;
  151. spin_lock(&idi48gpio->ack_lock);
  152. spin_lock(&idi48gpio->lock);
  153. cos_status = inb(idi48gpio->base + 7);
  154. spin_unlock(&idi48gpio->lock);
  155. /* IRQ Status (bit 6) is active low (0 = IRQ generated by device) */
  156. if (cos_status & BIT(6)) {
  157. spin_unlock(&idi48gpio->ack_lock);
  158. return IRQ_NONE;
  159. }
  160. /* Bit 0-5 indicate which Change-Of-State boundary triggered the IRQ */
  161. cos_status &= 0x3F;
  162. for_each_set_bit(boundary, &cos_status, 6) {
  163. irq_mask = idi48gpio->irq_mask[boundary];
  164. for_each_set_bit(bit_num, &irq_mask, 8) {
  165. gpio = bit_num + boundary * 8;
  166. generic_handle_irq(irq_find_mapping(chip->irqdomain,
  167. gpio));
  168. }
  169. }
  170. spin_unlock(&idi48gpio->ack_lock);
  171. return IRQ_HANDLED;
  172. }
  173. static int __init idi_48_probe(struct platform_device *pdev)
  174. {
  175. struct device *dev = &pdev->dev;
  176. struct idi_48_gpio *idi48gpio;
  177. const unsigned base = idi_48_base;
  178. const unsigned extent = 8;
  179. const char *const name = dev_name(dev);
  180. int err;
  181. const unsigned irq = idi_48_irq;
  182. idi48gpio = devm_kzalloc(dev, sizeof(*idi48gpio), GFP_KERNEL);
  183. if (!idi48gpio)
  184. return -ENOMEM;
  185. if (!devm_request_region(dev, base, extent, name)) {
  186. dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
  187. base, base + extent);
  188. return -EBUSY;
  189. }
  190. idi48gpio->chip.label = name;
  191. idi48gpio->chip.parent = dev;
  192. idi48gpio->chip.owner = THIS_MODULE;
  193. idi48gpio->chip.base = -1;
  194. idi48gpio->chip.ngpio = 48;
  195. idi48gpio->chip.get_direction = idi_48_gpio_get_direction;
  196. idi48gpio->chip.direction_input = idi_48_gpio_direction_input;
  197. idi48gpio->chip.get = idi_48_gpio_get;
  198. idi48gpio->base = base;
  199. idi48gpio->irq = irq;
  200. spin_lock_init(&idi48gpio->lock);
  201. dev_set_drvdata(dev, idi48gpio);
  202. err = gpiochip_add_data(&idi48gpio->chip, idi48gpio);
  203. if (err) {
  204. dev_err(dev, "GPIO registering failed (%d)\n", err);
  205. return err;
  206. }
  207. /* Disable IRQ by default */
  208. outb(0, base + 7);
  209. inb(base + 7);
  210. err = gpiochip_irqchip_add(&idi48gpio->chip, &idi_48_irqchip, 0,
  211. handle_edge_irq, IRQ_TYPE_NONE);
  212. if (err) {
  213. dev_err(dev, "Could not add irqchip (%d)\n", err);
  214. goto err_gpiochip_remove;
  215. }
  216. err = request_irq(irq, idi_48_irq_handler, IRQF_SHARED, name,
  217. idi48gpio);
  218. if (err) {
  219. dev_err(dev, "IRQ handler registering failed (%d)\n", err);
  220. goto err_gpiochip_remove;
  221. }
  222. return 0;
  223. err_gpiochip_remove:
  224. gpiochip_remove(&idi48gpio->chip);
  225. return err;
  226. }
  227. static int idi_48_remove(struct platform_device *pdev)
  228. {
  229. struct idi_48_gpio *const idi48gpio = platform_get_drvdata(pdev);
  230. free_irq(idi48gpio->irq, idi48gpio);
  231. gpiochip_remove(&idi48gpio->chip);
  232. return 0;
  233. }
  234. static struct platform_device *idi_48_device;
  235. static struct platform_driver idi_48_driver = {
  236. .driver = {
  237. .name = "104-idi-48"
  238. },
  239. .remove = idi_48_remove
  240. };
  241. static void __exit idi_48_exit(void)
  242. {
  243. platform_device_unregister(idi_48_device);
  244. platform_driver_unregister(&idi_48_driver);
  245. }
  246. static int __init idi_48_init(void)
  247. {
  248. int err;
  249. idi_48_device = platform_device_alloc(idi_48_driver.driver.name, -1);
  250. if (!idi_48_device)
  251. return -ENOMEM;
  252. err = platform_device_add(idi_48_device);
  253. if (err)
  254. goto err_platform_device;
  255. err = platform_driver_probe(&idi_48_driver, idi_48_probe);
  256. if (err)
  257. goto err_platform_driver;
  258. return 0;
  259. err_platform_driver:
  260. platform_device_del(idi_48_device);
  261. err_platform_device:
  262. platform_device_put(idi_48_device);
  263. return err;
  264. }
  265. module_init(idi_48_init);
  266. module_exit(idi_48_exit);
  267. MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
  268. MODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver");
  269. MODULE_LICENSE("GPL v2");