powernv-cpufreq.c 18 KB

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  1. /*
  2. * POWERNV cpufreq driver for the IBM POWER processors
  3. *
  4. * (C) Copyright IBM 2014
  5. *
  6. * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #define pr_fmt(fmt) "powernv-cpufreq: " fmt
  20. #include <linux/kernel.h>
  21. #include <linux/sysfs.h>
  22. #include <linux/cpumask.h>
  23. #include <linux/module.h>
  24. #include <linux/cpufreq.h>
  25. #include <linux/smp.h>
  26. #include <linux/of.h>
  27. #include <linux/reboot.h>
  28. #include <linux/slab.h>
  29. #include <linux/cpu.h>
  30. #include <trace/events/power.h>
  31. #include <asm/cputhreads.h>
  32. #include <asm/firmware.h>
  33. #include <asm/reg.h>
  34. #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
  35. #include <asm/opal.h>
  36. #define POWERNV_MAX_PSTATES 256
  37. #define PMSR_PSAFE_ENABLE (1UL << 30)
  38. #define PMSR_SPR_EM_DISABLE (1UL << 31)
  39. #define PMSR_MAX(x) ((x >> 32) & 0xFF)
  40. static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
  41. static bool rebooting, throttled, occ_reset;
  42. static const char * const throttle_reason[] = {
  43. "No throttling",
  44. "Power Cap",
  45. "Processor Over Temperature",
  46. "Power Supply Failure",
  47. "Over Current",
  48. "OCC Reset"
  49. };
  50. enum throttle_reason_type {
  51. NO_THROTTLE = 0,
  52. POWERCAP,
  53. CPU_OVERTEMP,
  54. POWER_SUPPLY_FAILURE,
  55. OVERCURRENT,
  56. OCC_RESET_THROTTLE,
  57. OCC_MAX_REASON
  58. };
  59. static struct chip {
  60. unsigned int id;
  61. bool throttled;
  62. bool restore;
  63. u8 throttle_reason;
  64. cpumask_t mask;
  65. struct work_struct throttle;
  66. int throttle_turbo;
  67. int throttle_sub_turbo;
  68. int reason[OCC_MAX_REASON];
  69. } *chips;
  70. static int nr_chips;
  71. static DEFINE_PER_CPU(struct chip *, chip_info);
  72. /*
  73. * Note: The set of pstates consists of contiguous integers, the
  74. * smallest of which is indicated by powernv_pstate_info.min, the
  75. * largest of which is indicated by powernv_pstate_info.max.
  76. *
  77. * The nominal pstate is the highest non-turbo pstate in this
  78. * platform. This is indicated by powernv_pstate_info.nominal.
  79. */
  80. static struct powernv_pstate_info {
  81. int min;
  82. int max;
  83. int nominal;
  84. int nr_pstates;
  85. } powernv_pstate_info;
  86. /*
  87. * Initialize the freq table based on data obtained
  88. * from the firmware passed via device-tree
  89. */
  90. static int init_powernv_pstates(void)
  91. {
  92. struct device_node *power_mgt;
  93. int i, pstate_min, pstate_max, pstate_nominal, nr_pstates = 0;
  94. const __be32 *pstate_ids, *pstate_freqs;
  95. u32 len_ids, len_freqs;
  96. power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
  97. if (!power_mgt) {
  98. pr_warn("power-mgt node not found\n");
  99. return -ENODEV;
  100. }
  101. if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
  102. pr_warn("ibm,pstate-min node not found\n");
  103. return -ENODEV;
  104. }
  105. if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
  106. pr_warn("ibm,pstate-max node not found\n");
  107. return -ENODEV;
  108. }
  109. if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
  110. &pstate_nominal)) {
  111. pr_warn("ibm,pstate-nominal not found\n");
  112. return -ENODEV;
  113. }
  114. pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min,
  115. pstate_nominal, pstate_max);
  116. pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
  117. if (!pstate_ids) {
  118. pr_warn("ibm,pstate-ids not found\n");
  119. return -ENODEV;
  120. }
  121. pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
  122. &len_freqs);
  123. if (!pstate_freqs) {
  124. pr_warn("ibm,pstate-frequencies-mhz not found\n");
  125. return -ENODEV;
  126. }
  127. if (len_ids != len_freqs) {
  128. pr_warn("Entries in ibm,pstate-ids and "
  129. "ibm,pstate-frequencies-mhz does not match\n");
  130. }
  131. nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
  132. if (!nr_pstates) {
  133. pr_warn("No PStates found\n");
  134. return -ENODEV;
  135. }
  136. pr_debug("NR PStates %d\n", nr_pstates);
  137. for (i = 0; i < nr_pstates; i++) {
  138. u32 id = be32_to_cpu(pstate_ids[i]);
  139. u32 freq = be32_to_cpu(pstate_freqs[i]);
  140. pr_debug("PState id %d freq %d MHz\n", id, freq);
  141. powernv_freqs[i].frequency = freq * 1000; /* kHz */
  142. powernv_freqs[i].driver_data = id;
  143. }
  144. /* End of list marker entry */
  145. powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
  146. powernv_pstate_info.min = pstate_min;
  147. powernv_pstate_info.max = pstate_max;
  148. powernv_pstate_info.nominal = pstate_nominal;
  149. powernv_pstate_info.nr_pstates = nr_pstates;
  150. return 0;
  151. }
  152. /* Returns the CPU frequency corresponding to the pstate_id. */
  153. static unsigned int pstate_id_to_freq(int pstate_id)
  154. {
  155. int i;
  156. i = powernv_pstate_info.max - pstate_id;
  157. if (i >= powernv_pstate_info.nr_pstates || i < 0) {
  158. pr_warn("PState id %d outside of PState table, "
  159. "reporting nominal id %d instead\n",
  160. pstate_id, powernv_pstate_info.nominal);
  161. i = powernv_pstate_info.max - powernv_pstate_info.nominal;
  162. }
  163. return powernv_freqs[i].frequency;
  164. }
  165. /*
  166. * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
  167. * the firmware
  168. */
  169. static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
  170. char *buf)
  171. {
  172. return sprintf(buf, "%u\n",
  173. pstate_id_to_freq(powernv_pstate_info.nominal));
  174. }
  175. struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
  176. __ATTR_RO(cpuinfo_nominal_freq);
  177. static struct freq_attr *powernv_cpu_freq_attr[] = {
  178. &cpufreq_freq_attr_scaling_available_freqs,
  179. &cpufreq_freq_attr_cpuinfo_nominal_freq,
  180. NULL,
  181. };
  182. #define throttle_attr(name, member) \
  183. static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \
  184. { \
  185. struct chip *chip = per_cpu(chip_info, policy->cpu); \
  186. \
  187. return sprintf(buf, "%u\n", chip->member); \
  188. } \
  189. \
  190. static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \
  191. throttle_attr(unthrottle, reason[NO_THROTTLE]);
  192. throttle_attr(powercap, reason[POWERCAP]);
  193. throttle_attr(overtemp, reason[CPU_OVERTEMP]);
  194. throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]);
  195. throttle_attr(overcurrent, reason[OVERCURRENT]);
  196. throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]);
  197. throttle_attr(turbo_stat, throttle_turbo);
  198. throttle_attr(sub_turbo_stat, throttle_sub_turbo);
  199. static struct attribute *throttle_attrs[] = {
  200. &throttle_attr_unthrottle.attr,
  201. &throttle_attr_powercap.attr,
  202. &throttle_attr_overtemp.attr,
  203. &throttle_attr_supply_fault.attr,
  204. &throttle_attr_overcurrent.attr,
  205. &throttle_attr_occ_reset.attr,
  206. &throttle_attr_turbo_stat.attr,
  207. &throttle_attr_sub_turbo_stat.attr,
  208. NULL,
  209. };
  210. static const struct attribute_group throttle_attr_grp = {
  211. .name = "throttle_stats",
  212. .attrs = throttle_attrs,
  213. };
  214. /* Helper routines */
  215. /* Access helpers to power mgt SPR */
  216. static inline unsigned long get_pmspr(unsigned long sprn)
  217. {
  218. switch (sprn) {
  219. case SPRN_PMCR:
  220. return mfspr(SPRN_PMCR);
  221. case SPRN_PMICR:
  222. return mfspr(SPRN_PMICR);
  223. case SPRN_PMSR:
  224. return mfspr(SPRN_PMSR);
  225. }
  226. BUG();
  227. }
  228. static inline void set_pmspr(unsigned long sprn, unsigned long val)
  229. {
  230. switch (sprn) {
  231. case SPRN_PMCR:
  232. mtspr(SPRN_PMCR, val);
  233. return;
  234. case SPRN_PMICR:
  235. mtspr(SPRN_PMICR, val);
  236. return;
  237. }
  238. BUG();
  239. }
  240. /*
  241. * Use objects of this type to query/update
  242. * pstates on a remote CPU via smp_call_function.
  243. */
  244. struct powernv_smp_call_data {
  245. unsigned int freq;
  246. int pstate_id;
  247. };
  248. /*
  249. * powernv_read_cpu_freq: Reads the current frequency on this CPU.
  250. *
  251. * Called via smp_call_function.
  252. *
  253. * Note: The caller of the smp_call_function should pass an argument of
  254. * the type 'struct powernv_smp_call_data *' along with this function.
  255. *
  256. * The current frequency on this CPU will be returned via
  257. * ((struct powernv_smp_call_data *)arg)->freq;
  258. */
  259. static void powernv_read_cpu_freq(void *arg)
  260. {
  261. unsigned long pmspr_val;
  262. s8 local_pstate_id;
  263. struct powernv_smp_call_data *freq_data = arg;
  264. pmspr_val = get_pmspr(SPRN_PMSR);
  265. /*
  266. * The local pstate id corresponds bits 48..55 in the PMSR.
  267. * Note: Watch out for the sign!
  268. */
  269. local_pstate_id = (pmspr_val >> 48) & 0xFF;
  270. freq_data->pstate_id = local_pstate_id;
  271. freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
  272. pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n",
  273. raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
  274. freq_data->freq);
  275. }
  276. /*
  277. * powernv_cpufreq_get: Returns the CPU frequency as reported by the
  278. * firmware for CPU 'cpu'. This value is reported through the sysfs
  279. * file cpuinfo_cur_freq.
  280. */
  281. static unsigned int powernv_cpufreq_get(unsigned int cpu)
  282. {
  283. struct powernv_smp_call_data freq_data;
  284. smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
  285. &freq_data, 1);
  286. return freq_data.freq;
  287. }
  288. /*
  289. * set_pstate: Sets the pstate on this CPU.
  290. *
  291. * This is called via an smp_call_function.
  292. *
  293. * The caller must ensure that freq_data is of the type
  294. * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
  295. * on this CPU should be present in freq_data->pstate_id.
  296. */
  297. static void set_pstate(void *freq_data)
  298. {
  299. unsigned long val;
  300. unsigned long pstate_ul =
  301. ((struct powernv_smp_call_data *) freq_data)->pstate_id;
  302. val = get_pmspr(SPRN_PMCR);
  303. val = val & 0x0000FFFFFFFFFFFFULL;
  304. pstate_ul = pstate_ul & 0xFF;
  305. /* Set both global(bits 56..63) and local(bits 48..55) PStates */
  306. val = val | (pstate_ul << 56) | (pstate_ul << 48);
  307. pr_debug("Setting cpu %d pmcr to %016lX\n",
  308. raw_smp_processor_id(), val);
  309. set_pmspr(SPRN_PMCR, val);
  310. }
  311. /*
  312. * get_nominal_index: Returns the index corresponding to the nominal
  313. * pstate in the cpufreq table
  314. */
  315. static inline unsigned int get_nominal_index(void)
  316. {
  317. return powernv_pstate_info.max - powernv_pstate_info.nominal;
  318. }
  319. static void powernv_cpufreq_throttle_check(void *data)
  320. {
  321. struct chip *chip;
  322. unsigned int cpu = smp_processor_id();
  323. unsigned long pmsr;
  324. int pmsr_pmax;
  325. pmsr = get_pmspr(SPRN_PMSR);
  326. chip = this_cpu_read(chip_info);
  327. /* Check for Pmax Capping */
  328. pmsr_pmax = (s8)PMSR_MAX(pmsr);
  329. if (pmsr_pmax != powernv_pstate_info.max) {
  330. if (chip->throttled)
  331. goto next;
  332. chip->throttled = true;
  333. if (pmsr_pmax < powernv_pstate_info.nominal) {
  334. pr_warn_once("CPU %d on Chip %u has Pmax reduced below nominal frequency (%d < %d)\n",
  335. cpu, chip->id, pmsr_pmax,
  336. powernv_pstate_info.nominal);
  337. chip->throttle_sub_turbo++;
  338. } else {
  339. chip->throttle_turbo++;
  340. }
  341. trace_powernv_throttle(chip->id,
  342. throttle_reason[chip->throttle_reason],
  343. pmsr_pmax);
  344. } else if (chip->throttled) {
  345. chip->throttled = false;
  346. trace_powernv_throttle(chip->id,
  347. throttle_reason[chip->throttle_reason],
  348. pmsr_pmax);
  349. }
  350. /* Check if Psafe_mode_active is set in PMSR. */
  351. next:
  352. if (pmsr & PMSR_PSAFE_ENABLE) {
  353. throttled = true;
  354. pr_info("Pstate set to safe frequency\n");
  355. }
  356. /* Check if SPR_EM_DISABLE is set in PMSR */
  357. if (pmsr & PMSR_SPR_EM_DISABLE) {
  358. throttled = true;
  359. pr_info("Frequency Control disabled from OS\n");
  360. }
  361. if (throttled) {
  362. pr_info("PMSR = %16lx\n", pmsr);
  363. pr_warn("CPU Frequency could be throttled\n");
  364. }
  365. }
  366. /*
  367. * powernv_cpufreq_target_index: Sets the frequency corresponding to
  368. * the cpufreq table entry indexed by new_index on the cpus in the
  369. * mask policy->cpus
  370. */
  371. static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
  372. unsigned int new_index)
  373. {
  374. struct powernv_smp_call_data freq_data;
  375. if (unlikely(rebooting) && new_index != get_nominal_index())
  376. return 0;
  377. if (!throttled)
  378. powernv_cpufreq_throttle_check(NULL);
  379. freq_data.pstate_id = powernv_freqs[new_index].driver_data;
  380. /*
  381. * Use smp_call_function to send IPI and execute the
  382. * mtspr on target CPU. We could do that without IPI
  383. * if current CPU is within policy->cpus (core)
  384. */
  385. smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
  386. return 0;
  387. }
  388. static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
  389. {
  390. int base, i;
  391. base = cpu_first_thread_sibling(policy->cpu);
  392. for (i = 0; i < threads_per_core; i++)
  393. cpumask_set_cpu(base + i, policy->cpus);
  394. if (!policy->driver_data) {
  395. int ret;
  396. ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp);
  397. if (ret) {
  398. pr_info("Failed to create throttle stats directory for cpu %d\n",
  399. policy->cpu);
  400. return ret;
  401. }
  402. /*
  403. * policy->driver_data is used as a flag for one-time
  404. * creation of throttle sysfs files.
  405. */
  406. policy->driver_data = policy;
  407. }
  408. return cpufreq_table_validate_and_show(policy, powernv_freqs);
  409. }
  410. static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
  411. unsigned long action, void *unused)
  412. {
  413. int cpu;
  414. struct cpufreq_policy cpu_policy;
  415. rebooting = true;
  416. for_each_online_cpu(cpu) {
  417. cpufreq_get_policy(&cpu_policy, cpu);
  418. powernv_cpufreq_target_index(&cpu_policy, get_nominal_index());
  419. }
  420. return NOTIFY_DONE;
  421. }
  422. static struct notifier_block powernv_cpufreq_reboot_nb = {
  423. .notifier_call = powernv_cpufreq_reboot_notifier,
  424. };
  425. void powernv_cpufreq_work_fn(struct work_struct *work)
  426. {
  427. struct chip *chip = container_of(work, struct chip, throttle);
  428. unsigned int cpu;
  429. cpumask_t mask;
  430. get_online_cpus();
  431. cpumask_and(&mask, &chip->mask, cpu_online_mask);
  432. smp_call_function_any(&mask,
  433. powernv_cpufreq_throttle_check, NULL, 0);
  434. if (!chip->restore)
  435. goto out;
  436. chip->restore = false;
  437. for_each_cpu(cpu, &mask) {
  438. int index;
  439. struct cpufreq_policy policy;
  440. cpufreq_get_policy(&policy, cpu);
  441. cpufreq_frequency_table_target(&policy, policy.freq_table,
  442. policy.cur,
  443. CPUFREQ_RELATION_C, &index);
  444. powernv_cpufreq_target_index(&policy, index);
  445. cpumask_andnot(&mask, &mask, policy.cpus);
  446. }
  447. out:
  448. put_online_cpus();
  449. }
  450. static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
  451. unsigned long msg_type, void *_msg)
  452. {
  453. struct opal_msg *msg = _msg;
  454. struct opal_occ_msg omsg;
  455. int i;
  456. if (msg_type != OPAL_MSG_OCC)
  457. return 0;
  458. omsg.type = be64_to_cpu(msg->params[0]);
  459. switch (omsg.type) {
  460. case OCC_RESET:
  461. occ_reset = true;
  462. pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
  463. /*
  464. * powernv_cpufreq_throttle_check() is called in
  465. * target() callback which can detect the throttle state
  466. * for governors like ondemand.
  467. * But static governors will not call target() often thus
  468. * report throttling here.
  469. */
  470. if (!throttled) {
  471. throttled = true;
  472. pr_warn("CPU frequency is throttled for duration\n");
  473. }
  474. break;
  475. case OCC_LOAD:
  476. pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
  477. break;
  478. case OCC_THROTTLE:
  479. omsg.chip = be64_to_cpu(msg->params[1]);
  480. omsg.throttle_status = be64_to_cpu(msg->params[2]);
  481. if (occ_reset) {
  482. occ_reset = false;
  483. throttled = false;
  484. pr_info("OCC Active, CPU frequency is no longer throttled\n");
  485. for (i = 0; i < nr_chips; i++) {
  486. chips[i].restore = true;
  487. schedule_work(&chips[i].throttle);
  488. }
  489. return 0;
  490. }
  491. for (i = 0; i < nr_chips; i++)
  492. if (chips[i].id == omsg.chip)
  493. break;
  494. if (omsg.throttle_status >= 0 &&
  495. omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) {
  496. chips[i].throttle_reason = omsg.throttle_status;
  497. chips[i].reason[omsg.throttle_status]++;
  498. }
  499. if (!omsg.throttle_status)
  500. chips[i].restore = true;
  501. schedule_work(&chips[i].throttle);
  502. }
  503. return 0;
  504. }
  505. static struct notifier_block powernv_cpufreq_opal_nb = {
  506. .notifier_call = powernv_cpufreq_occ_msg,
  507. .next = NULL,
  508. .priority = 0,
  509. };
  510. static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
  511. {
  512. struct powernv_smp_call_data freq_data;
  513. freq_data.pstate_id = powernv_pstate_info.min;
  514. smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
  515. }
  516. static struct cpufreq_driver powernv_cpufreq_driver = {
  517. .name = "powernv-cpufreq",
  518. .flags = CPUFREQ_CONST_LOOPS,
  519. .init = powernv_cpufreq_cpu_init,
  520. .verify = cpufreq_generic_frequency_table_verify,
  521. .target_index = powernv_cpufreq_target_index,
  522. .get = powernv_cpufreq_get,
  523. .stop_cpu = powernv_cpufreq_stop_cpu,
  524. .attr = powernv_cpu_freq_attr,
  525. };
  526. static int init_chip_info(void)
  527. {
  528. unsigned int chip[256];
  529. unsigned int cpu, i;
  530. unsigned int prev_chip_id = UINT_MAX;
  531. for_each_possible_cpu(cpu) {
  532. unsigned int id = cpu_to_chip_id(cpu);
  533. if (prev_chip_id != id) {
  534. prev_chip_id = id;
  535. chip[nr_chips++] = id;
  536. }
  537. }
  538. chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
  539. if (!chips)
  540. return -ENOMEM;
  541. for (i = 0; i < nr_chips; i++) {
  542. chips[i].id = chip[i];
  543. cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
  544. INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
  545. for_each_cpu(cpu, &chips[i].mask)
  546. per_cpu(chip_info, cpu) = &chips[i];
  547. }
  548. return 0;
  549. }
  550. static inline void clean_chip_info(void)
  551. {
  552. kfree(chips);
  553. }
  554. static inline void unregister_all_notifiers(void)
  555. {
  556. opal_message_notifier_unregister(OPAL_MSG_OCC,
  557. &powernv_cpufreq_opal_nb);
  558. unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
  559. }
  560. static int __init powernv_cpufreq_init(void)
  561. {
  562. int rc = 0;
  563. /* Don't probe on pseries (guest) platforms */
  564. if (!firmware_has_feature(FW_FEATURE_OPAL))
  565. return -ENODEV;
  566. /* Discover pstates from device tree and init */
  567. rc = init_powernv_pstates();
  568. if (rc)
  569. goto out;
  570. /* Populate chip info */
  571. rc = init_chip_info();
  572. if (rc)
  573. goto out;
  574. register_reboot_notifier(&powernv_cpufreq_reboot_nb);
  575. opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
  576. rc = cpufreq_register_driver(&powernv_cpufreq_driver);
  577. if (!rc)
  578. return 0;
  579. pr_info("Failed to register the cpufreq driver (%d)\n", rc);
  580. unregister_all_notifiers();
  581. clean_chip_info();
  582. out:
  583. pr_info("Platform driver disabled. System does not support PState control\n");
  584. return rc;
  585. }
  586. module_init(powernv_cpufreq_init);
  587. static void __exit powernv_cpufreq_exit(void)
  588. {
  589. cpufreq_unregister_driver(&powernv_cpufreq_driver);
  590. unregister_all_notifiers();
  591. clean_chip_info();
  592. }
  593. module_exit(powernv_cpufreq_exit);
  594. MODULE_LICENSE("GPL");
  595. MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");