virtgpu_display.c 15 KB

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  1. /*
  2. * Copyright (C) 2015 Red Hat, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Authors:
  6. * Dave Airlie
  7. * Alon Levy
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice shall be included in
  17. * all copies or substantial portions of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25. * OTHER DEALINGS IN THE SOFTWARE.
  26. */
  27. #include "virtgpu_drv.h"
  28. #include <drm/drm_crtc_helper.h>
  29. #include <drm/drm_atomic_helper.h>
  30. #define XRES_MIN 320
  31. #define YRES_MIN 200
  32. #define XRES_DEF 1024
  33. #define YRES_DEF 768
  34. #define XRES_MAX 8192
  35. #define YRES_MAX 8192
  36. static void virtio_gpu_crtc_gamma_set(struct drm_crtc *crtc,
  37. u16 *red, u16 *green, u16 *blue,
  38. uint32_t start, uint32_t size)
  39. {
  40. /* TODO */
  41. }
  42. static void
  43. virtio_gpu_hide_cursor(struct virtio_gpu_device *vgdev,
  44. struct virtio_gpu_output *output)
  45. {
  46. output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
  47. output->cursor.resource_id = 0;
  48. virtio_gpu_cursor_ping(vgdev, output);
  49. }
  50. static int virtio_gpu_crtc_cursor_set(struct drm_crtc *crtc,
  51. struct drm_file *file_priv,
  52. uint32_t handle,
  53. uint32_t width,
  54. uint32_t height,
  55. int32_t hot_x, int32_t hot_y)
  56. {
  57. struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
  58. struct virtio_gpu_output *output =
  59. container_of(crtc, struct virtio_gpu_output, crtc);
  60. struct drm_gem_object *gobj = NULL;
  61. struct virtio_gpu_object *qobj = NULL;
  62. struct virtio_gpu_fence *fence = NULL;
  63. int ret = 0;
  64. if (handle == 0) {
  65. virtio_gpu_hide_cursor(vgdev, output);
  66. return 0;
  67. }
  68. /* lookup the cursor */
  69. gobj = drm_gem_object_lookup(crtc->dev, file_priv, handle);
  70. if (gobj == NULL)
  71. return -ENOENT;
  72. qobj = gem_to_virtio_gpu_obj(gobj);
  73. if (!qobj->hw_res_handle) {
  74. ret = -EINVAL;
  75. goto out;
  76. }
  77. virtio_gpu_cmd_transfer_to_host_2d(vgdev, qobj->hw_res_handle, 0,
  78. cpu_to_le32(64),
  79. cpu_to_le32(64),
  80. 0, 0, &fence);
  81. ret = virtio_gpu_object_reserve(qobj, false);
  82. if (!ret) {
  83. reservation_object_add_excl_fence(qobj->tbo.resv,
  84. &fence->f);
  85. fence_put(&fence->f);
  86. virtio_gpu_object_unreserve(qobj);
  87. virtio_gpu_object_wait(qobj, false);
  88. }
  89. output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
  90. output->cursor.resource_id = cpu_to_le32(qobj->hw_res_handle);
  91. output->cursor.hot_x = cpu_to_le32(hot_x);
  92. output->cursor.hot_y = cpu_to_le32(hot_y);
  93. virtio_gpu_cursor_ping(vgdev, output);
  94. ret = 0;
  95. out:
  96. drm_gem_object_unreference_unlocked(gobj);
  97. return ret;
  98. }
  99. static int virtio_gpu_crtc_cursor_move(struct drm_crtc *crtc,
  100. int x, int y)
  101. {
  102. struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
  103. struct virtio_gpu_output *output =
  104. container_of(crtc, struct virtio_gpu_output, crtc);
  105. output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
  106. output->cursor.pos.x = cpu_to_le32(x);
  107. output->cursor.pos.y = cpu_to_le32(y);
  108. virtio_gpu_cursor_ping(vgdev, output);
  109. return 0;
  110. }
  111. static int virtio_gpu_page_flip(struct drm_crtc *crtc,
  112. struct drm_framebuffer *fb,
  113. struct drm_pending_vblank_event *event,
  114. uint32_t flags)
  115. {
  116. struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
  117. struct virtio_gpu_output *output =
  118. container_of(crtc, struct virtio_gpu_output, crtc);
  119. struct drm_plane *plane = crtc->primary;
  120. struct virtio_gpu_framebuffer *vgfb;
  121. struct virtio_gpu_object *bo;
  122. unsigned long irqflags;
  123. uint32_t handle;
  124. plane->fb = fb;
  125. vgfb = to_virtio_gpu_framebuffer(plane->fb);
  126. bo = gem_to_virtio_gpu_obj(vgfb->obj);
  127. handle = bo->hw_res_handle;
  128. DRM_DEBUG("handle 0x%x%s, crtc %dx%d\n", handle,
  129. bo->dumb ? ", dumb" : "",
  130. crtc->mode.hdisplay, crtc->mode.vdisplay);
  131. if (bo->dumb) {
  132. virtio_gpu_cmd_transfer_to_host_2d
  133. (vgdev, handle, 0,
  134. cpu_to_le32(crtc->mode.hdisplay),
  135. cpu_to_le32(crtc->mode.vdisplay),
  136. 0, 0, NULL);
  137. }
  138. virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
  139. crtc->mode.hdisplay,
  140. crtc->mode.vdisplay, 0, 0);
  141. virtio_gpu_cmd_resource_flush(vgdev, handle, 0, 0,
  142. crtc->mode.hdisplay,
  143. crtc->mode.vdisplay);
  144. if (event) {
  145. spin_lock_irqsave(&crtc->dev->event_lock, irqflags);
  146. drm_send_vblank_event(crtc->dev, -1, event);
  147. spin_unlock_irqrestore(&crtc->dev->event_lock, irqflags);
  148. }
  149. return 0;
  150. }
  151. static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = {
  152. .cursor_set2 = virtio_gpu_crtc_cursor_set,
  153. .cursor_move = virtio_gpu_crtc_cursor_move,
  154. .gamma_set = virtio_gpu_crtc_gamma_set,
  155. .set_config = drm_atomic_helper_set_config,
  156. .destroy = drm_crtc_cleanup,
  157. .page_flip = virtio_gpu_page_flip,
  158. .reset = drm_atomic_helper_crtc_reset,
  159. .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
  160. .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
  161. };
  162. static void virtio_gpu_user_framebuffer_destroy(struct drm_framebuffer *fb)
  163. {
  164. struct virtio_gpu_framebuffer *virtio_gpu_fb
  165. = to_virtio_gpu_framebuffer(fb);
  166. if (virtio_gpu_fb->obj)
  167. drm_gem_object_unreference_unlocked(virtio_gpu_fb->obj);
  168. drm_framebuffer_cleanup(fb);
  169. kfree(virtio_gpu_fb);
  170. }
  171. static int
  172. virtio_gpu_framebuffer_surface_dirty(struct drm_framebuffer *fb,
  173. struct drm_file *file_priv,
  174. unsigned flags, unsigned color,
  175. struct drm_clip_rect *clips,
  176. unsigned num_clips)
  177. {
  178. struct virtio_gpu_framebuffer *virtio_gpu_fb
  179. = to_virtio_gpu_framebuffer(fb);
  180. return virtio_gpu_surface_dirty(virtio_gpu_fb, clips, num_clips);
  181. }
  182. static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = {
  183. .destroy = virtio_gpu_user_framebuffer_destroy,
  184. .dirty = virtio_gpu_framebuffer_surface_dirty,
  185. };
  186. int
  187. virtio_gpu_framebuffer_init(struct drm_device *dev,
  188. struct virtio_gpu_framebuffer *vgfb,
  189. const struct drm_mode_fb_cmd2 *mode_cmd,
  190. struct drm_gem_object *obj)
  191. {
  192. int ret;
  193. struct virtio_gpu_object *bo;
  194. vgfb->obj = obj;
  195. bo = gem_to_virtio_gpu_obj(obj);
  196. ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs);
  197. if (ret) {
  198. vgfb->obj = NULL;
  199. return ret;
  200. }
  201. drm_helper_mode_fill_fb_struct(&vgfb->base, mode_cmd);
  202. spin_lock_init(&vgfb->dirty_lock);
  203. vgfb->x1 = vgfb->y1 = INT_MAX;
  204. vgfb->x2 = vgfb->y2 = 0;
  205. return 0;
  206. }
  207. static bool virtio_gpu_crtc_mode_fixup(struct drm_crtc *crtc,
  208. const struct drm_display_mode *mode,
  209. struct drm_display_mode *adjusted_mode)
  210. {
  211. return true;
  212. }
  213. static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc)
  214. {
  215. struct drm_device *dev = crtc->dev;
  216. struct virtio_gpu_device *vgdev = dev->dev_private;
  217. struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
  218. virtio_gpu_cmd_set_scanout(vgdev, output->index, 0,
  219. crtc->mode.hdisplay,
  220. crtc->mode.vdisplay, 0, 0);
  221. }
  222. static void virtio_gpu_crtc_enable(struct drm_crtc *crtc)
  223. {
  224. }
  225. static void virtio_gpu_crtc_disable(struct drm_crtc *crtc)
  226. {
  227. struct drm_device *dev = crtc->dev;
  228. struct virtio_gpu_device *vgdev = dev->dev_private;
  229. struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
  230. virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0);
  231. }
  232. static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,
  233. struct drm_crtc_state *state)
  234. {
  235. return 0;
  236. }
  237. static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
  238. .enable = virtio_gpu_crtc_enable,
  239. .disable = virtio_gpu_crtc_disable,
  240. .mode_fixup = virtio_gpu_crtc_mode_fixup,
  241. .mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
  242. .atomic_check = virtio_gpu_crtc_atomic_check,
  243. };
  244. static bool virtio_gpu_enc_mode_fixup(struct drm_encoder *encoder,
  245. const struct drm_display_mode *mode,
  246. struct drm_display_mode *adjusted_mode)
  247. {
  248. return true;
  249. }
  250. static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,
  251. struct drm_display_mode *mode,
  252. struct drm_display_mode *adjusted_mode)
  253. {
  254. }
  255. static void virtio_gpu_enc_enable(struct drm_encoder *encoder)
  256. {
  257. }
  258. static void virtio_gpu_enc_disable(struct drm_encoder *encoder)
  259. {
  260. }
  261. static int virtio_gpu_conn_get_modes(struct drm_connector *connector)
  262. {
  263. struct virtio_gpu_output *output =
  264. drm_connector_to_virtio_gpu_output(connector);
  265. struct drm_display_mode *mode = NULL;
  266. int count, width, height;
  267. width = le32_to_cpu(output->info.r.width);
  268. height = le32_to_cpu(output->info.r.height);
  269. count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX);
  270. if (width == 0 || height == 0) {
  271. width = XRES_DEF;
  272. height = YRES_DEF;
  273. drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF);
  274. } else {
  275. DRM_DEBUG("add mode: %dx%d\n", width, height);
  276. mode = drm_cvt_mode(connector->dev, width, height, 60,
  277. false, false, false);
  278. mode->type |= DRM_MODE_TYPE_PREFERRED;
  279. drm_mode_probed_add(connector, mode);
  280. count++;
  281. }
  282. return count;
  283. }
  284. static int virtio_gpu_conn_mode_valid(struct drm_connector *connector,
  285. struct drm_display_mode *mode)
  286. {
  287. struct virtio_gpu_output *output =
  288. drm_connector_to_virtio_gpu_output(connector);
  289. int width, height;
  290. width = le32_to_cpu(output->info.r.width);
  291. height = le32_to_cpu(output->info.r.height);
  292. if (!(mode->type & DRM_MODE_TYPE_PREFERRED))
  293. return MODE_OK;
  294. if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF)
  295. return MODE_OK;
  296. if (mode->hdisplay <= width && mode->hdisplay >= width - 16 &&
  297. mode->vdisplay <= height && mode->vdisplay >= height - 16)
  298. return MODE_OK;
  299. DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay);
  300. return MODE_BAD;
  301. }
  302. static struct drm_encoder*
  303. virtio_gpu_best_encoder(struct drm_connector *connector)
  304. {
  305. struct virtio_gpu_output *virtio_gpu_output =
  306. drm_connector_to_virtio_gpu_output(connector);
  307. return &virtio_gpu_output->enc;
  308. }
  309. static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = {
  310. .mode_fixup = virtio_gpu_enc_mode_fixup,
  311. .mode_set = virtio_gpu_enc_mode_set,
  312. .enable = virtio_gpu_enc_enable,
  313. .disable = virtio_gpu_enc_disable,
  314. };
  315. static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = {
  316. .get_modes = virtio_gpu_conn_get_modes,
  317. .mode_valid = virtio_gpu_conn_mode_valid,
  318. .best_encoder = virtio_gpu_best_encoder,
  319. };
  320. static enum drm_connector_status virtio_gpu_conn_detect(
  321. struct drm_connector *connector,
  322. bool force)
  323. {
  324. struct virtio_gpu_output *output =
  325. drm_connector_to_virtio_gpu_output(connector);
  326. if (output->info.enabled)
  327. return connector_status_connected;
  328. else
  329. return connector_status_disconnected;
  330. }
  331. static void virtio_gpu_conn_destroy(struct drm_connector *connector)
  332. {
  333. struct virtio_gpu_output *virtio_gpu_output =
  334. drm_connector_to_virtio_gpu_output(connector);
  335. drm_connector_unregister(connector);
  336. drm_connector_cleanup(connector);
  337. kfree(virtio_gpu_output);
  338. }
  339. static const struct drm_connector_funcs virtio_gpu_connector_funcs = {
  340. .dpms = drm_atomic_helper_connector_dpms,
  341. .detect = virtio_gpu_conn_detect,
  342. .fill_modes = drm_helper_probe_single_connector_modes,
  343. .destroy = virtio_gpu_conn_destroy,
  344. .reset = drm_atomic_helper_connector_reset,
  345. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  346. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  347. };
  348. static const struct drm_encoder_funcs virtio_gpu_enc_funcs = {
  349. .destroy = drm_encoder_cleanup,
  350. };
  351. static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index)
  352. {
  353. struct drm_device *dev = vgdev->ddev;
  354. struct virtio_gpu_output *output = vgdev->outputs + index;
  355. struct drm_connector *connector = &output->conn;
  356. struct drm_encoder *encoder = &output->enc;
  357. struct drm_crtc *crtc = &output->crtc;
  358. struct drm_plane *plane;
  359. output->index = index;
  360. if (index == 0) {
  361. output->info.enabled = cpu_to_le32(true);
  362. output->info.r.width = cpu_to_le32(XRES_DEF);
  363. output->info.r.height = cpu_to_le32(YRES_DEF);
  364. }
  365. plane = virtio_gpu_plane_init(vgdev, index);
  366. if (IS_ERR(plane))
  367. return PTR_ERR(plane);
  368. drm_crtc_init_with_planes(dev, crtc, plane, NULL,
  369. &virtio_gpu_crtc_funcs, NULL);
  370. drm_mode_crtc_set_gamma_size(crtc, 256);
  371. drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs);
  372. plane->crtc = crtc;
  373. drm_connector_init(dev, connector, &virtio_gpu_connector_funcs,
  374. DRM_MODE_CONNECTOR_VIRTUAL);
  375. drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs);
  376. drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs,
  377. DRM_MODE_ENCODER_VIRTUAL, NULL);
  378. drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs);
  379. encoder->possible_crtcs = 1 << index;
  380. drm_mode_connector_attach_encoder(connector, encoder);
  381. drm_connector_register(connector);
  382. return 0;
  383. }
  384. static struct drm_framebuffer *
  385. virtio_gpu_user_framebuffer_create(struct drm_device *dev,
  386. struct drm_file *file_priv,
  387. const struct drm_mode_fb_cmd2 *mode_cmd)
  388. {
  389. struct drm_gem_object *obj = NULL;
  390. struct virtio_gpu_framebuffer *virtio_gpu_fb;
  391. int ret;
  392. /* lookup object associated with res handle */
  393. obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
  394. if (!obj)
  395. return ERR_PTR(-EINVAL);
  396. virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL);
  397. if (virtio_gpu_fb == NULL)
  398. return ERR_PTR(-ENOMEM);
  399. ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj);
  400. if (ret) {
  401. kfree(virtio_gpu_fb);
  402. if (obj)
  403. drm_gem_object_unreference_unlocked(obj);
  404. return NULL;
  405. }
  406. return &virtio_gpu_fb->base;
  407. }
  408. static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = {
  409. .fb_create = virtio_gpu_user_framebuffer_create,
  410. .atomic_check = drm_atomic_helper_check,
  411. .atomic_commit = drm_atomic_helper_commit,
  412. };
  413. int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev)
  414. {
  415. int i;
  416. drm_mode_config_init(vgdev->ddev);
  417. vgdev->ddev->mode_config.funcs = (void *)&virtio_gpu_mode_funcs;
  418. /* modes will be validated against the framebuffer size */
  419. vgdev->ddev->mode_config.min_width = XRES_MIN;
  420. vgdev->ddev->mode_config.min_height = YRES_MIN;
  421. vgdev->ddev->mode_config.max_width = XRES_MAX;
  422. vgdev->ddev->mode_config.max_height = YRES_MAX;
  423. for (i = 0 ; i < vgdev->num_scanouts; ++i)
  424. vgdev_output_init(vgdev, i);
  425. drm_mode_config_reset(vgdev->ddev);
  426. return 0;
  427. }
  428. void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev)
  429. {
  430. virtio_gpu_fbdev_fini(vgdev);
  431. drm_mode_config_cleanup(vgdev->ddev);
  432. }