qcom_adsp_pil.c 11 KB

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  1. /*
  2. * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
  3. *
  4. * Copyright (C) 2016 Linaro Ltd
  5. * Copyright (C) 2014 Sony Mobile Communications AB
  6. * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/clk.h>
  18. #include <linux/firmware.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/of_address.h>
  23. #include <linux/of_device.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/qcom_scm.h>
  26. #include <linux/regulator/consumer.h>
  27. #include <linux/remoteproc.h>
  28. #include <linux/soc/qcom/mdt_loader.h>
  29. #include <linux/soc/qcom/smem.h>
  30. #include <linux/soc/qcom/smem_state.h>
  31. #include "qcom_common.h"
  32. #include "remoteproc_internal.h"
  33. struct adsp_data {
  34. int crash_reason_smem;
  35. const char *firmware_name;
  36. int pas_id;
  37. bool has_aggre2_clk;
  38. const char *ssr_name;
  39. const char *sysmon_name;
  40. int ssctl_id;
  41. };
  42. struct qcom_adsp {
  43. struct device *dev;
  44. struct rproc *rproc;
  45. int wdog_irq;
  46. int fatal_irq;
  47. int ready_irq;
  48. int handover_irq;
  49. int stop_ack_irq;
  50. struct qcom_smem_state *state;
  51. unsigned stop_bit;
  52. struct clk *xo;
  53. struct clk *aggre2_clk;
  54. struct regulator *cx_supply;
  55. struct regulator *px_supply;
  56. int pas_id;
  57. int crash_reason_smem;
  58. bool has_aggre2_clk;
  59. struct completion start_done;
  60. struct completion stop_done;
  61. phys_addr_t mem_phys;
  62. phys_addr_t mem_reloc;
  63. void *mem_region;
  64. size_t mem_size;
  65. struct qcom_rproc_glink glink_subdev;
  66. struct qcom_rproc_subdev smd_subdev;
  67. struct qcom_rproc_ssr ssr_subdev;
  68. struct qcom_sysmon *sysmon;
  69. };
  70. static int adsp_load(struct rproc *rproc, const struct firmware *fw)
  71. {
  72. struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
  73. return qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id,
  74. adsp->mem_region, adsp->mem_phys, adsp->mem_size,
  75. &adsp->mem_reloc);
  76. }
  77. static int adsp_start(struct rproc *rproc)
  78. {
  79. struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
  80. int ret;
  81. ret = clk_prepare_enable(adsp->xo);
  82. if (ret)
  83. return ret;
  84. ret = clk_prepare_enable(adsp->aggre2_clk);
  85. if (ret)
  86. goto disable_xo_clk;
  87. ret = regulator_enable(adsp->cx_supply);
  88. if (ret)
  89. goto disable_aggre2_clk;
  90. ret = regulator_enable(adsp->px_supply);
  91. if (ret)
  92. goto disable_cx_supply;
  93. ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
  94. if (ret) {
  95. dev_err(adsp->dev,
  96. "failed to authenticate image and release reset\n");
  97. goto disable_px_supply;
  98. }
  99. ret = wait_for_completion_timeout(&adsp->start_done,
  100. msecs_to_jiffies(5000));
  101. if (!ret) {
  102. dev_err(adsp->dev, "start timed out\n");
  103. qcom_scm_pas_shutdown(adsp->pas_id);
  104. ret = -ETIMEDOUT;
  105. goto disable_px_supply;
  106. }
  107. ret = 0;
  108. disable_px_supply:
  109. regulator_disable(adsp->px_supply);
  110. disable_cx_supply:
  111. regulator_disable(adsp->cx_supply);
  112. disable_aggre2_clk:
  113. clk_disable_unprepare(adsp->aggre2_clk);
  114. disable_xo_clk:
  115. clk_disable_unprepare(adsp->xo);
  116. return ret;
  117. }
  118. static int adsp_stop(struct rproc *rproc)
  119. {
  120. struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
  121. int ret;
  122. qcom_smem_state_update_bits(adsp->state,
  123. BIT(adsp->stop_bit),
  124. BIT(adsp->stop_bit));
  125. ret = wait_for_completion_timeout(&adsp->stop_done,
  126. msecs_to_jiffies(5000));
  127. if (ret == 0)
  128. dev_err(adsp->dev, "timed out on wait\n");
  129. qcom_smem_state_update_bits(adsp->state,
  130. BIT(adsp->stop_bit),
  131. 0);
  132. ret = qcom_scm_pas_shutdown(adsp->pas_id);
  133. if (ret)
  134. dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
  135. return ret;
  136. }
  137. static void *adsp_da_to_va(struct rproc *rproc, u64 da, int len)
  138. {
  139. struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
  140. int offset;
  141. offset = da - adsp->mem_reloc;
  142. if (offset < 0 || offset + len > adsp->mem_size)
  143. return NULL;
  144. return adsp->mem_region + offset;
  145. }
  146. static const struct rproc_ops adsp_ops = {
  147. .start = adsp_start,
  148. .stop = adsp_stop,
  149. .da_to_va = adsp_da_to_va,
  150. .parse_fw = qcom_register_dump_segments,
  151. .load = adsp_load,
  152. };
  153. static irqreturn_t adsp_wdog_interrupt(int irq, void *dev)
  154. {
  155. struct qcom_adsp *adsp = dev;
  156. rproc_report_crash(adsp->rproc, RPROC_WATCHDOG);
  157. return IRQ_HANDLED;
  158. }
  159. static irqreturn_t adsp_fatal_interrupt(int irq, void *dev)
  160. {
  161. struct qcom_adsp *adsp = dev;
  162. size_t len;
  163. char *msg;
  164. msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, adsp->crash_reason_smem, &len);
  165. if (!IS_ERR(msg) && len > 0 && msg[0])
  166. dev_err(adsp->dev, "fatal error received: %s\n", msg);
  167. rproc_report_crash(adsp->rproc, RPROC_FATAL_ERROR);
  168. return IRQ_HANDLED;
  169. }
  170. static irqreturn_t adsp_ready_interrupt(int irq, void *dev)
  171. {
  172. return IRQ_HANDLED;
  173. }
  174. static irqreturn_t adsp_handover_interrupt(int irq, void *dev)
  175. {
  176. struct qcom_adsp *adsp = dev;
  177. complete(&adsp->start_done);
  178. return IRQ_HANDLED;
  179. }
  180. static irqreturn_t adsp_stop_ack_interrupt(int irq, void *dev)
  181. {
  182. struct qcom_adsp *adsp = dev;
  183. complete(&adsp->stop_done);
  184. return IRQ_HANDLED;
  185. }
  186. static int adsp_init_clock(struct qcom_adsp *adsp)
  187. {
  188. int ret;
  189. adsp->xo = devm_clk_get(adsp->dev, "xo");
  190. if (IS_ERR(adsp->xo)) {
  191. ret = PTR_ERR(adsp->xo);
  192. if (ret != -EPROBE_DEFER)
  193. dev_err(adsp->dev, "failed to get xo clock");
  194. return ret;
  195. }
  196. if (adsp->has_aggre2_clk) {
  197. adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
  198. if (IS_ERR(adsp->aggre2_clk)) {
  199. ret = PTR_ERR(adsp->aggre2_clk);
  200. if (ret != -EPROBE_DEFER)
  201. dev_err(adsp->dev,
  202. "failed to get aggre2 clock");
  203. return ret;
  204. }
  205. }
  206. return 0;
  207. }
  208. static int adsp_init_regulator(struct qcom_adsp *adsp)
  209. {
  210. adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
  211. if (IS_ERR(adsp->cx_supply))
  212. return PTR_ERR(adsp->cx_supply);
  213. regulator_set_load(adsp->cx_supply, 100000);
  214. adsp->px_supply = devm_regulator_get(adsp->dev, "px");
  215. return PTR_ERR_OR_ZERO(adsp->px_supply);
  216. }
  217. static int adsp_request_irq(struct qcom_adsp *adsp,
  218. struct platform_device *pdev,
  219. const char *name,
  220. irq_handler_t thread_fn)
  221. {
  222. int ret;
  223. ret = platform_get_irq_byname(pdev, name);
  224. if (ret < 0) {
  225. dev_err(&pdev->dev, "no %s IRQ defined\n", name);
  226. return ret;
  227. }
  228. ret = devm_request_threaded_irq(&pdev->dev, ret,
  229. NULL, thread_fn,
  230. IRQF_ONESHOT,
  231. "adsp", adsp);
  232. if (ret)
  233. dev_err(&pdev->dev, "request %s IRQ failed\n", name);
  234. return ret;
  235. }
  236. static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
  237. {
  238. struct device_node *node;
  239. struct resource r;
  240. int ret;
  241. node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
  242. if (!node) {
  243. dev_err(adsp->dev, "no memory-region specified\n");
  244. return -EINVAL;
  245. }
  246. ret = of_address_to_resource(node, 0, &r);
  247. if (ret)
  248. return ret;
  249. adsp->mem_phys = adsp->mem_reloc = r.start;
  250. adsp->mem_size = resource_size(&r);
  251. adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
  252. if (!adsp->mem_region) {
  253. dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
  254. &r.start, adsp->mem_size);
  255. return -EBUSY;
  256. }
  257. return 0;
  258. }
  259. static int adsp_probe(struct platform_device *pdev)
  260. {
  261. const struct adsp_data *desc;
  262. struct qcom_adsp *adsp;
  263. struct rproc *rproc;
  264. int ret;
  265. desc = of_device_get_match_data(&pdev->dev);
  266. if (!desc)
  267. return -EINVAL;
  268. if (!qcom_scm_is_available())
  269. return -EPROBE_DEFER;
  270. rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops,
  271. desc->firmware_name, sizeof(*adsp));
  272. if (!rproc) {
  273. dev_err(&pdev->dev, "unable to allocate remoteproc\n");
  274. return -ENOMEM;
  275. }
  276. adsp = (struct qcom_adsp *)rproc->priv;
  277. adsp->dev = &pdev->dev;
  278. adsp->rproc = rproc;
  279. adsp->pas_id = desc->pas_id;
  280. adsp->crash_reason_smem = desc->crash_reason_smem;
  281. adsp->has_aggre2_clk = desc->has_aggre2_clk;
  282. platform_set_drvdata(pdev, adsp);
  283. init_completion(&adsp->start_done);
  284. init_completion(&adsp->stop_done);
  285. ret = adsp_alloc_memory_region(adsp);
  286. if (ret)
  287. goto free_rproc;
  288. ret = adsp_init_clock(adsp);
  289. if (ret)
  290. goto free_rproc;
  291. ret = adsp_init_regulator(adsp);
  292. if (ret)
  293. goto free_rproc;
  294. ret = adsp_request_irq(adsp, pdev, "wdog", adsp_wdog_interrupt);
  295. if (ret < 0)
  296. goto free_rproc;
  297. adsp->wdog_irq = ret;
  298. ret = adsp_request_irq(adsp, pdev, "fatal", adsp_fatal_interrupt);
  299. if (ret < 0)
  300. goto free_rproc;
  301. adsp->fatal_irq = ret;
  302. ret = adsp_request_irq(adsp, pdev, "ready", adsp_ready_interrupt);
  303. if (ret < 0)
  304. goto free_rproc;
  305. adsp->ready_irq = ret;
  306. ret = adsp_request_irq(adsp, pdev, "handover", adsp_handover_interrupt);
  307. if (ret < 0)
  308. goto free_rproc;
  309. adsp->handover_irq = ret;
  310. ret = adsp_request_irq(adsp, pdev, "stop-ack", adsp_stop_ack_interrupt);
  311. if (ret < 0)
  312. goto free_rproc;
  313. adsp->stop_ack_irq = ret;
  314. adsp->state = qcom_smem_state_get(&pdev->dev, "stop",
  315. &adsp->stop_bit);
  316. if (IS_ERR(adsp->state)) {
  317. ret = PTR_ERR(adsp->state);
  318. goto free_rproc;
  319. }
  320. qcom_add_glink_subdev(rproc, &adsp->glink_subdev);
  321. qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
  322. qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
  323. adsp->sysmon = qcom_add_sysmon_subdev(rproc,
  324. desc->sysmon_name,
  325. desc->ssctl_id);
  326. ret = rproc_add(rproc);
  327. if (ret)
  328. goto free_rproc;
  329. return 0;
  330. free_rproc:
  331. rproc_free(rproc);
  332. return ret;
  333. }
  334. static int adsp_remove(struct platform_device *pdev)
  335. {
  336. struct qcom_adsp *adsp = platform_get_drvdata(pdev);
  337. qcom_smem_state_put(adsp->state);
  338. rproc_del(adsp->rproc);
  339. qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
  340. qcom_remove_sysmon_subdev(adsp->sysmon);
  341. qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
  342. qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
  343. rproc_free(adsp->rproc);
  344. return 0;
  345. }
  346. static const struct adsp_data adsp_resource_init = {
  347. .crash_reason_smem = 423,
  348. .firmware_name = "adsp.mdt",
  349. .pas_id = 1,
  350. .has_aggre2_clk = false,
  351. .ssr_name = "lpass",
  352. .sysmon_name = "adsp",
  353. .ssctl_id = 0x14,
  354. };
  355. static const struct adsp_data slpi_resource_init = {
  356. .crash_reason_smem = 424,
  357. .firmware_name = "slpi.mdt",
  358. .pas_id = 12,
  359. .has_aggre2_clk = true,
  360. .ssr_name = "dsps",
  361. .sysmon_name = "slpi",
  362. .ssctl_id = 0x16,
  363. };
  364. static const struct of_device_id adsp_of_match[] = {
  365. { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
  366. { .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init},
  367. { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
  368. { },
  369. };
  370. MODULE_DEVICE_TABLE(of, adsp_of_match);
  371. static struct platform_driver adsp_driver = {
  372. .probe = adsp_probe,
  373. .remove = adsp_remove,
  374. .driver = {
  375. .name = "qcom_adsp_pil",
  376. .of_match_table = adsp_of_match,
  377. },
  378. };
  379. module_platform_driver(adsp_driver);
  380. MODULE_DESCRIPTION("Qualcomm MSM8974/MSM8996 ADSP Peripherial Image Loader");
  381. MODULE_LICENSE("GPL v2");