msm_drv.h 12 KB

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  1. /*
  2. * Copyright (C) 2013 Red Hat
  3. * Author: Rob Clark <robdclark@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __MSM_DRV_H__
  18. #define __MSM_DRV_H__
  19. #include <linux/kernel.h>
  20. #include <linux/clk.h>
  21. #include <linux/cpufreq.h>
  22. #include <linux/module.h>
  23. #include <linux/component.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/pm.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/slab.h>
  28. #include <linux/list.h>
  29. #include <linux/iommu.h>
  30. #include <linux/types.h>
  31. #include <linux/of_graph.h>
  32. #include <linux/of_device.h>
  33. #include <asm/sizes.h>
  34. #include <drm/drmP.h>
  35. #include <drm/drm_atomic.h>
  36. #include <drm/drm_atomic_helper.h>
  37. #include <drm/drm_crtc_helper.h>
  38. #include <drm/drm_plane_helper.h>
  39. #include <drm/drm_fb_helper.h>
  40. #include <drm/msm_drm.h>
  41. #include <drm/drm_gem.h>
  42. struct msm_kms;
  43. struct msm_gpu;
  44. struct msm_mmu;
  45. struct msm_mdss;
  46. struct msm_rd_state;
  47. struct msm_perf_state;
  48. struct msm_gem_submit;
  49. struct msm_fence_context;
  50. struct msm_gem_address_space;
  51. struct msm_gem_vma;
  52. struct msm_file_private {
  53. rwlock_t queuelock;
  54. struct list_head submitqueues;
  55. int queueid;
  56. };
  57. enum msm_mdp_plane_property {
  58. PLANE_PROP_ZPOS,
  59. PLANE_PROP_ALPHA,
  60. PLANE_PROP_PREMULTIPLIED,
  61. PLANE_PROP_MAX_NUM
  62. };
  63. struct msm_vblank_ctrl {
  64. struct work_struct work;
  65. struct list_head event_list;
  66. spinlock_t lock;
  67. };
  68. #define MSM_GPU_MAX_RINGS 4
  69. struct msm_drm_private {
  70. struct drm_device *dev;
  71. struct msm_kms *kms;
  72. /* subordinate devices, if present: */
  73. struct platform_device *gpu_pdev;
  74. /* top level MDSS wrapper device (for MDP5 only) */
  75. struct msm_mdss *mdss;
  76. /* possibly this should be in the kms component, but it is
  77. * shared by both mdp4 and mdp5..
  78. */
  79. struct hdmi *hdmi;
  80. /* eDP is for mdp5 only, but kms has not been created
  81. * when edp_bind() and edp_init() are called. Here is the only
  82. * place to keep the edp instance.
  83. */
  84. struct msm_edp *edp;
  85. /* DSI is shared by mdp4 and mdp5 */
  86. struct msm_dsi *dsi[2];
  87. /* when we have more than one 'msm_gpu' these need to be an array: */
  88. struct msm_gpu *gpu;
  89. struct msm_file_private *lastctx;
  90. struct drm_fb_helper *fbdev;
  91. struct msm_rd_state *rd; /* debugfs to dump all submits */
  92. struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */
  93. struct msm_perf_state *perf;
  94. /* list of GEM objects: */
  95. struct list_head inactive_list;
  96. struct workqueue_struct *wq;
  97. struct workqueue_struct *atomic_wq;
  98. /* crtcs pending async atomic updates: */
  99. uint32_t pending_crtcs;
  100. wait_queue_head_t pending_crtcs_event;
  101. unsigned int num_planes;
  102. struct drm_plane *planes[16];
  103. unsigned int num_crtcs;
  104. struct drm_crtc *crtcs[8];
  105. unsigned int num_encoders;
  106. struct drm_encoder *encoders[8];
  107. unsigned int num_bridges;
  108. struct drm_bridge *bridges[8];
  109. unsigned int num_connectors;
  110. struct drm_connector *connectors[8];
  111. /* Properties */
  112. struct drm_property *plane_property[PLANE_PROP_MAX_NUM];
  113. /* VRAM carveout, used when no IOMMU: */
  114. struct {
  115. unsigned long size;
  116. dma_addr_t paddr;
  117. /* NOTE: mm managed at the page level, size is in # of pages
  118. * and position mm_node->start is in # of pages:
  119. */
  120. struct drm_mm mm;
  121. spinlock_t lock; /* Protects drm_mm node allocation/removal */
  122. } vram;
  123. struct notifier_block vmap_notifier;
  124. struct shrinker shrinker;
  125. struct msm_vblank_ctrl vblank_ctrl;
  126. };
  127. struct msm_format {
  128. uint32_t pixel_format;
  129. };
  130. int msm_atomic_commit(struct drm_device *dev,
  131. struct drm_atomic_state *state, bool nonblock);
  132. struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
  133. void msm_atomic_state_clear(struct drm_atomic_state *state);
  134. void msm_atomic_state_free(struct drm_atomic_state *state);
  135. void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
  136. struct msm_gem_vma *vma, struct sg_table *sgt);
  137. int msm_gem_map_vma(struct msm_gem_address_space *aspace,
  138. struct msm_gem_vma *vma, struct sg_table *sgt, int npages);
  139. void msm_gem_address_space_put(struct msm_gem_address_space *aspace);
  140. struct msm_gem_address_space *
  141. msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
  142. const char *name);
  143. void msm_gem_submit_free(struct msm_gem_submit *submit);
  144. int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
  145. struct drm_file *file);
  146. void msm_gem_shrinker_init(struct drm_device *dev);
  147. void msm_gem_shrinker_cleanup(struct drm_device *dev);
  148. int msm_gem_mmap_obj(struct drm_gem_object *obj,
  149. struct vm_area_struct *vma);
  150. int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
  151. int msm_gem_fault(struct vm_fault *vmf);
  152. uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
  153. int msm_gem_get_iova(struct drm_gem_object *obj,
  154. struct msm_gem_address_space *aspace, uint64_t *iova);
  155. uint64_t msm_gem_iova(struct drm_gem_object *obj,
  156. struct msm_gem_address_space *aspace);
  157. struct page **msm_gem_get_pages(struct drm_gem_object *obj);
  158. void msm_gem_put_pages(struct drm_gem_object *obj);
  159. void msm_gem_put_iova(struct drm_gem_object *obj,
  160. struct msm_gem_address_space *aspace);
  161. int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
  162. struct drm_mode_create_dumb *args);
  163. int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
  164. uint32_t handle, uint64_t *offset);
  165. struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
  166. void *msm_gem_prime_vmap(struct drm_gem_object *obj);
  167. void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
  168. int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
  169. struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj);
  170. struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
  171. struct dma_buf_attachment *attach, struct sg_table *sg);
  172. int msm_gem_prime_pin(struct drm_gem_object *obj);
  173. void msm_gem_prime_unpin(struct drm_gem_object *obj);
  174. void *msm_gem_get_vaddr(struct drm_gem_object *obj);
  175. void *msm_gem_get_vaddr_active(struct drm_gem_object *obj);
  176. void msm_gem_put_vaddr(struct drm_gem_object *obj);
  177. int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
  178. int msm_gem_sync_object(struct drm_gem_object *obj,
  179. struct msm_fence_context *fctx, bool exclusive);
  180. void msm_gem_move_to_active(struct drm_gem_object *obj,
  181. struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
  182. void msm_gem_move_to_inactive(struct drm_gem_object *obj);
  183. int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout);
  184. int msm_gem_cpu_fini(struct drm_gem_object *obj);
  185. void msm_gem_free_object(struct drm_gem_object *obj);
  186. int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
  187. uint32_t size, uint32_t flags, uint32_t *handle);
  188. struct drm_gem_object *msm_gem_new(struct drm_device *dev,
  189. uint32_t size, uint32_t flags);
  190. struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev,
  191. uint32_t size, uint32_t flags);
  192. void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
  193. uint32_t flags, struct msm_gem_address_space *aspace,
  194. struct drm_gem_object **bo, uint64_t *iova);
  195. void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
  196. uint32_t flags, struct msm_gem_address_space *aspace,
  197. struct drm_gem_object **bo, uint64_t *iova);
  198. struct drm_gem_object *msm_gem_import(struct drm_device *dev,
  199. struct dma_buf *dmabuf, struct sg_table *sgt);
  200. int msm_framebuffer_prepare(struct drm_framebuffer *fb,
  201. struct msm_gem_address_space *aspace);
  202. void msm_framebuffer_cleanup(struct drm_framebuffer *fb,
  203. struct msm_gem_address_space *aspace);
  204. uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb,
  205. struct msm_gem_address_space *aspace, int plane);
  206. struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
  207. const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
  208. struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
  209. struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
  210. struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev,
  211. int w, int h, int p, uint32_t format);
  212. struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
  213. void msm_fbdev_free(struct drm_device *dev);
  214. struct hdmi;
  215. int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
  216. struct drm_encoder *encoder);
  217. void __init msm_hdmi_register(void);
  218. void __exit msm_hdmi_unregister(void);
  219. struct msm_edp;
  220. void __init msm_edp_register(void);
  221. void __exit msm_edp_unregister(void);
  222. int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
  223. struct drm_encoder *encoder);
  224. struct msm_dsi;
  225. #ifdef CONFIG_DRM_MSM_DSI
  226. void __init msm_dsi_register(void);
  227. void __exit msm_dsi_unregister(void);
  228. int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
  229. struct drm_encoder *encoder);
  230. #else
  231. static inline void __init msm_dsi_register(void)
  232. {
  233. }
  234. static inline void __exit msm_dsi_unregister(void)
  235. {
  236. }
  237. static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
  238. struct drm_device *dev,
  239. struct drm_encoder *encoder)
  240. {
  241. return -EINVAL;
  242. }
  243. #endif
  244. void __init msm_mdp_register(void);
  245. void __exit msm_mdp_unregister(void);
  246. #ifdef CONFIG_DEBUG_FS
  247. void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
  248. void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
  249. void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
  250. int msm_debugfs_late_init(struct drm_device *dev);
  251. int msm_rd_debugfs_init(struct drm_minor *minor);
  252. void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
  253. void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
  254. const char *fmt, ...);
  255. int msm_perf_debugfs_init(struct drm_minor *minor);
  256. void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
  257. #else
  258. static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
  259. static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
  260. const char *fmt, ...) {}
  261. static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
  262. static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {}
  263. #endif
  264. struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
  265. void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  266. const char *dbgname);
  267. void msm_writel(u32 data, void __iomem *addr);
  268. u32 msm_readl(const void __iomem *addr);
  269. struct msm_gpu_submitqueue;
  270. int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx);
  271. struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx,
  272. u32 id);
  273. int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx,
  274. u32 prio, u32 flags, u32 *id);
  275. int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id);
  276. void msm_submitqueue_close(struct msm_file_private *ctx);
  277. void msm_submitqueue_destroy(struct kref *kref);
  278. #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
  279. #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
  280. static inline int align_pitch(int width, int bpp)
  281. {
  282. int bytespp = (bpp + 7) / 8;
  283. /* adreno needs pitch aligned to 32 pixels: */
  284. return bytespp * ALIGN(width, 32);
  285. }
  286. /* for the generated headers: */
  287. #define INVALID_IDX(idx) ({BUG(); 0;})
  288. #define fui(x) ({BUG(); 0;})
  289. #define util_float_to_half(x) ({BUG(); 0;})
  290. #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
  291. /* for conditionally setting boolean flag(s): */
  292. #define COND(bool, val) ((bool) ? (val) : 0)
  293. static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
  294. {
  295. ktime_t now = ktime_get();
  296. unsigned long remaining_jiffies;
  297. if (ktime_compare(*timeout, now) < 0) {
  298. remaining_jiffies = 0;
  299. } else {
  300. ktime_t rem = ktime_sub(*timeout, now);
  301. struct timespec ts = ktime_to_timespec(rem);
  302. remaining_jiffies = timespec_to_jiffies(&ts);
  303. }
  304. return remaining_jiffies;
  305. }
  306. #endif /* __MSM_DRV_H__ */