atmel_hlcdc_dc.c 14 KB

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  1. /*
  2. * Copyright (C) 2014 Traphandler
  3. * Copyright (C) 2014 Free Electrons
  4. * Copyright (C) 2014 Atmel
  5. *
  6. * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
  7. * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 as published by
  11. * the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along with
  19. * this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/clk.h>
  22. #include <linux/irq.h>
  23. #include <linux/irqchip.h>
  24. #include <linux/module.h>
  25. #include <linux/pm_runtime.h>
  26. #include "atmel_hlcdc_dc.h"
  27. #define ATMEL_HLCDC_LAYER_IRQS_OFFSET 8
  28. static const struct atmel_hlcdc_layer_desc atmel_hlcdc_sama5d3_layers[] = {
  29. {
  30. .name = "base",
  31. .formats = &atmel_hlcdc_plane_rgb_formats,
  32. .regs_offset = 0x40,
  33. .id = 0,
  34. .type = ATMEL_HLCDC_BASE_LAYER,
  35. .nconfigs = 7,
  36. .layout = {
  37. .xstride = { 2 },
  38. .default_color = 3,
  39. .general_config = 4,
  40. .disc_pos = 5,
  41. .disc_size = 6,
  42. },
  43. },
  44. {
  45. .name = "overlay1",
  46. .formats = &atmel_hlcdc_plane_rgb_formats,
  47. .regs_offset = 0x140,
  48. .id = 1,
  49. .type = ATMEL_HLCDC_OVERLAY_LAYER,
  50. .nconfigs = 10,
  51. .layout = {
  52. .pos = 2,
  53. .size = 3,
  54. .xstride = { 4 },
  55. .pstride = { 5 },
  56. .default_color = 6,
  57. .chroma_key = 7,
  58. .chroma_key_mask = 8,
  59. .general_config = 9,
  60. },
  61. },
  62. {
  63. .name = "overlay2",
  64. .formats = &atmel_hlcdc_plane_rgb_formats,
  65. .regs_offset = 0x240,
  66. .id = 2,
  67. .type = ATMEL_HLCDC_OVERLAY_LAYER,
  68. .nconfigs = 10,
  69. .layout = {
  70. .pos = 2,
  71. .size = 3,
  72. .xstride = { 4 },
  73. .pstride = { 5 },
  74. .default_color = 6,
  75. .chroma_key = 7,
  76. .chroma_key_mask = 8,
  77. .general_config = 9,
  78. },
  79. },
  80. {
  81. .name = "high-end-overlay",
  82. .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
  83. .regs_offset = 0x340,
  84. .id = 3,
  85. .type = ATMEL_HLCDC_OVERLAY_LAYER,
  86. .nconfigs = 42,
  87. .layout = {
  88. .pos = 2,
  89. .size = 3,
  90. .memsize = 4,
  91. .xstride = { 5, 7 },
  92. .pstride = { 6, 8 },
  93. .default_color = 9,
  94. .chroma_key = 10,
  95. .chroma_key_mask = 11,
  96. .general_config = 12,
  97. .csc = 14,
  98. },
  99. },
  100. {
  101. .name = "cursor",
  102. .formats = &atmel_hlcdc_plane_rgb_formats,
  103. .regs_offset = 0x440,
  104. .id = 4,
  105. .type = ATMEL_HLCDC_CURSOR_LAYER,
  106. .nconfigs = 10,
  107. .max_width = 128,
  108. .max_height = 128,
  109. .layout = {
  110. .pos = 2,
  111. .size = 3,
  112. .xstride = { 4 },
  113. .pstride = { 5 },
  114. .default_color = 6,
  115. .chroma_key = 7,
  116. .chroma_key_mask = 8,
  117. .general_config = 9,
  118. },
  119. },
  120. };
  121. static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d3 = {
  122. .min_width = 0,
  123. .min_height = 0,
  124. .max_width = 2048,
  125. .max_height = 2048,
  126. .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d3_layers),
  127. .layers = atmel_hlcdc_sama5d3_layers,
  128. };
  129. static const struct of_device_id atmel_hlcdc_of_match[] = {
  130. {
  131. .compatible = "atmel,sama5d3-hlcdc",
  132. .data = &atmel_hlcdc_dc_sama5d3,
  133. },
  134. { /* sentinel */ },
  135. };
  136. int atmel_hlcdc_dc_mode_valid(struct atmel_hlcdc_dc *dc,
  137. struct drm_display_mode *mode)
  138. {
  139. int vfront_porch = mode->vsync_start - mode->vdisplay;
  140. int vback_porch = mode->vtotal - mode->vsync_end;
  141. int vsync_len = mode->vsync_end - mode->vsync_start;
  142. int hfront_porch = mode->hsync_start - mode->hdisplay;
  143. int hback_porch = mode->htotal - mode->hsync_end;
  144. int hsync_len = mode->hsync_end - mode->hsync_start;
  145. if (hsync_len > 0x40 || hsync_len < 1)
  146. return MODE_HSYNC;
  147. if (vsync_len > 0x40 || vsync_len < 1)
  148. return MODE_VSYNC;
  149. if (hfront_porch > 0x200 || hfront_porch < 1 ||
  150. hback_porch > 0x200 || hback_porch < 1 ||
  151. mode->hdisplay < 1)
  152. return MODE_H_ILLEGAL;
  153. if (vfront_porch > 0x40 || vfront_porch < 1 ||
  154. vback_porch > 0x40 || vback_porch < 0 ||
  155. mode->vdisplay < 1)
  156. return MODE_V_ILLEGAL;
  157. return MODE_OK;
  158. }
  159. static irqreturn_t atmel_hlcdc_dc_irq_handler(int irq, void *data)
  160. {
  161. struct drm_device *dev = data;
  162. struct atmel_hlcdc_dc *dc = dev->dev_private;
  163. unsigned long status;
  164. unsigned int imr, isr;
  165. int i;
  166. regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_IMR, &imr);
  167. regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_ISR, &isr);
  168. status = imr & isr;
  169. if (!status)
  170. return IRQ_NONE;
  171. if (status & ATMEL_HLCDC_SOF)
  172. atmel_hlcdc_crtc_irq(dc->crtc);
  173. for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
  174. struct atmel_hlcdc_layer *layer = dc->layers[i];
  175. if (!(ATMEL_HLCDC_LAYER_STATUS(i) & status) || !layer)
  176. continue;
  177. atmel_hlcdc_layer_irq(layer);
  178. }
  179. return IRQ_HANDLED;
  180. }
  181. static struct drm_framebuffer *atmel_hlcdc_fb_create(struct drm_device *dev,
  182. struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
  183. {
  184. return drm_fb_cma_create(dev, file_priv, mode_cmd);
  185. }
  186. static void atmel_hlcdc_fb_output_poll_changed(struct drm_device *dev)
  187. {
  188. struct atmel_hlcdc_dc *dc = dev->dev_private;
  189. if (dc->fbdev) {
  190. drm_fbdev_cma_hotplug_event(dc->fbdev);
  191. } else {
  192. dc->fbdev = drm_fbdev_cma_init(dev, 24,
  193. dev->mode_config.num_crtc,
  194. dev->mode_config.num_connector);
  195. if (IS_ERR(dc->fbdev))
  196. dc->fbdev = NULL;
  197. }
  198. }
  199. static const struct drm_mode_config_funcs mode_config_funcs = {
  200. .fb_create = atmel_hlcdc_fb_create,
  201. .output_poll_changed = atmel_hlcdc_fb_output_poll_changed,
  202. };
  203. static int atmel_hlcdc_dc_modeset_init(struct drm_device *dev)
  204. {
  205. struct atmel_hlcdc_dc *dc = dev->dev_private;
  206. struct atmel_hlcdc_planes *planes;
  207. int ret;
  208. int i;
  209. drm_mode_config_init(dev);
  210. ret = atmel_hlcdc_create_outputs(dev);
  211. if (ret) {
  212. dev_err(dev->dev, "failed to create panel: %d\n", ret);
  213. return ret;
  214. }
  215. planes = atmel_hlcdc_create_planes(dev);
  216. if (IS_ERR(planes)) {
  217. dev_err(dev->dev, "failed to create planes\n");
  218. return PTR_ERR(planes);
  219. }
  220. dc->planes = planes;
  221. dc->layers[planes->primary->layer.desc->id] =
  222. &planes->primary->layer;
  223. if (planes->cursor)
  224. dc->layers[planes->cursor->layer.desc->id] =
  225. &planes->cursor->layer;
  226. for (i = 0; i < planes->noverlays; i++)
  227. dc->layers[planes->overlays[i]->layer.desc->id] =
  228. &planes->overlays[i]->layer;
  229. ret = atmel_hlcdc_crtc_create(dev);
  230. if (ret) {
  231. dev_err(dev->dev, "failed to create crtc\n");
  232. return ret;
  233. }
  234. dev->mode_config.min_width = dc->desc->min_width;
  235. dev->mode_config.min_height = dc->desc->min_height;
  236. dev->mode_config.max_width = dc->desc->max_width;
  237. dev->mode_config.max_height = dc->desc->max_height;
  238. dev->mode_config.funcs = &mode_config_funcs;
  239. return 0;
  240. }
  241. static int atmel_hlcdc_dc_load(struct drm_device *dev)
  242. {
  243. struct platform_device *pdev = to_platform_device(dev->dev);
  244. const struct of_device_id *match;
  245. struct atmel_hlcdc_dc *dc;
  246. int ret;
  247. match = of_match_node(atmel_hlcdc_of_match, dev->dev->parent->of_node);
  248. if (!match) {
  249. dev_err(&pdev->dev, "invalid compatible string\n");
  250. return -ENODEV;
  251. }
  252. if (!match->data) {
  253. dev_err(&pdev->dev, "invalid hlcdc description\n");
  254. return -EINVAL;
  255. }
  256. dc = devm_kzalloc(dev->dev, sizeof(*dc), GFP_KERNEL);
  257. if (!dc)
  258. return -ENOMEM;
  259. dc->wq = alloc_ordered_workqueue("atmel-hlcdc-dc", 0);
  260. if (!dc->wq)
  261. return -ENOMEM;
  262. dc->desc = match->data;
  263. dc->hlcdc = dev_get_drvdata(dev->dev->parent);
  264. dev->dev_private = dc;
  265. ret = clk_prepare_enable(dc->hlcdc->periph_clk);
  266. if (ret) {
  267. dev_err(dev->dev, "failed to enable periph_clk\n");
  268. goto err_destroy_wq;
  269. }
  270. pm_runtime_enable(dev->dev);
  271. pm_runtime_put_sync(dev->dev);
  272. ret = atmel_hlcdc_dc_modeset_init(dev);
  273. if (ret < 0) {
  274. dev_err(dev->dev, "failed to initialize mode setting\n");
  275. goto err_periph_clk_disable;
  276. }
  277. ret = drm_vblank_init(dev, 1);
  278. if (ret < 0) {
  279. dev_err(dev->dev, "failed to initialize vblank\n");
  280. goto err_periph_clk_disable;
  281. }
  282. pm_runtime_get_sync(dev->dev);
  283. ret = drm_irq_install(dev, dc->hlcdc->irq);
  284. pm_runtime_put_sync(dev->dev);
  285. if (ret < 0) {
  286. dev_err(dev->dev, "failed to install IRQ handler\n");
  287. goto err_periph_clk_disable;
  288. }
  289. platform_set_drvdata(pdev, dev);
  290. drm_kms_helper_poll_init(dev);
  291. /* force connectors detection */
  292. drm_helper_hpd_irq_event(dev);
  293. return 0;
  294. err_periph_clk_disable:
  295. pm_runtime_disable(dev->dev);
  296. clk_disable_unprepare(dc->hlcdc->periph_clk);
  297. err_destroy_wq:
  298. destroy_workqueue(dc->wq);
  299. return ret;
  300. }
  301. static void atmel_hlcdc_dc_unload(struct drm_device *dev)
  302. {
  303. struct atmel_hlcdc_dc *dc = dev->dev_private;
  304. if (dc->fbdev)
  305. drm_fbdev_cma_fini(dc->fbdev);
  306. flush_workqueue(dc->wq);
  307. drm_kms_helper_poll_fini(dev);
  308. drm_mode_config_cleanup(dev);
  309. drm_vblank_cleanup(dev);
  310. pm_runtime_get_sync(dev->dev);
  311. drm_irq_uninstall(dev);
  312. pm_runtime_put_sync(dev->dev);
  313. dev->dev_private = NULL;
  314. pm_runtime_disable(dev->dev);
  315. clk_disable_unprepare(dc->hlcdc->periph_clk);
  316. destroy_workqueue(dc->wq);
  317. }
  318. static int atmel_hlcdc_dc_connector_plug_all(struct drm_device *dev)
  319. {
  320. struct drm_connector *connector, *failed;
  321. int ret;
  322. mutex_lock(&dev->mode_config.mutex);
  323. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  324. ret = drm_connector_register(connector);
  325. if (ret) {
  326. failed = connector;
  327. goto err;
  328. }
  329. }
  330. mutex_unlock(&dev->mode_config.mutex);
  331. return 0;
  332. err:
  333. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  334. if (failed == connector)
  335. break;
  336. drm_connector_unregister(connector);
  337. }
  338. mutex_unlock(&dev->mode_config.mutex);
  339. return ret;
  340. }
  341. static void atmel_hlcdc_dc_connector_unplug_all(struct drm_device *dev)
  342. {
  343. mutex_lock(&dev->mode_config.mutex);
  344. drm_connector_unplug_all(dev);
  345. mutex_unlock(&dev->mode_config.mutex);
  346. }
  347. static void atmel_hlcdc_dc_preclose(struct drm_device *dev,
  348. struct drm_file *file)
  349. {
  350. struct drm_crtc *crtc;
  351. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
  352. atmel_hlcdc_crtc_cancel_page_flip(crtc, file);
  353. }
  354. static void atmel_hlcdc_dc_lastclose(struct drm_device *dev)
  355. {
  356. struct atmel_hlcdc_dc *dc = dev->dev_private;
  357. drm_fbdev_cma_restore_mode(dc->fbdev);
  358. }
  359. static int atmel_hlcdc_dc_irq_postinstall(struct drm_device *dev)
  360. {
  361. struct atmel_hlcdc_dc *dc = dev->dev_private;
  362. unsigned int cfg = 0;
  363. int i;
  364. /* Enable interrupts on activated layers */
  365. for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
  366. if (dc->layers[i])
  367. cfg |= ATMEL_HLCDC_LAYER_STATUS(i);
  368. }
  369. regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IER, cfg);
  370. return 0;
  371. }
  372. static void atmel_hlcdc_dc_irq_uninstall(struct drm_device *dev)
  373. {
  374. struct atmel_hlcdc_dc *dc = dev->dev_private;
  375. unsigned int isr;
  376. regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IDR, 0xffffffff);
  377. regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_ISR, &isr);
  378. }
  379. static int atmel_hlcdc_dc_enable_vblank(struct drm_device *dev, int crtc)
  380. {
  381. struct atmel_hlcdc_dc *dc = dev->dev_private;
  382. /* Enable SOF (Start Of Frame) interrupt for vblank counting */
  383. regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IER, ATMEL_HLCDC_SOF);
  384. return 0;
  385. }
  386. static void atmel_hlcdc_dc_disable_vblank(struct drm_device *dev, int crtc)
  387. {
  388. struct atmel_hlcdc_dc *dc = dev->dev_private;
  389. regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IDR, ATMEL_HLCDC_SOF);
  390. }
  391. static const struct file_operations fops = {
  392. .owner = THIS_MODULE,
  393. .open = drm_open,
  394. .release = drm_release,
  395. .unlocked_ioctl = drm_ioctl,
  396. #ifdef CONFIG_COMPAT
  397. .compat_ioctl = drm_compat_ioctl,
  398. #endif
  399. .poll = drm_poll,
  400. .read = drm_read,
  401. .llseek = no_llseek,
  402. .mmap = drm_gem_cma_mmap,
  403. };
  404. static struct drm_driver atmel_hlcdc_dc_driver = {
  405. .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
  406. .preclose = atmel_hlcdc_dc_preclose,
  407. .lastclose = atmel_hlcdc_dc_lastclose,
  408. .irq_handler = atmel_hlcdc_dc_irq_handler,
  409. .irq_preinstall = atmel_hlcdc_dc_irq_uninstall,
  410. .irq_postinstall = atmel_hlcdc_dc_irq_postinstall,
  411. .irq_uninstall = atmel_hlcdc_dc_irq_uninstall,
  412. .get_vblank_counter = drm_vblank_count,
  413. .enable_vblank = atmel_hlcdc_dc_enable_vblank,
  414. .disable_vblank = atmel_hlcdc_dc_disable_vblank,
  415. .gem_free_object = drm_gem_cma_free_object,
  416. .gem_vm_ops = &drm_gem_cma_vm_ops,
  417. .dumb_create = drm_gem_cma_dumb_create,
  418. .dumb_map_offset = drm_gem_cma_dumb_map_offset,
  419. .dumb_destroy = drm_gem_dumb_destroy,
  420. .fops = &fops,
  421. .name = "atmel-hlcdc",
  422. .desc = "Atmel HLCD Controller DRM",
  423. .date = "20141504",
  424. .major = 1,
  425. .minor = 0,
  426. };
  427. static int atmel_hlcdc_dc_drm_probe(struct platform_device *pdev)
  428. {
  429. struct drm_device *ddev;
  430. int ret;
  431. ddev = drm_dev_alloc(&atmel_hlcdc_dc_driver, &pdev->dev);
  432. if (!ddev)
  433. return -ENOMEM;
  434. ret = drm_dev_set_unique(ddev, dev_name(ddev->dev));
  435. if (ret)
  436. goto err_unref;
  437. ret = atmel_hlcdc_dc_load(ddev);
  438. if (ret)
  439. goto err_unref;
  440. ret = drm_dev_register(ddev, 0);
  441. if (ret)
  442. goto err_unload;
  443. ret = atmel_hlcdc_dc_connector_plug_all(ddev);
  444. if (ret)
  445. goto err_unregister;
  446. return 0;
  447. err_unregister:
  448. drm_dev_unregister(ddev);
  449. err_unload:
  450. atmel_hlcdc_dc_unload(ddev);
  451. err_unref:
  452. drm_dev_unref(ddev);
  453. return ret;
  454. }
  455. static int atmel_hlcdc_dc_drm_remove(struct platform_device *pdev)
  456. {
  457. struct drm_device *ddev = platform_get_drvdata(pdev);
  458. atmel_hlcdc_dc_connector_unplug_all(ddev);
  459. drm_dev_unregister(ddev);
  460. atmel_hlcdc_dc_unload(ddev);
  461. drm_dev_unref(ddev);
  462. return 0;
  463. }
  464. static const struct of_device_id atmel_hlcdc_dc_of_match[] = {
  465. { .compatible = "atmel,hlcdc-display-controller" },
  466. { },
  467. };
  468. static struct platform_driver atmel_hlcdc_dc_platform_driver = {
  469. .probe = atmel_hlcdc_dc_drm_probe,
  470. .remove = atmel_hlcdc_dc_drm_remove,
  471. .driver = {
  472. .name = "atmel-hlcdc-display-controller",
  473. .of_match_table = atmel_hlcdc_dc_of_match,
  474. },
  475. };
  476. module_platform_driver(atmel_hlcdc_dc_platform_driver);
  477. MODULE_AUTHOR("Jean-Jacques Hiblot <jjhiblot@traphandler.com>");
  478. MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
  479. MODULE_DESCRIPTION("Atmel HLCDC Display Controller DRM Driver");
  480. MODULE_LICENSE("GPL");
  481. MODULE_ALIAS("platform:atmel-hlcdc-dc");