io.h 13 KB

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  1. /* Generic I/O port emulation, based on MN10300 code
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. #ifndef __ASM_GENERIC_IO_H
  12. #define __ASM_GENERIC_IO_H
  13. #include <asm/page.h> /* I/O is all done through memory accesses */
  14. #include <linux/string.h> /* for memset() and memcpy() */
  15. #include <linux/types.h>
  16. #ifdef CONFIG_GENERIC_IOMAP
  17. #include <asm-generic/iomap.h>
  18. #endif
  19. #include <asm-generic/pci_iomap.h>
  20. #ifndef mmiowb
  21. #define mmiowb() do {} while (0)
  22. #endif
  23. /*
  24. * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
  25. *
  26. * On some architectures memory mapped IO needs to be accessed differently.
  27. * On the simple architectures, we just read/write the memory location
  28. * directly.
  29. */
  30. #ifndef __raw_readb
  31. #define __raw_readb __raw_readb
  32. static inline u8 __raw_readb(const volatile void __iomem *addr)
  33. {
  34. return *(const volatile u8 __force *)addr;
  35. }
  36. #endif
  37. #ifndef __raw_readw
  38. #define __raw_readw __raw_readw
  39. static inline u16 __raw_readw(const volatile void __iomem *addr)
  40. {
  41. return *(const volatile u16 __force *)addr;
  42. }
  43. #endif
  44. #ifndef __raw_readl
  45. #define __raw_readl __raw_readl
  46. static inline u32 __raw_readl(const volatile void __iomem *addr)
  47. {
  48. return *(const volatile u32 __force *)addr;
  49. }
  50. #endif
  51. #ifdef CONFIG_64BIT
  52. #ifndef __raw_readq
  53. #define __raw_readq __raw_readq
  54. static inline u64 __raw_readq(const volatile void __iomem *addr)
  55. {
  56. return *(const volatile u64 __force *)addr;
  57. }
  58. #endif
  59. #endif /* CONFIG_64BIT */
  60. #ifndef __raw_writeb
  61. #define __raw_writeb __raw_writeb
  62. static inline void __raw_writeb(u8 value, volatile void __iomem *addr)
  63. {
  64. *(volatile u8 __force *)addr = value;
  65. }
  66. #endif
  67. #ifndef __raw_writew
  68. #define __raw_writew __raw_writew
  69. static inline void __raw_writew(u16 value, volatile void __iomem *addr)
  70. {
  71. *(volatile u16 __force *)addr = value;
  72. }
  73. #endif
  74. #ifndef __raw_writel
  75. #define __raw_writel __raw_writel
  76. static inline void __raw_writel(u32 value, volatile void __iomem *addr)
  77. {
  78. *(volatile u32 __force *)addr = value;
  79. }
  80. #endif
  81. #ifdef CONFIG_64BIT
  82. #ifndef __raw_writeq
  83. #define __raw_writeq __raw_writeq
  84. static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
  85. {
  86. *(volatile u64 __force *)addr = value;
  87. }
  88. #endif
  89. #endif /* CONFIG_64BIT */
  90. /*
  91. * {read,write}{b,w,l,q}() access little endian memory and return result in
  92. * native endianness.
  93. */
  94. #ifndef readb
  95. #define readb readb
  96. static inline u8 readb(const volatile void __iomem *addr)
  97. {
  98. return __raw_readb(addr);
  99. }
  100. #endif
  101. #ifndef readw
  102. #define readw readw
  103. static inline u16 readw(const volatile void __iomem *addr)
  104. {
  105. return __le16_to_cpu(__raw_readw(addr));
  106. }
  107. #endif
  108. #ifndef readl
  109. #define readl readl
  110. static inline u32 readl(const volatile void __iomem *addr)
  111. {
  112. return __le32_to_cpu(__raw_readl(addr));
  113. }
  114. #endif
  115. #ifdef CONFIG_64BIT
  116. #ifndef readq
  117. #define readq readq
  118. static inline u64 readq(const volatile void __iomem *addr)
  119. {
  120. return __le64_to_cpu(__raw_readq(addr));
  121. }
  122. #endif
  123. #endif /* CONFIG_64BIT */
  124. #ifndef writeb
  125. #define writeb writeb
  126. static inline void writeb(u8 value, volatile void __iomem *addr)
  127. {
  128. __raw_writeb(value, addr);
  129. }
  130. #endif
  131. #ifndef writew
  132. #define writew writew
  133. static inline void writew(u16 value, volatile void __iomem *addr)
  134. {
  135. __raw_writew(cpu_to_le16(value), addr);
  136. }
  137. #endif
  138. #ifndef writel
  139. #define writel writel
  140. static inline void writel(u32 value, volatile void __iomem *addr)
  141. {
  142. __raw_writel(__cpu_to_le32(value), addr);
  143. }
  144. #endif
  145. #ifdef CONFIG_64BIT
  146. #ifndef writeq
  147. #define writeq writeq
  148. static inline void writeq(u64 value, volatile void __iomem *addr)
  149. {
  150. __raw_writeq(__cpu_to_le64(value), addr);
  151. }
  152. #endif
  153. #endif /* CONFIG_64BIT */
  154. #ifndef insb
  155. static inline void insb(unsigned long addr, void *buffer, int count)
  156. {
  157. if (count) {
  158. u8 *buf = buffer;
  159. do {
  160. u8 x = __raw_readb(addr + PCI_IOBASE);
  161. *buf++ = x;
  162. } while (--count);
  163. }
  164. }
  165. #endif
  166. #ifndef insw
  167. static inline void insw(unsigned long addr, void *buffer, int count)
  168. {
  169. if (count) {
  170. u16 *buf = buffer;
  171. do {
  172. u16 x = __raw_readw(addr + PCI_IOBASE);
  173. *buf++ = x;
  174. } while (--count);
  175. }
  176. }
  177. #endif
  178. #ifndef insl
  179. static inline void insl(unsigned long addr, void *buffer, int count)
  180. {
  181. if (count) {
  182. u32 *buf = buffer;
  183. do {
  184. u32 x = __raw_readl(addr + PCI_IOBASE);
  185. *buf++ = x;
  186. } while (--count);
  187. }
  188. }
  189. #endif
  190. #ifndef outsb
  191. static inline void outsb(unsigned long addr, const void *buffer, int count)
  192. {
  193. if (count) {
  194. const u8 *buf = buffer;
  195. do {
  196. __raw_writeb(*buf++, addr + PCI_IOBASE);
  197. } while (--count);
  198. }
  199. }
  200. #endif
  201. #ifndef outsw
  202. static inline void outsw(unsigned long addr, const void *buffer, int count)
  203. {
  204. if (count) {
  205. const u16 *buf = buffer;
  206. do {
  207. __raw_writew(*buf++, addr + PCI_IOBASE);
  208. } while (--count);
  209. }
  210. }
  211. #endif
  212. #ifndef outsl
  213. static inline void outsl(unsigned long addr, const void *buffer, int count)
  214. {
  215. if (count) {
  216. const u32 *buf = buffer;
  217. do {
  218. __raw_writel(*buf++, addr + PCI_IOBASE);
  219. } while (--count);
  220. }
  221. }
  222. #endif
  223. #ifndef CONFIG_GENERIC_IOMAP
  224. #define ioread8_rep(p, dst, count) \
  225. insb((unsigned long) (p), (dst), (count))
  226. #define ioread16_rep(p, dst, count) \
  227. insw((unsigned long) (p), (dst), (count))
  228. #define ioread32_rep(p, dst, count) \
  229. insl((unsigned long) (p), (dst), (count))
  230. #define iowrite8_rep(p, src, count) \
  231. outsb((unsigned long) (p), (src), (count))
  232. #define iowrite16_rep(p, src, count) \
  233. outsw((unsigned long) (p), (src), (count))
  234. #define iowrite32_rep(p, src, count) \
  235. outsl((unsigned long) (p), (src), (count))
  236. #endif /* CONFIG_GENERIC_IOMAP */
  237. #ifndef PCI_IOBASE
  238. #define PCI_IOBASE ((void __iomem *)0)
  239. #endif
  240. #ifndef IO_SPACE_LIMIT
  241. #define IO_SPACE_LIMIT 0xffff
  242. #endif
  243. /*
  244. * {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be
  245. * implemented on hardware that needs an additional delay for I/O accesses to
  246. * take effect.
  247. */
  248. #ifndef inb
  249. #define inb inb
  250. static inline u8 inb(unsigned long addr)
  251. {
  252. return readb(PCI_IOBASE + addr);
  253. }
  254. #endif
  255. #ifndef inw
  256. #define inw inw
  257. static inline u16 inw(unsigned long addr)
  258. {
  259. return readw(PCI_IOBASE + addr);
  260. }
  261. #endif
  262. #ifndef inl
  263. #define inl inl
  264. static inline u32 inl(unsigned long addr)
  265. {
  266. return readl(PCI_IOBASE + addr);
  267. }
  268. #endif
  269. #ifndef outb
  270. #define outb outb
  271. static inline void outb(u8 value, unsigned long addr)
  272. {
  273. writeb(value, PCI_IOBASE + addr);
  274. }
  275. #endif
  276. #ifndef outw
  277. #define outw outw
  278. static inline void outw(u16 value, unsigned long addr)
  279. {
  280. writew(value, PCI_IOBASE + addr);
  281. }
  282. #endif
  283. #ifndef outl
  284. #define outl outl
  285. static inline void outl(u32 value, unsigned long addr)
  286. {
  287. writel(value, PCI_IOBASE + addr);
  288. }
  289. #endif
  290. #ifndef inb_p
  291. #define inb_p inb_p
  292. static inline u8 inb_p(unsigned long addr)
  293. {
  294. return inb(addr);
  295. }
  296. #endif
  297. #ifndef inw_p
  298. #define inw_p inw_p
  299. static inline u16 inw_p(unsigned long addr)
  300. {
  301. return inw(addr);
  302. }
  303. #endif
  304. #ifndef inl_p
  305. #define inl_p inl_p
  306. static inline u32 inl_p(unsigned long addr)
  307. {
  308. return inl(addr);
  309. }
  310. #endif
  311. #ifndef outb_p
  312. #define outb_p outb_p
  313. static inline void outb_p(u8 value, unsigned long addr)
  314. {
  315. outb(value, addr);
  316. }
  317. #endif
  318. #ifndef outw_p
  319. #define outw_p outw_p
  320. static inline void outw_p(u16 value, unsigned long addr)
  321. {
  322. outw(value, addr);
  323. }
  324. #endif
  325. #ifndef outl_p
  326. #define outl_p outl_p
  327. static inline void outl_p(u32 value, unsigned long addr)
  328. {
  329. outl(value, addr);
  330. }
  331. #endif
  332. #ifndef CONFIG_GENERIC_IOMAP
  333. #ifndef ioread8
  334. #define ioread8 ioread8
  335. static inline u8 ioread8(const volatile void __iomem *addr)
  336. {
  337. return readb(addr);
  338. }
  339. #endif
  340. #ifndef ioread16
  341. #define ioread16 ioread16
  342. static inline u16 ioread16(const volatile void __iomem *addr)
  343. {
  344. return readw(addr);
  345. }
  346. #endif
  347. #ifndef ioread32
  348. #define ioread32 ioread32
  349. static inline u32 ioread32(const volatile void __iomem *addr)
  350. {
  351. return readl(addr);
  352. }
  353. #endif
  354. #ifndef iowrite8
  355. #define iowrite8 iowrite8
  356. static inline void iowrite8(u8 value, volatile void __iomem *addr)
  357. {
  358. writeb(value, addr);
  359. }
  360. #endif
  361. #ifndef iowrite16
  362. #define iowrite16 iowrite16
  363. static inline void iowrite16(u16 value, volatile void __iomem *addr)
  364. {
  365. writew(value, addr);
  366. }
  367. #endif
  368. #ifndef iowrite32
  369. #define iowrite32 iowrite32
  370. static inline void iowrite32(u32 value, volatile void __iomem *addr)
  371. {
  372. writel(value, addr);
  373. }
  374. #endif
  375. #ifndef ioread16be
  376. #define ioread16be ioread16be
  377. static inline u16 ioread16be(const volatile void __iomem *addr)
  378. {
  379. return __be16_to_cpu(__raw_readw(addr));
  380. }
  381. #endif
  382. #ifndef ioread32be
  383. #define ioread32be ioread32be
  384. static inline u32 ioread32be(const volatile void __iomem *addr)
  385. {
  386. return __be32_to_cpu(__raw_readl(addr));
  387. }
  388. #endif
  389. #ifndef iowrite16be
  390. #define iowrite16be iowrite16be
  391. static inline void iowrite16be(u16 value, void volatile __iomem *addr)
  392. {
  393. __raw_writew(__cpu_to_be16(value), addr);
  394. }
  395. #endif
  396. #ifndef iowrite32be
  397. #define iowrite32be iowrite32be
  398. static inline void iowrite32be(u32 value, volatile void __iomem *addr)
  399. {
  400. __raw_writel(__cpu_to_be32(value), addr);
  401. }
  402. #endif
  403. #endif /* CONFIG_GENERIC_IOMAP */
  404. #ifdef __KERNEL__
  405. #include <linux/vmalloc.h>
  406. #define __io_virt(x) ((void __force *)(x))
  407. #ifndef CONFIG_GENERIC_IOMAP
  408. struct pci_dev;
  409. extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
  410. #ifndef pci_iounmap
  411. #define pci_iounmap pci_iounmap
  412. static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
  413. {
  414. }
  415. #endif
  416. #endif /* CONFIG_GENERIC_IOMAP */
  417. /*
  418. * Change virtual addresses to physical addresses and vv.
  419. * These are pretty trivial
  420. */
  421. #ifndef virt_to_phys
  422. #define virt_to_phys virt_to_phys
  423. static inline unsigned long virt_to_phys(volatile void *address)
  424. {
  425. return __pa((unsigned long)address);
  426. }
  427. #endif
  428. #ifndef phys_to_virt
  429. #define phys_to_virt phys_to_virt
  430. static inline void *phys_to_virt(unsigned long address)
  431. {
  432. return __va(address);
  433. }
  434. #endif
  435. /*
  436. * Change "struct page" to physical address.
  437. *
  438. * This implementation is for the no-MMU case only... if you have an MMU
  439. * you'll need to provide your own definitions.
  440. */
  441. #ifndef CONFIG_MMU
  442. #ifndef ioremap
  443. #define ioremap ioremap
  444. static inline void __iomem *ioremap(phys_addr_t offset, size_t size)
  445. {
  446. return (void __iomem *)(unsigned long)offset;
  447. }
  448. #endif
  449. #ifndef __ioremap
  450. #define __ioremap __ioremap
  451. static inline void __iomem *__ioremap(phys_addr_t offset, size_t size,
  452. unsigned long flags)
  453. {
  454. return ioremap(offset, size);
  455. }
  456. #endif
  457. #ifndef ioremap_nocache
  458. #define ioremap_nocache ioremap_nocache
  459. static inline void __iomem *ioremap_nocache(phys_addr_t offset, size_t size)
  460. {
  461. return ioremap(offset, size);
  462. }
  463. #endif
  464. #ifndef ioremap_wc
  465. #define ioremap_wc ioremap_wc
  466. static inline void __iomem *ioremap_wc(phys_addr_t offset, size_t size)
  467. {
  468. return ioremap_nocache(offset, size);
  469. }
  470. #endif
  471. #ifndef iounmap
  472. #define iounmap iounmap
  473. static inline void iounmap(void __iomem *addr)
  474. {
  475. }
  476. #endif
  477. #endif /* CONFIG_MMU */
  478. #ifdef CONFIG_HAS_IOPORT_MAP
  479. #ifndef CONFIG_GENERIC_IOMAP
  480. #ifndef ioport_map
  481. #define ioport_map ioport_map
  482. static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
  483. {
  484. return PCI_IOBASE + (port & IO_SPACE_LIMIT);
  485. }
  486. #endif
  487. #ifndef ioport_unmap
  488. #define ioport_unmap ioport_unmap
  489. static inline void ioport_unmap(void __iomem *p)
  490. {
  491. }
  492. #endif
  493. #else /* CONFIG_GENERIC_IOMAP */
  494. extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
  495. extern void ioport_unmap(void __iomem *p);
  496. #endif /* CONFIG_GENERIC_IOMAP */
  497. #endif /* CONFIG_HAS_IOPORT_MAP */
  498. #ifndef xlate_dev_kmem_ptr
  499. #define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
  500. static inline void *xlate_dev_kmem_ptr(void *addr)
  501. {
  502. return addr;
  503. }
  504. #endif
  505. #ifndef xlate_dev_mem_ptr
  506. #define xlate_dev_mem_ptr xlate_dev_mem_ptr
  507. static inline void *xlate_dev_mem_ptr(phys_addr_t addr)
  508. {
  509. return __va(addr);
  510. }
  511. #endif
  512. #ifndef unxlate_dev_mem_ptr
  513. #define unxlate_dev_mem_ptr unxlate_dev_mem_ptr
  514. static inline void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)
  515. {
  516. }
  517. #endif
  518. #ifdef CONFIG_VIRT_TO_BUS
  519. #ifndef virt_to_bus
  520. static inline unsigned long virt_to_bus(void *address)
  521. {
  522. return (unsigned long)address;
  523. }
  524. static inline void *bus_to_virt(unsigned long address)
  525. {
  526. return (void *)address;
  527. }
  528. #endif
  529. #endif
  530. #ifndef memset_io
  531. #define memset_io memset_io
  532. static inline void memset_io(volatile void __iomem *addr, int value,
  533. size_t size)
  534. {
  535. memset(__io_virt(addr), value, size);
  536. }
  537. #endif
  538. #ifndef memcpy_fromio
  539. #define memcpy_fromio memcpy_fromio
  540. static inline void memcpy_fromio(void *buffer,
  541. const volatile void __iomem *addr,
  542. size_t size)
  543. {
  544. memcpy(buffer, __io_virt(addr), size);
  545. }
  546. #endif
  547. #ifndef memcpy_toio
  548. #define memcpy_toio memcpy_toio
  549. static inline void memcpy_toio(volatile void __iomem *addr, const void *buffer,
  550. size_t size)
  551. {
  552. memcpy(__io_virt(addr), buffer, size);
  553. }
  554. #endif
  555. #endif /* __KERNEL__ */
  556. #endif /* __ASM_GENERIC_IO_H */