vfio_pci.c 36 KB

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  1. /*
  2. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  3. * Author: Alex Williamson <alex.williamson@redhat.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Derived from original vfio:
  10. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  11. * Author: Tom Lyon, pugs@cisco.com
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/device.h>
  15. #include <linux/eventfd.h>
  16. #include <linux/file.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/iommu.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/notifier.h>
  22. #include <linux/pci.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/types.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vfio.h>
  28. #include <linux/vgaarb.h>
  29. #include "vfio_pci_private.h"
  30. #define DRIVER_VERSION "0.2"
  31. #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
  32. #define DRIVER_DESC "VFIO PCI - User Level meta-driver"
  33. static char ids[1024] __initdata;
  34. module_param_string(ids, ids, sizeof(ids), 0);
  35. MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
  36. static bool nointxmask;
  37. module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
  38. MODULE_PARM_DESC(nointxmask,
  39. "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
  40. #ifdef CONFIG_VFIO_PCI_VGA
  41. static bool disable_vga;
  42. module_param(disable_vga, bool, S_IRUGO);
  43. MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
  44. #endif
  45. static bool disable_idle_d3;
  46. module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
  47. MODULE_PARM_DESC(disable_idle_d3,
  48. "Disable using the PCI D3 low power state for idle, unused devices");
  49. static DEFINE_MUTEX(driver_lock);
  50. static inline bool vfio_vga_disabled(void)
  51. {
  52. #ifdef CONFIG_VFIO_PCI_VGA
  53. return disable_vga;
  54. #else
  55. return true;
  56. #endif
  57. }
  58. /*
  59. * Our VGA arbiter participation is limited since we don't know anything
  60. * about the device itself. However, if the device is the only VGA device
  61. * downstream of a bridge and VFIO VGA support is disabled, then we can
  62. * safely return legacy VGA IO and memory as not decoded since the user
  63. * has no way to get to it and routing can be disabled externally at the
  64. * bridge.
  65. */
  66. static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
  67. {
  68. struct vfio_pci_device *vdev = opaque;
  69. struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
  70. unsigned char max_busnr;
  71. unsigned int decodes;
  72. if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
  73. return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  74. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  75. max_busnr = pci_bus_max_busnr(pdev->bus);
  76. decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
  77. while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
  78. if (tmp == pdev ||
  79. pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
  80. pci_is_root_bus(tmp->bus))
  81. continue;
  82. if (tmp->bus->number >= pdev->bus->number &&
  83. tmp->bus->number <= max_busnr) {
  84. pci_dev_put(tmp);
  85. decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  86. break;
  87. }
  88. }
  89. return decodes;
  90. }
  91. static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
  92. {
  93. return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
  94. }
  95. static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
  96. {
  97. struct resource *res;
  98. int bar;
  99. struct vfio_pci_dummy_resource *dummy_res;
  100. INIT_LIST_HEAD(&vdev->dummy_resources_list);
  101. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  102. res = vdev->pdev->resource + bar;
  103. if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
  104. goto no_mmap;
  105. if (!(res->flags & IORESOURCE_MEM))
  106. goto no_mmap;
  107. /*
  108. * The PCI core shouldn't set up a resource with a
  109. * type but zero size. But there may be bugs that
  110. * cause us to do that.
  111. */
  112. if (!resource_size(res))
  113. goto no_mmap;
  114. if (resource_size(res) >= PAGE_SIZE) {
  115. vdev->bar_mmap_supported[bar] = true;
  116. continue;
  117. }
  118. if (!(res->start & ~PAGE_MASK)) {
  119. /*
  120. * Add a dummy resource to reserve the remainder
  121. * of the exclusive page in case that hot-add
  122. * device's bar is assigned into it.
  123. */
  124. dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
  125. if (dummy_res == NULL)
  126. goto no_mmap;
  127. dummy_res->resource.name = "vfio sub-page reserved";
  128. dummy_res->resource.start = res->end + 1;
  129. dummy_res->resource.end = res->start + PAGE_SIZE - 1;
  130. dummy_res->resource.flags = res->flags;
  131. if (request_resource(res->parent,
  132. &dummy_res->resource)) {
  133. kfree(dummy_res);
  134. goto no_mmap;
  135. }
  136. dummy_res->index = bar;
  137. list_add(&dummy_res->res_next,
  138. &vdev->dummy_resources_list);
  139. vdev->bar_mmap_supported[bar] = true;
  140. continue;
  141. }
  142. /*
  143. * Here we don't handle the case when the BAR is not page
  144. * aligned because we can't expect the BAR will be
  145. * assigned into the same location in a page in guest
  146. * when we passthrough the BAR. And it's hard to access
  147. * this BAR in userspace because we have no way to get
  148. * the BAR's location in a page.
  149. */
  150. no_mmap:
  151. vdev->bar_mmap_supported[bar] = false;
  152. }
  153. }
  154. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
  155. static void vfio_pci_disable(struct vfio_pci_device *vdev);
  156. /*
  157. * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
  158. * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
  159. * If a device implements the former but not the latter we would typically
  160. * expect broken_intx_masking be set and require an exclusive interrupt.
  161. * However since we do have control of the device's ability to assert INTx,
  162. * we can instead pretend that the device does not implement INTx, virtualizing
  163. * the pin register to report zero and maintaining DisINTx set on the host.
  164. */
  165. static bool vfio_pci_nointx(struct pci_dev *pdev)
  166. {
  167. switch (pdev->vendor) {
  168. case PCI_VENDOR_ID_INTEL:
  169. switch (pdev->device) {
  170. /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */
  171. case 0x1572:
  172. case 0x1574:
  173. case 0x1580 ... 0x1581:
  174. case 0x1583 ... 0x158b:
  175. case 0x37d0 ... 0x37d2:
  176. return true;
  177. default:
  178. return false;
  179. }
  180. }
  181. return false;
  182. }
  183. static int vfio_pci_enable(struct vfio_pci_device *vdev)
  184. {
  185. struct pci_dev *pdev = vdev->pdev;
  186. int ret;
  187. u16 cmd;
  188. u8 msix_pos;
  189. pci_set_power_state(pdev, PCI_D0);
  190. /* Don't allow our initial saved state to include busmaster */
  191. pci_clear_master(pdev);
  192. ret = pci_enable_device(pdev);
  193. if (ret)
  194. return ret;
  195. /* If reset fails because of the device lock, fail this path entirely */
  196. ret = pci_try_reset_function(pdev);
  197. if (ret == -EAGAIN) {
  198. pci_disable_device(pdev);
  199. return ret;
  200. }
  201. vdev->reset_works = !ret;
  202. pci_save_state(pdev);
  203. vdev->pci_saved_state = pci_store_saved_state(pdev);
  204. if (!vdev->pci_saved_state)
  205. pr_debug("%s: Couldn't store %s saved state\n",
  206. __func__, dev_name(&pdev->dev));
  207. if (likely(!nointxmask)) {
  208. if (vfio_pci_nointx(pdev)) {
  209. dev_info(&pdev->dev, "Masking broken INTx support\n");
  210. vdev->nointx = true;
  211. pci_intx(pdev, 0);
  212. } else
  213. vdev->pci_2_3 = pci_intx_mask_supported(pdev);
  214. }
  215. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  216. if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
  217. cmd &= ~PCI_COMMAND_INTX_DISABLE;
  218. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  219. }
  220. ret = vfio_config_init(vdev);
  221. if (ret) {
  222. kfree(vdev->pci_saved_state);
  223. vdev->pci_saved_state = NULL;
  224. pci_disable_device(pdev);
  225. return ret;
  226. }
  227. msix_pos = pdev->msix_cap;
  228. if (msix_pos) {
  229. u16 flags;
  230. u32 table;
  231. pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
  232. pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
  233. vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
  234. vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
  235. vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
  236. } else
  237. vdev->msix_bar = 0xFF;
  238. if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
  239. vdev->has_vga = true;
  240. if (vfio_pci_is_vga(pdev) &&
  241. pdev->vendor == PCI_VENDOR_ID_INTEL &&
  242. IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
  243. ret = vfio_pci_igd_init(vdev);
  244. if (ret) {
  245. dev_warn(&vdev->pdev->dev,
  246. "Failed to setup Intel IGD regions\n");
  247. vfio_pci_disable(vdev);
  248. return ret;
  249. }
  250. }
  251. vfio_pci_probe_mmaps(vdev);
  252. return 0;
  253. }
  254. static void vfio_pci_disable(struct vfio_pci_device *vdev)
  255. {
  256. struct pci_dev *pdev = vdev->pdev;
  257. struct vfio_pci_dummy_resource *dummy_res, *tmp;
  258. struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp;
  259. int i, bar;
  260. /* Stop the device from further DMA */
  261. pci_clear_master(pdev);
  262. vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
  263. VFIO_IRQ_SET_ACTION_TRIGGER,
  264. vdev->irq_type, 0, 0, NULL);
  265. /* Device closed, don't need mutex here */
  266. list_for_each_entry_safe(ioeventfd, ioeventfd_tmp,
  267. &vdev->ioeventfds_list, next) {
  268. vfio_virqfd_disable(&ioeventfd->virqfd);
  269. list_del(&ioeventfd->next);
  270. kfree(ioeventfd);
  271. }
  272. vdev->ioeventfds_nr = 0;
  273. vdev->virq_disabled = false;
  274. for (i = 0; i < vdev->num_regions; i++)
  275. vdev->region[i].ops->release(vdev, &vdev->region[i]);
  276. vdev->num_regions = 0;
  277. kfree(vdev->region);
  278. vdev->region = NULL; /* don't krealloc a freed pointer */
  279. vfio_config_free(vdev);
  280. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  281. if (!vdev->barmap[bar])
  282. continue;
  283. pci_iounmap(pdev, vdev->barmap[bar]);
  284. pci_release_selected_regions(pdev, 1 << bar);
  285. vdev->barmap[bar] = NULL;
  286. }
  287. list_for_each_entry_safe(dummy_res, tmp,
  288. &vdev->dummy_resources_list, res_next) {
  289. list_del(&dummy_res->res_next);
  290. release_resource(&dummy_res->resource);
  291. kfree(dummy_res);
  292. }
  293. vdev->needs_reset = true;
  294. /*
  295. * If we have saved state, restore it. If we can reset the device,
  296. * even better. Resetting with current state seems better than
  297. * nothing, but saving and restoring current state without reset
  298. * is just busy work.
  299. */
  300. if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
  301. pr_info("%s: Couldn't reload %s saved state\n",
  302. __func__, dev_name(&pdev->dev));
  303. if (!vdev->reset_works)
  304. goto out;
  305. pci_save_state(pdev);
  306. }
  307. /*
  308. * Disable INTx and MSI, presumably to avoid spurious interrupts
  309. * during reset. Stolen from pci_reset_function()
  310. */
  311. pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
  312. /*
  313. * Try to reset the device. The success of this is dependent on
  314. * being able to lock the device, which is not always possible.
  315. */
  316. if (vdev->reset_works && !pci_try_reset_function(pdev))
  317. vdev->needs_reset = false;
  318. pci_restore_state(pdev);
  319. out:
  320. pci_disable_device(pdev);
  321. vfio_pci_try_bus_reset(vdev);
  322. if (!disable_idle_d3)
  323. pci_set_power_state(pdev, PCI_D3hot);
  324. }
  325. static void vfio_pci_release(void *device_data)
  326. {
  327. struct vfio_pci_device *vdev = device_data;
  328. mutex_lock(&driver_lock);
  329. if (!(--vdev->refcnt)) {
  330. vfio_spapr_pci_eeh_release(vdev->pdev);
  331. vfio_pci_disable(vdev);
  332. }
  333. mutex_unlock(&driver_lock);
  334. module_put(THIS_MODULE);
  335. }
  336. static int vfio_pci_open(void *device_data)
  337. {
  338. struct vfio_pci_device *vdev = device_data;
  339. int ret = 0;
  340. if (!try_module_get(THIS_MODULE))
  341. return -ENODEV;
  342. mutex_lock(&driver_lock);
  343. if (!vdev->refcnt) {
  344. ret = vfio_pci_enable(vdev);
  345. if (ret)
  346. goto error;
  347. vfio_spapr_pci_eeh_open(vdev->pdev);
  348. }
  349. vdev->refcnt++;
  350. error:
  351. mutex_unlock(&driver_lock);
  352. if (ret)
  353. module_put(THIS_MODULE);
  354. return ret;
  355. }
  356. static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
  357. {
  358. if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
  359. u8 pin;
  360. pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
  361. if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && !vdev->nointx && pin)
  362. return 1;
  363. } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
  364. u8 pos;
  365. u16 flags;
  366. pos = vdev->pdev->msi_cap;
  367. if (pos) {
  368. pci_read_config_word(vdev->pdev,
  369. pos + PCI_MSI_FLAGS, &flags);
  370. return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
  371. }
  372. } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
  373. u8 pos;
  374. u16 flags;
  375. pos = vdev->pdev->msix_cap;
  376. if (pos) {
  377. pci_read_config_word(vdev->pdev,
  378. pos + PCI_MSIX_FLAGS, &flags);
  379. return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
  380. }
  381. } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
  382. if (pci_is_pcie(vdev->pdev))
  383. return 1;
  384. } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
  385. return 1;
  386. }
  387. return 0;
  388. }
  389. static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
  390. {
  391. (*(int *)data)++;
  392. return 0;
  393. }
  394. struct vfio_pci_fill_info {
  395. int max;
  396. int cur;
  397. struct vfio_pci_dependent_device *devices;
  398. };
  399. static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
  400. {
  401. struct vfio_pci_fill_info *fill = data;
  402. struct iommu_group *iommu_group;
  403. if (fill->cur == fill->max)
  404. return -EAGAIN; /* Something changed, try again */
  405. iommu_group = iommu_group_get(&pdev->dev);
  406. if (!iommu_group)
  407. return -EPERM; /* Cannot reset non-isolated devices */
  408. fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
  409. fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
  410. fill->devices[fill->cur].bus = pdev->bus->number;
  411. fill->devices[fill->cur].devfn = pdev->devfn;
  412. fill->cur++;
  413. iommu_group_put(iommu_group);
  414. return 0;
  415. }
  416. struct vfio_pci_group_entry {
  417. struct vfio_group *group;
  418. int id;
  419. };
  420. struct vfio_pci_group_info {
  421. int count;
  422. struct vfio_pci_group_entry *groups;
  423. };
  424. static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
  425. {
  426. struct vfio_pci_group_info *info = data;
  427. struct iommu_group *group;
  428. int id, i;
  429. group = iommu_group_get(&pdev->dev);
  430. if (!group)
  431. return -EPERM;
  432. id = iommu_group_id(group);
  433. for (i = 0; i < info->count; i++)
  434. if (info->groups[i].id == id)
  435. break;
  436. iommu_group_put(group);
  437. return (i == info->count) ? -EINVAL : 0;
  438. }
  439. static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
  440. {
  441. for (; pdev; pdev = pdev->bus->self)
  442. if (pdev->bus == slot->bus)
  443. return (pdev->slot == slot);
  444. return false;
  445. }
  446. struct vfio_pci_walk_info {
  447. int (*fn)(struct pci_dev *, void *data);
  448. void *data;
  449. struct pci_dev *pdev;
  450. bool slot;
  451. int ret;
  452. };
  453. static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
  454. {
  455. struct vfio_pci_walk_info *walk = data;
  456. if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
  457. walk->ret = walk->fn(pdev, walk->data);
  458. return walk->ret;
  459. }
  460. static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
  461. int (*fn)(struct pci_dev *,
  462. void *data), void *data,
  463. bool slot)
  464. {
  465. struct vfio_pci_walk_info walk = {
  466. .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
  467. };
  468. pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
  469. return walk.ret;
  470. }
  471. static int msix_mmappable_cap(struct vfio_pci_device *vdev,
  472. struct vfio_info_cap *caps)
  473. {
  474. struct vfio_info_cap_header header = {
  475. .id = VFIO_REGION_INFO_CAP_MSIX_MAPPABLE,
  476. .version = 1
  477. };
  478. return vfio_info_add_capability(caps, &header, sizeof(header));
  479. }
  480. int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
  481. unsigned int type, unsigned int subtype,
  482. const struct vfio_pci_regops *ops,
  483. size_t size, u32 flags, void *data)
  484. {
  485. struct vfio_pci_region *region;
  486. region = krealloc(vdev->region,
  487. (vdev->num_regions + 1) * sizeof(*region),
  488. GFP_KERNEL);
  489. if (!region)
  490. return -ENOMEM;
  491. vdev->region = region;
  492. vdev->region[vdev->num_regions].type = type;
  493. vdev->region[vdev->num_regions].subtype = subtype;
  494. vdev->region[vdev->num_regions].ops = ops;
  495. vdev->region[vdev->num_regions].size = size;
  496. vdev->region[vdev->num_regions].flags = flags;
  497. vdev->region[vdev->num_regions].data = data;
  498. vdev->num_regions++;
  499. return 0;
  500. }
  501. static long vfio_pci_ioctl(void *device_data,
  502. unsigned int cmd, unsigned long arg)
  503. {
  504. struct vfio_pci_device *vdev = device_data;
  505. unsigned long minsz;
  506. if (cmd == VFIO_DEVICE_GET_INFO) {
  507. struct vfio_device_info info;
  508. minsz = offsetofend(struct vfio_device_info, num_irqs);
  509. if (copy_from_user(&info, (void __user *)arg, minsz))
  510. return -EFAULT;
  511. if (info.argsz < minsz)
  512. return -EINVAL;
  513. info.flags = VFIO_DEVICE_FLAGS_PCI;
  514. if (vdev->reset_works)
  515. info.flags |= VFIO_DEVICE_FLAGS_RESET;
  516. info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
  517. info.num_irqs = VFIO_PCI_NUM_IRQS;
  518. return copy_to_user((void __user *)arg, &info, minsz) ?
  519. -EFAULT : 0;
  520. } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
  521. struct pci_dev *pdev = vdev->pdev;
  522. struct vfio_region_info info;
  523. struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
  524. int i, ret;
  525. minsz = offsetofend(struct vfio_region_info, offset);
  526. if (copy_from_user(&info, (void __user *)arg, minsz))
  527. return -EFAULT;
  528. if (info.argsz < minsz)
  529. return -EINVAL;
  530. switch (info.index) {
  531. case VFIO_PCI_CONFIG_REGION_INDEX:
  532. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  533. info.size = pdev->cfg_size;
  534. info.flags = VFIO_REGION_INFO_FLAG_READ |
  535. VFIO_REGION_INFO_FLAG_WRITE;
  536. break;
  537. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  538. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  539. info.size = pci_resource_len(pdev, info.index);
  540. if (!info.size) {
  541. info.flags = 0;
  542. break;
  543. }
  544. info.flags = VFIO_REGION_INFO_FLAG_READ |
  545. VFIO_REGION_INFO_FLAG_WRITE;
  546. if (vdev->bar_mmap_supported[info.index]) {
  547. info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
  548. if (info.index == vdev->msix_bar) {
  549. ret = msix_mmappable_cap(vdev, &caps);
  550. if (ret)
  551. return ret;
  552. }
  553. }
  554. break;
  555. case VFIO_PCI_ROM_REGION_INDEX:
  556. {
  557. void __iomem *io;
  558. size_t size;
  559. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  560. info.flags = 0;
  561. /* Report the BAR size, not the ROM size */
  562. info.size = pci_resource_len(pdev, info.index);
  563. if (!info.size) {
  564. /* Shadow ROMs appear as PCI option ROMs */
  565. if (pdev->resource[PCI_ROM_RESOURCE].flags &
  566. IORESOURCE_ROM_SHADOW)
  567. info.size = 0x20000;
  568. else
  569. break;
  570. }
  571. /* Is it really there? */
  572. io = pci_map_rom(pdev, &size);
  573. if (!io || !size) {
  574. info.size = 0;
  575. break;
  576. }
  577. pci_unmap_rom(pdev, io);
  578. info.flags = VFIO_REGION_INFO_FLAG_READ;
  579. break;
  580. }
  581. case VFIO_PCI_VGA_REGION_INDEX:
  582. if (!vdev->has_vga)
  583. return -EINVAL;
  584. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  585. info.size = 0xc0000;
  586. info.flags = VFIO_REGION_INFO_FLAG_READ |
  587. VFIO_REGION_INFO_FLAG_WRITE;
  588. break;
  589. default:
  590. {
  591. struct vfio_region_info_cap_type cap_type = {
  592. .header.id = VFIO_REGION_INFO_CAP_TYPE,
  593. .header.version = 1 };
  594. if (info.index >=
  595. VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  596. return -EINVAL;
  597. i = info.index - VFIO_PCI_NUM_REGIONS;
  598. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  599. info.size = vdev->region[i].size;
  600. info.flags = vdev->region[i].flags;
  601. cap_type.type = vdev->region[i].type;
  602. cap_type.subtype = vdev->region[i].subtype;
  603. ret = vfio_info_add_capability(&caps, &cap_type.header,
  604. sizeof(cap_type));
  605. if (ret)
  606. return ret;
  607. }
  608. }
  609. if (caps.size) {
  610. info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
  611. if (info.argsz < sizeof(info) + caps.size) {
  612. info.argsz = sizeof(info) + caps.size;
  613. info.cap_offset = 0;
  614. } else {
  615. vfio_info_cap_shift(&caps, sizeof(info));
  616. if (copy_to_user((void __user *)arg +
  617. sizeof(info), caps.buf,
  618. caps.size)) {
  619. kfree(caps.buf);
  620. return -EFAULT;
  621. }
  622. info.cap_offset = sizeof(info);
  623. }
  624. kfree(caps.buf);
  625. }
  626. return copy_to_user((void __user *)arg, &info, minsz) ?
  627. -EFAULT : 0;
  628. } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
  629. struct vfio_irq_info info;
  630. minsz = offsetofend(struct vfio_irq_info, count);
  631. if (copy_from_user(&info, (void __user *)arg, minsz))
  632. return -EFAULT;
  633. if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
  634. return -EINVAL;
  635. switch (info.index) {
  636. case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
  637. case VFIO_PCI_REQ_IRQ_INDEX:
  638. break;
  639. case VFIO_PCI_ERR_IRQ_INDEX:
  640. if (pci_is_pcie(vdev->pdev))
  641. break;
  642. /* pass thru to return error */
  643. default:
  644. return -EINVAL;
  645. }
  646. info.flags = VFIO_IRQ_INFO_EVENTFD;
  647. info.count = vfio_pci_get_irq_count(vdev, info.index);
  648. if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
  649. info.flags |= (VFIO_IRQ_INFO_MASKABLE |
  650. VFIO_IRQ_INFO_AUTOMASKED);
  651. else
  652. info.flags |= VFIO_IRQ_INFO_NORESIZE;
  653. return copy_to_user((void __user *)arg, &info, minsz) ?
  654. -EFAULT : 0;
  655. } else if (cmd == VFIO_DEVICE_SET_IRQS) {
  656. struct vfio_irq_set hdr;
  657. u8 *data = NULL;
  658. int max, ret = 0;
  659. size_t data_size = 0;
  660. minsz = offsetofend(struct vfio_irq_set, count);
  661. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  662. return -EFAULT;
  663. max = vfio_pci_get_irq_count(vdev, hdr.index);
  664. ret = vfio_set_irqs_validate_and_prepare(&hdr, max,
  665. VFIO_PCI_NUM_IRQS, &data_size);
  666. if (ret)
  667. return ret;
  668. if (data_size) {
  669. data = memdup_user((void __user *)(arg + minsz),
  670. data_size);
  671. if (IS_ERR(data))
  672. return PTR_ERR(data);
  673. }
  674. mutex_lock(&vdev->igate);
  675. ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
  676. hdr.start, hdr.count, data);
  677. mutex_unlock(&vdev->igate);
  678. kfree(data);
  679. return ret;
  680. } else if (cmd == VFIO_DEVICE_RESET) {
  681. return vdev->reset_works ?
  682. pci_try_reset_function(vdev->pdev) : -EINVAL;
  683. } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
  684. struct vfio_pci_hot_reset_info hdr;
  685. struct vfio_pci_fill_info fill = { 0 };
  686. struct vfio_pci_dependent_device *devices = NULL;
  687. bool slot = false;
  688. int ret = 0;
  689. minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
  690. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  691. return -EFAULT;
  692. if (hdr.argsz < minsz)
  693. return -EINVAL;
  694. hdr.flags = 0;
  695. /* Can we do a slot or bus reset or neither? */
  696. if (!pci_probe_reset_slot(vdev->pdev->slot))
  697. slot = true;
  698. else if (pci_probe_reset_bus(vdev->pdev->bus))
  699. return -ENODEV;
  700. /* How many devices are affected? */
  701. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  702. vfio_pci_count_devs,
  703. &fill.max, slot);
  704. if (ret)
  705. return ret;
  706. WARN_ON(!fill.max); /* Should always be at least one */
  707. /*
  708. * If there's enough space, fill it now, otherwise return
  709. * -ENOSPC and the number of devices affected.
  710. */
  711. if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
  712. ret = -ENOSPC;
  713. hdr.count = fill.max;
  714. goto reset_info_exit;
  715. }
  716. devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
  717. if (!devices)
  718. return -ENOMEM;
  719. fill.devices = devices;
  720. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  721. vfio_pci_fill_devs,
  722. &fill, slot);
  723. /*
  724. * If a device was removed between counting and filling,
  725. * we may come up short of fill.max. If a device was
  726. * added, we'll have a return of -EAGAIN above.
  727. */
  728. if (!ret)
  729. hdr.count = fill.cur;
  730. reset_info_exit:
  731. if (copy_to_user((void __user *)arg, &hdr, minsz))
  732. ret = -EFAULT;
  733. if (!ret) {
  734. if (copy_to_user((void __user *)(arg + minsz), devices,
  735. hdr.count * sizeof(*devices)))
  736. ret = -EFAULT;
  737. }
  738. kfree(devices);
  739. return ret;
  740. } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
  741. struct vfio_pci_hot_reset hdr;
  742. int32_t *group_fds;
  743. struct vfio_pci_group_entry *groups;
  744. struct vfio_pci_group_info info;
  745. bool slot = false;
  746. int i, count = 0, ret = 0;
  747. minsz = offsetofend(struct vfio_pci_hot_reset, count);
  748. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  749. return -EFAULT;
  750. if (hdr.argsz < minsz || hdr.flags)
  751. return -EINVAL;
  752. /* Can we do a slot or bus reset or neither? */
  753. if (!pci_probe_reset_slot(vdev->pdev->slot))
  754. slot = true;
  755. else if (pci_probe_reset_bus(vdev->pdev->bus))
  756. return -ENODEV;
  757. /*
  758. * We can't let userspace give us an arbitrarily large
  759. * buffer to copy, so verify how many we think there
  760. * could be. Note groups can have multiple devices so
  761. * one group per device is the max.
  762. */
  763. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  764. vfio_pci_count_devs,
  765. &count, slot);
  766. if (ret)
  767. return ret;
  768. /* Somewhere between 1 and count is OK */
  769. if (!hdr.count || hdr.count > count)
  770. return -EINVAL;
  771. group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
  772. groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
  773. if (!group_fds || !groups) {
  774. kfree(group_fds);
  775. kfree(groups);
  776. return -ENOMEM;
  777. }
  778. if (copy_from_user(group_fds, (void __user *)(arg + minsz),
  779. hdr.count * sizeof(*group_fds))) {
  780. kfree(group_fds);
  781. kfree(groups);
  782. return -EFAULT;
  783. }
  784. /*
  785. * For each group_fd, get the group through the vfio external
  786. * user interface and store the group and iommu ID. This
  787. * ensures the group is held across the reset.
  788. */
  789. for (i = 0; i < hdr.count; i++) {
  790. struct vfio_group *group;
  791. struct fd f = fdget(group_fds[i]);
  792. if (!f.file) {
  793. ret = -EBADF;
  794. break;
  795. }
  796. group = vfio_group_get_external_user(f.file);
  797. fdput(f);
  798. if (IS_ERR(group)) {
  799. ret = PTR_ERR(group);
  800. break;
  801. }
  802. groups[i].group = group;
  803. groups[i].id = vfio_external_user_iommu_id(group);
  804. }
  805. kfree(group_fds);
  806. /* release reference to groups on error */
  807. if (ret)
  808. goto hot_reset_release;
  809. info.count = hdr.count;
  810. info.groups = groups;
  811. /*
  812. * Test whether all the affected devices are contained
  813. * by the set of groups provided by the user.
  814. */
  815. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  816. vfio_pci_validate_devs,
  817. &info, slot);
  818. if (!ret)
  819. /* User has access, do the reset */
  820. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  821. pci_try_reset_bus(vdev->pdev->bus);
  822. hot_reset_release:
  823. for (i--; i >= 0; i--)
  824. vfio_group_put_external_user(groups[i].group);
  825. kfree(groups);
  826. return ret;
  827. } else if (cmd == VFIO_DEVICE_IOEVENTFD) {
  828. struct vfio_device_ioeventfd ioeventfd;
  829. int count;
  830. minsz = offsetofend(struct vfio_device_ioeventfd, fd);
  831. if (copy_from_user(&ioeventfd, (void __user *)arg, minsz))
  832. return -EFAULT;
  833. if (ioeventfd.argsz < minsz)
  834. return -EINVAL;
  835. if (ioeventfd.flags & ~VFIO_DEVICE_IOEVENTFD_SIZE_MASK)
  836. return -EINVAL;
  837. count = ioeventfd.flags & VFIO_DEVICE_IOEVENTFD_SIZE_MASK;
  838. if (hweight8(count) != 1 || ioeventfd.fd < -1)
  839. return -EINVAL;
  840. return vfio_pci_ioeventfd(vdev, ioeventfd.offset,
  841. ioeventfd.data, count, ioeventfd.fd);
  842. }
  843. return -ENOTTY;
  844. }
  845. static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
  846. size_t count, loff_t *ppos, bool iswrite)
  847. {
  848. unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
  849. struct vfio_pci_device *vdev = device_data;
  850. if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  851. return -EINVAL;
  852. switch (index) {
  853. case VFIO_PCI_CONFIG_REGION_INDEX:
  854. return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
  855. case VFIO_PCI_ROM_REGION_INDEX:
  856. if (iswrite)
  857. return -EINVAL;
  858. return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
  859. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  860. return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
  861. case VFIO_PCI_VGA_REGION_INDEX:
  862. return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
  863. default:
  864. index -= VFIO_PCI_NUM_REGIONS;
  865. return vdev->region[index].ops->rw(vdev, buf,
  866. count, ppos, iswrite);
  867. }
  868. return -EINVAL;
  869. }
  870. static ssize_t vfio_pci_read(void *device_data, char __user *buf,
  871. size_t count, loff_t *ppos)
  872. {
  873. if (!count)
  874. return 0;
  875. return vfio_pci_rw(device_data, buf, count, ppos, false);
  876. }
  877. static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
  878. size_t count, loff_t *ppos)
  879. {
  880. if (!count)
  881. return 0;
  882. return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
  883. }
  884. static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
  885. {
  886. struct vfio_pci_device *vdev = device_data;
  887. struct pci_dev *pdev = vdev->pdev;
  888. unsigned int index;
  889. u64 phys_len, req_len, pgoff, req_start;
  890. int ret;
  891. index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
  892. if (vma->vm_end < vma->vm_start)
  893. return -EINVAL;
  894. if ((vma->vm_flags & VM_SHARED) == 0)
  895. return -EINVAL;
  896. if (index >= VFIO_PCI_ROM_REGION_INDEX)
  897. return -EINVAL;
  898. if (!vdev->bar_mmap_supported[index])
  899. return -EINVAL;
  900. phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
  901. req_len = vma->vm_end - vma->vm_start;
  902. pgoff = vma->vm_pgoff &
  903. ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
  904. req_start = pgoff << PAGE_SHIFT;
  905. if (req_start + req_len > phys_len)
  906. return -EINVAL;
  907. /*
  908. * Even though we don't make use of the barmap for the mmap,
  909. * we need to request the region and the barmap tracks that.
  910. */
  911. if (!vdev->barmap[index]) {
  912. ret = pci_request_selected_regions(pdev,
  913. 1 << index, "vfio-pci");
  914. if (ret)
  915. return ret;
  916. vdev->barmap[index] = pci_iomap(pdev, index, 0);
  917. if (!vdev->barmap[index]) {
  918. pci_release_selected_regions(pdev, 1 << index);
  919. return -ENOMEM;
  920. }
  921. }
  922. vma->vm_private_data = vdev;
  923. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  924. vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
  925. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  926. req_len, vma->vm_page_prot);
  927. }
  928. static void vfio_pci_request(void *device_data, unsigned int count)
  929. {
  930. struct vfio_pci_device *vdev = device_data;
  931. mutex_lock(&vdev->igate);
  932. if (vdev->req_trigger) {
  933. if (!(count % 10))
  934. dev_notice_ratelimited(&vdev->pdev->dev,
  935. "Relaying device request to user (#%u)\n",
  936. count);
  937. eventfd_signal(vdev->req_trigger, 1);
  938. } else if (count == 0) {
  939. dev_warn(&vdev->pdev->dev,
  940. "No device request channel registered, blocked until released by user\n");
  941. }
  942. mutex_unlock(&vdev->igate);
  943. }
  944. static const struct vfio_device_ops vfio_pci_ops = {
  945. .name = "vfio-pci",
  946. .open = vfio_pci_open,
  947. .release = vfio_pci_release,
  948. .ioctl = vfio_pci_ioctl,
  949. .read = vfio_pci_read,
  950. .write = vfio_pci_write,
  951. .mmap = vfio_pci_mmap,
  952. .request = vfio_pci_request,
  953. };
  954. static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  955. {
  956. struct vfio_pci_device *vdev;
  957. struct iommu_group *group;
  958. int ret;
  959. if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
  960. return -EINVAL;
  961. group = vfio_iommu_group_get(&pdev->dev);
  962. if (!group)
  963. return -EINVAL;
  964. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  965. if (!vdev) {
  966. vfio_iommu_group_put(group, &pdev->dev);
  967. return -ENOMEM;
  968. }
  969. vdev->pdev = pdev;
  970. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  971. mutex_init(&vdev->igate);
  972. spin_lock_init(&vdev->irqlock);
  973. mutex_init(&vdev->ioeventfds_lock);
  974. INIT_LIST_HEAD(&vdev->ioeventfds_list);
  975. ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
  976. if (ret) {
  977. vfio_iommu_group_put(group, &pdev->dev);
  978. kfree(vdev);
  979. return ret;
  980. }
  981. if (vfio_pci_is_vga(pdev)) {
  982. vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
  983. vga_set_legacy_decoding(pdev,
  984. vfio_pci_set_vga_decode(vdev, false));
  985. }
  986. if (!disable_idle_d3) {
  987. /*
  988. * pci-core sets the device power state to an unknown value at
  989. * bootup and after being removed from a driver. The only
  990. * transition it allows from this unknown state is to D0, which
  991. * typically happens when a driver calls pci_enable_device().
  992. * We're not ready to enable the device yet, but we do want to
  993. * be able to get to D3. Therefore first do a D0 transition
  994. * before going to D3.
  995. */
  996. pci_set_power_state(pdev, PCI_D0);
  997. pci_set_power_state(pdev, PCI_D3hot);
  998. }
  999. return ret;
  1000. }
  1001. static void vfio_pci_remove(struct pci_dev *pdev)
  1002. {
  1003. struct vfio_pci_device *vdev;
  1004. vdev = vfio_del_group_dev(&pdev->dev);
  1005. if (!vdev)
  1006. return;
  1007. vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
  1008. kfree(vdev->region);
  1009. mutex_destroy(&vdev->ioeventfds_lock);
  1010. kfree(vdev);
  1011. if (vfio_pci_is_vga(pdev)) {
  1012. vga_client_register(pdev, NULL, NULL, NULL);
  1013. vga_set_legacy_decoding(pdev,
  1014. VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  1015. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
  1016. }
  1017. if (!disable_idle_d3)
  1018. pci_set_power_state(pdev, PCI_D0);
  1019. }
  1020. static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
  1021. pci_channel_state_t state)
  1022. {
  1023. struct vfio_pci_device *vdev;
  1024. struct vfio_device *device;
  1025. device = vfio_device_get_from_dev(&pdev->dev);
  1026. if (device == NULL)
  1027. return PCI_ERS_RESULT_DISCONNECT;
  1028. vdev = vfio_device_data(device);
  1029. if (vdev == NULL) {
  1030. vfio_device_put(device);
  1031. return PCI_ERS_RESULT_DISCONNECT;
  1032. }
  1033. mutex_lock(&vdev->igate);
  1034. if (vdev->err_trigger)
  1035. eventfd_signal(vdev->err_trigger, 1);
  1036. mutex_unlock(&vdev->igate);
  1037. vfio_device_put(device);
  1038. return PCI_ERS_RESULT_CAN_RECOVER;
  1039. }
  1040. static const struct pci_error_handlers vfio_err_handlers = {
  1041. .error_detected = vfio_pci_aer_err_detected,
  1042. };
  1043. static struct pci_driver vfio_pci_driver = {
  1044. .name = "vfio-pci",
  1045. .id_table = NULL, /* only dynamic ids */
  1046. .probe = vfio_pci_probe,
  1047. .remove = vfio_pci_remove,
  1048. .err_handler = &vfio_err_handlers,
  1049. };
  1050. struct vfio_devices {
  1051. struct vfio_device **devices;
  1052. int cur_index;
  1053. int max_index;
  1054. };
  1055. static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
  1056. {
  1057. struct vfio_devices *devs = data;
  1058. struct vfio_device *device;
  1059. if (devs->cur_index == devs->max_index)
  1060. return -ENOSPC;
  1061. device = vfio_device_get_from_dev(&pdev->dev);
  1062. if (!device)
  1063. return -EINVAL;
  1064. if (pci_dev_driver(pdev) != &vfio_pci_driver) {
  1065. vfio_device_put(device);
  1066. return -EBUSY;
  1067. }
  1068. devs->devices[devs->cur_index++] = device;
  1069. return 0;
  1070. }
  1071. /*
  1072. * Attempt to do a bus/slot reset if there are devices affected by a reset for
  1073. * this device that are needs_reset and all of the affected devices are unused
  1074. * (!refcnt). Callers are required to hold driver_lock when calling this to
  1075. * prevent device opens and concurrent bus reset attempts. We prevent device
  1076. * unbinds by acquiring and holding a reference to the vfio_device.
  1077. *
  1078. * NB: vfio-core considers a group to be viable even if some devices are
  1079. * bound to drivers like pci-stub or pcieport. Here we require all devices
  1080. * to be bound to vfio_pci since that's the only way we can be sure they
  1081. * stay put.
  1082. */
  1083. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
  1084. {
  1085. struct vfio_devices devs = { .cur_index = 0 };
  1086. int i = 0, ret = -EINVAL;
  1087. bool needs_reset = false, slot = false;
  1088. struct vfio_pci_device *tmp;
  1089. if (!pci_probe_reset_slot(vdev->pdev->slot))
  1090. slot = true;
  1091. else if (pci_probe_reset_bus(vdev->pdev->bus))
  1092. return;
  1093. if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
  1094. &i, slot) || !i)
  1095. return;
  1096. devs.max_index = i;
  1097. devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
  1098. if (!devs.devices)
  1099. return;
  1100. if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
  1101. vfio_pci_get_devs, &devs, slot))
  1102. goto put_devs;
  1103. for (i = 0; i < devs.cur_index; i++) {
  1104. tmp = vfio_device_data(devs.devices[i]);
  1105. if (tmp->needs_reset)
  1106. needs_reset = true;
  1107. if (tmp->refcnt)
  1108. goto put_devs;
  1109. }
  1110. if (needs_reset)
  1111. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  1112. pci_try_reset_bus(vdev->pdev->bus);
  1113. put_devs:
  1114. for (i = 0; i < devs.cur_index; i++) {
  1115. tmp = vfio_device_data(devs.devices[i]);
  1116. if (!ret)
  1117. tmp->needs_reset = false;
  1118. if (!tmp->refcnt && !disable_idle_d3)
  1119. pci_set_power_state(tmp->pdev, PCI_D3hot);
  1120. vfio_device_put(devs.devices[i]);
  1121. }
  1122. kfree(devs.devices);
  1123. }
  1124. static void __exit vfio_pci_cleanup(void)
  1125. {
  1126. pci_unregister_driver(&vfio_pci_driver);
  1127. vfio_pci_uninit_perm_bits();
  1128. }
  1129. static void __init vfio_pci_fill_ids(void)
  1130. {
  1131. char *p, *id;
  1132. int rc;
  1133. /* no ids passed actually */
  1134. if (ids[0] == '\0')
  1135. return;
  1136. /* add ids specified in the module parameter */
  1137. p = ids;
  1138. while ((id = strsep(&p, ","))) {
  1139. unsigned int vendor, device, subvendor = PCI_ANY_ID,
  1140. subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
  1141. int fields;
  1142. if (!strlen(id))
  1143. continue;
  1144. fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
  1145. &vendor, &device, &subvendor, &subdevice,
  1146. &class, &class_mask);
  1147. if (fields < 2) {
  1148. pr_warn("invalid id string \"%s\"\n", id);
  1149. continue;
  1150. }
  1151. rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
  1152. subvendor, subdevice, class, class_mask, 0);
  1153. if (rc)
  1154. pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
  1155. vendor, device, subvendor, subdevice,
  1156. class, class_mask, rc);
  1157. else
  1158. pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
  1159. vendor, device, subvendor, subdevice,
  1160. class, class_mask);
  1161. }
  1162. }
  1163. static int __init vfio_pci_init(void)
  1164. {
  1165. int ret;
  1166. /* Allocate shared config space permision data used by all devices */
  1167. ret = vfio_pci_init_perm_bits();
  1168. if (ret)
  1169. return ret;
  1170. /* Register and scan for devices */
  1171. ret = pci_register_driver(&vfio_pci_driver);
  1172. if (ret)
  1173. goto out_driver;
  1174. vfio_pci_fill_ids();
  1175. return 0;
  1176. out_driver:
  1177. vfio_pci_uninit_perm_bits();
  1178. return ret;
  1179. }
  1180. module_init(vfio_pci_init);
  1181. module_exit(vfio_pci_cleanup);
  1182. MODULE_VERSION(DRIVER_VERSION);
  1183. MODULE_LICENSE("GPL v2");
  1184. MODULE_AUTHOR(DRIVER_AUTHOR);
  1185. MODULE_DESCRIPTION(DRIVER_DESC);