qcom_glink_smem.c 7.4 KB

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  1. /*
  2. * Copyright (c) 2016, Linaro Ltd
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/io.h>
  14. #include <linux/module.h>
  15. #include <linux/of.h>
  16. #include <linux/of_address.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/mfd/syscon.h>
  20. #include <linux/slab.h>
  21. #include <linux/rpmsg.h>
  22. #include <linux/idr.h>
  23. #include <linux/circ_buf.h>
  24. #include <linux/soc/qcom/smem.h>
  25. #include <linux/sizes.h>
  26. #include <linux/delay.h>
  27. #include <linux/regmap.h>
  28. #include <linux/workqueue.h>
  29. #include <linux/list.h>
  30. #include <linux/rpmsg/qcom_glink.h>
  31. #include "qcom_glink_native.h"
  32. #define FIFO_FULL_RESERVE 8
  33. #define FIFO_ALIGNMENT 8
  34. #define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
  35. #define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR 478
  36. #define SMEM_GLINK_NATIVE_XPRT_FIFO_0 479
  37. #define SMEM_GLINK_NATIVE_XPRT_FIFO_1 480
  38. struct glink_smem_pipe {
  39. struct qcom_glink_pipe native;
  40. __le32 *tail;
  41. __le32 *head;
  42. void *fifo;
  43. int remote_pid;
  44. };
  45. #define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
  46. static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
  47. {
  48. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  49. size_t len;
  50. void *fifo;
  51. u32 head;
  52. u32 tail;
  53. if (!pipe->fifo) {
  54. fifo = qcom_smem_get(pipe->remote_pid,
  55. SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
  56. if (IS_ERR(fifo)) {
  57. pr_err("failed to acquire RX fifo handle: %ld\n",
  58. PTR_ERR(fifo));
  59. return 0;
  60. }
  61. pipe->fifo = fifo;
  62. pipe->native.length = len;
  63. }
  64. head = le32_to_cpu(*pipe->head);
  65. tail = le32_to_cpu(*pipe->tail);
  66. if (head < tail)
  67. return pipe->native.length - tail + head;
  68. else
  69. return head - tail;
  70. }
  71. static void glink_smem_rx_peak(struct qcom_glink_pipe *np,
  72. void *data, unsigned int offset, size_t count)
  73. {
  74. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  75. size_t len;
  76. u32 tail;
  77. tail = le32_to_cpu(*pipe->tail);
  78. tail += offset;
  79. if (tail >= pipe->native.length)
  80. tail -= pipe->native.length;
  81. len = min_t(size_t, count, pipe->native.length - tail);
  82. if (len) {
  83. __ioread32_copy(data, pipe->fifo + tail,
  84. len / sizeof(u32));
  85. }
  86. if (len != count) {
  87. __ioread32_copy(data + len, pipe->fifo,
  88. (count - len) / sizeof(u32));
  89. }
  90. }
  91. static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
  92. size_t count)
  93. {
  94. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  95. u32 tail;
  96. tail = le32_to_cpu(*pipe->tail);
  97. tail += count;
  98. if (tail > pipe->native.length)
  99. tail -= pipe->native.length;
  100. *pipe->tail = cpu_to_le32(tail);
  101. }
  102. static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np)
  103. {
  104. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  105. u32 head;
  106. u32 tail;
  107. u32 avail;
  108. head = le32_to_cpu(*pipe->head);
  109. tail = le32_to_cpu(*pipe->tail);
  110. if (tail <= head)
  111. avail = pipe->native.length - head + tail;
  112. else
  113. avail = tail - head;
  114. if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
  115. avail = 0;
  116. else
  117. avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;
  118. return avail;
  119. }
  120. static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,
  121. unsigned int head,
  122. const void *data, size_t count)
  123. {
  124. size_t len;
  125. len = min_t(size_t, count, pipe->native.length - head);
  126. if (len)
  127. memcpy(pipe->fifo + head, data, len);
  128. if (len != count)
  129. memcpy(pipe->fifo, data + len, count - len);
  130. head += count;
  131. if (head >= pipe->native.length)
  132. head -= pipe->native.length;
  133. return head;
  134. }
  135. static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
  136. const void *hdr, size_t hlen,
  137. const void *data, size_t dlen)
  138. {
  139. struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);
  140. unsigned int head;
  141. head = le32_to_cpu(*pipe->head);
  142. head = glink_smem_tx_write_one(pipe, head, hdr, hlen);
  143. head = glink_smem_tx_write_one(pipe, head, data, dlen);
  144. /* Ensure head is always aligned to 8 bytes */
  145. head = ALIGN(head, 8);
  146. if (head >= pipe->native.length)
  147. head -= pipe->native.length;
  148. /* Ensure ordering of fifo and head update */
  149. wmb();
  150. *pipe->head = cpu_to_le32(head);
  151. }
  152. static void qcom_glink_smem_release(struct device *dev)
  153. {
  154. kfree(dev);
  155. }
  156. struct qcom_glink *qcom_glink_smem_register(struct device *parent,
  157. struct device_node *node)
  158. {
  159. struct glink_smem_pipe *rx_pipe;
  160. struct glink_smem_pipe *tx_pipe;
  161. struct qcom_glink *glink;
  162. struct device *dev;
  163. u32 remote_pid;
  164. __le32 *descs;
  165. size_t size;
  166. int ret;
  167. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  168. if (!dev)
  169. return ERR_PTR(-ENOMEM);
  170. dev->parent = parent;
  171. dev->of_node = node;
  172. dev->release = qcom_glink_smem_release;
  173. dev_set_name(dev, "%s:%s", node->parent->name, node->name);
  174. ret = device_register(dev);
  175. if (ret) {
  176. pr_err("failed to register glink edge\n");
  177. put_device(dev);
  178. return ERR_PTR(ret);
  179. }
  180. ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
  181. &remote_pid);
  182. if (ret) {
  183. dev_err(dev, "failed to parse qcom,remote-pid\n");
  184. goto err_put_dev;
  185. }
  186. rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
  187. tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
  188. if (!rx_pipe || !tx_pipe) {
  189. ret = -ENOMEM;
  190. goto err_put_dev;
  191. }
  192. ret = qcom_smem_alloc(remote_pid,
  193. SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32);
  194. if (ret && ret != -EEXIST) {
  195. dev_err(dev, "failed to allocate glink descriptors\n");
  196. goto err_put_dev;
  197. }
  198. descs = qcom_smem_get(remote_pid,
  199. SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
  200. if (IS_ERR(descs)) {
  201. dev_err(dev, "failed to acquire xprt descriptor\n");
  202. ret = PTR_ERR(descs);
  203. goto err_put_dev;
  204. }
  205. if (size != 32) {
  206. dev_err(dev, "glink descriptor of invalid size\n");
  207. ret = -EINVAL;
  208. goto err_put_dev;
  209. }
  210. tx_pipe->tail = &descs[0];
  211. tx_pipe->head = &descs[1];
  212. rx_pipe->tail = &descs[2];
  213. rx_pipe->head = &descs[3];
  214. ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
  215. SZ_16K);
  216. if (ret && ret != -EEXIST) {
  217. dev_err(dev, "failed to allocate TX fifo\n");
  218. goto err_put_dev;
  219. }
  220. tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
  221. &tx_pipe->native.length);
  222. if (IS_ERR(tx_pipe->fifo)) {
  223. dev_err(dev, "failed to acquire TX fifo\n");
  224. ret = PTR_ERR(tx_pipe->fifo);
  225. goto err_put_dev;
  226. }
  227. rx_pipe->native.avail = glink_smem_rx_avail;
  228. rx_pipe->native.peak = glink_smem_rx_peak;
  229. rx_pipe->native.advance = glink_smem_rx_advance;
  230. rx_pipe->remote_pid = remote_pid;
  231. tx_pipe->native.avail = glink_smem_tx_avail;
  232. tx_pipe->native.write = glink_smem_tx_write;
  233. tx_pipe->remote_pid = remote_pid;
  234. *rx_pipe->tail = 0;
  235. *tx_pipe->head = 0;
  236. glink = qcom_glink_native_probe(dev,
  237. GLINK_FEATURE_INTENT_REUSE,
  238. &rx_pipe->native, &tx_pipe->native,
  239. false);
  240. if (IS_ERR(glink)) {
  241. ret = PTR_ERR(glink);
  242. goto err_put_dev;
  243. }
  244. return glink;
  245. err_put_dev:
  246. device_unregister(dev);
  247. return ERR_PTR(ret);
  248. }
  249. EXPORT_SYMBOL_GPL(qcom_glink_smem_register);
  250. void qcom_glink_smem_unregister(struct qcom_glink *glink)
  251. {
  252. qcom_glink_native_remove(glink);
  253. qcom_glink_native_unregister(glink);
  254. }
  255. EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister);
  256. MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
  257. MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver");
  258. MODULE_LICENSE("GPL v2");