pci-sysfs.c 43 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  4. * (C) Copyright 2002-2004 IBM Corp.
  5. * (C) Copyright 2003 Matthew Wilcox
  6. * (C) Copyright 2003 Hewlett-Packard
  7. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  8. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  9. *
  10. * File attributes for PCI devices
  11. *
  12. * Modeled after usb's driverfs.c
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/pci.h>
  17. #include <linux/stat.h>
  18. #include <linux/export.h>
  19. #include <linux/topology.h>
  20. #include <linux/mm.h>
  21. #include <linux/fs.h>
  22. #include <linux/capability.h>
  23. #include <linux/security.h>
  24. #include <linux/pci-aspm.h>
  25. #include <linux/slab.h>
  26. #include <linux/vgaarb.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/of.h>
  29. #include "pci.h"
  30. static int sysfs_initialized; /* = 0 */
  31. /* show configuration fields */
  32. #define pci_config_attr(field, format_string) \
  33. static ssize_t \
  34. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  35. { \
  36. struct pci_dev *pdev; \
  37. \
  38. pdev = to_pci_dev(dev); \
  39. return sprintf(buf, format_string, pdev->field); \
  40. } \
  41. static DEVICE_ATTR_RO(field)
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(revision, "0x%02x\n");
  47. pci_config_attr(class, "0x%06x\n");
  48. pci_config_attr(irq, "%u\n");
  49. static ssize_t broken_parity_status_show(struct device *dev,
  50. struct device_attribute *attr,
  51. char *buf)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  55. }
  56. static ssize_t broken_parity_status_store(struct device *dev,
  57. struct device_attribute *attr,
  58. const char *buf, size_t count)
  59. {
  60. struct pci_dev *pdev = to_pci_dev(dev);
  61. unsigned long val;
  62. if (kstrtoul(buf, 0, &val) < 0)
  63. return -EINVAL;
  64. pdev->broken_parity_status = !!val;
  65. return count;
  66. }
  67. static DEVICE_ATTR_RW(broken_parity_status);
  68. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  69. struct device_attribute *attr, char *buf)
  70. {
  71. const struct cpumask *mask;
  72. #ifdef CONFIG_NUMA
  73. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  74. cpumask_of_node(dev_to_node(dev));
  75. #else
  76. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  77. #endif
  78. return cpumap_print_to_pagebuf(list, buf, mask);
  79. }
  80. static ssize_t local_cpus_show(struct device *dev,
  81. struct device_attribute *attr, char *buf)
  82. {
  83. return pci_dev_show_local_cpu(dev, false, attr, buf);
  84. }
  85. static DEVICE_ATTR_RO(local_cpus);
  86. static ssize_t local_cpulist_show(struct device *dev,
  87. struct device_attribute *attr, char *buf)
  88. {
  89. return pci_dev_show_local_cpu(dev, true, attr, buf);
  90. }
  91. static DEVICE_ATTR_RO(local_cpulist);
  92. /*
  93. * PCI Bus Class Devices
  94. */
  95. static ssize_t cpuaffinity_show(struct device *dev,
  96. struct device_attribute *attr, char *buf)
  97. {
  98. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  99. return cpumap_print_to_pagebuf(false, buf, cpumask);
  100. }
  101. static DEVICE_ATTR_RO(cpuaffinity);
  102. static ssize_t cpulistaffinity_show(struct device *dev,
  103. struct device_attribute *attr, char *buf)
  104. {
  105. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  106. return cpumap_print_to_pagebuf(true, buf, cpumask);
  107. }
  108. static DEVICE_ATTR_RO(cpulistaffinity);
  109. /* show resources */
  110. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  111. char *buf)
  112. {
  113. struct pci_dev *pci_dev = to_pci_dev(dev);
  114. char *str = buf;
  115. int i;
  116. int max;
  117. resource_size_t start, end;
  118. if (pci_dev->subordinate)
  119. max = DEVICE_COUNT_RESOURCE;
  120. else
  121. max = PCI_BRIDGE_RESOURCES;
  122. for (i = 0; i < max; i++) {
  123. struct resource *res = &pci_dev->resource[i];
  124. pci_resource_to_user(pci_dev, i, res, &start, &end);
  125. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  126. (unsigned long long)start,
  127. (unsigned long long)end,
  128. (unsigned long long)res->flags);
  129. }
  130. return (str - buf);
  131. }
  132. static DEVICE_ATTR_RO(resource);
  133. static ssize_t max_link_speed_show(struct device *dev,
  134. struct device_attribute *attr, char *buf)
  135. {
  136. struct pci_dev *pdev = to_pci_dev(dev);
  137. return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
  138. }
  139. static DEVICE_ATTR_RO(max_link_speed);
  140. static ssize_t max_link_width_show(struct device *dev,
  141. struct device_attribute *attr, char *buf)
  142. {
  143. struct pci_dev *pdev = to_pci_dev(dev);
  144. return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
  145. }
  146. static DEVICE_ATTR_RO(max_link_width);
  147. static ssize_t current_link_speed_show(struct device *dev,
  148. struct device_attribute *attr, char *buf)
  149. {
  150. struct pci_dev *pci_dev = to_pci_dev(dev);
  151. u16 linkstat;
  152. int err;
  153. const char *speed;
  154. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  155. if (err)
  156. return -EINVAL;
  157. switch (linkstat & PCI_EXP_LNKSTA_CLS) {
  158. case PCI_EXP_LNKSTA_CLS_16_0GB:
  159. speed = "16 GT/s";
  160. break;
  161. case PCI_EXP_LNKSTA_CLS_8_0GB:
  162. speed = "8 GT/s";
  163. break;
  164. case PCI_EXP_LNKSTA_CLS_5_0GB:
  165. speed = "5 GT/s";
  166. break;
  167. case PCI_EXP_LNKSTA_CLS_2_5GB:
  168. speed = "2.5 GT/s";
  169. break;
  170. default:
  171. speed = "Unknown speed";
  172. }
  173. return sprintf(buf, "%s\n", speed);
  174. }
  175. static DEVICE_ATTR_RO(current_link_speed);
  176. static ssize_t current_link_width_show(struct device *dev,
  177. struct device_attribute *attr, char *buf)
  178. {
  179. struct pci_dev *pci_dev = to_pci_dev(dev);
  180. u16 linkstat;
  181. int err;
  182. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  183. if (err)
  184. return -EINVAL;
  185. return sprintf(buf, "%u\n",
  186. (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
  187. }
  188. static DEVICE_ATTR_RO(current_link_width);
  189. static ssize_t secondary_bus_number_show(struct device *dev,
  190. struct device_attribute *attr,
  191. char *buf)
  192. {
  193. struct pci_dev *pci_dev = to_pci_dev(dev);
  194. u8 sec_bus;
  195. int err;
  196. err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
  197. if (err)
  198. return -EINVAL;
  199. return sprintf(buf, "%u\n", sec_bus);
  200. }
  201. static DEVICE_ATTR_RO(secondary_bus_number);
  202. static ssize_t subordinate_bus_number_show(struct device *dev,
  203. struct device_attribute *attr,
  204. char *buf)
  205. {
  206. struct pci_dev *pci_dev = to_pci_dev(dev);
  207. u8 sub_bus;
  208. int err;
  209. err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
  210. if (err)
  211. return -EINVAL;
  212. return sprintf(buf, "%u\n", sub_bus);
  213. }
  214. static DEVICE_ATTR_RO(subordinate_bus_number);
  215. static ssize_t ari_enabled_show(struct device *dev,
  216. struct device_attribute *attr,
  217. char *buf)
  218. {
  219. struct pci_dev *pci_dev = to_pci_dev(dev);
  220. return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
  221. }
  222. static DEVICE_ATTR_RO(ari_enabled);
  223. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  224. char *buf)
  225. {
  226. struct pci_dev *pci_dev = to_pci_dev(dev);
  227. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  228. pci_dev->vendor, pci_dev->device,
  229. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  230. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  231. (u8)(pci_dev->class));
  232. }
  233. static DEVICE_ATTR_RO(modalias);
  234. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  235. const char *buf, size_t count)
  236. {
  237. struct pci_dev *pdev = to_pci_dev(dev);
  238. unsigned long val;
  239. ssize_t result = kstrtoul(buf, 0, &val);
  240. if (result < 0)
  241. return result;
  242. /* this can crash the machine when done on the "wrong" device */
  243. if (!capable(CAP_SYS_ADMIN))
  244. return -EPERM;
  245. if (!val) {
  246. if (pci_is_enabled(pdev))
  247. pci_disable_device(pdev);
  248. else
  249. result = -EIO;
  250. } else
  251. result = pci_enable_device(pdev);
  252. return result < 0 ? result : count;
  253. }
  254. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  255. char *buf)
  256. {
  257. struct pci_dev *pdev;
  258. pdev = to_pci_dev(dev);
  259. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  260. }
  261. static DEVICE_ATTR_RW(enable);
  262. #ifdef CONFIG_NUMA
  263. static ssize_t numa_node_store(struct device *dev,
  264. struct device_attribute *attr, const char *buf,
  265. size_t count)
  266. {
  267. struct pci_dev *pdev = to_pci_dev(dev);
  268. int node, ret;
  269. if (!capable(CAP_SYS_ADMIN))
  270. return -EPERM;
  271. ret = kstrtoint(buf, 0, &node);
  272. if (ret)
  273. return ret;
  274. if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
  275. return -EINVAL;
  276. if (node != NUMA_NO_NODE && !node_online(node))
  277. return -EINVAL;
  278. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  279. pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  280. node);
  281. dev->numa_node = node;
  282. return count;
  283. }
  284. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  285. char *buf)
  286. {
  287. return sprintf(buf, "%d\n", dev->numa_node);
  288. }
  289. static DEVICE_ATTR_RW(numa_node);
  290. #endif
  291. static ssize_t dma_mask_bits_show(struct device *dev,
  292. struct device_attribute *attr, char *buf)
  293. {
  294. struct pci_dev *pdev = to_pci_dev(dev);
  295. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  296. }
  297. static DEVICE_ATTR_RO(dma_mask_bits);
  298. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  299. struct device_attribute *attr,
  300. char *buf)
  301. {
  302. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  303. }
  304. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  305. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  306. char *buf)
  307. {
  308. struct pci_dev *pdev = to_pci_dev(dev);
  309. struct pci_bus *subordinate = pdev->subordinate;
  310. return sprintf(buf, "%u\n", subordinate ?
  311. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  312. : !pdev->no_msi);
  313. }
  314. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  315. const char *buf, size_t count)
  316. {
  317. struct pci_dev *pdev = to_pci_dev(dev);
  318. struct pci_bus *subordinate = pdev->subordinate;
  319. unsigned long val;
  320. if (kstrtoul(buf, 0, &val) < 0)
  321. return -EINVAL;
  322. if (!capable(CAP_SYS_ADMIN))
  323. return -EPERM;
  324. /*
  325. * "no_msi" and "bus_flags" only affect what happens when a driver
  326. * requests MSI or MSI-X. They don't affect any drivers that have
  327. * already requested MSI or MSI-X.
  328. */
  329. if (!subordinate) {
  330. pdev->no_msi = !val;
  331. pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
  332. val ? "allowed" : "disallowed");
  333. return count;
  334. }
  335. if (val)
  336. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  337. else
  338. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  339. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  340. val ? "allowed" : "disallowed");
  341. return count;
  342. }
  343. static DEVICE_ATTR_RW(msi_bus);
  344. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  345. size_t count)
  346. {
  347. unsigned long val;
  348. struct pci_bus *b = NULL;
  349. if (kstrtoul(buf, 0, &val) < 0)
  350. return -EINVAL;
  351. if (val) {
  352. pci_lock_rescan_remove();
  353. while ((b = pci_find_next_bus(b)) != NULL)
  354. pci_rescan_bus(b);
  355. pci_unlock_rescan_remove();
  356. }
  357. return count;
  358. }
  359. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  360. static struct attribute *pci_bus_attrs[] = {
  361. &bus_attr_rescan.attr,
  362. NULL,
  363. };
  364. static const struct attribute_group pci_bus_group = {
  365. .attrs = pci_bus_attrs,
  366. };
  367. const struct attribute_group *pci_bus_groups[] = {
  368. &pci_bus_group,
  369. NULL,
  370. };
  371. static ssize_t dev_rescan_store(struct device *dev,
  372. struct device_attribute *attr, const char *buf,
  373. size_t count)
  374. {
  375. unsigned long val;
  376. struct pci_dev *pdev = to_pci_dev(dev);
  377. if (kstrtoul(buf, 0, &val) < 0)
  378. return -EINVAL;
  379. if (val) {
  380. pci_lock_rescan_remove();
  381. pci_rescan_bus(pdev->bus);
  382. pci_unlock_rescan_remove();
  383. }
  384. return count;
  385. }
  386. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  387. (S_IWUSR|S_IWGRP),
  388. NULL, dev_rescan_store);
  389. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  390. const char *buf, size_t count)
  391. {
  392. unsigned long val;
  393. if (kstrtoul(buf, 0, &val) < 0)
  394. return -EINVAL;
  395. if (val && device_remove_file_self(dev, attr))
  396. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  397. return count;
  398. }
  399. static struct device_attribute dev_remove_attr = __ATTR(remove,
  400. (S_IWUSR|S_IWGRP),
  401. NULL, remove_store);
  402. static ssize_t dev_bus_rescan_store(struct device *dev,
  403. struct device_attribute *attr,
  404. const char *buf, size_t count)
  405. {
  406. unsigned long val;
  407. struct pci_bus *bus = to_pci_bus(dev);
  408. if (kstrtoul(buf, 0, &val) < 0)
  409. return -EINVAL;
  410. if (val) {
  411. pci_lock_rescan_remove();
  412. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  413. pci_rescan_bus_bridge_resize(bus->self);
  414. else
  415. pci_rescan_bus(bus);
  416. pci_unlock_rescan_remove();
  417. }
  418. return count;
  419. }
  420. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  421. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  422. static ssize_t d3cold_allowed_store(struct device *dev,
  423. struct device_attribute *attr,
  424. const char *buf, size_t count)
  425. {
  426. struct pci_dev *pdev = to_pci_dev(dev);
  427. unsigned long val;
  428. if (kstrtoul(buf, 0, &val) < 0)
  429. return -EINVAL;
  430. pdev->d3cold_allowed = !!val;
  431. if (pdev->d3cold_allowed)
  432. pci_d3cold_enable(pdev);
  433. else
  434. pci_d3cold_disable(pdev);
  435. pm_runtime_resume(dev);
  436. return count;
  437. }
  438. static ssize_t d3cold_allowed_show(struct device *dev,
  439. struct device_attribute *attr, char *buf)
  440. {
  441. struct pci_dev *pdev = to_pci_dev(dev);
  442. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  443. }
  444. static DEVICE_ATTR_RW(d3cold_allowed);
  445. #endif
  446. #ifdef CONFIG_OF
  447. static ssize_t devspec_show(struct device *dev,
  448. struct device_attribute *attr, char *buf)
  449. {
  450. struct pci_dev *pdev = to_pci_dev(dev);
  451. struct device_node *np = pci_device_to_OF_node(pdev);
  452. if (np == NULL)
  453. return 0;
  454. return sprintf(buf, "%pOF", np);
  455. }
  456. static DEVICE_ATTR_RO(devspec);
  457. #endif
  458. #ifdef CONFIG_PCI_IOV
  459. static ssize_t sriov_totalvfs_show(struct device *dev,
  460. struct device_attribute *attr,
  461. char *buf)
  462. {
  463. struct pci_dev *pdev = to_pci_dev(dev);
  464. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  465. }
  466. static ssize_t sriov_numvfs_show(struct device *dev,
  467. struct device_attribute *attr,
  468. char *buf)
  469. {
  470. struct pci_dev *pdev = to_pci_dev(dev);
  471. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  472. }
  473. /*
  474. * num_vfs > 0; number of VFs to enable
  475. * num_vfs = 0; disable all VFs
  476. *
  477. * Note: SRIOV spec doesn't allow partial VF
  478. * disable, so it's all or none.
  479. */
  480. static ssize_t sriov_numvfs_store(struct device *dev,
  481. struct device_attribute *attr,
  482. const char *buf, size_t count)
  483. {
  484. struct pci_dev *pdev = to_pci_dev(dev);
  485. int ret;
  486. u16 num_vfs;
  487. ret = kstrtou16(buf, 0, &num_vfs);
  488. if (ret < 0)
  489. return ret;
  490. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  491. return -ERANGE;
  492. device_lock(&pdev->dev);
  493. if (num_vfs == pdev->sriov->num_VFs)
  494. goto exit;
  495. /* is PF driver loaded w/callback */
  496. if (!pdev->driver || !pdev->driver->sriov_configure) {
  497. pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n");
  498. ret = -ENOENT;
  499. goto exit;
  500. }
  501. if (num_vfs == 0) {
  502. /* disable VFs */
  503. ret = pdev->driver->sriov_configure(pdev, 0);
  504. goto exit;
  505. }
  506. /* enable VFs */
  507. if (pdev->sriov->num_VFs) {
  508. pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  509. pdev->sriov->num_VFs, num_vfs);
  510. ret = -EBUSY;
  511. goto exit;
  512. }
  513. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  514. if (ret < 0)
  515. goto exit;
  516. if (ret != num_vfs)
  517. pci_warn(pdev, "%d VFs requested; only %d enabled\n",
  518. num_vfs, ret);
  519. exit:
  520. device_unlock(&pdev->dev);
  521. if (ret < 0)
  522. return ret;
  523. return count;
  524. }
  525. static ssize_t sriov_offset_show(struct device *dev,
  526. struct device_attribute *attr,
  527. char *buf)
  528. {
  529. struct pci_dev *pdev = to_pci_dev(dev);
  530. return sprintf(buf, "%u\n", pdev->sriov->offset);
  531. }
  532. static ssize_t sriov_stride_show(struct device *dev,
  533. struct device_attribute *attr,
  534. char *buf)
  535. {
  536. struct pci_dev *pdev = to_pci_dev(dev);
  537. return sprintf(buf, "%u\n", pdev->sriov->stride);
  538. }
  539. static ssize_t sriov_vf_device_show(struct device *dev,
  540. struct device_attribute *attr,
  541. char *buf)
  542. {
  543. struct pci_dev *pdev = to_pci_dev(dev);
  544. return sprintf(buf, "%x\n", pdev->sriov->vf_device);
  545. }
  546. static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
  547. struct device_attribute *attr,
  548. char *buf)
  549. {
  550. struct pci_dev *pdev = to_pci_dev(dev);
  551. return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
  552. }
  553. static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
  554. struct device_attribute *attr,
  555. const char *buf, size_t count)
  556. {
  557. struct pci_dev *pdev = to_pci_dev(dev);
  558. bool drivers_autoprobe;
  559. if (kstrtobool(buf, &drivers_autoprobe) < 0)
  560. return -EINVAL;
  561. pdev->sriov->drivers_autoprobe = drivers_autoprobe;
  562. return count;
  563. }
  564. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  565. static struct device_attribute sriov_numvfs_attr =
  566. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  567. sriov_numvfs_show, sriov_numvfs_store);
  568. static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
  569. static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
  570. static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
  571. static struct device_attribute sriov_drivers_autoprobe_attr =
  572. __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
  573. sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
  574. #endif /* CONFIG_PCI_IOV */
  575. static ssize_t driver_override_store(struct device *dev,
  576. struct device_attribute *attr,
  577. const char *buf, size_t count)
  578. {
  579. struct pci_dev *pdev = to_pci_dev(dev);
  580. char *driver_override, *old, *cp;
  581. /* We need to keep extra room for a newline */
  582. if (count >= (PAGE_SIZE - 1))
  583. return -EINVAL;
  584. driver_override = kstrndup(buf, count, GFP_KERNEL);
  585. if (!driver_override)
  586. return -ENOMEM;
  587. cp = strchr(driver_override, '\n');
  588. if (cp)
  589. *cp = '\0';
  590. device_lock(dev);
  591. old = pdev->driver_override;
  592. if (strlen(driver_override)) {
  593. pdev->driver_override = driver_override;
  594. } else {
  595. kfree(driver_override);
  596. pdev->driver_override = NULL;
  597. }
  598. device_unlock(dev);
  599. kfree(old);
  600. return count;
  601. }
  602. static ssize_t driver_override_show(struct device *dev,
  603. struct device_attribute *attr, char *buf)
  604. {
  605. struct pci_dev *pdev = to_pci_dev(dev);
  606. ssize_t len;
  607. device_lock(dev);
  608. len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
  609. device_unlock(dev);
  610. return len;
  611. }
  612. static DEVICE_ATTR_RW(driver_override);
  613. static struct attribute *pci_dev_attrs[] = {
  614. &dev_attr_resource.attr,
  615. &dev_attr_vendor.attr,
  616. &dev_attr_device.attr,
  617. &dev_attr_subsystem_vendor.attr,
  618. &dev_attr_subsystem_device.attr,
  619. &dev_attr_revision.attr,
  620. &dev_attr_class.attr,
  621. &dev_attr_irq.attr,
  622. &dev_attr_local_cpus.attr,
  623. &dev_attr_local_cpulist.attr,
  624. &dev_attr_modalias.attr,
  625. #ifdef CONFIG_NUMA
  626. &dev_attr_numa_node.attr,
  627. #endif
  628. &dev_attr_dma_mask_bits.attr,
  629. &dev_attr_consistent_dma_mask_bits.attr,
  630. &dev_attr_enable.attr,
  631. &dev_attr_broken_parity_status.attr,
  632. &dev_attr_msi_bus.attr,
  633. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  634. &dev_attr_d3cold_allowed.attr,
  635. #endif
  636. #ifdef CONFIG_OF
  637. &dev_attr_devspec.attr,
  638. #endif
  639. &dev_attr_driver_override.attr,
  640. &dev_attr_ari_enabled.attr,
  641. NULL,
  642. };
  643. static struct attribute *pci_bridge_attrs[] = {
  644. &dev_attr_subordinate_bus_number.attr,
  645. &dev_attr_secondary_bus_number.attr,
  646. NULL,
  647. };
  648. static struct attribute *pcie_dev_attrs[] = {
  649. &dev_attr_current_link_speed.attr,
  650. &dev_attr_current_link_width.attr,
  651. &dev_attr_max_link_width.attr,
  652. &dev_attr_max_link_speed.attr,
  653. NULL,
  654. };
  655. static struct attribute *pcibus_attrs[] = {
  656. &dev_attr_rescan.attr,
  657. &dev_attr_cpuaffinity.attr,
  658. &dev_attr_cpulistaffinity.attr,
  659. NULL,
  660. };
  661. static const struct attribute_group pcibus_group = {
  662. .attrs = pcibus_attrs,
  663. };
  664. const struct attribute_group *pcibus_groups[] = {
  665. &pcibus_group,
  666. NULL,
  667. };
  668. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  669. char *buf)
  670. {
  671. struct pci_dev *pdev = to_pci_dev(dev);
  672. struct pci_dev *vga_dev = vga_default_device();
  673. if (vga_dev)
  674. return sprintf(buf, "%u\n", (pdev == vga_dev));
  675. return sprintf(buf, "%u\n",
  676. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  677. IORESOURCE_ROM_SHADOW));
  678. }
  679. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  680. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  681. struct bin_attribute *bin_attr, char *buf,
  682. loff_t off, size_t count)
  683. {
  684. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  685. unsigned int size = 64;
  686. loff_t init_off = off;
  687. u8 *data = (u8 *) buf;
  688. /* Several chips lock up trying to read undefined config space */
  689. if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
  690. size = dev->cfg_size;
  691. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  692. size = 128;
  693. if (off > size)
  694. return 0;
  695. if (off + count > size) {
  696. size -= off;
  697. count = size;
  698. } else {
  699. size = count;
  700. }
  701. pci_config_pm_runtime_get(dev);
  702. if ((off & 1) && size) {
  703. u8 val;
  704. pci_user_read_config_byte(dev, off, &val);
  705. data[off - init_off] = val;
  706. off++;
  707. size--;
  708. }
  709. if ((off & 3) && size > 2) {
  710. u16 val;
  711. pci_user_read_config_word(dev, off, &val);
  712. data[off - init_off] = val & 0xff;
  713. data[off - init_off + 1] = (val >> 8) & 0xff;
  714. off += 2;
  715. size -= 2;
  716. }
  717. while (size > 3) {
  718. u32 val;
  719. pci_user_read_config_dword(dev, off, &val);
  720. data[off - init_off] = val & 0xff;
  721. data[off - init_off + 1] = (val >> 8) & 0xff;
  722. data[off - init_off + 2] = (val >> 16) & 0xff;
  723. data[off - init_off + 3] = (val >> 24) & 0xff;
  724. off += 4;
  725. size -= 4;
  726. }
  727. if (size >= 2) {
  728. u16 val;
  729. pci_user_read_config_word(dev, off, &val);
  730. data[off - init_off] = val & 0xff;
  731. data[off - init_off + 1] = (val >> 8) & 0xff;
  732. off += 2;
  733. size -= 2;
  734. }
  735. if (size > 0) {
  736. u8 val;
  737. pci_user_read_config_byte(dev, off, &val);
  738. data[off - init_off] = val;
  739. off++;
  740. --size;
  741. }
  742. pci_config_pm_runtime_put(dev);
  743. return count;
  744. }
  745. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  746. struct bin_attribute *bin_attr, char *buf,
  747. loff_t off, size_t count)
  748. {
  749. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  750. unsigned int size = count;
  751. loff_t init_off = off;
  752. u8 *data = (u8 *) buf;
  753. if (off > dev->cfg_size)
  754. return 0;
  755. if (off + count > dev->cfg_size) {
  756. size = dev->cfg_size - off;
  757. count = size;
  758. }
  759. pci_config_pm_runtime_get(dev);
  760. if ((off & 1) && size) {
  761. pci_user_write_config_byte(dev, off, data[off - init_off]);
  762. off++;
  763. size--;
  764. }
  765. if ((off & 3) && size > 2) {
  766. u16 val = data[off - init_off];
  767. val |= (u16) data[off - init_off + 1] << 8;
  768. pci_user_write_config_word(dev, off, val);
  769. off += 2;
  770. size -= 2;
  771. }
  772. while (size > 3) {
  773. u32 val = data[off - init_off];
  774. val |= (u32) data[off - init_off + 1] << 8;
  775. val |= (u32) data[off - init_off + 2] << 16;
  776. val |= (u32) data[off - init_off + 3] << 24;
  777. pci_user_write_config_dword(dev, off, val);
  778. off += 4;
  779. size -= 4;
  780. }
  781. if (size >= 2) {
  782. u16 val = data[off - init_off];
  783. val |= (u16) data[off - init_off + 1] << 8;
  784. pci_user_write_config_word(dev, off, val);
  785. off += 2;
  786. size -= 2;
  787. }
  788. if (size) {
  789. pci_user_write_config_byte(dev, off, data[off - init_off]);
  790. off++;
  791. --size;
  792. }
  793. pci_config_pm_runtime_put(dev);
  794. return count;
  795. }
  796. #ifdef HAVE_PCI_LEGACY
  797. /**
  798. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  799. * @filp: open sysfs file
  800. * @kobj: kobject corresponding to file to read from
  801. * @bin_attr: struct bin_attribute for this file
  802. * @buf: buffer to store results
  803. * @off: offset into legacy I/O port space
  804. * @count: number of bytes to read
  805. *
  806. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  807. * callback routine (pci_legacy_read).
  808. */
  809. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  810. struct bin_attribute *bin_attr, char *buf,
  811. loff_t off, size_t count)
  812. {
  813. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  814. /* Only support 1, 2 or 4 byte accesses */
  815. if (count != 1 && count != 2 && count != 4)
  816. return -EINVAL;
  817. return pci_legacy_read(bus, off, (u32 *)buf, count);
  818. }
  819. /**
  820. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  821. * @filp: open sysfs file
  822. * @kobj: kobject corresponding to file to read from
  823. * @bin_attr: struct bin_attribute for this file
  824. * @buf: buffer containing value to be written
  825. * @off: offset into legacy I/O port space
  826. * @count: number of bytes to write
  827. *
  828. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  829. * callback routine (pci_legacy_write).
  830. */
  831. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  832. struct bin_attribute *bin_attr, char *buf,
  833. loff_t off, size_t count)
  834. {
  835. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  836. /* Only support 1, 2 or 4 byte accesses */
  837. if (count != 1 && count != 2 && count != 4)
  838. return -EINVAL;
  839. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  840. }
  841. /**
  842. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  843. * @filp: open sysfs file
  844. * @kobj: kobject corresponding to device to be mapped
  845. * @attr: struct bin_attribute for this file
  846. * @vma: struct vm_area_struct passed to mmap
  847. *
  848. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  849. * legacy memory space (first meg of bus space) into application virtual
  850. * memory space.
  851. */
  852. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  853. struct bin_attribute *attr,
  854. struct vm_area_struct *vma)
  855. {
  856. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  857. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  858. }
  859. /**
  860. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  861. * @filp: open sysfs file
  862. * @kobj: kobject corresponding to device to be mapped
  863. * @attr: struct bin_attribute for this file
  864. * @vma: struct vm_area_struct passed to mmap
  865. *
  866. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  867. * legacy IO space (first meg of bus space) into application virtual
  868. * memory space. Returns -ENOSYS if the operation isn't supported
  869. */
  870. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  871. struct bin_attribute *attr,
  872. struct vm_area_struct *vma)
  873. {
  874. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  875. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  876. }
  877. /**
  878. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  879. * @b: bus to create files under
  880. * @mmap_type: I/O port or memory
  881. *
  882. * Stub implementation. Can be overridden by arch if necessary.
  883. */
  884. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  885. enum pci_mmap_state mmap_type)
  886. {
  887. }
  888. /**
  889. * pci_create_legacy_files - create legacy I/O port and memory files
  890. * @b: bus to create files under
  891. *
  892. * Some platforms allow access to legacy I/O port and ISA memory space on
  893. * a per-bus basis. This routine creates the files and ties them into
  894. * their associated read, write and mmap files from pci-sysfs.c
  895. *
  896. * On error unwind, but don't propagate the error to the caller
  897. * as it is ok to set up the PCI bus without these files.
  898. */
  899. void pci_create_legacy_files(struct pci_bus *b)
  900. {
  901. int error;
  902. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  903. GFP_ATOMIC);
  904. if (!b->legacy_io)
  905. goto kzalloc_err;
  906. sysfs_bin_attr_init(b->legacy_io);
  907. b->legacy_io->attr.name = "legacy_io";
  908. b->legacy_io->size = 0xffff;
  909. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  910. b->legacy_io->read = pci_read_legacy_io;
  911. b->legacy_io->write = pci_write_legacy_io;
  912. b->legacy_io->mmap = pci_mmap_legacy_io;
  913. pci_adjust_legacy_attr(b, pci_mmap_io);
  914. error = device_create_bin_file(&b->dev, b->legacy_io);
  915. if (error)
  916. goto legacy_io_err;
  917. /* Allocated above after the legacy_io struct */
  918. b->legacy_mem = b->legacy_io + 1;
  919. sysfs_bin_attr_init(b->legacy_mem);
  920. b->legacy_mem->attr.name = "legacy_mem";
  921. b->legacy_mem->size = 1024*1024;
  922. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  923. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  924. pci_adjust_legacy_attr(b, pci_mmap_mem);
  925. error = device_create_bin_file(&b->dev, b->legacy_mem);
  926. if (error)
  927. goto legacy_mem_err;
  928. return;
  929. legacy_mem_err:
  930. device_remove_bin_file(&b->dev, b->legacy_io);
  931. legacy_io_err:
  932. kfree(b->legacy_io);
  933. b->legacy_io = NULL;
  934. kzalloc_err:
  935. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  936. return;
  937. }
  938. void pci_remove_legacy_files(struct pci_bus *b)
  939. {
  940. if (b->legacy_io) {
  941. device_remove_bin_file(&b->dev, b->legacy_io);
  942. device_remove_bin_file(&b->dev, b->legacy_mem);
  943. kfree(b->legacy_io); /* both are allocated here */
  944. }
  945. }
  946. #endif /* HAVE_PCI_LEGACY */
  947. #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
  948. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  949. enum pci_mmap_api mmap_api)
  950. {
  951. unsigned long nr, start, size;
  952. resource_size_t pci_start = 0, pci_end;
  953. if (pci_resource_len(pdev, resno) == 0)
  954. return 0;
  955. nr = vma_pages(vma);
  956. start = vma->vm_pgoff;
  957. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  958. if (mmap_api == PCI_MMAP_PROCFS) {
  959. pci_resource_to_user(pdev, resno, &pdev->resource[resno],
  960. &pci_start, &pci_end);
  961. pci_start >>= PAGE_SHIFT;
  962. }
  963. if (start >= pci_start && start < pci_start + size &&
  964. start + nr <= pci_start + size)
  965. return 1;
  966. return 0;
  967. }
  968. /**
  969. * pci_mmap_resource - map a PCI resource into user memory space
  970. * @kobj: kobject for mapping
  971. * @attr: struct bin_attribute for the file being mapped
  972. * @vma: struct vm_area_struct passed into the mmap
  973. * @write_combine: 1 for write_combine mapping
  974. *
  975. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  976. */
  977. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  978. struct vm_area_struct *vma, int write_combine)
  979. {
  980. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  981. int bar = (unsigned long)attr->private;
  982. enum pci_mmap_state mmap_type;
  983. struct resource *res = &pdev->resource[bar];
  984. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
  985. return -EINVAL;
  986. if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
  987. return -EINVAL;
  988. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  989. return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
  990. }
  991. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  992. struct bin_attribute *attr,
  993. struct vm_area_struct *vma)
  994. {
  995. return pci_mmap_resource(kobj, attr, vma, 0);
  996. }
  997. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  998. struct bin_attribute *attr,
  999. struct vm_area_struct *vma)
  1000. {
  1001. return pci_mmap_resource(kobj, attr, vma, 1);
  1002. }
  1003. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  1004. struct bin_attribute *attr, char *buf,
  1005. loff_t off, size_t count, bool write)
  1006. {
  1007. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1008. int bar = (unsigned long)attr->private;
  1009. unsigned long port = off;
  1010. port += pci_resource_start(pdev, bar);
  1011. if (port > pci_resource_end(pdev, bar))
  1012. return 0;
  1013. if (port + count - 1 > pci_resource_end(pdev, bar))
  1014. return -EINVAL;
  1015. switch (count) {
  1016. case 1:
  1017. if (write)
  1018. outb(*(u8 *)buf, port);
  1019. else
  1020. *(u8 *)buf = inb(port);
  1021. return 1;
  1022. case 2:
  1023. if (write)
  1024. outw(*(u16 *)buf, port);
  1025. else
  1026. *(u16 *)buf = inw(port);
  1027. return 2;
  1028. case 4:
  1029. if (write)
  1030. outl(*(u32 *)buf, port);
  1031. else
  1032. *(u32 *)buf = inl(port);
  1033. return 4;
  1034. }
  1035. return -EINVAL;
  1036. }
  1037. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  1038. struct bin_attribute *attr, char *buf,
  1039. loff_t off, size_t count)
  1040. {
  1041. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  1042. }
  1043. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  1044. struct bin_attribute *attr, char *buf,
  1045. loff_t off, size_t count)
  1046. {
  1047. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  1048. }
  1049. /**
  1050. * pci_remove_resource_files - cleanup resource files
  1051. * @pdev: dev to cleanup
  1052. *
  1053. * If we created resource files for @pdev, remove them from sysfs and
  1054. * free their resources.
  1055. */
  1056. static void pci_remove_resource_files(struct pci_dev *pdev)
  1057. {
  1058. int i;
  1059. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1060. struct bin_attribute *res_attr;
  1061. res_attr = pdev->res_attr[i];
  1062. if (res_attr) {
  1063. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  1064. kfree(res_attr);
  1065. }
  1066. res_attr = pdev->res_attr_wc[i];
  1067. if (res_attr) {
  1068. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  1069. kfree(res_attr);
  1070. }
  1071. }
  1072. }
  1073. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  1074. {
  1075. /* allocate attribute structure, piggyback attribute name */
  1076. int name_len = write_combine ? 13 : 10;
  1077. struct bin_attribute *res_attr;
  1078. char *res_attr_name;
  1079. int retval;
  1080. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  1081. if (!res_attr)
  1082. return -ENOMEM;
  1083. res_attr_name = (char *)(res_attr + 1);
  1084. sysfs_bin_attr_init(res_attr);
  1085. if (write_combine) {
  1086. pdev->res_attr_wc[num] = res_attr;
  1087. sprintf(res_attr_name, "resource%d_wc", num);
  1088. res_attr->mmap = pci_mmap_resource_wc;
  1089. } else {
  1090. pdev->res_attr[num] = res_attr;
  1091. sprintf(res_attr_name, "resource%d", num);
  1092. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  1093. res_attr->read = pci_read_resource_io;
  1094. res_attr->write = pci_write_resource_io;
  1095. if (arch_can_pci_mmap_io())
  1096. res_attr->mmap = pci_mmap_resource_uc;
  1097. } else {
  1098. res_attr->mmap = pci_mmap_resource_uc;
  1099. }
  1100. }
  1101. res_attr->attr.name = res_attr_name;
  1102. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  1103. res_attr->size = pci_resource_len(pdev, num);
  1104. res_attr->private = (void *)(unsigned long)num;
  1105. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  1106. if (retval)
  1107. kfree(res_attr);
  1108. return retval;
  1109. }
  1110. /**
  1111. * pci_create_resource_files - create resource files in sysfs for @dev
  1112. * @pdev: dev in question
  1113. *
  1114. * Walk the resources in @pdev creating files for each resource available.
  1115. */
  1116. static int pci_create_resource_files(struct pci_dev *pdev)
  1117. {
  1118. int i;
  1119. int retval;
  1120. /* Expose the PCI resources from this device as files */
  1121. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1122. /* skip empty resources */
  1123. if (!pci_resource_len(pdev, i))
  1124. continue;
  1125. retval = pci_create_attr(pdev, i, 0);
  1126. /* for prefetchable resources, create a WC mappable file */
  1127. if (!retval && arch_can_pci_mmap_wc() &&
  1128. pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1129. retval = pci_create_attr(pdev, i, 1);
  1130. if (retval) {
  1131. pci_remove_resource_files(pdev);
  1132. return retval;
  1133. }
  1134. }
  1135. return 0;
  1136. }
  1137. #else /* !HAVE_PCI_MMAP */
  1138. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1139. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1140. #endif /* HAVE_PCI_MMAP */
  1141. /**
  1142. * pci_write_rom - used to enable access to the PCI ROM display
  1143. * @filp: sysfs file
  1144. * @kobj: kernel object handle
  1145. * @bin_attr: struct bin_attribute for this file
  1146. * @buf: user input
  1147. * @off: file offset
  1148. * @count: number of byte in input
  1149. *
  1150. * writing anything except 0 enables it
  1151. */
  1152. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1153. struct bin_attribute *bin_attr, char *buf,
  1154. loff_t off, size_t count)
  1155. {
  1156. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1157. if ((off == 0) && (*buf == '0') && (count == 2))
  1158. pdev->rom_attr_enabled = 0;
  1159. else
  1160. pdev->rom_attr_enabled = 1;
  1161. return count;
  1162. }
  1163. /**
  1164. * pci_read_rom - read a PCI ROM
  1165. * @filp: sysfs file
  1166. * @kobj: kernel object handle
  1167. * @bin_attr: struct bin_attribute for this file
  1168. * @buf: where to put the data we read from the ROM
  1169. * @off: file offset
  1170. * @count: number of bytes to read
  1171. *
  1172. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1173. * device corresponding to @kobj.
  1174. */
  1175. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1176. struct bin_attribute *bin_attr, char *buf,
  1177. loff_t off, size_t count)
  1178. {
  1179. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1180. void __iomem *rom;
  1181. size_t size;
  1182. if (!pdev->rom_attr_enabled)
  1183. return -EINVAL;
  1184. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1185. if (!rom || !size)
  1186. return -EIO;
  1187. if (off >= size)
  1188. count = 0;
  1189. else {
  1190. if (off + count > size)
  1191. count = size - off;
  1192. memcpy_fromio(buf, rom + off, count);
  1193. }
  1194. pci_unmap_rom(pdev, rom);
  1195. return count;
  1196. }
  1197. static const struct bin_attribute pci_config_attr = {
  1198. .attr = {
  1199. .name = "config",
  1200. .mode = S_IRUGO | S_IWUSR,
  1201. },
  1202. .size = PCI_CFG_SPACE_SIZE,
  1203. .read = pci_read_config,
  1204. .write = pci_write_config,
  1205. };
  1206. static const struct bin_attribute pcie_config_attr = {
  1207. .attr = {
  1208. .name = "config",
  1209. .mode = S_IRUGO | S_IWUSR,
  1210. },
  1211. .size = PCI_CFG_SPACE_EXP_SIZE,
  1212. .read = pci_read_config,
  1213. .write = pci_write_config,
  1214. };
  1215. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1216. const char *buf, size_t count)
  1217. {
  1218. struct pci_dev *pdev = to_pci_dev(dev);
  1219. unsigned long val;
  1220. ssize_t result = kstrtoul(buf, 0, &val);
  1221. if (result < 0)
  1222. return result;
  1223. if (val != 1)
  1224. return -EINVAL;
  1225. result = pci_reset_function(pdev);
  1226. if (result < 0)
  1227. return result;
  1228. return count;
  1229. }
  1230. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1231. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1232. {
  1233. int retval;
  1234. pcie_vpd_create_sysfs_dev_files(dev);
  1235. pcie_aspm_create_sysfs_dev_files(dev);
  1236. if (dev->reset_fn) {
  1237. retval = device_create_file(&dev->dev, &reset_attr);
  1238. if (retval)
  1239. goto error;
  1240. }
  1241. return 0;
  1242. error:
  1243. pcie_aspm_remove_sysfs_dev_files(dev);
  1244. pcie_vpd_remove_sysfs_dev_files(dev);
  1245. return retval;
  1246. }
  1247. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1248. {
  1249. int retval;
  1250. int rom_size;
  1251. struct bin_attribute *attr;
  1252. if (!sysfs_initialized)
  1253. return -EACCES;
  1254. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1255. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1256. else
  1257. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1258. if (retval)
  1259. goto err;
  1260. retval = pci_create_resource_files(pdev);
  1261. if (retval)
  1262. goto err_config_file;
  1263. /* If the device has a ROM, try to expose it in sysfs. */
  1264. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1265. if (rom_size) {
  1266. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1267. if (!attr) {
  1268. retval = -ENOMEM;
  1269. goto err_resource_files;
  1270. }
  1271. sysfs_bin_attr_init(attr);
  1272. attr->size = rom_size;
  1273. attr->attr.name = "rom";
  1274. attr->attr.mode = S_IRUSR | S_IWUSR;
  1275. attr->read = pci_read_rom;
  1276. attr->write = pci_write_rom;
  1277. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1278. if (retval) {
  1279. kfree(attr);
  1280. goto err_resource_files;
  1281. }
  1282. pdev->rom_attr = attr;
  1283. }
  1284. /* add sysfs entries for various capabilities */
  1285. retval = pci_create_capabilities_sysfs(pdev);
  1286. if (retval)
  1287. goto err_rom_file;
  1288. pci_create_firmware_label_files(pdev);
  1289. return 0;
  1290. err_rom_file:
  1291. if (pdev->rom_attr) {
  1292. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1293. kfree(pdev->rom_attr);
  1294. pdev->rom_attr = NULL;
  1295. }
  1296. err_resource_files:
  1297. pci_remove_resource_files(pdev);
  1298. err_config_file:
  1299. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1300. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1301. else
  1302. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1303. err:
  1304. return retval;
  1305. }
  1306. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1307. {
  1308. pcie_vpd_remove_sysfs_dev_files(dev);
  1309. pcie_aspm_remove_sysfs_dev_files(dev);
  1310. if (dev->reset_fn) {
  1311. device_remove_file(&dev->dev, &reset_attr);
  1312. dev->reset_fn = 0;
  1313. }
  1314. }
  1315. /**
  1316. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1317. * @pdev: device whose entries we should free
  1318. *
  1319. * Cleanup when @pdev is removed from sysfs.
  1320. */
  1321. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1322. {
  1323. if (!sysfs_initialized)
  1324. return;
  1325. pci_remove_capabilities_sysfs(pdev);
  1326. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1327. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1328. else
  1329. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1330. pci_remove_resource_files(pdev);
  1331. if (pdev->rom_attr) {
  1332. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1333. kfree(pdev->rom_attr);
  1334. pdev->rom_attr = NULL;
  1335. }
  1336. pci_remove_firmware_label_files(pdev);
  1337. }
  1338. static int __init pci_sysfs_init(void)
  1339. {
  1340. struct pci_dev *pdev = NULL;
  1341. int retval;
  1342. sysfs_initialized = 1;
  1343. for_each_pci_dev(pdev) {
  1344. retval = pci_create_sysfs_dev_files(pdev);
  1345. if (retval) {
  1346. pci_dev_put(pdev);
  1347. return retval;
  1348. }
  1349. }
  1350. return 0;
  1351. }
  1352. late_initcall(pci_sysfs_init);
  1353. static struct attribute *pci_dev_dev_attrs[] = {
  1354. &vga_attr.attr,
  1355. NULL,
  1356. };
  1357. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1358. struct attribute *a, int n)
  1359. {
  1360. struct device *dev = kobj_to_dev(kobj);
  1361. struct pci_dev *pdev = to_pci_dev(dev);
  1362. if (a == &vga_attr.attr)
  1363. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1364. return 0;
  1365. return a->mode;
  1366. }
  1367. static struct attribute *pci_dev_hp_attrs[] = {
  1368. &dev_remove_attr.attr,
  1369. &dev_rescan_attr.attr,
  1370. NULL,
  1371. };
  1372. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1373. struct attribute *a, int n)
  1374. {
  1375. struct device *dev = kobj_to_dev(kobj);
  1376. struct pci_dev *pdev = to_pci_dev(dev);
  1377. if (pdev->is_virtfn)
  1378. return 0;
  1379. return a->mode;
  1380. }
  1381. static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
  1382. struct attribute *a, int n)
  1383. {
  1384. struct device *dev = kobj_to_dev(kobj);
  1385. struct pci_dev *pdev = to_pci_dev(dev);
  1386. if (pci_is_bridge(pdev))
  1387. return a->mode;
  1388. return 0;
  1389. }
  1390. static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
  1391. struct attribute *a, int n)
  1392. {
  1393. struct device *dev = kobj_to_dev(kobj);
  1394. struct pci_dev *pdev = to_pci_dev(dev);
  1395. if (pci_is_pcie(pdev))
  1396. return a->mode;
  1397. return 0;
  1398. }
  1399. static const struct attribute_group pci_dev_group = {
  1400. .attrs = pci_dev_attrs,
  1401. };
  1402. const struct attribute_group *pci_dev_groups[] = {
  1403. &pci_dev_group,
  1404. NULL,
  1405. };
  1406. static const struct attribute_group pci_bridge_group = {
  1407. .attrs = pci_bridge_attrs,
  1408. };
  1409. const struct attribute_group *pci_bridge_groups[] = {
  1410. &pci_bridge_group,
  1411. NULL,
  1412. };
  1413. static const struct attribute_group pcie_dev_group = {
  1414. .attrs = pcie_dev_attrs,
  1415. };
  1416. const struct attribute_group *pcie_dev_groups[] = {
  1417. &pcie_dev_group,
  1418. NULL,
  1419. };
  1420. static const struct attribute_group pci_dev_hp_attr_group = {
  1421. .attrs = pci_dev_hp_attrs,
  1422. .is_visible = pci_dev_hp_attrs_are_visible,
  1423. };
  1424. #ifdef CONFIG_PCI_IOV
  1425. static struct attribute *sriov_dev_attrs[] = {
  1426. &sriov_totalvfs_attr.attr,
  1427. &sriov_numvfs_attr.attr,
  1428. &sriov_offset_attr.attr,
  1429. &sriov_stride_attr.attr,
  1430. &sriov_vf_device_attr.attr,
  1431. &sriov_drivers_autoprobe_attr.attr,
  1432. NULL,
  1433. };
  1434. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1435. struct attribute *a, int n)
  1436. {
  1437. struct device *dev = kobj_to_dev(kobj);
  1438. if (!dev_is_pf(dev))
  1439. return 0;
  1440. return a->mode;
  1441. }
  1442. static const struct attribute_group sriov_dev_attr_group = {
  1443. .attrs = sriov_dev_attrs,
  1444. .is_visible = sriov_attrs_are_visible,
  1445. };
  1446. #endif /* CONFIG_PCI_IOV */
  1447. static const struct attribute_group pci_dev_attr_group = {
  1448. .attrs = pci_dev_dev_attrs,
  1449. .is_visible = pci_dev_attrs_are_visible,
  1450. };
  1451. static const struct attribute_group pci_bridge_attr_group = {
  1452. .attrs = pci_bridge_attrs,
  1453. .is_visible = pci_bridge_attrs_are_visible,
  1454. };
  1455. static const struct attribute_group pcie_dev_attr_group = {
  1456. .attrs = pcie_dev_attrs,
  1457. .is_visible = pcie_dev_attrs_are_visible,
  1458. };
  1459. static const struct attribute_group *pci_dev_attr_groups[] = {
  1460. &pci_dev_attr_group,
  1461. &pci_dev_hp_attr_group,
  1462. #ifdef CONFIG_PCI_IOV
  1463. &sriov_dev_attr_group,
  1464. #endif
  1465. &pci_bridge_attr_group,
  1466. &pcie_dev_attr_group,
  1467. NULL,
  1468. };
  1469. const struct device_type pci_dev_type = {
  1470. .groups = pci_dev_attr_groups,
  1471. };