pcie-designware-plat.c 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PCIe RC driver for Synopsys DesignWare Core
  4. *
  5. * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
  6. *
  7. * Authors: Joao Pinto <Joao.Pinto@synopsys.com>
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/delay.h>
  11. #include <linux/gpio.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/of_gpio.h>
  16. #include <linux/pci.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/resource.h>
  19. #include <linux/signal.h>
  20. #include <linux/types.h>
  21. #include "pcie-designware.h"
  22. struct dw_plat_pcie {
  23. struct dw_pcie *pci;
  24. };
  25. static int dw_plat_pcie_host_init(struct pcie_port *pp)
  26. {
  27. struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
  28. dw_pcie_setup_rc(pp);
  29. dw_pcie_wait_for_link(pci);
  30. if (IS_ENABLED(CONFIG_PCI_MSI))
  31. dw_pcie_msi_init(pp);
  32. return 0;
  33. }
  34. static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
  35. .host_init = dw_plat_pcie_host_init,
  36. };
  37. static int dw_plat_add_pcie_port(struct pcie_port *pp,
  38. struct platform_device *pdev)
  39. {
  40. struct device *dev = &pdev->dev;
  41. int ret;
  42. pp->irq = platform_get_irq(pdev, 1);
  43. if (pp->irq < 0)
  44. return pp->irq;
  45. if (IS_ENABLED(CONFIG_PCI_MSI)) {
  46. pp->msi_irq = platform_get_irq(pdev, 0);
  47. if (pp->msi_irq < 0)
  48. return pp->msi_irq;
  49. }
  50. pp->root_bus_nr = -1;
  51. pp->ops = &dw_plat_pcie_host_ops;
  52. ret = dw_pcie_host_init(pp);
  53. if (ret) {
  54. dev_err(dev, "failed to initialize host\n");
  55. return ret;
  56. }
  57. return 0;
  58. }
  59. static const struct dw_pcie_ops dw_pcie_ops = {
  60. };
  61. static int dw_plat_pcie_probe(struct platform_device *pdev)
  62. {
  63. struct device *dev = &pdev->dev;
  64. struct dw_plat_pcie *dw_plat_pcie;
  65. struct dw_pcie *pci;
  66. struct resource *res; /* Resource from DT */
  67. int ret;
  68. dw_plat_pcie = devm_kzalloc(dev, sizeof(*dw_plat_pcie), GFP_KERNEL);
  69. if (!dw_plat_pcie)
  70. return -ENOMEM;
  71. pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
  72. if (!pci)
  73. return -ENOMEM;
  74. pci->dev = dev;
  75. pci->ops = &dw_pcie_ops;
  76. dw_plat_pcie->pci = pci;
  77. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  78. pci->dbi_base = devm_ioremap_resource(dev, res);
  79. if (IS_ERR(pci->dbi_base))
  80. return PTR_ERR(pci->dbi_base);
  81. platform_set_drvdata(pdev, dw_plat_pcie);
  82. ret = dw_plat_add_pcie_port(&pci->pp, pdev);
  83. if (ret < 0)
  84. return ret;
  85. return 0;
  86. }
  87. static const struct of_device_id dw_plat_pcie_of_match[] = {
  88. { .compatible = "snps,dw-pcie", },
  89. {},
  90. };
  91. static struct platform_driver dw_plat_pcie_driver = {
  92. .driver = {
  93. .name = "dw-pcie",
  94. .of_match_table = dw_plat_pcie_of_match,
  95. .suppress_bind_attrs = true,
  96. },
  97. .probe = dw_plat_pcie_probe,
  98. };
  99. builtin_platform_driver(dw_plat_pcie_driver);