region_devs.c 29 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/scatterlist.h>
  14. #include <linux/highmem.h>
  15. #include <linux/sched.h>
  16. #include <linux/slab.h>
  17. #include <linux/hash.h>
  18. #include <linux/sort.h>
  19. #include <linux/io.h>
  20. #include <linux/nd.h>
  21. #include "nd-core.h"
  22. #include "nd.h"
  23. /*
  24. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  25. * irrelevant.
  26. */
  27. #include <linux/io-64-nonatomic-hi-lo.h>
  28. static DEFINE_IDA(region_ida);
  29. static DEFINE_PER_CPU(int, flush_idx);
  30. static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
  31. struct nd_region_data *ndrd)
  32. {
  33. int i, j;
  34. dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
  35. nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
  36. for (i = 0; i < (1 << ndrd->hints_shift); i++) {
  37. struct resource *res = &nvdimm->flush_wpq[i];
  38. unsigned long pfn = PHYS_PFN(res->start);
  39. void __iomem *flush_page;
  40. /* check if flush hints share a page */
  41. for (j = 0; j < i; j++) {
  42. struct resource *res_j = &nvdimm->flush_wpq[j];
  43. unsigned long pfn_j = PHYS_PFN(res_j->start);
  44. if (pfn == pfn_j)
  45. break;
  46. }
  47. if (j < i)
  48. flush_page = (void __iomem *) ((unsigned long)
  49. ndrd_get_flush_wpq(ndrd, dimm, j)
  50. & PAGE_MASK);
  51. else
  52. flush_page = devm_nvdimm_ioremap(dev,
  53. PFN_PHYS(pfn), PAGE_SIZE);
  54. if (!flush_page)
  55. return -ENXIO;
  56. ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
  57. + (res->start & ~PAGE_MASK));
  58. }
  59. return 0;
  60. }
  61. int nd_region_activate(struct nd_region *nd_region)
  62. {
  63. int i, j, num_flush = 0;
  64. struct nd_region_data *ndrd;
  65. struct device *dev = &nd_region->dev;
  66. size_t flush_data_size = sizeof(void *);
  67. nvdimm_bus_lock(&nd_region->dev);
  68. for (i = 0; i < nd_region->ndr_mappings; i++) {
  69. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  70. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  71. /* at least one null hint slot per-dimm for the "no-hint" case */
  72. flush_data_size += sizeof(void *);
  73. num_flush = min_not_zero(num_flush, nvdimm->num_flush);
  74. if (!nvdimm->num_flush)
  75. continue;
  76. flush_data_size += nvdimm->num_flush * sizeof(void *);
  77. }
  78. nvdimm_bus_unlock(&nd_region->dev);
  79. ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
  80. if (!ndrd)
  81. return -ENOMEM;
  82. dev_set_drvdata(dev, ndrd);
  83. if (!num_flush)
  84. return 0;
  85. ndrd->hints_shift = ilog2(num_flush);
  86. for (i = 0; i < nd_region->ndr_mappings; i++) {
  87. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  88. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  89. int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
  90. if (rc)
  91. return rc;
  92. }
  93. /*
  94. * Clear out entries that are duplicates. This should prevent the
  95. * extra flushings.
  96. */
  97. for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
  98. /* ignore if NULL already */
  99. if (!ndrd_get_flush_wpq(ndrd, i, 0))
  100. continue;
  101. for (j = i + 1; j < nd_region->ndr_mappings; j++)
  102. if (ndrd_get_flush_wpq(ndrd, i, 0) ==
  103. ndrd_get_flush_wpq(ndrd, j, 0))
  104. ndrd_set_flush_wpq(ndrd, j, 0, NULL);
  105. }
  106. return 0;
  107. }
  108. static void nd_region_release(struct device *dev)
  109. {
  110. struct nd_region *nd_region = to_nd_region(dev);
  111. u16 i;
  112. for (i = 0; i < nd_region->ndr_mappings; i++) {
  113. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  114. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  115. put_device(&nvdimm->dev);
  116. }
  117. free_percpu(nd_region->lane);
  118. ida_simple_remove(&region_ida, nd_region->id);
  119. if (is_nd_blk(dev))
  120. kfree(to_nd_blk_region(dev));
  121. else
  122. kfree(nd_region);
  123. }
  124. static struct device_type nd_blk_device_type = {
  125. .name = "nd_blk",
  126. .release = nd_region_release,
  127. };
  128. static struct device_type nd_pmem_device_type = {
  129. .name = "nd_pmem",
  130. .release = nd_region_release,
  131. };
  132. static struct device_type nd_volatile_device_type = {
  133. .name = "nd_volatile",
  134. .release = nd_region_release,
  135. };
  136. bool is_nd_pmem(struct device *dev)
  137. {
  138. return dev ? dev->type == &nd_pmem_device_type : false;
  139. }
  140. bool is_nd_blk(struct device *dev)
  141. {
  142. return dev ? dev->type == &nd_blk_device_type : false;
  143. }
  144. bool is_nd_volatile(struct device *dev)
  145. {
  146. return dev ? dev->type == &nd_volatile_device_type : false;
  147. }
  148. struct nd_region *to_nd_region(struct device *dev)
  149. {
  150. struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
  151. WARN_ON(dev->type->release != nd_region_release);
  152. return nd_region;
  153. }
  154. EXPORT_SYMBOL_GPL(to_nd_region);
  155. struct device *nd_region_dev(struct nd_region *nd_region)
  156. {
  157. if (!nd_region)
  158. return NULL;
  159. return &nd_region->dev;
  160. }
  161. EXPORT_SYMBOL_GPL(nd_region_dev);
  162. struct nd_blk_region *to_nd_blk_region(struct device *dev)
  163. {
  164. struct nd_region *nd_region = to_nd_region(dev);
  165. WARN_ON(!is_nd_blk(dev));
  166. return container_of(nd_region, struct nd_blk_region, nd_region);
  167. }
  168. EXPORT_SYMBOL_GPL(to_nd_blk_region);
  169. void *nd_region_provider_data(struct nd_region *nd_region)
  170. {
  171. return nd_region->provider_data;
  172. }
  173. EXPORT_SYMBOL_GPL(nd_region_provider_data);
  174. void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
  175. {
  176. return ndbr->blk_provider_data;
  177. }
  178. EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
  179. void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
  180. {
  181. ndbr->blk_provider_data = data;
  182. }
  183. EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
  184. /**
  185. * nd_region_to_nstype() - region to an integer namespace type
  186. * @nd_region: region-device to interrogate
  187. *
  188. * This is the 'nstype' attribute of a region as well, an input to the
  189. * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
  190. * namespace devices with namespace drivers.
  191. */
  192. int nd_region_to_nstype(struct nd_region *nd_region)
  193. {
  194. if (is_memory(&nd_region->dev)) {
  195. u16 i, alias;
  196. for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
  197. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  198. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  199. if (test_bit(NDD_ALIASING, &nvdimm->flags))
  200. alias++;
  201. }
  202. if (alias)
  203. return ND_DEVICE_NAMESPACE_PMEM;
  204. else
  205. return ND_DEVICE_NAMESPACE_IO;
  206. } else if (is_nd_blk(&nd_region->dev)) {
  207. return ND_DEVICE_NAMESPACE_BLK;
  208. }
  209. return 0;
  210. }
  211. EXPORT_SYMBOL(nd_region_to_nstype);
  212. static ssize_t size_show(struct device *dev,
  213. struct device_attribute *attr, char *buf)
  214. {
  215. struct nd_region *nd_region = to_nd_region(dev);
  216. unsigned long long size = 0;
  217. if (is_memory(dev)) {
  218. size = nd_region->ndr_size;
  219. } else if (nd_region->ndr_mappings == 1) {
  220. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  221. size = nd_mapping->size;
  222. }
  223. return sprintf(buf, "%llu\n", size);
  224. }
  225. static DEVICE_ATTR_RO(size);
  226. static ssize_t deep_flush_show(struct device *dev,
  227. struct device_attribute *attr, char *buf)
  228. {
  229. struct nd_region *nd_region = to_nd_region(dev);
  230. /*
  231. * NOTE: in the nvdimm_has_flush() error case this attribute is
  232. * not visible.
  233. */
  234. return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
  235. }
  236. static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
  237. const char *buf, size_t len)
  238. {
  239. bool flush;
  240. int rc = strtobool(buf, &flush);
  241. struct nd_region *nd_region = to_nd_region(dev);
  242. if (rc)
  243. return rc;
  244. if (!flush)
  245. return -EINVAL;
  246. nvdimm_flush(nd_region);
  247. return len;
  248. }
  249. static DEVICE_ATTR_RW(deep_flush);
  250. static ssize_t mappings_show(struct device *dev,
  251. struct device_attribute *attr, char *buf)
  252. {
  253. struct nd_region *nd_region = to_nd_region(dev);
  254. return sprintf(buf, "%d\n", nd_region->ndr_mappings);
  255. }
  256. static DEVICE_ATTR_RO(mappings);
  257. static ssize_t nstype_show(struct device *dev,
  258. struct device_attribute *attr, char *buf)
  259. {
  260. struct nd_region *nd_region = to_nd_region(dev);
  261. return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
  262. }
  263. static DEVICE_ATTR_RO(nstype);
  264. static ssize_t set_cookie_show(struct device *dev,
  265. struct device_attribute *attr, char *buf)
  266. {
  267. struct nd_region *nd_region = to_nd_region(dev);
  268. struct nd_interleave_set *nd_set = nd_region->nd_set;
  269. ssize_t rc = 0;
  270. if (is_memory(dev) && nd_set)
  271. /* pass, should be precluded by region_visible */;
  272. else
  273. return -ENXIO;
  274. /*
  275. * The cookie to show depends on which specification of the
  276. * labels we are using. If there are not labels then default to
  277. * the v1.1 namespace label cookie definition. To read all this
  278. * data we need to wait for probing to settle.
  279. */
  280. device_lock(dev);
  281. nvdimm_bus_lock(dev);
  282. wait_nvdimm_bus_probe_idle(dev);
  283. if (nd_region->ndr_mappings) {
  284. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  285. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  286. if (ndd) {
  287. struct nd_namespace_index *nsindex;
  288. nsindex = to_namespace_index(ndd, ndd->ns_current);
  289. rc = sprintf(buf, "%#llx\n",
  290. nd_region_interleave_set_cookie(nd_region,
  291. nsindex));
  292. }
  293. }
  294. nvdimm_bus_unlock(dev);
  295. device_unlock(dev);
  296. if (rc)
  297. return rc;
  298. return sprintf(buf, "%#llx\n", nd_set->cookie1);
  299. }
  300. static DEVICE_ATTR_RO(set_cookie);
  301. resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
  302. {
  303. resource_size_t blk_max_overlap = 0, available, overlap;
  304. int i;
  305. WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
  306. retry:
  307. available = 0;
  308. overlap = blk_max_overlap;
  309. for (i = 0; i < nd_region->ndr_mappings; i++) {
  310. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  311. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  312. /* if a dimm is disabled the available capacity is zero */
  313. if (!ndd)
  314. return 0;
  315. if (is_memory(&nd_region->dev)) {
  316. available += nd_pmem_available_dpa(nd_region,
  317. nd_mapping, &overlap);
  318. if (overlap > blk_max_overlap) {
  319. blk_max_overlap = overlap;
  320. goto retry;
  321. }
  322. } else if (is_nd_blk(&nd_region->dev))
  323. available += nd_blk_available_dpa(nd_region);
  324. }
  325. return available;
  326. }
  327. static ssize_t available_size_show(struct device *dev,
  328. struct device_attribute *attr, char *buf)
  329. {
  330. struct nd_region *nd_region = to_nd_region(dev);
  331. unsigned long long available = 0;
  332. /*
  333. * Flush in-flight updates and grab a snapshot of the available
  334. * size. Of course, this value is potentially invalidated the
  335. * memory nvdimm_bus_lock() is dropped, but that's userspace's
  336. * problem to not race itself.
  337. */
  338. nvdimm_bus_lock(dev);
  339. wait_nvdimm_bus_probe_idle(dev);
  340. available = nd_region_available_dpa(nd_region);
  341. nvdimm_bus_unlock(dev);
  342. return sprintf(buf, "%llu\n", available);
  343. }
  344. static DEVICE_ATTR_RO(available_size);
  345. static ssize_t init_namespaces_show(struct device *dev,
  346. struct device_attribute *attr, char *buf)
  347. {
  348. struct nd_region_data *ndrd = dev_get_drvdata(dev);
  349. ssize_t rc;
  350. nvdimm_bus_lock(dev);
  351. if (ndrd)
  352. rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
  353. else
  354. rc = -ENXIO;
  355. nvdimm_bus_unlock(dev);
  356. return rc;
  357. }
  358. static DEVICE_ATTR_RO(init_namespaces);
  359. static ssize_t namespace_seed_show(struct device *dev,
  360. struct device_attribute *attr, char *buf)
  361. {
  362. struct nd_region *nd_region = to_nd_region(dev);
  363. ssize_t rc;
  364. nvdimm_bus_lock(dev);
  365. if (nd_region->ns_seed)
  366. rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
  367. else
  368. rc = sprintf(buf, "\n");
  369. nvdimm_bus_unlock(dev);
  370. return rc;
  371. }
  372. static DEVICE_ATTR_RO(namespace_seed);
  373. static ssize_t btt_seed_show(struct device *dev,
  374. struct device_attribute *attr, char *buf)
  375. {
  376. struct nd_region *nd_region = to_nd_region(dev);
  377. ssize_t rc;
  378. nvdimm_bus_lock(dev);
  379. if (nd_region->btt_seed)
  380. rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
  381. else
  382. rc = sprintf(buf, "\n");
  383. nvdimm_bus_unlock(dev);
  384. return rc;
  385. }
  386. static DEVICE_ATTR_RO(btt_seed);
  387. static ssize_t pfn_seed_show(struct device *dev,
  388. struct device_attribute *attr, char *buf)
  389. {
  390. struct nd_region *nd_region = to_nd_region(dev);
  391. ssize_t rc;
  392. nvdimm_bus_lock(dev);
  393. if (nd_region->pfn_seed)
  394. rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
  395. else
  396. rc = sprintf(buf, "\n");
  397. nvdimm_bus_unlock(dev);
  398. return rc;
  399. }
  400. static DEVICE_ATTR_RO(pfn_seed);
  401. static ssize_t dax_seed_show(struct device *dev,
  402. struct device_attribute *attr, char *buf)
  403. {
  404. struct nd_region *nd_region = to_nd_region(dev);
  405. ssize_t rc;
  406. nvdimm_bus_lock(dev);
  407. if (nd_region->dax_seed)
  408. rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
  409. else
  410. rc = sprintf(buf, "\n");
  411. nvdimm_bus_unlock(dev);
  412. return rc;
  413. }
  414. static DEVICE_ATTR_RO(dax_seed);
  415. static ssize_t read_only_show(struct device *dev,
  416. struct device_attribute *attr, char *buf)
  417. {
  418. struct nd_region *nd_region = to_nd_region(dev);
  419. return sprintf(buf, "%d\n", nd_region->ro);
  420. }
  421. static ssize_t read_only_store(struct device *dev,
  422. struct device_attribute *attr, const char *buf, size_t len)
  423. {
  424. bool ro;
  425. int rc = strtobool(buf, &ro);
  426. struct nd_region *nd_region = to_nd_region(dev);
  427. if (rc)
  428. return rc;
  429. nd_region->ro = ro;
  430. return len;
  431. }
  432. static DEVICE_ATTR_RW(read_only);
  433. static ssize_t region_badblocks_show(struct device *dev,
  434. struct device_attribute *attr, char *buf)
  435. {
  436. struct nd_region *nd_region = to_nd_region(dev);
  437. return badblocks_show(&nd_region->bb, buf, 0);
  438. }
  439. static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
  440. static ssize_t resource_show(struct device *dev,
  441. struct device_attribute *attr, char *buf)
  442. {
  443. struct nd_region *nd_region = to_nd_region(dev);
  444. return sprintf(buf, "%#llx\n", nd_region->ndr_start);
  445. }
  446. static DEVICE_ATTR_RO(resource);
  447. static ssize_t persistence_domain_show(struct device *dev,
  448. struct device_attribute *attr, char *buf)
  449. {
  450. struct nd_region *nd_region = to_nd_region(dev);
  451. if (test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags))
  452. return sprintf(buf, "cpu_cache\n");
  453. else if (test_bit(ND_REGION_PERSIST_MEMCTRL, &nd_region->flags))
  454. return sprintf(buf, "memory_controller\n");
  455. else
  456. return sprintf(buf, "\n");
  457. }
  458. static DEVICE_ATTR_RO(persistence_domain);
  459. static struct attribute *nd_region_attributes[] = {
  460. &dev_attr_size.attr,
  461. &dev_attr_nstype.attr,
  462. &dev_attr_mappings.attr,
  463. &dev_attr_btt_seed.attr,
  464. &dev_attr_pfn_seed.attr,
  465. &dev_attr_dax_seed.attr,
  466. &dev_attr_deep_flush.attr,
  467. &dev_attr_read_only.attr,
  468. &dev_attr_set_cookie.attr,
  469. &dev_attr_available_size.attr,
  470. &dev_attr_namespace_seed.attr,
  471. &dev_attr_init_namespaces.attr,
  472. &dev_attr_badblocks.attr,
  473. &dev_attr_resource.attr,
  474. &dev_attr_persistence_domain.attr,
  475. NULL,
  476. };
  477. static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
  478. {
  479. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  480. struct nd_region *nd_region = to_nd_region(dev);
  481. struct nd_interleave_set *nd_set = nd_region->nd_set;
  482. int type = nd_region_to_nstype(nd_region);
  483. if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
  484. return 0;
  485. if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
  486. return 0;
  487. if (!is_nd_pmem(dev) && a == &dev_attr_badblocks.attr)
  488. return 0;
  489. if (a == &dev_attr_resource.attr) {
  490. if (is_nd_pmem(dev))
  491. return 0400;
  492. else
  493. return 0;
  494. }
  495. if (a == &dev_attr_deep_flush.attr) {
  496. int has_flush = nvdimm_has_flush(nd_region);
  497. if (has_flush == 1)
  498. return a->mode;
  499. else if (has_flush == 0)
  500. return 0444;
  501. else
  502. return 0;
  503. }
  504. if (a == &dev_attr_persistence_domain.attr) {
  505. if ((nd_region->flags & (BIT(ND_REGION_PERSIST_CACHE)
  506. | BIT(ND_REGION_PERSIST_MEMCTRL))) == 0)
  507. return 0;
  508. return a->mode;
  509. }
  510. if (a != &dev_attr_set_cookie.attr
  511. && a != &dev_attr_available_size.attr)
  512. return a->mode;
  513. if ((type == ND_DEVICE_NAMESPACE_PMEM
  514. || type == ND_DEVICE_NAMESPACE_BLK)
  515. && a == &dev_attr_available_size.attr)
  516. return a->mode;
  517. else if (is_memory(dev) && nd_set)
  518. return a->mode;
  519. return 0;
  520. }
  521. struct attribute_group nd_region_attribute_group = {
  522. .attrs = nd_region_attributes,
  523. .is_visible = region_visible,
  524. };
  525. EXPORT_SYMBOL_GPL(nd_region_attribute_group);
  526. u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
  527. struct nd_namespace_index *nsindex)
  528. {
  529. struct nd_interleave_set *nd_set = nd_region->nd_set;
  530. if (!nd_set)
  531. return 0;
  532. if (nsindex && __le16_to_cpu(nsindex->major) == 1
  533. && __le16_to_cpu(nsindex->minor) == 1)
  534. return nd_set->cookie1;
  535. return nd_set->cookie2;
  536. }
  537. u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
  538. {
  539. struct nd_interleave_set *nd_set = nd_region->nd_set;
  540. if (nd_set)
  541. return nd_set->altcookie;
  542. return 0;
  543. }
  544. void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
  545. {
  546. struct nd_label_ent *label_ent, *e;
  547. lockdep_assert_held(&nd_mapping->lock);
  548. list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
  549. list_del(&label_ent->list);
  550. kfree(label_ent);
  551. }
  552. }
  553. /*
  554. * Upon successful probe/remove, take/release a reference on the
  555. * associated interleave set (if present), and plant new btt + namespace
  556. * seeds. Also, on the removal of a BLK region, notify the provider to
  557. * disable the region.
  558. */
  559. static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
  560. struct device *dev, bool probe)
  561. {
  562. struct nd_region *nd_region;
  563. if (!probe && is_nd_region(dev)) {
  564. int i;
  565. nd_region = to_nd_region(dev);
  566. for (i = 0; i < nd_region->ndr_mappings; i++) {
  567. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  568. struct nvdimm_drvdata *ndd = nd_mapping->ndd;
  569. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  570. mutex_lock(&nd_mapping->lock);
  571. nd_mapping_free_labels(nd_mapping);
  572. mutex_unlock(&nd_mapping->lock);
  573. put_ndd(ndd);
  574. nd_mapping->ndd = NULL;
  575. if (ndd)
  576. atomic_dec(&nvdimm->busy);
  577. }
  578. }
  579. if (dev->parent && is_nd_region(dev->parent) && probe) {
  580. nd_region = to_nd_region(dev->parent);
  581. nvdimm_bus_lock(dev);
  582. if (nd_region->ns_seed == dev)
  583. nd_region_create_ns_seed(nd_region);
  584. nvdimm_bus_unlock(dev);
  585. }
  586. if (is_nd_btt(dev) && probe) {
  587. struct nd_btt *nd_btt = to_nd_btt(dev);
  588. nd_region = to_nd_region(dev->parent);
  589. nvdimm_bus_lock(dev);
  590. if (nd_region->btt_seed == dev)
  591. nd_region_create_btt_seed(nd_region);
  592. if (nd_region->ns_seed == &nd_btt->ndns->dev)
  593. nd_region_create_ns_seed(nd_region);
  594. nvdimm_bus_unlock(dev);
  595. }
  596. if (is_nd_pfn(dev) && probe) {
  597. struct nd_pfn *nd_pfn = to_nd_pfn(dev);
  598. nd_region = to_nd_region(dev->parent);
  599. nvdimm_bus_lock(dev);
  600. if (nd_region->pfn_seed == dev)
  601. nd_region_create_pfn_seed(nd_region);
  602. if (nd_region->ns_seed == &nd_pfn->ndns->dev)
  603. nd_region_create_ns_seed(nd_region);
  604. nvdimm_bus_unlock(dev);
  605. }
  606. if (is_nd_dax(dev) && probe) {
  607. struct nd_dax *nd_dax = to_nd_dax(dev);
  608. nd_region = to_nd_region(dev->parent);
  609. nvdimm_bus_lock(dev);
  610. if (nd_region->dax_seed == dev)
  611. nd_region_create_dax_seed(nd_region);
  612. if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
  613. nd_region_create_ns_seed(nd_region);
  614. nvdimm_bus_unlock(dev);
  615. }
  616. }
  617. void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  618. {
  619. nd_region_notify_driver_action(nvdimm_bus, dev, true);
  620. }
  621. void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  622. {
  623. nd_region_notify_driver_action(nvdimm_bus, dev, false);
  624. }
  625. static ssize_t mappingN(struct device *dev, char *buf, int n)
  626. {
  627. struct nd_region *nd_region = to_nd_region(dev);
  628. struct nd_mapping *nd_mapping;
  629. struct nvdimm *nvdimm;
  630. if (n >= nd_region->ndr_mappings)
  631. return -ENXIO;
  632. nd_mapping = &nd_region->mapping[n];
  633. nvdimm = nd_mapping->nvdimm;
  634. return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
  635. nd_mapping->start, nd_mapping->size,
  636. nd_mapping->position);
  637. }
  638. #define REGION_MAPPING(idx) \
  639. static ssize_t mapping##idx##_show(struct device *dev, \
  640. struct device_attribute *attr, char *buf) \
  641. { \
  642. return mappingN(dev, buf, idx); \
  643. } \
  644. static DEVICE_ATTR_RO(mapping##idx)
  645. /*
  646. * 32 should be enough for a while, even in the presence of socket
  647. * interleave a 32-way interleave set is a degenerate case.
  648. */
  649. REGION_MAPPING(0);
  650. REGION_MAPPING(1);
  651. REGION_MAPPING(2);
  652. REGION_MAPPING(3);
  653. REGION_MAPPING(4);
  654. REGION_MAPPING(5);
  655. REGION_MAPPING(6);
  656. REGION_MAPPING(7);
  657. REGION_MAPPING(8);
  658. REGION_MAPPING(9);
  659. REGION_MAPPING(10);
  660. REGION_MAPPING(11);
  661. REGION_MAPPING(12);
  662. REGION_MAPPING(13);
  663. REGION_MAPPING(14);
  664. REGION_MAPPING(15);
  665. REGION_MAPPING(16);
  666. REGION_MAPPING(17);
  667. REGION_MAPPING(18);
  668. REGION_MAPPING(19);
  669. REGION_MAPPING(20);
  670. REGION_MAPPING(21);
  671. REGION_MAPPING(22);
  672. REGION_MAPPING(23);
  673. REGION_MAPPING(24);
  674. REGION_MAPPING(25);
  675. REGION_MAPPING(26);
  676. REGION_MAPPING(27);
  677. REGION_MAPPING(28);
  678. REGION_MAPPING(29);
  679. REGION_MAPPING(30);
  680. REGION_MAPPING(31);
  681. static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
  682. {
  683. struct device *dev = container_of(kobj, struct device, kobj);
  684. struct nd_region *nd_region = to_nd_region(dev);
  685. if (n < nd_region->ndr_mappings)
  686. return a->mode;
  687. return 0;
  688. }
  689. static struct attribute *mapping_attributes[] = {
  690. &dev_attr_mapping0.attr,
  691. &dev_attr_mapping1.attr,
  692. &dev_attr_mapping2.attr,
  693. &dev_attr_mapping3.attr,
  694. &dev_attr_mapping4.attr,
  695. &dev_attr_mapping5.attr,
  696. &dev_attr_mapping6.attr,
  697. &dev_attr_mapping7.attr,
  698. &dev_attr_mapping8.attr,
  699. &dev_attr_mapping9.attr,
  700. &dev_attr_mapping10.attr,
  701. &dev_attr_mapping11.attr,
  702. &dev_attr_mapping12.attr,
  703. &dev_attr_mapping13.attr,
  704. &dev_attr_mapping14.attr,
  705. &dev_attr_mapping15.attr,
  706. &dev_attr_mapping16.attr,
  707. &dev_attr_mapping17.attr,
  708. &dev_attr_mapping18.attr,
  709. &dev_attr_mapping19.attr,
  710. &dev_attr_mapping20.attr,
  711. &dev_attr_mapping21.attr,
  712. &dev_attr_mapping22.attr,
  713. &dev_attr_mapping23.attr,
  714. &dev_attr_mapping24.attr,
  715. &dev_attr_mapping25.attr,
  716. &dev_attr_mapping26.attr,
  717. &dev_attr_mapping27.attr,
  718. &dev_attr_mapping28.attr,
  719. &dev_attr_mapping29.attr,
  720. &dev_attr_mapping30.attr,
  721. &dev_attr_mapping31.attr,
  722. NULL,
  723. };
  724. struct attribute_group nd_mapping_attribute_group = {
  725. .is_visible = mapping_visible,
  726. .attrs = mapping_attributes,
  727. };
  728. EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
  729. int nd_blk_region_init(struct nd_region *nd_region)
  730. {
  731. struct device *dev = &nd_region->dev;
  732. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
  733. if (!is_nd_blk(dev))
  734. return 0;
  735. if (nd_region->ndr_mappings < 1) {
  736. dev_dbg(dev, "invalid BLK region\n");
  737. return -ENXIO;
  738. }
  739. return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
  740. }
  741. /**
  742. * nd_region_acquire_lane - allocate and lock a lane
  743. * @nd_region: region id and number of lanes possible
  744. *
  745. * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
  746. * We optimize for the common case where there are 256 lanes, one
  747. * per-cpu. For larger systems we need to lock to share lanes. For now
  748. * this implementation assumes the cost of maintaining an allocator for
  749. * free lanes is on the order of the lock hold time, so it implements a
  750. * static lane = cpu % num_lanes mapping.
  751. *
  752. * In the case of a BTT instance on top of a BLK namespace a lane may be
  753. * acquired recursively. We lock on the first instance.
  754. *
  755. * In the case of a BTT instance on top of PMEM, we only acquire a lane
  756. * for the BTT metadata updates.
  757. */
  758. unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
  759. {
  760. unsigned int cpu, lane;
  761. cpu = get_cpu();
  762. if (nd_region->num_lanes < nr_cpu_ids) {
  763. struct nd_percpu_lane *ndl_lock, *ndl_count;
  764. lane = cpu % nd_region->num_lanes;
  765. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  766. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  767. if (ndl_count->count++ == 0)
  768. spin_lock(&ndl_lock->lock);
  769. } else
  770. lane = cpu;
  771. return lane;
  772. }
  773. EXPORT_SYMBOL(nd_region_acquire_lane);
  774. void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
  775. {
  776. if (nd_region->num_lanes < nr_cpu_ids) {
  777. unsigned int cpu = get_cpu();
  778. struct nd_percpu_lane *ndl_lock, *ndl_count;
  779. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  780. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  781. if (--ndl_count->count == 0)
  782. spin_unlock(&ndl_lock->lock);
  783. put_cpu();
  784. }
  785. put_cpu();
  786. }
  787. EXPORT_SYMBOL(nd_region_release_lane);
  788. static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
  789. struct nd_region_desc *ndr_desc, struct device_type *dev_type,
  790. const char *caller)
  791. {
  792. struct nd_region *nd_region;
  793. struct device *dev;
  794. void *region_buf;
  795. unsigned int i;
  796. int ro = 0;
  797. for (i = 0; i < ndr_desc->num_mappings; i++) {
  798. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  799. struct nvdimm *nvdimm = mapping->nvdimm;
  800. if ((mapping->start | mapping->size) % SZ_4K) {
  801. dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
  802. caller, dev_name(&nvdimm->dev), i);
  803. return NULL;
  804. }
  805. if (test_bit(NDD_UNARMED, &nvdimm->flags))
  806. ro = 1;
  807. }
  808. if (dev_type == &nd_blk_device_type) {
  809. struct nd_blk_region_desc *ndbr_desc;
  810. struct nd_blk_region *ndbr;
  811. ndbr_desc = to_blk_region_desc(ndr_desc);
  812. ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
  813. * ndr_desc->num_mappings,
  814. GFP_KERNEL);
  815. if (ndbr) {
  816. nd_region = &ndbr->nd_region;
  817. ndbr->enable = ndbr_desc->enable;
  818. ndbr->do_io = ndbr_desc->do_io;
  819. }
  820. region_buf = ndbr;
  821. } else {
  822. nd_region = kzalloc(sizeof(struct nd_region)
  823. + sizeof(struct nd_mapping)
  824. * ndr_desc->num_mappings,
  825. GFP_KERNEL);
  826. region_buf = nd_region;
  827. }
  828. if (!region_buf)
  829. return NULL;
  830. nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
  831. if (nd_region->id < 0)
  832. goto err_id;
  833. nd_region->lane = alloc_percpu(struct nd_percpu_lane);
  834. if (!nd_region->lane)
  835. goto err_percpu;
  836. for (i = 0; i < nr_cpu_ids; i++) {
  837. struct nd_percpu_lane *ndl;
  838. ndl = per_cpu_ptr(nd_region->lane, i);
  839. spin_lock_init(&ndl->lock);
  840. ndl->count = 0;
  841. }
  842. for (i = 0; i < ndr_desc->num_mappings; i++) {
  843. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  844. struct nvdimm *nvdimm = mapping->nvdimm;
  845. nd_region->mapping[i].nvdimm = nvdimm;
  846. nd_region->mapping[i].start = mapping->start;
  847. nd_region->mapping[i].size = mapping->size;
  848. nd_region->mapping[i].position = mapping->position;
  849. INIT_LIST_HEAD(&nd_region->mapping[i].labels);
  850. mutex_init(&nd_region->mapping[i].lock);
  851. get_device(&nvdimm->dev);
  852. }
  853. nd_region->ndr_mappings = ndr_desc->num_mappings;
  854. nd_region->provider_data = ndr_desc->provider_data;
  855. nd_region->nd_set = ndr_desc->nd_set;
  856. nd_region->num_lanes = ndr_desc->num_lanes;
  857. nd_region->flags = ndr_desc->flags;
  858. nd_region->ro = ro;
  859. nd_region->numa_node = ndr_desc->numa_node;
  860. ida_init(&nd_region->ns_ida);
  861. ida_init(&nd_region->btt_ida);
  862. ida_init(&nd_region->pfn_ida);
  863. ida_init(&nd_region->dax_ida);
  864. dev = &nd_region->dev;
  865. dev_set_name(dev, "region%d", nd_region->id);
  866. dev->parent = &nvdimm_bus->dev;
  867. dev->type = dev_type;
  868. dev->groups = ndr_desc->attr_groups;
  869. dev->of_node = ndr_desc->of_node;
  870. nd_region->ndr_size = resource_size(ndr_desc->res);
  871. nd_region->ndr_start = ndr_desc->res->start;
  872. nd_device_register(dev);
  873. return nd_region;
  874. err_percpu:
  875. ida_simple_remove(&region_ida, nd_region->id);
  876. err_id:
  877. kfree(region_buf);
  878. return NULL;
  879. }
  880. struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
  881. struct nd_region_desc *ndr_desc)
  882. {
  883. ndr_desc->num_lanes = ND_MAX_LANES;
  884. return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
  885. __func__);
  886. }
  887. EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
  888. struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
  889. struct nd_region_desc *ndr_desc)
  890. {
  891. if (ndr_desc->num_mappings > 1)
  892. return NULL;
  893. ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
  894. return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
  895. __func__);
  896. }
  897. EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
  898. struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
  899. struct nd_region_desc *ndr_desc)
  900. {
  901. ndr_desc->num_lanes = ND_MAX_LANES;
  902. return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
  903. __func__);
  904. }
  905. EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
  906. /**
  907. * nvdimm_flush - flush any posted write queues between the cpu and pmem media
  908. * @nd_region: blk or interleaved pmem region
  909. */
  910. void nvdimm_flush(struct nd_region *nd_region)
  911. {
  912. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  913. int i, idx;
  914. /*
  915. * Try to encourage some diversity in flush hint addresses
  916. * across cpus assuming a limited number of flush hints.
  917. */
  918. idx = this_cpu_read(flush_idx);
  919. idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
  920. /*
  921. * The first wmb() is needed to 'sfence' all previous writes
  922. * such that they are architecturally visible for the platform
  923. * buffer flush. Note that we've already arranged for pmem
  924. * writes to avoid the cache via memcpy_flushcache(). The final
  925. * wmb() ensures ordering for the NVDIMM flush write.
  926. */
  927. wmb();
  928. for (i = 0; i < nd_region->ndr_mappings; i++)
  929. if (ndrd_get_flush_wpq(ndrd, i, 0))
  930. writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
  931. wmb();
  932. }
  933. EXPORT_SYMBOL_GPL(nvdimm_flush);
  934. /**
  935. * nvdimm_has_flush - determine write flushing requirements
  936. * @nd_region: blk or interleaved pmem region
  937. *
  938. * Returns 1 if writes require flushing
  939. * Returns 0 if writes do not require flushing
  940. * Returns -ENXIO if flushing capability can not be determined
  941. */
  942. int nvdimm_has_flush(struct nd_region *nd_region)
  943. {
  944. int i;
  945. /* no nvdimm or pmem api == flushing capability unknown */
  946. if (nd_region->ndr_mappings == 0
  947. || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
  948. return -ENXIO;
  949. for (i = 0; i < nd_region->ndr_mappings; i++) {
  950. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  951. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  952. /* flush hints present / available */
  953. if (nvdimm->num_flush)
  954. return 1;
  955. }
  956. /*
  957. * The platform defines dimm devices without hints, assume
  958. * platform persistence mechanism like ADR
  959. */
  960. return 0;
  961. }
  962. EXPORT_SYMBOL_GPL(nvdimm_has_flush);
  963. int nvdimm_has_cache(struct nd_region *nd_region)
  964. {
  965. return is_nd_pmem(&nd_region->dev);
  966. }
  967. EXPORT_SYMBOL_GPL(nvdimm_has_cache);
  968. void __exit nd_region_devs_exit(void)
  969. {
  970. ida_destroy(&region_ida);
  971. }