wmi.c 292 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  4. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  5. *
  6. * Permission to use, copy, modify, and/or distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <linux/skbuff.h>
  19. #include <linux/ctype.h>
  20. #include "core.h"
  21. #include "htc.h"
  22. #include "debug.h"
  23. #include "wmi.h"
  24. #include "wmi-tlv.h"
  25. #include "mac.h"
  26. #include "testmode.h"
  27. #include "wmi-ops.h"
  28. #include "p2p.h"
  29. #include "hw.h"
  30. #include "hif.h"
  31. #include "txrx.h"
  32. #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
  33. #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
  34. /* MAIN WMI cmd track */
  35. static struct wmi_cmd_map wmi_cmd_map = {
  36. .init_cmdid = WMI_INIT_CMDID,
  37. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  38. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  39. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  40. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  41. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  42. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  43. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  44. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  45. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  46. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  47. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  48. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  49. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  50. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  51. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  52. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  53. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  54. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  55. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  56. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  57. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  58. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  59. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  60. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  61. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  62. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  63. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  64. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  65. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  66. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  67. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  68. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  69. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  70. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  71. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  72. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  73. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  74. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  75. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  76. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  77. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  78. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  79. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  80. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  81. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  82. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  83. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  84. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  85. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  86. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  87. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  88. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  89. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  90. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  91. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  92. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  93. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  94. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  95. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  96. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  97. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  98. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  99. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  100. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  101. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  102. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  103. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  104. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  105. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  106. .wlan_profile_set_hist_intvl_cmdid =
  107. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  108. .wlan_profile_get_profile_data_cmdid =
  109. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  110. .wlan_profile_enable_profile_id_cmdid =
  111. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  112. .wlan_profile_list_profile_id_cmdid =
  113. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  114. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  115. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  116. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  117. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  118. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  119. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  120. .wow_enable_disable_wake_event_cmdid =
  121. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  122. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  123. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  124. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  125. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  126. .vdev_spectral_scan_configure_cmdid =
  127. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  128. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  129. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  130. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  131. .network_list_offload_config_cmdid =
  132. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  133. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  134. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  135. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  136. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  137. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  138. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  139. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  140. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  141. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  142. .echo_cmdid = WMI_ECHO_CMDID,
  143. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  144. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  145. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  146. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  147. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  148. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  149. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  150. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  151. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  152. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  153. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  154. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  155. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  156. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  157. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  158. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  159. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  160. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  161. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  162. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  163. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  164. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  165. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  166. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  167. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  168. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  169. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  170. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  171. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  172. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  173. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  174. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  175. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  176. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  177. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  178. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  179. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  180. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  181. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  182. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  183. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  184. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  185. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  186. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  187. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  188. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  189. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  190. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  191. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  192. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  193. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  194. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  195. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  196. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  197. };
  198. /* 10.X WMI cmd track */
  199. static struct wmi_cmd_map wmi_10x_cmd_map = {
  200. .init_cmdid = WMI_10X_INIT_CMDID,
  201. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  202. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  203. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  204. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  205. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  206. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  207. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  208. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  209. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  210. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  211. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  212. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  213. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  214. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  215. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  216. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  217. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  218. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  219. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  220. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  221. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  222. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  223. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  224. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  225. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  226. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  227. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  228. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  229. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  230. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  231. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  232. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  233. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  234. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  235. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  236. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  237. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  238. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  239. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  240. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  241. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  242. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  243. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  244. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  245. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  246. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  247. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  248. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  249. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  250. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  251. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  252. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  253. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  254. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  255. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  256. .roam_scan_rssi_change_threshold =
  257. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  258. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  259. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  260. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  261. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  262. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  263. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  264. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  265. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  266. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  267. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  268. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  269. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  270. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  271. .wlan_profile_set_hist_intvl_cmdid =
  272. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  273. .wlan_profile_get_profile_data_cmdid =
  274. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  275. .wlan_profile_enable_profile_id_cmdid =
  276. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  277. .wlan_profile_list_profile_id_cmdid =
  278. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  279. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  280. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  281. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  282. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  283. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  284. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  285. .wow_enable_disable_wake_event_cmdid =
  286. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  287. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  288. .wow_hostwakeup_from_sleep_cmdid =
  289. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  290. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  291. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  292. .vdev_spectral_scan_configure_cmdid =
  293. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  294. .vdev_spectral_scan_enable_cmdid =
  295. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  296. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  297. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  298. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  299. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  300. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  301. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  302. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  303. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  304. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  305. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  306. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  307. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  308. .echo_cmdid = WMI_10X_ECHO_CMDID,
  309. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  310. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  311. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  312. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  313. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  314. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  315. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  316. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  317. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  318. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  319. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  320. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  321. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  322. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  323. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  324. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  325. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  326. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  327. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  328. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  329. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  330. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  331. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  332. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  333. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  334. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  335. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  336. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  337. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  338. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  339. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  340. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  341. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  342. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  343. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  344. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  345. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  346. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  347. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  348. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  349. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  350. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  351. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  352. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  353. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  354. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  355. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  356. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  357. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  358. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  359. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  360. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  361. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  362. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  363. };
  364. /* 10.2.4 WMI cmd track */
  365. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  366. .init_cmdid = WMI_10_2_INIT_CMDID,
  367. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  368. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  369. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  370. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  371. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  372. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  373. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  374. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  375. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  376. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  377. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  378. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  379. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  380. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  381. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  382. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  383. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  384. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  385. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  386. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  387. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  388. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  389. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  390. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  391. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  392. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  393. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  394. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  395. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  396. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  397. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  398. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  399. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  400. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  401. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  402. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  403. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  404. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  405. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  406. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  407. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  408. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  409. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  410. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  411. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  412. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  413. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  414. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  415. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  416. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  417. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  418. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  419. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  420. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  421. .roam_scan_rssi_change_threshold =
  422. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  423. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  424. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  425. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  426. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  427. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  428. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  429. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  430. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  431. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  432. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  433. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  434. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  435. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  436. .wlan_profile_set_hist_intvl_cmdid =
  437. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  438. .wlan_profile_get_profile_data_cmdid =
  439. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  440. .wlan_profile_enable_profile_id_cmdid =
  441. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  442. .wlan_profile_list_profile_id_cmdid =
  443. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  444. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  445. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  446. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  447. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  448. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  449. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  450. .wow_enable_disable_wake_event_cmdid =
  451. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  452. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  453. .wow_hostwakeup_from_sleep_cmdid =
  454. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  455. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  456. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  457. .vdev_spectral_scan_configure_cmdid =
  458. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  459. .vdev_spectral_scan_enable_cmdid =
  460. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  461. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  462. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  463. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  464. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  465. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  466. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  467. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  468. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  469. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  470. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  471. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  472. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  473. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  474. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  475. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  476. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  477. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  478. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  479. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  480. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  481. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  482. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  483. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  484. .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
  485. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  486. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  487. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  488. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  489. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  490. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  491. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  492. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  493. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  494. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  495. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  496. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  497. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  498. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  499. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  500. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  501. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  502. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  503. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  504. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  505. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  506. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  507. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  508. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  509. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  510. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  511. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  512. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  513. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  514. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  515. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  516. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  517. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  518. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  519. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  520. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  521. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  522. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  523. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  524. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  525. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  526. .pdev_bss_chan_info_request_cmdid =
  527. WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  528. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  529. };
  530. /* 10.4 WMI cmd track */
  531. static struct wmi_cmd_map wmi_10_4_cmd_map = {
  532. .init_cmdid = WMI_10_4_INIT_CMDID,
  533. .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
  534. .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
  535. .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
  536. .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
  537. .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
  538. .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
  539. .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
  540. .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
  541. .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
  542. .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
  543. .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
  544. .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
  545. .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
  546. .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
  547. .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  548. .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
  549. .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
  550. .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
  551. .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
  552. .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
  553. .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
  554. .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
  555. .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
  556. .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
  557. .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
  558. .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
  559. .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
  560. .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
  561. .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
  562. .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
  563. .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
  564. .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
  565. .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
  566. .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
  567. .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
  568. .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
  569. .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
  570. .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
  571. .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
  572. .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
  573. .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
  574. .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
  575. .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
  576. .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
  577. .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
  578. .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
  579. .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
  580. .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
  581. .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
  582. .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
  583. .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
  584. .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
  585. .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
  586. .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
  587. .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
  588. .roam_scan_rssi_change_threshold =
  589. WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  590. .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
  591. .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
  592. .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
  593. .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
  594. .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
  595. .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
  596. .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
  597. .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
  598. .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
  599. .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
  600. .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
  601. .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
  602. .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
  603. .wlan_profile_set_hist_intvl_cmdid =
  604. WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  605. .wlan_profile_get_profile_data_cmdid =
  606. WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  607. .wlan_profile_enable_profile_id_cmdid =
  608. WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  609. .wlan_profile_list_profile_id_cmdid =
  610. WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  611. .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
  612. .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
  613. .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
  614. .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
  615. .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
  616. .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
  617. .wow_enable_disable_wake_event_cmdid =
  618. WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  619. .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
  620. .wow_hostwakeup_from_sleep_cmdid =
  621. WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  622. .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
  623. .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
  624. .vdev_spectral_scan_configure_cmdid =
  625. WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  626. .vdev_spectral_scan_enable_cmdid =
  627. WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  628. .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
  629. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  630. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  631. .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
  632. .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
  633. .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
  634. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  635. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  636. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  637. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  638. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  639. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  640. .echo_cmdid = WMI_10_4_ECHO_CMDID,
  641. .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
  642. .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
  643. .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
  644. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  645. .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
  646. .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
  647. .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
  648. .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
  649. .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
  650. .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
  651. .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
  652. .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
  653. .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
  654. .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
  655. .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
  656. .wlan_peer_caching_add_peer_cmdid =
  657. WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
  658. .wlan_peer_caching_evict_peer_cmdid =
  659. WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
  660. .wlan_peer_caching_restore_peer_cmdid =
  661. WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
  662. .wlan_peer_caching_print_all_peers_info_cmdid =
  663. WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
  664. .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
  665. .peer_add_proxy_sta_entry_cmdid =
  666. WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
  667. .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
  668. .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
  669. .nan_cmdid = WMI_10_4_NAN_CMDID,
  670. .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
  671. .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
  672. .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
  673. .pdev_smart_ant_set_rx_antenna_cmdid =
  674. WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
  675. .peer_smart_ant_set_tx_antenna_cmdid =
  676. WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
  677. .peer_smart_ant_set_train_info_cmdid =
  678. WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
  679. .peer_smart_ant_set_node_config_ops_cmdid =
  680. WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
  681. .pdev_set_antenna_switch_table_cmdid =
  682. WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
  683. .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
  684. .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
  685. .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
  686. .pdev_ratepwr_chainmsk_table_cmdid =
  687. WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
  688. .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
  689. .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
  690. .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
  691. .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
  692. .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
  693. .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
  694. .pdev_get_ani_ofdm_config_cmdid =
  695. WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
  696. .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
  697. .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
  698. .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
  699. .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
  700. .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
  701. .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
  702. .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
  703. .vdev_filter_neighbor_rx_packets_cmdid =
  704. WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
  705. .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
  706. .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
  707. .pdev_bss_chan_info_request_cmdid =
  708. WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  709. .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
  710. .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
  711. .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
  712. .atf_ssid_grouping_request_cmdid =
  713. WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
  714. .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
  715. .set_periodic_channel_stats_cfg_cmdid =
  716. WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
  717. .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
  718. .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
  719. .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
  720. .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
  721. .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
  722. .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
  723. .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
  724. .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
  725. .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
  726. .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
  727. .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
  728. .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
  729. .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
  730. .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
  731. .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
  732. .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
  733. .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
  734. .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
  735. .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
  736. .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
  737. };
  738. /* MAIN WMI VDEV param map */
  739. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  740. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  741. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  742. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  743. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  744. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  745. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  746. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  747. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  748. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  749. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  750. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  751. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  752. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  753. .wmi_vdev_oc_scheduler_air_time_limit =
  754. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  755. .wds = WMI_VDEV_PARAM_WDS,
  756. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  757. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  758. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  759. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  760. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  761. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  762. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  763. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  764. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  765. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  766. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  767. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  768. .sgi = WMI_VDEV_PARAM_SGI,
  769. .ldpc = WMI_VDEV_PARAM_LDPC,
  770. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  771. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  772. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  773. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  774. .nss = WMI_VDEV_PARAM_NSS,
  775. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  776. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  777. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  778. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  779. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  780. .ap_keepalive_min_idle_inactive_time_secs =
  781. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  782. .ap_keepalive_max_idle_inactive_time_secs =
  783. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  784. .ap_keepalive_max_unresponsive_time_secs =
  785. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  786. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  787. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  788. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  789. .txbf = WMI_VDEV_PARAM_TXBF,
  790. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  791. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  792. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  793. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  794. WMI_VDEV_PARAM_UNSUPPORTED,
  795. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  796. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  797. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  798. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  799. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  800. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  801. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  802. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  803. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  804. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  805. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  806. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  807. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  808. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  809. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  810. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  811. };
  812. /* 10.X WMI VDEV param map */
  813. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  814. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  815. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  816. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  817. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  818. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  819. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  820. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  821. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  822. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  823. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  824. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  825. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  826. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  827. .wmi_vdev_oc_scheduler_air_time_limit =
  828. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  829. .wds = WMI_10X_VDEV_PARAM_WDS,
  830. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  831. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  832. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  833. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  834. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  835. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  836. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  837. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  838. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  839. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  840. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  841. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  842. .sgi = WMI_10X_VDEV_PARAM_SGI,
  843. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  844. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  845. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  846. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  847. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  848. .nss = WMI_10X_VDEV_PARAM_NSS,
  849. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  850. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  851. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  852. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  853. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  854. .ap_keepalive_min_idle_inactive_time_secs =
  855. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  856. .ap_keepalive_max_idle_inactive_time_secs =
  857. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  858. .ap_keepalive_max_unresponsive_time_secs =
  859. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  860. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  861. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  862. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  863. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  864. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  865. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  866. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  867. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  868. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  869. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  870. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  871. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  872. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  873. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  874. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  875. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  876. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  877. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  878. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  879. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  880. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  881. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  882. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  883. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  884. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  885. };
  886. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  887. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  888. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  889. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  890. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  891. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  892. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  893. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  894. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  895. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  896. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  897. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  898. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  899. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  900. .wmi_vdev_oc_scheduler_air_time_limit =
  901. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  902. .wds = WMI_10X_VDEV_PARAM_WDS,
  903. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  904. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  905. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  906. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  907. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  908. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  909. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  910. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  911. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  912. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  913. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  914. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  915. .sgi = WMI_10X_VDEV_PARAM_SGI,
  916. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  917. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  918. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  919. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  920. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  921. .nss = WMI_10X_VDEV_PARAM_NSS,
  922. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  923. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  924. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  925. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  926. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  927. .ap_keepalive_min_idle_inactive_time_secs =
  928. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  929. .ap_keepalive_max_idle_inactive_time_secs =
  930. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  931. .ap_keepalive_max_unresponsive_time_secs =
  932. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  933. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  934. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  935. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  936. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  937. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  938. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  939. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  940. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  941. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  942. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  943. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  944. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  945. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  946. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  947. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  948. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  949. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  950. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  951. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  952. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  953. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  954. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  955. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  956. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  957. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  958. };
  959. static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
  960. .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
  961. .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  962. .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
  963. .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
  964. .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
  965. .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
  966. .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
  967. .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
  968. .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
  969. .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
  970. .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
  971. .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
  972. .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
  973. .wmi_vdev_oc_scheduler_air_time_limit =
  974. WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  975. .wds = WMI_10_4_VDEV_PARAM_WDS,
  976. .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
  977. .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
  978. .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
  979. .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
  980. .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
  981. .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
  982. .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
  983. .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
  984. .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
  985. .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
  986. .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
  987. .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
  988. .sgi = WMI_10_4_VDEV_PARAM_SGI,
  989. .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
  990. .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
  991. .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
  992. .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
  993. .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
  994. .nss = WMI_10_4_VDEV_PARAM_NSS,
  995. .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
  996. .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
  997. .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
  998. .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
  999. .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  1000. .ap_keepalive_min_idle_inactive_time_secs =
  1001. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  1002. .ap_keepalive_max_idle_inactive_time_secs =
  1003. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  1004. .ap_keepalive_max_unresponsive_time_secs =
  1005. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  1006. .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
  1007. .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
  1008. .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
  1009. .txbf = WMI_10_4_VDEV_PARAM_TXBF,
  1010. .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
  1011. .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
  1012. .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
  1013. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  1014. WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  1015. .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
  1016. .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
  1017. .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
  1018. .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
  1019. .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
  1020. .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
  1021. .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
  1022. .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
  1023. .early_rx_bmiss_sample_cycle =
  1024. WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
  1025. .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
  1026. .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
  1027. .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
  1028. .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
  1029. .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
  1030. .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
  1031. .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
  1032. .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
  1033. .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
  1034. };
  1035. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  1036. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  1037. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  1038. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  1039. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  1040. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  1041. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  1042. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  1043. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1044. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  1045. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  1046. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1047. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  1048. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  1049. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1050. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  1051. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1052. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1053. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1054. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1055. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1056. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1057. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  1058. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1059. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  1060. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  1061. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1062. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1063. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1064. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1065. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1066. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1067. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1068. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1069. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  1070. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  1071. .dcs = WMI_PDEV_PARAM_DCS,
  1072. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  1073. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  1074. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1075. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  1076. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  1077. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  1078. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  1079. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  1080. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  1081. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1082. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  1083. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1084. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  1085. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1086. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1087. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1088. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1089. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1090. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1091. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1092. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1093. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1094. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1095. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1096. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1097. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1098. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1099. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1100. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1101. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1102. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1103. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1104. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1105. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1106. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1107. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1108. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1109. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1110. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1111. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1112. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1113. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1114. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1115. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1116. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1117. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1118. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1119. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1120. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1121. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1122. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1123. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1124. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1125. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1126. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1127. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1128. };
  1129. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  1130. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1131. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1132. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1133. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1134. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1135. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1136. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1137. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1138. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1139. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1140. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1141. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1142. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1143. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1144. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1145. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1146. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1147. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1148. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1149. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1150. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1151. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1152. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1153. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1154. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1155. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1156. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1157. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1158. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1159. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1160. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1161. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1162. .bcnflt_stats_update_period =
  1163. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1164. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1165. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1166. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1167. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1168. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1169. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1170. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1171. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1172. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1173. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1174. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1175. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1176. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1177. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1178. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1179. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1180. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1181. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1182. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1183. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1184. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1185. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1186. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1187. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1188. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1189. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1190. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1191. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1192. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1193. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1194. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1195. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1196. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1197. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1198. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1199. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1200. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1201. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1202. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1203. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1204. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1205. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1206. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1207. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1208. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1209. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1210. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1211. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1212. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1213. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1214. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1215. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1216. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1217. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1218. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1219. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1220. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1221. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1222. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1223. };
  1224. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  1225. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1226. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1227. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1228. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1229. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1230. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1231. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1232. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1233. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1234. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1235. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1236. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1237. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1238. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1239. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1240. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1241. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1242. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1243. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1244. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1245. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1246. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1247. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1248. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1249. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1250. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1251. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1252. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1253. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1254. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1255. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1256. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1257. .bcnflt_stats_update_period =
  1258. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1259. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1260. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1261. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1262. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1263. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1264. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1265. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1266. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1267. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1268. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1269. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1270. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1271. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1272. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1273. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1274. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1275. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1276. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1277. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1278. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1279. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1280. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1281. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1282. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1283. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1284. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1285. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1286. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1287. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1288. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1289. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1290. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1291. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1292. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1293. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1294. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1295. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1296. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1297. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1298. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1299. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1300. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1301. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1302. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1303. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1304. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1305. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1306. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1307. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1308. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1309. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1310. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1311. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1312. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1313. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1314. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1315. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1316. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1317. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1318. };
  1319. /* firmware 10.2 specific mappings */
  1320. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  1321. .init_cmdid = WMI_10_2_INIT_CMDID,
  1322. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  1323. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  1324. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  1325. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  1326. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  1327. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  1328. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  1329. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  1330. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  1331. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  1332. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  1333. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  1334. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  1335. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  1336. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  1337. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  1338. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  1339. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  1340. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  1341. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  1342. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  1343. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  1344. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  1345. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  1346. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  1347. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  1348. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  1349. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  1350. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  1351. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  1352. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  1353. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  1354. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  1355. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  1356. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  1357. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1358. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  1359. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  1360. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  1361. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1362. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  1363. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  1364. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  1365. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  1366. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  1367. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  1368. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  1369. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  1370. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  1371. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  1372. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  1373. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  1374. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  1375. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  1376. .roam_scan_rssi_change_threshold =
  1377. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  1378. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  1379. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  1380. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  1381. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  1382. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  1383. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  1384. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  1385. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  1386. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  1387. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  1388. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  1389. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  1390. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  1391. .wlan_profile_set_hist_intvl_cmdid =
  1392. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  1393. .wlan_profile_get_profile_data_cmdid =
  1394. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  1395. .wlan_profile_enable_profile_id_cmdid =
  1396. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  1397. .wlan_profile_list_profile_id_cmdid =
  1398. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  1399. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  1400. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  1401. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  1402. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  1403. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  1404. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  1405. .wow_enable_disable_wake_event_cmdid =
  1406. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  1407. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  1408. .wow_hostwakeup_from_sleep_cmdid =
  1409. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  1410. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  1411. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  1412. .vdev_spectral_scan_configure_cmdid =
  1413. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  1414. .vdev_spectral_scan_enable_cmdid =
  1415. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  1416. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  1417. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1418. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  1419. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1420. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1421. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  1422. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  1423. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  1424. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  1425. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  1426. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  1427. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  1428. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  1429. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  1430. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  1431. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  1432. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  1433. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1434. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1435. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  1436. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  1437. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  1438. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  1439. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  1440. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  1441. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  1442. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  1443. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1444. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1445. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1446. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  1447. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1448. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1449. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1450. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  1451. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  1452. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  1453. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  1454. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1455. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1456. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1457. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  1458. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  1459. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  1460. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  1461. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  1462. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  1463. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  1464. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  1465. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  1466. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  1467. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1468. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1469. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  1470. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  1471. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1472. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  1473. };
  1474. static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
  1475. .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
  1476. .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
  1477. .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
  1478. .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
  1479. .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
  1480. .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
  1481. .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
  1482. .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1483. .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
  1484. .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
  1485. .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1486. .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
  1487. .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
  1488. .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1489. .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
  1490. .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1491. .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1492. .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1493. .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1494. .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1495. .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1496. .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
  1497. .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1498. .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
  1499. .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
  1500. .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1501. .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
  1502. .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1503. .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1504. .pdev_stats_update_period =
  1505. WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1506. .vdev_stats_update_period =
  1507. WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1508. .peer_stats_update_period =
  1509. WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1510. .bcnflt_stats_update_period =
  1511. WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1512. .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
  1513. .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
  1514. .dcs = WMI_10_4_PDEV_PARAM_DCS,
  1515. .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
  1516. .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
  1517. .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1518. .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
  1519. .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
  1520. .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
  1521. .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
  1522. .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
  1523. .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
  1524. .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
  1525. .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
  1526. .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
  1527. .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
  1528. .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
  1529. .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
  1530. .smart_antenna_default_antenna =
  1531. WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
  1532. .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
  1533. .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
  1534. .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
  1535. .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
  1536. .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
  1537. .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
  1538. .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
  1539. .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
  1540. .remove_mcast2ucast_buffer =
  1541. WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
  1542. .peer_sta_ps_statechg_enable =
  1543. WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
  1544. .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
  1545. .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
  1546. .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
  1547. .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
  1548. .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
  1549. .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
  1550. .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
  1551. .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
  1552. .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
  1553. .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
  1554. .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
  1555. .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
  1556. .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
  1557. .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
  1558. .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
  1559. .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
  1560. .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
  1561. .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
  1562. .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
  1563. .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
  1564. .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
  1565. .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
  1566. .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
  1567. .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
  1568. .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
  1569. .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
  1570. .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
  1571. .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
  1572. .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
  1573. .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
  1574. };
  1575. static const struct wmi_peer_flags_map wmi_peer_flags_map = {
  1576. .auth = WMI_PEER_AUTH,
  1577. .qos = WMI_PEER_QOS,
  1578. .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
  1579. .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
  1580. .apsd = WMI_PEER_APSD,
  1581. .ht = WMI_PEER_HT,
  1582. .bw40 = WMI_PEER_40MHZ,
  1583. .stbc = WMI_PEER_STBC,
  1584. .ldbc = WMI_PEER_LDPC,
  1585. .dyn_mimops = WMI_PEER_DYN_MIMOPS,
  1586. .static_mimops = WMI_PEER_STATIC_MIMOPS,
  1587. .spatial_mux = WMI_PEER_SPATIAL_MUX,
  1588. .vht = WMI_PEER_VHT,
  1589. .bw80 = WMI_PEER_80MHZ,
  1590. .vht_2g = WMI_PEER_VHT_2G,
  1591. .pmf = WMI_PEER_PMF,
  1592. .bw160 = WMI_PEER_160MHZ,
  1593. };
  1594. static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
  1595. .auth = WMI_10X_PEER_AUTH,
  1596. .qos = WMI_10X_PEER_QOS,
  1597. .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
  1598. .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
  1599. .apsd = WMI_10X_PEER_APSD,
  1600. .ht = WMI_10X_PEER_HT,
  1601. .bw40 = WMI_10X_PEER_40MHZ,
  1602. .stbc = WMI_10X_PEER_STBC,
  1603. .ldbc = WMI_10X_PEER_LDPC,
  1604. .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
  1605. .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
  1606. .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
  1607. .vht = WMI_10X_PEER_VHT,
  1608. .bw80 = WMI_10X_PEER_80MHZ,
  1609. .bw160 = WMI_10X_PEER_160MHZ,
  1610. };
  1611. static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
  1612. .auth = WMI_10_2_PEER_AUTH,
  1613. .qos = WMI_10_2_PEER_QOS,
  1614. .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
  1615. .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
  1616. .apsd = WMI_10_2_PEER_APSD,
  1617. .ht = WMI_10_2_PEER_HT,
  1618. .bw40 = WMI_10_2_PEER_40MHZ,
  1619. .stbc = WMI_10_2_PEER_STBC,
  1620. .ldbc = WMI_10_2_PEER_LDPC,
  1621. .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
  1622. .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
  1623. .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
  1624. .vht = WMI_10_2_PEER_VHT,
  1625. .bw80 = WMI_10_2_PEER_80MHZ,
  1626. .vht_2g = WMI_10_2_PEER_VHT_2G,
  1627. .pmf = WMI_10_2_PEER_PMF,
  1628. .bw160 = WMI_10_2_PEER_160MHZ,
  1629. };
  1630. void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
  1631. const struct wmi_channel_arg *arg)
  1632. {
  1633. u32 flags = 0;
  1634. memset(ch, 0, sizeof(*ch));
  1635. if (arg->passive)
  1636. flags |= WMI_CHAN_FLAG_PASSIVE;
  1637. if (arg->allow_ibss)
  1638. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1639. if (arg->allow_ht)
  1640. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1641. if (arg->allow_vht)
  1642. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1643. if (arg->ht40plus)
  1644. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1645. if (arg->chan_radar)
  1646. flags |= WMI_CHAN_FLAG_DFS;
  1647. ch->mhz = __cpu_to_le32(arg->freq);
  1648. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  1649. if (arg->mode == MODE_11AC_VHT80_80)
  1650. ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
  1651. else
  1652. ch->band_center_freq2 = 0;
  1653. ch->min_power = arg->min_power;
  1654. ch->max_power = arg->max_power;
  1655. ch->reg_power = arg->max_reg_power;
  1656. ch->antenna_max = arg->max_antenna_gain;
  1657. ch->max_tx_power = arg->max_power;
  1658. /* mode & flags share storage */
  1659. ch->mode = arg->mode;
  1660. ch->flags |= __cpu_to_le32(flags);
  1661. }
  1662. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  1663. {
  1664. unsigned long time_left;
  1665. time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
  1666. WMI_SERVICE_READY_TIMEOUT_HZ);
  1667. if (!time_left)
  1668. return -ETIMEDOUT;
  1669. return 0;
  1670. }
  1671. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  1672. {
  1673. unsigned long time_left;
  1674. time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
  1675. WMI_UNIFIED_READY_TIMEOUT_HZ);
  1676. if (!time_left)
  1677. return -ETIMEDOUT;
  1678. return 0;
  1679. }
  1680. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  1681. {
  1682. struct sk_buff *skb;
  1683. u32 round_len = roundup(len, 4);
  1684. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  1685. if (!skb)
  1686. return NULL;
  1687. skb_reserve(skb, WMI_SKB_HEADROOM);
  1688. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1689. ath10k_warn(ar, "Unaligned WMI skb\n");
  1690. skb_put(skb, round_len);
  1691. memset(skb->data, 0, round_len);
  1692. return skb;
  1693. }
  1694. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  1695. {
  1696. dev_kfree_skb(skb);
  1697. }
  1698. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  1699. u32 cmd_id)
  1700. {
  1701. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  1702. struct wmi_cmd_hdr *cmd_hdr;
  1703. int ret;
  1704. u32 cmd = 0;
  1705. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1706. return -ENOMEM;
  1707. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  1708. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1709. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  1710. memset(skb_cb, 0, sizeof(*skb_cb));
  1711. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len);
  1712. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  1713. if (ret)
  1714. goto err_pull;
  1715. return 0;
  1716. err_pull:
  1717. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  1718. return ret;
  1719. }
  1720. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  1721. {
  1722. struct ath10k *ar = arvif->ar;
  1723. struct ath10k_skb_cb *cb;
  1724. struct sk_buff *bcn;
  1725. bool dtim_zero;
  1726. bool deliver_cab;
  1727. int ret;
  1728. spin_lock_bh(&ar->data_lock);
  1729. bcn = arvif->beacon;
  1730. if (!bcn)
  1731. goto unlock;
  1732. cb = ATH10K_SKB_CB(bcn);
  1733. switch (arvif->beacon_state) {
  1734. case ATH10K_BEACON_SENDING:
  1735. case ATH10K_BEACON_SENT:
  1736. break;
  1737. case ATH10K_BEACON_SCHEDULED:
  1738. arvif->beacon_state = ATH10K_BEACON_SENDING;
  1739. spin_unlock_bh(&ar->data_lock);
  1740. dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
  1741. deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
  1742. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  1743. arvif->vdev_id,
  1744. bcn->data, bcn->len,
  1745. cb->paddr,
  1746. dtim_zero,
  1747. deliver_cab);
  1748. spin_lock_bh(&ar->data_lock);
  1749. if (ret == 0)
  1750. arvif->beacon_state = ATH10K_BEACON_SENT;
  1751. else
  1752. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  1753. }
  1754. unlock:
  1755. spin_unlock_bh(&ar->data_lock);
  1756. }
  1757. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  1758. struct ieee80211_vif *vif)
  1759. {
  1760. struct ath10k_vif *arvif = (void *)vif->drv_priv;
  1761. ath10k_wmi_tx_beacon_nowait(arvif);
  1762. }
  1763. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  1764. {
  1765. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  1766. IEEE80211_IFACE_ITER_NORMAL,
  1767. ath10k_wmi_tx_beacons_iter,
  1768. NULL);
  1769. }
  1770. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  1771. {
  1772. /* try to send pending beacons first. they take priority */
  1773. ath10k_wmi_tx_beacons_nowait(ar);
  1774. wake_up(&ar->wmi.tx_credits_wq);
  1775. }
  1776. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  1777. {
  1778. int ret = -EOPNOTSUPP;
  1779. might_sleep();
  1780. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  1781. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  1782. cmd_id);
  1783. return ret;
  1784. }
  1785. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  1786. /* try to send pending beacons first. they take priority */
  1787. ath10k_wmi_tx_beacons_nowait(ar);
  1788. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  1789. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  1790. ret = -ESHUTDOWN;
  1791. (ret != -EAGAIN);
  1792. }), 3 * HZ);
  1793. if (ret)
  1794. dev_kfree_skb_any(skb);
  1795. return ret;
  1796. }
  1797. static struct sk_buff *
  1798. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  1799. {
  1800. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
  1801. struct ath10k_vif *arvif;
  1802. struct wmi_mgmt_tx_cmd *cmd;
  1803. struct ieee80211_hdr *hdr;
  1804. struct sk_buff *skb;
  1805. int len;
  1806. u32 vdev_id;
  1807. u32 buf_len = msdu->len;
  1808. u16 fc;
  1809. hdr = (struct ieee80211_hdr *)msdu->data;
  1810. fc = le16_to_cpu(hdr->frame_control);
  1811. if (cb->vif) {
  1812. arvif = (void *)cb->vif->drv_priv;
  1813. vdev_id = arvif->vdev_id;
  1814. } else {
  1815. vdev_id = 0;
  1816. }
  1817. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1818. return ERR_PTR(-EINVAL);
  1819. len = sizeof(cmd->hdr) + msdu->len;
  1820. if ((ieee80211_is_action(hdr->frame_control) ||
  1821. ieee80211_is_deauth(hdr->frame_control) ||
  1822. ieee80211_is_disassoc(hdr->frame_control)) &&
  1823. ieee80211_has_protected(hdr->frame_control)) {
  1824. len += IEEE80211_CCMP_MIC_LEN;
  1825. buf_len += IEEE80211_CCMP_MIC_LEN;
  1826. }
  1827. len = round_up(len, 4);
  1828. skb = ath10k_wmi_alloc_skb(ar, len);
  1829. if (!skb)
  1830. return ERR_PTR(-ENOMEM);
  1831. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1832. cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
  1833. cmd->hdr.tx_rate = 0;
  1834. cmd->hdr.tx_power = 0;
  1835. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1836. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1837. memcpy(cmd->buf, msdu->data, msdu->len);
  1838. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
  1839. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1840. fc & IEEE80211_FCTL_STYPE);
  1841. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1842. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1843. return skb;
  1844. }
  1845. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1846. {
  1847. lockdep_assert_held(&ar->data_lock);
  1848. switch (ar->scan.state) {
  1849. case ATH10K_SCAN_IDLE:
  1850. case ATH10K_SCAN_RUNNING:
  1851. case ATH10K_SCAN_ABORTING:
  1852. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1853. ath10k_scan_state_str(ar->scan.state),
  1854. ar->scan.state);
  1855. break;
  1856. case ATH10K_SCAN_STARTING:
  1857. ar->scan.state = ATH10K_SCAN_RUNNING;
  1858. if (ar->scan.is_roc)
  1859. ieee80211_ready_on_channel(ar->hw);
  1860. complete(&ar->scan.started);
  1861. break;
  1862. }
  1863. }
  1864. static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
  1865. {
  1866. lockdep_assert_held(&ar->data_lock);
  1867. switch (ar->scan.state) {
  1868. case ATH10K_SCAN_IDLE:
  1869. case ATH10K_SCAN_RUNNING:
  1870. case ATH10K_SCAN_ABORTING:
  1871. ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
  1872. ath10k_scan_state_str(ar->scan.state),
  1873. ar->scan.state);
  1874. break;
  1875. case ATH10K_SCAN_STARTING:
  1876. complete(&ar->scan.started);
  1877. __ath10k_scan_finish(ar);
  1878. break;
  1879. }
  1880. }
  1881. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1882. {
  1883. lockdep_assert_held(&ar->data_lock);
  1884. switch (ar->scan.state) {
  1885. case ATH10K_SCAN_IDLE:
  1886. case ATH10K_SCAN_STARTING:
  1887. /* One suspected reason scan can be completed while starting is
  1888. * if firmware fails to deliver all scan events to the host,
  1889. * e.g. when transport pipe is full. This has been observed
  1890. * with spectral scan phyerr events starving wmi transport
  1891. * pipe. In such case the "scan completed" event should be (and
  1892. * is) ignored by the host as it may be just firmware's scan
  1893. * state machine recovering.
  1894. */
  1895. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1896. ath10k_scan_state_str(ar->scan.state),
  1897. ar->scan.state);
  1898. break;
  1899. case ATH10K_SCAN_RUNNING:
  1900. case ATH10K_SCAN_ABORTING:
  1901. __ath10k_scan_finish(ar);
  1902. break;
  1903. }
  1904. }
  1905. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1906. {
  1907. lockdep_assert_held(&ar->data_lock);
  1908. switch (ar->scan.state) {
  1909. case ATH10K_SCAN_IDLE:
  1910. case ATH10K_SCAN_STARTING:
  1911. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1912. ath10k_scan_state_str(ar->scan.state),
  1913. ar->scan.state);
  1914. break;
  1915. case ATH10K_SCAN_RUNNING:
  1916. case ATH10K_SCAN_ABORTING:
  1917. ar->scan_channel = NULL;
  1918. break;
  1919. }
  1920. }
  1921. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  1922. {
  1923. lockdep_assert_held(&ar->data_lock);
  1924. switch (ar->scan.state) {
  1925. case ATH10K_SCAN_IDLE:
  1926. case ATH10K_SCAN_STARTING:
  1927. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  1928. ath10k_scan_state_str(ar->scan.state),
  1929. ar->scan.state);
  1930. break;
  1931. case ATH10K_SCAN_RUNNING:
  1932. case ATH10K_SCAN_ABORTING:
  1933. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  1934. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  1935. complete(&ar->scan.on_channel);
  1936. break;
  1937. }
  1938. }
  1939. static const char *
  1940. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  1941. enum wmi_scan_completion_reason reason)
  1942. {
  1943. switch (type) {
  1944. case WMI_SCAN_EVENT_STARTED:
  1945. return "started";
  1946. case WMI_SCAN_EVENT_COMPLETED:
  1947. switch (reason) {
  1948. case WMI_SCAN_REASON_COMPLETED:
  1949. return "completed";
  1950. case WMI_SCAN_REASON_CANCELLED:
  1951. return "completed [cancelled]";
  1952. case WMI_SCAN_REASON_PREEMPTED:
  1953. return "completed [preempted]";
  1954. case WMI_SCAN_REASON_TIMEDOUT:
  1955. return "completed [timedout]";
  1956. case WMI_SCAN_REASON_INTERNAL_FAILURE:
  1957. return "completed [internal err]";
  1958. case WMI_SCAN_REASON_MAX:
  1959. break;
  1960. }
  1961. return "completed [unknown]";
  1962. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1963. return "bss channel";
  1964. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1965. return "foreign channel";
  1966. case WMI_SCAN_EVENT_DEQUEUED:
  1967. return "dequeued";
  1968. case WMI_SCAN_EVENT_PREEMPTED:
  1969. return "preempted";
  1970. case WMI_SCAN_EVENT_START_FAILED:
  1971. return "start failed";
  1972. case WMI_SCAN_EVENT_RESTARTED:
  1973. return "restarted";
  1974. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  1975. return "foreign channel exit";
  1976. default:
  1977. return "unknown";
  1978. }
  1979. }
  1980. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  1981. struct wmi_scan_ev_arg *arg)
  1982. {
  1983. struct wmi_scan_event *ev = (void *)skb->data;
  1984. if (skb->len < sizeof(*ev))
  1985. return -EPROTO;
  1986. skb_pull(skb, sizeof(*ev));
  1987. arg->event_type = ev->event_type;
  1988. arg->reason = ev->reason;
  1989. arg->channel_freq = ev->channel_freq;
  1990. arg->scan_req_id = ev->scan_req_id;
  1991. arg->scan_id = ev->scan_id;
  1992. arg->vdev_id = ev->vdev_id;
  1993. return 0;
  1994. }
  1995. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  1996. {
  1997. struct wmi_scan_ev_arg arg = {};
  1998. enum wmi_scan_event_type event_type;
  1999. enum wmi_scan_completion_reason reason;
  2000. u32 freq;
  2001. u32 req_id;
  2002. u32 scan_id;
  2003. u32 vdev_id;
  2004. int ret;
  2005. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  2006. if (ret) {
  2007. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  2008. return ret;
  2009. }
  2010. event_type = __le32_to_cpu(arg.event_type);
  2011. reason = __le32_to_cpu(arg.reason);
  2012. freq = __le32_to_cpu(arg.channel_freq);
  2013. req_id = __le32_to_cpu(arg.scan_req_id);
  2014. scan_id = __le32_to_cpu(arg.scan_id);
  2015. vdev_id = __le32_to_cpu(arg.vdev_id);
  2016. spin_lock_bh(&ar->data_lock);
  2017. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2018. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  2019. ath10k_wmi_event_scan_type_str(event_type, reason),
  2020. event_type, reason, freq, req_id, scan_id, vdev_id,
  2021. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  2022. switch (event_type) {
  2023. case WMI_SCAN_EVENT_STARTED:
  2024. ath10k_wmi_event_scan_started(ar);
  2025. break;
  2026. case WMI_SCAN_EVENT_COMPLETED:
  2027. ath10k_wmi_event_scan_completed(ar);
  2028. break;
  2029. case WMI_SCAN_EVENT_BSS_CHANNEL:
  2030. ath10k_wmi_event_scan_bss_chan(ar);
  2031. break;
  2032. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  2033. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  2034. break;
  2035. case WMI_SCAN_EVENT_START_FAILED:
  2036. ath10k_warn(ar, "received scan start failure event\n");
  2037. ath10k_wmi_event_scan_start_failed(ar);
  2038. break;
  2039. case WMI_SCAN_EVENT_DEQUEUED:
  2040. case WMI_SCAN_EVENT_PREEMPTED:
  2041. case WMI_SCAN_EVENT_RESTARTED:
  2042. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  2043. default:
  2044. break;
  2045. }
  2046. spin_unlock_bh(&ar->data_lock);
  2047. return 0;
  2048. }
  2049. /* If keys are configured, HW decrypts all frames
  2050. * with protected bit set. Mark such frames as decrypted.
  2051. */
  2052. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  2053. struct sk_buff *skb,
  2054. struct ieee80211_rx_status *status)
  2055. {
  2056. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2057. unsigned int hdrlen;
  2058. bool peer_key;
  2059. u8 *addr, keyidx;
  2060. if (!ieee80211_is_auth(hdr->frame_control) ||
  2061. !ieee80211_has_protected(hdr->frame_control))
  2062. return;
  2063. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  2064. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  2065. return;
  2066. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  2067. addr = ieee80211_get_SA(hdr);
  2068. spin_lock_bh(&ar->data_lock);
  2069. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  2070. spin_unlock_bh(&ar->data_lock);
  2071. if (peer_key) {
  2072. ath10k_dbg(ar, ATH10K_DBG_MAC,
  2073. "mac wep key present for peer %pM\n", addr);
  2074. status->flag |= RX_FLAG_DECRYPTED;
  2075. }
  2076. }
  2077. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  2078. struct wmi_mgmt_rx_ev_arg *arg)
  2079. {
  2080. struct wmi_mgmt_rx_event_v1 *ev_v1;
  2081. struct wmi_mgmt_rx_event_v2 *ev_v2;
  2082. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  2083. struct wmi_mgmt_rx_ext_info *ext_info;
  2084. size_t pull_len;
  2085. u32 msdu_len;
  2086. u32 len;
  2087. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
  2088. ar->running_fw->fw_file.fw_features)) {
  2089. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  2090. ev_hdr = &ev_v2->hdr.v1;
  2091. pull_len = sizeof(*ev_v2);
  2092. } else {
  2093. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  2094. ev_hdr = &ev_v1->hdr;
  2095. pull_len = sizeof(*ev_v1);
  2096. }
  2097. if (skb->len < pull_len)
  2098. return -EPROTO;
  2099. skb_pull(skb, pull_len);
  2100. arg->channel = ev_hdr->channel;
  2101. arg->buf_len = ev_hdr->buf_len;
  2102. arg->status = ev_hdr->status;
  2103. arg->snr = ev_hdr->snr;
  2104. arg->phy_mode = ev_hdr->phy_mode;
  2105. arg->rate = ev_hdr->rate;
  2106. msdu_len = __le32_to_cpu(arg->buf_len);
  2107. if (skb->len < msdu_len)
  2108. return -EPROTO;
  2109. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2110. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2111. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2112. memcpy(&arg->ext_info, ext_info,
  2113. sizeof(struct wmi_mgmt_rx_ext_info));
  2114. }
  2115. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  2116. * trailer with credit update. Trim the excess garbage.
  2117. */
  2118. skb_trim(skb, msdu_len);
  2119. return 0;
  2120. }
  2121. static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
  2122. struct sk_buff *skb,
  2123. struct wmi_mgmt_rx_ev_arg *arg)
  2124. {
  2125. struct wmi_10_4_mgmt_rx_event *ev;
  2126. struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
  2127. size_t pull_len;
  2128. u32 msdu_len;
  2129. struct wmi_mgmt_rx_ext_info *ext_info;
  2130. u32 len;
  2131. ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
  2132. ev_hdr = &ev->hdr;
  2133. pull_len = sizeof(*ev);
  2134. if (skb->len < pull_len)
  2135. return -EPROTO;
  2136. skb_pull(skb, pull_len);
  2137. arg->channel = ev_hdr->channel;
  2138. arg->buf_len = ev_hdr->buf_len;
  2139. arg->status = ev_hdr->status;
  2140. arg->snr = ev_hdr->snr;
  2141. arg->phy_mode = ev_hdr->phy_mode;
  2142. arg->rate = ev_hdr->rate;
  2143. msdu_len = __le32_to_cpu(arg->buf_len);
  2144. if (skb->len < msdu_len)
  2145. return -EPROTO;
  2146. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2147. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2148. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2149. memcpy(&arg->ext_info, ext_info,
  2150. sizeof(struct wmi_mgmt_rx_ext_info));
  2151. }
  2152. /* Make sure bytes added for padding are removed. */
  2153. skb_trim(skb, msdu_len);
  2154. return 0;
  2155. }
  2156. static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
  2157. struct ieee80211_hdr *hdr)
  2158. {
  2159. if (!ieee80211_has_protected(hdr->frame_control))
  2160. return false;
  2161. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  2162. * encrypted payload. However in case of PMF it delivers decrypted
  2163. * frames with Protected Bit set.
  2164. */
  2165. if (ieee80211_is_auth(hdr->frame_control))
  2166. return false;
  2167. /* qca99x0 based FW delivers broadcast or multicast management frames
  2168. * (ex: group privacy action frames in mesh) as encrypted payload.
  2169. */
  2170. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
  2171. ar->hw_params.sw_decrypt_mcast_mgmt)
  2172. return false;
  2173. return true;
  2174. }
  2175. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  2176. {
  2177. struct wmi_mgmt_rx_ev_arg arg = {};
  2178. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  2179. struct ieee80211_hdr *hdr;
  2180. struct ieee80211_supported_band *sband;
  2181. u32 rx_status;
  2182. u32 channel;
  2183. u32 phy_mode;
  2184. u32 snr;
  2185. u32 rate;
  2186. u32 buf_len;
  2187. u16 fc;
  2188. int ret;
  2189. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  2190. if (ret) {
  2191. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  2192. dev_kfree_skb(skb);
  2193. return ret;
  2194. }
  2195. channel = __le32_to_cpu(arg.channel);
  2196. buf_len = __le32_to_cpu(arg.buf_len);
  2197. rx_status = __le32_to_cpu(arg.status);
  2198. snr = __le32_to_cpu(arg.snr);
  2199. phy_mode = __le32_to_cpu(arg.phy_mode);
  2200. rate = __le32_to_cpu(arg.rate);
  2201. memset(status, 0, sizeof(*status));
  2202. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2203. "event mgmt rx status %08x\n", rx_status);
  2204. if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
  2205. (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
  2206. WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
  2207. dev_kfree_skb(skb);
  2208. return 0;
  2209. }
  2210. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  2211. status->flag |= RX_FLAG_MMIC_ERROR;
  2212. if (rx_status & WMI_RX_STATUS_EXT_INFO) {
  2213. status->mactime =
  2214. __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
  2215. status->flag |= RX_FLAG_MACTIME_END;
  2216. }
  2217. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  2218. * MODE_11B. This means phy_mode is not a reliable source for the band
  2219. * of mgmt rx.
  2220. */
  2221. if (channel >= 1 && channel <= 14) {
  2222. status->band = NL80211_BAND_2GHZ;
  2223. } else if (channel >= 36 && channel <= 169) {
  2224. status->band = NL80211_BAND_5GHZ;
  2225. } else {
  2226. /* Shouldn't happen unless list of advertised channels to
  2227. * mac80211 has been changed.
  2228. */
  2229. WARN_ON_ONCE(1);
  2230. dev_kfree_skb(skb);
  2231. return 0;
  2232. }
  2233. if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
  2234. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  2235. sband = &ar->mac.sbands[status->band];
  2236. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  2237. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  2238. status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
  2239. hdr = (struct ieee80211_hdr *)skb->data;
  2240. fc = le16_to_cpu(hdr->frame_control);
  2241. /* Firmware is guaranteed to report all essential management frames via
  2242. * WMI while it can deliver some extra via HTT. Since there can be
  2243. * duplicates split the reporting wrt monitor/sniffing.
  2244. */
  2245. status->flag |= RX_FLAG_SKIP_MONITOR;
  2246. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  2247. if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
  2248. status->flag |= RX_FLAG_DECRYPTED;
  2249. if (!ieee80211_is_action(hdr->frame_control) &&
  2250. !ieee80211_is_deauth(hdr->frame_control) &&
  2251. !ieee80211_is_disassoc(hdr->frame_control)) {
  2252. status->flag |= RX_FLAG_IV_STRIPPED |
  2253. RX_FLAG_MMIC_STRIPPED;
  2254. hdr->frame_control = __cpu_to_le16(fc &
  2255. ~IEEE80211_FCTL_PROTECTED);
  2256. }
  2257. }
  2258. if (ieee80211_is_beacon(hdr->frame_control))
  2259. ath10k_mac_handle_beacon(ar, skb);
  2260. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2261. "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
  2262. skb, skb->len,
  2263. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  2264. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2265. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  2266. status->freq, status->band, status->signal,
  2267. status->rate_idx);
  2268. ieee80211_rx(ar->hw, skb);
  2269. return 0;
  2270. }
  2271. static int freq_to_idx(struct ath10k *ar, int freq)
  2272. {
  2273. struct ieee80211_supported_band *sband;
  2274. int band, ch, idx = 0;
  2275. for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
  2276. sband = ar->hw->wiphy->bands[band];
  2277. if (!sband)
  2278. continue;
  2279. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2280. if (sband->channels[ch].center_freq == freq)
  2281. goto exit;
  2282. }
  2283. exit:
  2284. return idx;
  2285. }
  2286. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  2287. struct wmi_ch_info_ev_arg *arg)
  2288. {
  2289. struct wmi_chan_info_event *ev = (void *)skb->data;
  2290. if (skb->len < sizeof(*ev))
  2291. return -EPROTO;
  2292. skb_pull(skb, sizeof(*ev));
  2293. arg->err_code = ev->err_code;
  2294. arg->freq = ev->freq;
  2295. arg->cmd_flags = ev->cmd_flags;
  2296. arg->noise_floor = ev->noise_floor;
  2297. arg->rx_clear_count = ev->rx_clear_count;
  2298. arg->cycle_count = ev->cycle_count;
  2299. return 0;
  2300. }
  2301. static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
  2302. struct sk_buff *skb,
  2303. struct wmi_ch_info_ev_arg *arg)
  2304. {
  2305. struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
  2306. if (skb->len < sizeof(*ev))
  2307. return -EPROTO;
  2308. skb_pull(skb, sizeof(*ev));
  2309. arg->err_code = ev->err_code;
  2310. arg->freq = ev->freq;
  2311. arg->cmd_flags = ev->cmd_flags;
  2312. arg->noise_floor = ev->noise_floor;
  2313. arg->rx_clear_count = ev->rx_clear_count;
  2314. arg->cycle_count = ev->cycle_count;
  2315. arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
  2316. arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
  2317. arg->rx_frame_count = ev->rx_frame_count;
  2318. return 0;
  2319. }
  2320. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  2321. {
  2322. struct wmi_ch_info_ev_arg arg = {};
  2323. struct survey_info *survey;
  2324. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  2325. int idx, ret;
  2326. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  2327. if (ret) {
  2328. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  2329. return;
  2330. }
  2331. err_code = __le32_to_cpu(arg.err_code);
  2332. freq = __le32_to_cpu(arg.freq);
  2333. cmd_flags = __le32_to_cpu(arg.cmd_flags);
  2334. noise_floor = __le32_to_cpu(arg.noise_floor);
  2335. rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  2336. cycle_count = __le32_to_cpu(arg.cycle_count);
  2337. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2338. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  2339. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  2340. cycle_count);
  2341. spin_lock_bh(&ar->data_lock);
  2342. switch (ar->scan.state) {
  2343. case ATH10K_SCAN_IDLE:
  2344. case ATH10K_SCAN_STARTING:
  2345. ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
  2346. goto exit;
  2347. case ATH10K_SCAN_RUNNING:
  2348. case ATH10K_SCAN_ABORTING:
  2349. break;
  2350. }
  2351. idx = freq_to_idx(ar, freq);
  2352. if (idx >= ARRAY_SIZE(ar->survey)) {
  2353. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2354. freq, idx);
  2355. goto exit;
  2356. }
  2357. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2358. if (ar->ch_info_can_report_survey) {
  2359. survey = &ar->survey[idx];
  2360. survey->noise = noise_floor;
  2361. survey->filled = SURVEY_INFO_NOISE_DBM;
  2362. ath10k_hw_fill_survey_time(ar,
  2363. survey,
  2364. cycle_count,
  2365. rx_clear_count,
  2366. ar->survey_last_cycle_count,
  2367. ar->survey_last_rx_clear_count);
  2368. }
  2369. ar->ch_info_can_report_survey = false;
  2370. } else {
  2371. ar->ch_info_can_report_survey = true;
  2372. }
  2373. if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
  2374. ar->survey_last_rx_clear_count = rx_clear_count;
  2375. ar->survey_last_cycle_count = cycle_count;
  2376. }
  2377. exit:
  2378. spin_unlock_bh(&ar->data_lock);
  2379. }
  2380. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  2381. {
  2382. struct wmi_echo_ev_arg arg = {};
  2383. int ret;
  2384. ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
  2385. if (ret) {
  2386. ath10k_warn(ar, "failed to parse echo: %d\n", ret);
  2387. return;
  2388. }
  2389. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2390. "wmi event echo value 0x%08x\n",
  2391. le32_to_cpu(arg.value));
  2392. if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
  2393. complete(&ar->wmi.barrier);
  2394. }
  2395. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  2396. {
  2397. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  2398. skb->len);
  2399. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  2400. return 0;
  2401. }
  2402. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  2403. struct ath10k_fw_stats_pdev *dst)
  2404. {
  2405. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  2406. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  2407. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  2408. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  2409. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  2410. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  2411. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  2412. }
  2413. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  2414. struct ath10k_fw_stats_pdev *dst)
  2415. {
  2416. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2417. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2418. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2419. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2420. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2421. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2422. dst->local_freed = __le32_to_cpu(src->local_freed);
  2423. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2424. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2425. dst->underrun = __le32_to_cpu(src->underrun);
  2426. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2427. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2428. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2429. dst->data_rc = __le32_to_cpu(src->data_rc);
  2430. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2431. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2432. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2433. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2434. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2435. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2436. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2437. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2438. }
  2439. static void
  2440. ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
  2441. struct ath10k_fw_stats_pdev *dst)
  2442. {
  2443. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2444. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2445. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2446. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2447. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2448. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2449. dst->local_freed = __le32_to_cpu(src->local_freed);
  2450. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2451. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2452. dst->underrun = __le32_to_cpu(src->underrun);
  2453. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2454. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2455. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2456. dst->data_rc = __le32_to_cpu(src->data_rc);
  2457. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2458. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2459. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2460. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2461. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2462. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2463. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2464. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2465. dst->hw_paused = __le32_to_cpu(src->hw_paused);
  2466. dst->seq_posted = __le32_to_cpu(src->seq_posted);
  2467. dst->seq_failed_queueing =
  2468. __le32_to_cpu(src->seq_failed_queueing);
  2469. dst->seq_completed = __le32_to_cpu(src->seq_completed);
  2470. dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
  2471. dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
  2472. dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
  2473. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2474. dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
  2475. dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
  2476. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2477. dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
  2478. }
  2479. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  2480. struct ath10k_fw_stats_pdev *dst)
  2481. {
  2482. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  2483. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  2484. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  2485. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  2486. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  2487. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  2488. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  2489. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  2490. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  2491. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  2492. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  2493. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  2494. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  2495. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  2496. }
  2497. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  2498. struct ath10k_fw_stats_pdev *dst)
  2499. {
  2500. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  2501. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  2502. dst->rts_good = __le32_to_cpu(src->rts_good);
  2503. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  2504. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  2505. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  2506. }
  2507. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  2508. struct ath10k_fw_stats_peer *dst)
  2509. {
  2510. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2511. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2512. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2513. }
  2514. static void
  2515. ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
  2516. struct ath10k_fw_stats_peer *dst)
  2517. {
  2518. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2519. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2520. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2521. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2522. }
  2523. static void
  2524. ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src,
  2525. struct ath10k_fw_stats_vdev_extd *dst)
  2526. {
  2527. dst->vdev_id = __le32_to_cpu(src->vdev_id);
  2528. dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt);
  2529. dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack);
  2530. dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued);
  2531. dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt);
  2532. dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued);
  2533. dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry);
  2534. dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry);
  2535. dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry);
  2536. dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc);
  2537. dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry);
  2538. dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail);
  2539. dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt);
  2540. dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt);
  2541. dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt);
  2542. dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt);
  2543. }
  2544. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  2545. struct sk_buff *skb,
  2546. struct ath10k_fw_stats *stats)
  2547. {
  2548. const struct wmi_stats_event *ev = (void *)skb->data;
  2549. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2550. int i;
  2551. if (!skb_pull(skb, sizeof(*ev)))
  2552. return -EPROTO;
  2553. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2554. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2555. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2556. for (i = 0; i < num_pdev_stats; i++) {
  2557. const struct wmi_pdev_stats *src;
  2558. struct ath10k_fw_stats_pdev *dst;
  2559. src = (void *)skb->data;
  2560. if (!skb_pull(skb, sizeof(*src)))
  2561. return -EPROTO;
  2562. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2563. if (!dst)
  2564. continue;
  2565. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2566. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2567. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2568. list_add_tail(&dst->list, &stats->pdevs);
  2569. }
  2570. /* fw doesn't implement vdev stats */
  2571. for (i = 0; i < num_peer_stats; i++) {
  2572. const struct wmi_peer_stats *src;
  2573. struct ath10k_fw_stats_peer *dst;
  2574. src = (void *)skb->data;
  2575. if (!skb_pull(skb, sizeof(*src)))
  2576. return -EPROTO;
  2577. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2578. if (!dst)
  2579. continue;
  2580. ath10k_wmi_pull_peer_stats(src, dst);
  2581. list_add_tail(&dst->list, &stats->peers);
  2582. }
  2583. return 0;
  2584. }
  2585. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  2586. struct sk_buff *skb,
  2587. struct ath10k_fw_stats *stats)
  2588. {
  2589. const struct wmi_stats_event *ev = (void *)skb->data;
  2590. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2591. int i;
  2592. if (!skb_pull(skb, sizeof(*ev)))
  2593. return -EPROTO;
  2594. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2595. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2596. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2597. for (i = 0; i < num_pdev_stats; i++) {
  2598. const struct wmi_10x_pdev_stats *src;
  2599. struct ath10k_fw_stats_pdev *dst;
  2600. src = (void *)skb->data;
  2601. if (!skb_pull(skb, sizeof(*src)))
  2602. return -EPROTO;
  2603. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2604. if (!dst)
  2605. continue;
  2606. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2607. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2608. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2609. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2610. list_add_tail(&dst->list, &stats->pdevs);
  2611. }
  2612. /* fw doesn't implement vdev stats */
  2613. for (i = 0; i < num_peer_stats; i++) {
  2614. const struct wmi_10x_peer_stats *src;
  2615. struct ath10k_fw_stats_peer *dst;
  2616. src = (void *)skb->data;
  2617. if (!skb_pull(skb, sizeof(*src)))
  2618. return -EPROTO;
  2619. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2620. if (!dst)
  2621. continue;
  2622. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2623. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2624. list_add_tail(&dst->list, &stats->peers);
  2625. }
  2626. return 0;
  2627. }
  2628. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  2629. struct sk_buff *skb,
  2630. struct ath10k_fw_stats *stats)
  2631. {
  2632. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2633. u32 num_pdev_stats;
  2634. u32 num_pdev_ext_stats;
  2635. u32 num_vdev_stats;
  2636. u32 num_peer_stats;
  2637. int i;
  2638. if (!skb_pull(skb, sizeof(*ev)))
  2639. return -EPROTO;
  2640. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2641. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2642. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2643. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2644. for (i = 0; i < num_pdev_stats; i++) {
  2645. const struct wmi_10_2_pdev_stats *src;
  2646. struct ath10k_fw_stats_pdev *dst;
  2647. src = (void *)skb->data;
  2648. if (!skb_pull(skb, sizeof(*src)))
  2649. return -EPROTO;
  2650. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2651. if (!dst)
  2652. continue;
  2653. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2654. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2655. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2656. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2657. /* FIXME: expose 10.2 specific values */
  2658. list_add_tail(&dst->list, &stats->pdevs);
  2659. }
  2660. for (i = 0; i < num_pdev_ext_stats; i++) {
  2661. const struct wmi_10_2_pdev_ext_stats *src;
  2662. src = (void *)skb->data;
  2663. if (!skb_pull(skb, sizeof(*src)))
  2664. return -EPROTO;
  2665. /* FIXME: expose values to userspace
  2666. *
  2667. * Note: Even though this loop seems to do nothing it is
  2668. * required to parse following sub-structures properly.
  2669. */
  2670. }
  2671. /* fw doesn't implement vdev stats */
  2672. for (i = 0; i < num_peer_stats; i++) {
  2673. const struct wmi_10_2_peer_stats *src;
  2674. struct ath10k_fw_stats_peer *dst;
  2675. src = (void *)skb->data;
  2676. if (!skb_pull(skb, sizeof(*src)))
  2677. return -EPROTO;
  2678. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2679. if (!dst)
  2680. continue;
  2681. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2682. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2683. /* FIXME: expose 10.2 specific values */
  2684. list_add_tail(&dst->list, &stats->peers);
  2685. }
  2686. return 0;
  2687. }
  2688. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  2689. struct sk_buff *skb,
  2690. struct ath10k_fw_stats *stats)
  2691. {
  2692. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2693. u32 num_pdev_stats;
  2694. u32 num_pdev_ext_stats;
  2695. u32 num_vdev_stats;
  2696. u32 num_peer_stats;
  2697. int i;
  2698. if (!skb_pull(skb, sizeof(*ev)))
  2699. return -EPROTO;
  2700. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2701. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2702. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2703. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2704. for (i = 0; i < num_pdev_stats; i++) {
  2705. const struct wmi_10_2_pdev_stats *src;
  2706. struct ath10k_fw_stats_pdev *dst;
  2707. src = (void *)skb->data;
  2708. if (!skb_pull(skb, sizeof(*src)))
  2709. return -EPROTO;
  2710. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2711. if (!dst)
  2712. continue;
  2713. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2714. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2715. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2716. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2717. /* FIXME: expose 10.2 specific values */
  2718. list_add_tail(&dst->list, &stats->pdevs);
  2719. }
  2720. for (i = 0; i < num_pdev_ext_stats; i++) {
  2721. const struct wmi_10_2_pdev_ext_stats *src;
  2722. src = (void *)skb->data;
  2723. if (!skb_pull(skb, sizeof(*src)))
  2724. return -EPROTO;
  2725. /* FIXME: expose values to userspace
  2726. *
  2727. * Note: Even though this loop seems to do nothing it is
  2728. * required to parse following sub-structures properly.
  2729. */
  2730. }
  2731. /* fw doesn't implement vdev stats */
  2732. for (i = 0; i < num_peer_stats; i++) {
  2733. const struct wmi_10_2_4_ext_peer_stats *src;
  2734. struct ath10k_fw_stats_peer *dst;
  2735. int stats_len;
  2736. if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  2737. stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
  2738. else
  2739. stats_len = sizeof(struct wmi_10_2_4_peer_stats);
  2740. src = (void *)skb->data;
  2741. if (!skb_pull(skb, stats_len))
  2742. return -EPROTO;
  2743. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2744. if (!dst)
  2745. continue;
  2746. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  2747. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  2748. if (ath10k_peer_stats_enabled(ar))
  2749. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2750. /* FIXME: expose 10.2 specific values */
  2751. list_add_tail(&dst->list, &stats->peers);
  2752. }
  2753. return 0;
  2754. }
  2755. static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
  2756. struct sk_buff *skb,
  2757. struct ath10k_fw_stats *stats)
  2758. {
  2759. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2760. u32 num_pdev_stats;
  2761. u32 num_pdev_ext_stats;
  2762. u32 num_vdev_stats;
  2763. u32 num_peer_stats;
  2764. u32 num_bcnflt_stats;
  2765. u32 stats_id;
  2766. int i;
  2767. if (!skb_pull(skb, sizeof(*ev)))
  2768. return -EPROTO;
  2769. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2770. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2771. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2772. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2773. num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
  2774. stats_id = __le32_to_cpu(ev->stats_id);
  2775. for (i = 0; i < num_pdev_stats; i++) {
  2776. const struct wmi_10_4_pdev_stats *src;
  2777. struct ath10k_fw_stats_pdev *dst;
  2778. src = (void *)skb->data;
  2779. if (!skb_pull(skb, sizeof(*src)))
  2780. return -EPROTO;
  2781. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2782. if (!dst)
  2783. continue;
  2784. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2785. ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
  2786. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2787. dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
  2788. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2789. list_add_tail(&dst->list, &stats->pdevs);
  2790. }
  2791. for (i = 0; i < num_pdev_ext_stats; i++) {
  2792. const struct wmi_10_2_pdev_ext_stats *src;
  2793. src = (void *)skb->data;
  2794. if (!skb_pull(skb, sizeof(*src)))
  2795. return -EPROTO;
  2796. /* FIXME: expose values to userspace
  2797. *
  2798. * Note: Even though this loop seems to do nothing it is
  2799. * required to parse following sub-structures properly.
  2800. */
  2801. }
  2802. for (i = 0; i < num_vdev_stats; i++) {
  2803. const struct wmi_vdev_stats *src;
  2804. /* Ignore vdev stats here as it has only vdev id. Actual vdev
  2805. * stats will be retrieved from vdev extended stats.
  2806. */
  2807. src = (void *)skb->data;
  2808. if (!skb_pull(skb, sizeof(*src)))
  2809. return -EPROTO;
  2810. }
  2811. for (i = 0; i < num_peer_stats; i++) {
  2812. const struct wmi_10_4_peer_stats *src;
  2813. struct ath10k_fw_stats_peer *dst;
  2814. src = (void *)skb->data;
  2815. if (!skb_pull(skb, sizeof(*src)))
  2816. return -EPROTO;
  2817. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2818. if (!dst)
  2819. continue;
  2820. ath10k_wmi_10_4_pull_peer_stats(src, dst);
  2821. list_add_tail(&dst->list, &stats->peers);
  2822. }
  2823. for (i = 0; i < num_bcnflt_stats; i++) {
  2824. const struct wmi_10_4_bss_bcn_filter_stats *src;
  2825. src = (void *)skb->data;
  2826. if (!skb_pull(skb, sizeof(*src)))
  2827. return -EPROTO;
  2828. /* FIXME: expose values to userspace
  2829. *
  2830. * Note: Even though this loop seems to do nothing it is
  2831. * required to parse following sub-structures properly.
  2832. */
  2833. }
  2834. if (stats_id & WMI_10_4_STAT_PEER_EXTD) {
  2835. stats->extended = true;
  2836. for (i = 0; i < num_peer_stats; i++) {
  2837. const struct wmi_10_4_peer_extd_stats *src;
  2838. struct ath10k_fw_extd_stats_peer *dst;
  2839. src = (void *)skb->data;
  2840. if (!skb_pull(skb, sizeof(*src)))
  2841. return -EPROTO;
  2842. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2843. if (!dst)
  2844. continue;
  2845. ether_addr_copy(dst->peer_macaddr,
  2846. src->peer_macaddr.addr);
  2847. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2848. list_add_tail(&dst->list, &stats->peers_extd);
  2849. }
  2850. }
  2851. if (stats_id & WMI_10_4_STAT_VDEV_EXTD) {
  2852. for (i = 0; i < num_vdev_stats; i++) {
  2853. const struct wmi_vdev_stats_extd *src;
  2854. struct ath10k_fw_stats_vdev_extd *dst;
  2855. src = (void *)skb->data;
  2856. if (!skb_pull(skb, sizeof(*src)))
  2857. return -EPROTO;
  2858. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2859. if (!dst)
  2860. continue;
  2861. ath10k_wmi_10_4_pull_vdev_stats(src, dst);
  2862. list_add_tail(&dst->list, &stats->vdevs);
  2863. }
  2864. }
  2865. return 0;
  2866. }
  2867. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  2868. {
  2869. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  2870. ath10k_debug_fw_stats_process(ar, skb);
  2871. }
  2872. static int
  2873. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  2874. struct wmi_vdev_start_ev_arg *arg)
  2875. {
  2876. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  2877. if (skb->len < sizeof(*ev))
  2878. return -EPROTO;
  2879. skb_pull(skb, sizeof(*ev));
  2880. arg->vdev_id = ev->vdev_id;
  2881. arg->req_id = ev->req_id;
  2882. arg->resp_type = ev->resp_type;
  2883. arg->status = ev->status;
  2884. return 0;
  2885. }
  2886. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  2887. {
  2888. struct wmi_vdev_start_ev_arg arg = {};
  2889. int ret;
  2890. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  2891. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  2892. if (ret) {
  2893. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  2894. return;
  2895. }
  2896. if (WARN_ON(__le32_to_cpu(arg.status)))
  2897. return;
  2898. complete(&ar->vdev_setup_done);
  2899. }
  2900. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  2901. {
  2902. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  2903. complete(&ar->vdev_setup_done);
  2904. }
  2905. static int
  2906. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  2907. struct wmi_peer_kick_ev_arg *arg)
  2908. {
  2909. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  2910. if (skb->len < sizeof(*ev))
  2911. return -EPROTO;
  2912. skb_pull(skb, sizeof(*ev));
  2913. arg->mac_addr = ev->peer_macaddr.addr;
  2914. return 0;
  2915. }
  2916. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  2917. {
  2918. struct wmi_peer_kick_ev_arg arg = {};
  2919. struct ieee80211_sta *sta;
  2920. int ret;
  2921. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  2922. if (ret) {
  2923. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  2924. ret);
  2925. return;
  2926. }
  2927. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  2928. arg.mac_addr);
  2929. rcu_read_lock();
  2930. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  2931. if (!sta) {
  2932. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  2933. arg.mac_addr);
  2934. goto exit;
  2935. }
  2936. ieee80211_report_low_ack(sta, 10);
  2937. exit:
  2938. rcu_read_unlock();
  2939. }
  2940. /*
  2941. * FIXME
  2942. *
  2943. * We don't report to mac80211 sleep state of connected
  2944. * stations. Due to this mac80211 can't fill in TIM IE
  2945. * correctly.
  2946. *
  2947. * I know of no way of getting nullfunc frames that contain
  2948. * sleep transition from connected stations - these do not
  2949. * seem to be sent from the target to the host. There also
  2950. * doesn't seem to be a dedicated event for that. So the
  2951. * only way left to do this would be to read tim_bitmap
  2952. * during SWBA.
  2953. *
  2954. * We could probably try using tim_bitmap from SWBA to tell
  2955. * mac80211 which stations are asleep and which are not. The
  2956. * problem here is calling mac80211 functions so many times
  2957. * could take too long and make us miss the time to submit
  2958. * the beacon to the target.
  2959. *
  2960. * So as a workaround we try to extend the TIM IE if there
  2961. * is unicast buffered for stations with aid > 7 and fill it
  2962. * in ourselves.
  2963. */
  2964. static void ath10k_wmi_update_tim(struct ath10k *ar,
  2965. struct ath10k_vif *arvif,
  2966. struct sk_buff *bcn,
  2967. const struct wmi_tim_info_arg *tim_info)
  2968. {
  2969. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  2970. struct ieee80211_tim_ie *tim;
  2971. u8 *ies, *ie;
  2972. u8 ie_len, pvm_len;
  2973. __le32 t;
  2974. u32 v, tim_len;
  2975. /* When FW reports 0 in tim_len, ensure atleast first byte
  2976. * in tim_bitmap is considered for pvm calculation.
  2977. */
  2978. tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
  2979. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  2980. * we must copy the bitmap upon change and reuse it later
  2981. */
  2982. if (__le32_to_cpu(tim_info->tim_changed)) {
  2983. int i;
  2984. if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
  2985. ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
  2986. tim_len, sizeof(arvif->u.ap.tim_bitmap));
  2987. tim_len = sizeof(arvif->u.ap.tim_bitmap);
  2988. }
  2989. for (i = 0; i < tim_len; i++) {
  2990. t = tim_info->tim_bitmap[i / 4];
  2991. v = __le32_to_cpu(t);
  2992. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  2993. }
  2994. /* FW reports either length 0 or length based on max supported
  2995. * station. so we calculate this on our own
  2996. */
  2997. arvif->u.ap.tim_len = 0;
  2998. for (i = 0; i < tim_len; i++)
  2999. if (arvif->u.ap.tim_bitmap[i])
  3000. arvif->u.ap.tim_len = i;
  3001. arvif->u.ap.tim_len++;
  3002. }
  3003. ies = bcn->data;
  3004. ies += ieee80211_hdrlen(hdr->frame_control);
  3005. ies += 12; /* fixed parameters */
  3006. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  3007. (u8 *)skb_tail_pointer(bcn) - ies);
  3008. if (!ie) {
  3009. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  3010. ath10k_warn(ar, "no tim ie found;\n");
  3011. return;
  3012. }
  3013. tim = (void *)ie + 2;
  3014. ie_len = ie[1];
  3015. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  3016. if (pvm_len < arvif->u.ap.tim_len) {
  3017. int expand_size = tim_len - pvm_len;
  3018. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  3019. void *next_ie = ie + 2 + ie_len;
  3020. if (skb_put(bcn, expand_size)) {
  3021. memmove(next_ie + expand_size, next_ie, move_size);
  3022. ie[1] += expand_size;
  3023. ie_len += expand_size;
  3024. pvm_len += expand_size;
  3025. } else {
  3026. ath10k_warn(ar, "tim expansion failed\n");
  3027. }
  3028. }
  3029. if (pvm_len > tim_len) {
  3030. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  3031. return;
  3032. }
  3033. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  3034. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  3035. if (tim->dtim_count == 0) {
  3036. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
  3037. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  3038. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
  3039. }
  3040. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  3041. tim->dtim_count, tim->dtim_period,
  3042. tim->bitmap_ctrl, pvm_len);
  3043. }
  3044. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  3045. struct sk_buff *bcn,
  3046. const struct wmi_p2p_noa_info *noa)
  3047. {
  3048. if (!arvif->vif->p2p)
  3049. return;
  3050. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  3051. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
  3052. ath10k_p2p_noa_update(arvif, noa);
  3053. if (arvif->u.ap.noa_data)
  3054. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  3055. skb_put_data(bcn, arvif->u.ap.noa_data,
  3056. arvif->u.ap.noa_len);
  3057. }
  3058. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  3059. struct wmi_swba_ev_arg *arg)
  3060. {
  3061. struct wmi_host_swba_event *ev = (void *)skb->data;
  3062. u32 map;
  3063. size_t i;
  3064. if (skb->len < sizeof(*ev))
  3065. return -EPROTO;
  3066. skb_pull(skb, sizeof(*ev));
  3067. arg->vdev_map = ev->vdev_map;
  3068. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3069. if (!(map & BIT(0)))
  3070. continue;
  3071. /* If this happens there were some changes in firmware and
  3072. * ath10k should update the max size of tim_info array.
  3073. */
  3074. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3075. break;
  3076. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3077. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3078. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3079. return -EPROTO;
  3080. }
  3081. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3082. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3083. arg->tim_info[i].tim_bitmap =
  3084. ev->bcn_info[i].tim_info.tim_bitmap;
  3085. arg->tim_info[i].tim_changed =
  3086. ev->bcn_info[i].tim_info.tim_changed;
  3087. arg->tim_info[i].tim_num_ps_pending =
  3088. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3089. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  3090. i++;
  3091. }
  3092. return 0;
  3093. }
  3094. static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
  3095. struct sk_buff *skb,
  3096. struct wmi_swba_ev_arg *arg)
  3097. {
  3098. struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
  3099. u32 map;
  3100. size_t i;
  3101. if (skb->len < sizeof(*ev))
  3102. return -EPROTO;
  3103. skb_pull(skb, sizeof(*ev));
  3104. arg->vdev_map = ev->vdev_map;
  3105. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3106. if (!(map & BIT(0)))
  3107. continue;
  3108. /* If this happens there were some changes in firmware and
  3109. * ath10k should update the max size of tim_info array.
  3110. */
  3111. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3112. break;
  3113. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3114. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3115. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3116. return -EPROTO;
  3117. }
  3118. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3119. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3120. arg->tim_info[i].tim_bitmap =
  3121. ev->bcn_info[i].tim_info.tim_bitmap;
  3122. arg->tim_info[i].tim_changed =
  3123. ev->bcn_info[i].tim_info.tim_changed;
  3124. arg->tim_info[i].tim_num_ps_pending =
  3125. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3126. i++;
  3127. }
  3128. return 0;
  3129. }
  3130. static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
  3131. struct sk_buff *skb,
  3132. struct wmi_swba_ev_arg *arg)
  3133. {
  3134. struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
  3135. u32 map, tim_len;
  3136. size_t i;
  3137. if (skb->len < sizeof(*ev))
  3138. return -EPROTO;
  3139. skb_pull(skb, sizeof(*ev));
  3140. arg->vdev_map = ev->vdev_map;
  3141. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3142. if (!(map & BIT(0)))
  3143. continue;
  3144. /* If this happens there were some changes in firmware and
  3145. * ath10k should update the max size of tim_info array.
  3146. */
  3147. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3148. break;
  3149. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3150. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3151. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3152. return -EPROTO;
  3153. }
  3154. tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
  3155. if (tim_len) {
  3156. /* Exclude 4 byte guard length */
  3157. tim_len -= 4;
  3158. arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
  3159. } else {
  3160. arg->tim_info[i].tim_len = 0;
  3161. }
  3162. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3163. arg->tim_info[i].tim_bitmap =
  3164. ev->bcn_info[i].tim_info.tim_bitmap;
  3165. arg->tim_info[i].tim_changed =
  3166. ev->bcn_info[i].tim_info.tim_changed;
  3167. arg->tim_info[i].tim_num_ps_pending =
  3168. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3169. /* 10.4 firmware doesn't have p2p support. notice of absence
  3170. * info can be ignored for now.
  3171. */
  3172. i++;
  3173. }
  3174. return 0;
  3175. }
  3176. static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
  3177. {
  3178. return WMI_TXBF_CONF_BEFORE_ASSOC;
  3179. }
  3180. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  3181. {
  3182. struct wmi_swba_ev_arg arg = {};
  3183. u32 map;
  3184. int i = -1;
  3185. const struct wmi_tim_info_arg *tim_info;
  3186. const struct wmi_p2p_noa_info *noa_info;
  3187. struct ath10k_vif *arvif;
  3188. struct sk_buff *bcn;
  3189. dma_addr_t paddr;
  3190. int ret, vdev_id = 0;
  3191. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  3192. if (ret) {
  3193. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  3194. return;
  3195. }
  3196. map = __le32_to_cpu(arg.vdev_map);
  3197. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  3198. map);
  3199. for (; map; map >>= 1, vdev_id++) {
  3200. if (!(map & 0x1))
  3201. continue;
  3202. i++;
  3203. if (i >= WMI_MAX_AP_VDEV) {
  3204. ath10k_warn(ar, "swba has corrupted vdev map\n");
  3205. break;
  3206. }
  3207. tim_info = &arg.tim_info[i];
  3208. noa_info = arg.noa_info[i];
  3209. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  3210. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  3211. i,
  3212. __le32_to_cpu(tim_info->tim_len),
  3213. __le32_to_cpu(tim_info->tim_mcast),
  3214. __le32_to_cpu(tim_info->tim_changed),
  3215. __le32_to_cpu(tim_info->tim_num_ps_pending),
  3216. __le32_to_cpu(tim_info->tim_bitmap[3]),
  3217. __le32_to_cpu(tim_info->tim_bitmap[2]),
  3218. __le32_to_cpu(tim_info->tim_bitmap[1]),
  3219. __le32_to_cpu(tim_info->tim_bitmap[0]));
  3220. /* TODO: Only first 4 word from tim_bitmap is dumped.
  3221. * Extend debug code to dump full tim_bitmap.
  3222. */
  3223. arvif = ath10k_get_arvif(ar, vdev_id);
  3224. if (arvif == NULL) {
  3225. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  3226. vdev_id);
  3227. continue;
  3228. }
  3229. /* mac80211 would have already asked us to stop beaconing and
  3230. * bring the vdev down, so continue in that case
  3231. */
  3232. if (!arvif->is_up)
  3233. continue;
  3234. /* There are no completions for beacons so wait for next SWBA
  3235. * before telling mac80211 to decrement CSA counter
  3236. *
  3237. * Once CSA counter is completed stop sending beacons until
  3238. * actual channel switch is done
  3239. */
  3240. if (arvif->vif->csa_active &&
  3241. ieee80211_csa_is_complete(arvif->vif)) {
  3242. ieee80211_csa_finish(arvif->vif);
  3243. continue;
  3244. }
  3245. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  3246. if (!bcn) {
  3247. ath10k_warn(ar, "could not get mac80211 beacon\n");
  3248. continue;
  3249. }
  3250. ath10k_tx_h_seq_no(arvif->vif, bcn);
  3251. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  3252. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  3253. spin_lock_bh(&ar->data_lock);
  3254. if (arvif->beacon) {
  3255. switch (arvif->beacon_state) {
  3256. case ATH10K_BEACON_SENT:
  3257. break;
  3258. case ATH10K_BEACON_SCHEDULED:
  3259. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  3260. arvif->vdev_id);
  3261. break;
  3262. case ATH10K_BEACON_SENDING:
  3263. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  3264. arvif->vdev_id);
  3265. dev_kfree_skb(bcn);
  3266. goto skip;
  3267. }
  3268. ath10k_mac_vif_beacon_free(arvif);
  3269. }
  3270. if (!arvif->beacon_buf) {
  3271. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  3272. bcn->len, DMA_TO_DEVICE);
  3273. ret = dma_mapping_error(arvif->ar->dev, paddr);
  3274. if (ret) {
  3275. ath10k_warn(ar, "failed to map beacon: %d\n",
  3276. ret);
  3277. dev_kfree_skb_any(bcn);
  3278. goto skip;
  3279. }
  3280. ATH10K_SKB_CB(bcn)->paddr = paddr;
  3281. } else {
  3282. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  3283. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  3284. bcn->len, IEEE80211_MAX_FRAME_LEN);
  3285. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  3286. }
  3287. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  3288. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  3289. }
  3290. arvif->beacon = bcn;
  3291. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  3292. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  3293. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  3294. skip:
  3295. spin_unlock_bh(&ar->data_lock);
  3296. }
  3297. ath10k_wmi_tx_beacons_nowait(ar);
  3298. }
  3299. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  3300. {
  3301. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  3302. }
  3303. static void ath10k_dfs_radar_report(struct ath10k *ar,
  3304. struct wmi_phyerr_ev_arg *phyerr,
  3305. const struct phyerr_radar_report *rr,
  3306. u64 tsf)
  3307. {
  3308. u32 reg0, reg1, tsf32l;
  3309. struct ieee80211_channel *ch;
  3310. struct pulse_event pe;
  3311. u64 tsf64;
  3312. u8 rssi, width;
  3313. reg0 = __le32_to_cpu(rr->reg0);
  3314. reg1 = __le32_to_cpu(rr->reg1);
  3315. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3316. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  3317. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  3318. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  3319. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  3320. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  3321. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3322. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  3323. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  3324. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  3325. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  3326. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  3327. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  3328. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3329. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  3330. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  3331. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  3332. if (!ar->dfs_detector)
  3333. return;
  3334. spin_lock_bh(&ar->data_lock);
  3335. ch = ar->rx_channel;
  3336. /* fetch target operating channel during channel change */
  3337. if (!ch)
  3338. ch = ar->tgt_oper_chan;
  3339. spin_unlock_bh(&ar->data_lock);
  3340. if (!ch) {
  3341. ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
  3342. goto radar_detected;
  3343. }
  3344. /* report event to DFS pattern detector */
  3345. tsf32l = phyerr->tsf_timestamp;
  3346. tsf64 = tsf & (~0xFFFFFFFFULL);
  3347. tsf64 |= tsf32l;
  3348. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  3349. rssi = phyerr->rssi_combined;
  3350. /* hardware store this as 8 bit signed value,
  3351. * set to zero if negative number
  3352. */
  3353. if (rssi & 0x80)
  3354. rssi = 0;
  3355. pe.ts = tsf64;
  3356. pe.freq = ch->center_freq;
  3357. pe.width = width;
  3358. pe.rssi = rssi;
  3359. pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
  3360. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3361. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  3362. pe.freq, pe.width, pe.rssi, pe.ts);
  3363. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  3364. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
  3365. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3366. "dfs no pulse pattern detected, yet\n");
  3367. return;
  3368. }
  3369. radar_detected:
  3370. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  3371. ATH10K_DFS_STAT_INC(ar, radar_detected);
  3372. /* Control radar events reporting in debugfs file
  3373. * dfs_block_radar_events
  3374. */
  3375. if (ar->dfs_block_radar_events) {
  3376. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  3377. return;
  3378. }
  3379. ieee80211_radar_detected(ar->hw);
  3380. }
  3381. static int ath10k_dfs_fft_report(struct ath10k *ar,
  3382. struct wmi_phyerr_ev_arg *phyerr,
  3383. const struct phyerr_fft_report *fftr,
  3384. u64 tsf)
  3385. {
  3386. u32 reg0, reg1;
  3387. u8 rssi, peak_mag;
  3388. reg0 = __le32_to_cpu(fftr->reg0);
  3389. reg1 = __le32_to_cpu(fftr->reg1);
  3390. rssi = phyerr->rssi_combined;
  3391. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3392. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  3393. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  3394. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  3395. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  3396. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  3397. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3398. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  3399. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  3400. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  3401. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  3402. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  3403. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  3404. /* false event detection */
  3405. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  3406. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  3407. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  3408. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  3409. return -EINVAL;
  3410. }
  3411. return 0;
  3412. }
  3413. void ath10k_wmi_event_dfs(struct ath10k *ar,
  3414. struct wmi_phyerr_ev_arg *phyerr,
  3415. u64 tsf)
  3416. {
  3417. int buf_len, tlv_len, res, i = 0;
  3418. const struct phyerr_tlv *tlv;
  3419. const struct phyerr_radar_report *rr;
  3420. const struct phyerr_fft_report *fftr;
  3421. const u8 *tlv_buf;
  3422. buf_len = phyerr->buf_len;
  3423. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3424. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  3425. phyerr->phy_err_code, phyerr->rssi_combined,
  3426. phyerr->tsf_timestamp, tsf, buf_len);
  3427. /* Skip event if DFS disabled */
  3428. if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
  3429. return;
  3430. ATH10K_DFS_STAT_INC(ar, pulses_total);
  3431. while (i < buf_len) {
  3432. if (i + sizeof(*tlv) > buf_len) {
  3433. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  3434. i);
  3435. return;
  3436. }
  3437. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3438. tlv_len = __le16_to_cpu(tlv->len);
  3439. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3440. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3441. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  3442. tlv_len, tlv->tag, tlv->sig);
  3443. switch (tlv->tag) {
  3444. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  3445. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  3446. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  3447. i);
  3448. return;
  3449. }
  3450. rr = (struct phyerr_radar_report *)tlv_buf;
  3451. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  3452. break;
  3453. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3454. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  3455. ath10k_warn(ar, "too short fft report (%d)\n",
  3456. i);
  3457. return;
  3458. }
  3459. fftr = (struct phyerr_fft_report *)tlv_buf;
  3460. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  3461. if (res)
  3462. return;
  3463. break;
  3464. }
  3465. i += sizeof(*tlv) + tlv_len;
  3466. }
  3467. }
  3468. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  3469. struct wmi_phyerr_ev_arg *phyerr,
  3470. u64 tsf)
  3471. {
  3472. int buf_len, tlv_len, res, i = 0;
  3473. struct phyerr_tlv *tlv;
  3474. const void *tlv_buf;
  3475. const struct phyerr_fft_report *fftr;
  3476. size_t fftr_len;
  3477. buf_len = phyerr->buf_len;
  3478. while (i < buf_len) {
  3479. if (i + sizeof(*tlv) > buf_len) {
  3480. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  3481. i);
  3482. return;
  3483. }
  3484. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3485. tlv_len = __le16_to_cpu(tlv->len);
  3486. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3487. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  3488. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  3489. i);
  3490. return;
  3491. }
  3492. switch (tlv->tag) {
  3493. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3494. if (sizeof(*fftr) > tlv_len) {
  3495. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  3496. i);
  3497. return;
  3498. }
  3499. fftr_len = tlv_len - sizeof(*fftr);
  3500. fftr = tlv_buf;
  3501. res = ath10k_spectral_process_fft(ar, phyerr,
  3502. fftr, fftr_len,
  3503. tsf);
  3504. if (res < 0) {
  3505. ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
  3506. res);
  3507. return;
  3508. }
  3509. break;
  3510. }
  3511. i += sizeof(*tlv) + tlv_len;
  3512. }
  3513. }
  3514. static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3515. struct sk_buff *skb,
  3516. struct wmi_phyerr_hdr_arg *arg)
  3517. {
  3518. struct wmi_phyerr_event *ev = (void *)skb->data;
  3519. if (skb->len < sizeof(*ev))
  3520. return -EPROTO;
  3521. arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
  3522. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3523. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3524. arg->buf_len = skb->len - sizeof(*ev);
  3525. arg->phyerrs = ev->phyerrs;
  3526. return 0;
  3527. }
  3528. static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3529. struct sk_buff *skb,
  3530. struct wmi_phyerr_hdr_arg *arg)
  3531. {
  3532. struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
  3533. if (skb->len < sizeof(*ev))
  3534. return -EPROTO;
  3535. /* 10.4 firmware always reports only one phyerr */
  3536. arg->num_phyerrs = 1;
  3537. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3538. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3539. arg->buf_len = skb->len;
  3540. arg->phyerrs = skb->data;
  3541. return 0;
  3542. }
  3543. int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
  3544. const void *phyerr_buf,
  3545. int left_len,
  3546. struct wmi_phyerr_ev_arg *arg)
  3547. {
  3548. const struct wmi_phyerr *phyerr = phyerr_buf;
  3549. int i;
  3550. if (left_len < sizeof(*phyerr)) {
  3551. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3552. left_len, sizeof(*phyerr));
  3553. return -EINVAL;
  3554. }
  3555. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3556. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3557. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3558. arg->rssi_combined = phyerr->rssi_combined;
  3559. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3560. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3561. arg->buf = phyerr->buf;
  3562. arg->hdr_len = sizeof(*phyerr);
  3563. for (i = 0; i < 4; i++)
  3564. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3565. switch (phyerr->phy_err_code) {
  3566. case PHY_ERROR_GEN_SPECTRAL_SCAN:
  3567. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3568. break;
  3569. case PHY_ERROR_GEN_FALSE_RADAR_EXT:
  3570. arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
  3571. break;
  3572. case PHY_ERROR_GEN_RADAR:
  3573. arg->phy_err_code = PHY_ERROR_RADAR;
  3574. break;
  3575. default:
  3576. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3577. break;
  3578. }
  3579. return 0;
  3580. }
  3581. static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
  3582. const void *phyerr_buf,
  3583. int left_len,
  3584. struct wmi_phyerr_ev_arg *arg)
  3585. {
  3586. const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
  3587. u32 phy_err_mask;
  3588. int i;
  3589. if (left_len < sizeof(*phyerr)) {
  3590. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3591. left_len, sizeof(*phyerr));
  3592. return -EINVAL;
  3593. }
  3594. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3595. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3596. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3597. arg->rssi_combined = phyerr->rssi_combined;
  3598. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3599. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3600. arg->buf = phyerr->buf;
  3601. arg->hdr_len = sizeof(*phyerr);
  3602. for (i = 0; i < 4; i++)
  3603. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3604. phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
  3605. if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
  3606. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3607. else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
  3608. arg->phy_err_code = PHY_ERROR_RADAR;
  3609. else
  3610. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3611. return 0;
  3612. }
  3613. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  3614. {
  3615. struct wmi_phyerr_hdr_arg hdr_arg = {};
  3616. struct wmi_phyerr_ev_arg phyerr_arg = {};
  3617. const void *phyerr;
  3618. u32 count, i, buf_len, phy_err_code;
  3619. u64 tsf;
  3620. int left_len, ret;
  3621. ATH10K_DFS_STAT_INC(ar, phy_errors);
  3622. ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
  3623. if (ret) {
  3624. ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
  3625. return;
  3626. }
  3627. /* Check number of included events */
  3628. count = hdr_arg.num_phyerrs;
  3629. left_len = hdr_arg.buf_len;
  3630. tsf = hdr_arg.tsf_u32;
  3631. tsf <<= 32;
  3632. tsf |= hdr_arg.tsf_l32;
  3633. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3634. "wmi event phyerr count %d tsf64 0x%llX\n",
  3635. count, tsf);
  3636. phyerr = hdr_arg.phyerrs;
  3637. for (i = 0; i < count; i++) {
  3638. ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
  3639. if (ret) {
  3640. ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
  3641. i);
  3642. return;
  3643. }
  3644. left_len -= phyerr_arg.hdr_len;
  3645. buf_len = phyerr_arg.buf_len;
  3646. phy_err_code = phyerr_arg.phy_err_code;
  3647. if (left_len < buf_len) {
  3648. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  3649. return;
  3650. }
  3651. left_len -= buf_len;
  3652. switch (phy_err_code) {
  3653. case PHY_ERROR_RADAR:
  3654. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3655. break;
  3656. case PHY_ERROR_SPECTRAL_SCAN:
  3657. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3658. break;
  3659. case PHY_ERROR_FALSE_RADAR_EXT:
  3660. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3661. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3662. break;
  3663. default:
  3664. break;
  3665. }
  3666. phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
  3667. }
  3668. }
  3669. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  3670. {
  3671. struct wmi_roam_ev_arg arg = {};
  3672. int ret;
  3673. u32 vdev_id;
  3674. u32 reason;
  3675. s32 rssi;
  3676. ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
  3677. if (ret) {
  3678. ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
  3679. return;
  3680. }
  3681. vdev_id = __le32_to_cpu(arg.vdev_id);
  3682. reason = __le32_to_cpu(arg.reason);
  3683. rssi = __le32_to_cpu(arg.rssi);
  3684. rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
  3685. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3686. "wmi roam event vdev %u reason 0x%08x rssi %d\n",
  3687. vdev_id, reason, rssi);
  3688. if (reason >= WMI_ROAM_REASON_MAX)
  3689. ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
  3690. reason, vdev_id);
  3691. switch (reason) {
  3692. case WMI_ROAM_REASON_BEACON_MISS:
  3693. ath10k_mac_handle_beacon_miss(ar, vdev_id);
  3694. break;
  3695. case WMI_ROAM_REASON_BETTER_AP:
  3696. case WMI_ROAM_REASON_LOW_RSSI:
  3697. case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
  3698. case WMI_ROAM_REASON_HO_FAILED:
  3699. ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
  3700. reason, vdev_id);
  3701. break;
  3702. }
  3703. }
  3704. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  3705. {
  3706. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  3707. }
  3708. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  3709. {
  3710. char buf[101], c;
  3711. int i;
  3712. for (i = 0; i < sizeof(buf) - 1; i++) {
  3713. if (i >= skb->len)
  3714. break;
  3715. c = skb->data[i];
  3716. if (c == '\0')
  3717. break;
  3718. if (isascii(c) && isprint(c))
  3719. buf[i] = c;
  3720. else
  3721. buf[i] = '.';
  3722. }
  3723. if (i == sizeof(buf) - 1)
  3724. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  3725. /* for some reason the debug prints end with \n, remove that */
  3726. if (skb->data[i - 1] == '\n')
  3727. i--;
  3728. /* the last byte is always reserved for the null character */
  3729. buf[i] = '\0';
  3730. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  3731. }
  3732. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  3733. {
  3734. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  3735. }
  3736. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  3737. {
  3738. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  3739. }
  3740. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  3741. struct sk_buff *skb)
  3742. {
  3743. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  3744. }
  3745. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  3746. struct sk_buff *skb)
  3747. {
  3748. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  3749. }
  3750. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  3751. {
  3752. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  3753. }
  3754. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  3755. {
  3756. struct wmi_wow_ev_arg ev = {};
  3757. int ret;
  3758. complete(&ar->wow.wakeup_completed);
  3759. ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
  3760. if (ret) {
  3761. ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
  3762. return;
  3763. }
  3764. ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
  3765. wow_reason(ev.wake_reason));
  3766. }
  3767. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  3768. {
  3769. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  3770. }
  3771. static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
  3772. struct wmi_pdev_tpc_config_event *ev,
  3773. u32 rate_idx, u32 num_chains,
  3774. u32 rate_code, u8 type)
  3775. {
  3776. u8 tpc, num_streams, preamble, ch, stm_idx;
  3777. num_streams = ATH10K_HW_NSS(rate_code);
  3778. preamble = ATH10K_HW_PREAMBLE(rate_code);
  3779. ch = num_chains - 1;
  3780. tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
  3781. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  3782. goto out;
  3783. if (preamble == WMI_RATE_PREAMBLE_CCK)
  3784. goto out;
  3785. stm_idx = num_streams - 1;
  3786. if (num_chains <= num_streams)
  3787. goto out;
  3788. switch (type) {
  3789. case WMI_TPC_TABLE_TYPE_STBC:
  3790. tpc = min_t(u8, tpc,
  3791. ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
  3792. break;
  3793. case WMI_TPC_TABLE_TYPE_TXBF:
  3794. tpc = min_t(u8, tpc,
  3795. ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
  3796. break;
  3797. case WMI_TPC_TABLE_TYPE_CDD:
  3798. tpc = min_t(u8, tpc,
  3799. ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
  3800. break;
  3801. default:
  3802. ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
  3803. tpc = 0;
  3804. break;
  3805. }
  3806. out:
  3807. return tpc;
  3808. }
  3809. static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
  3810. struct wmi_pdev_tpc_config_event *ev,
  3811. struct ath10k_tpc_stats *tpc_stats,
  3812. u8 *rate_code, u16 *pream_table, u8 type)
  3813. {
  3814. u32 i, j, pream_idx, flags;
  3815. u8 tpc[WMI_TPC_TX_N_CHAIN];
  3816. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  3817. char buff[WMI_TPC_BUF_SIZE];
  3818. flags = __le32_to_cpu(ev->flags);
  3819. switch (type) {
  3820. case WMI_TPC_TABLE_TYPE_CDD:
  3821. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  3822. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  3823. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3824. return;
  3825. }
  3826. break;
  3827. case WMI_TPC_TABLE_TYPE_STBC:
  3828. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  3829. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  3830. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3831. return;
  3832. }
  3833. break;
  3834. case WMI_TPC_TABLE_TYPE_TXBF:
  3835. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  3836. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  3837. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3838. return;
  3839. }
  3840. break;
  3841. default:
  3842. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3843. "invalid table type in wmi tpc event: %d\n", type);
  3844. return;
  3845. }
  3846. pream_idx = 0;
  3847. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  3848. memset(tpc_value, 0, sizeof(tpc_value));
  3849. memset(buff, 0, sizeof(buff));
  3850. if (i == pream_table[pream_idx])
  3851. pream_idx++;
  3852. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  3853. if (j >= __le32_to_cpu(ev->num_tx_chain))
  3854. break;
  3855. tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
  3856. rate_code[i],
  3857. type);
  3858. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  3859. strncat(tpc_value, buff, strlen(buff));
  3860. }
  3861. tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
  3862. tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
  3863. memcpy(tpc_stats->tpc_table[type].tpc_value[i],
  3864. tpc_value, sizeof(tpc_value));
  3865. }
  3866. }
  3867. void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
  3868. u32 num_tx_chain)
  3869. {
  3870. u32 i, j, pream_idx;
  3871. u8 rate_idx;
  3872. /* Create the rate code table based on the chains supported */
  3873. rate_idx = 0;
  3874. pream_idx = 0;
  3875. /* Fill CCK rate code */
  3876. for (i = 0; i < 4; i++) {
  3877. rate_code[rate_idx] =
  3878. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
  3879. rate_idx++;
  3880. }
  3881. pream_table[pream_idx] = rate_idx;
  3882. pream_idx++;
  3883. /* Fill OFDM rate code */
  3884. for (i = 0; i < 8; i++) {
  3885. rate_code[rate_idx] =
  3886. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
  3887. rate_idx++;
  3888. }
  3889. pream_table[pream_idx] = rate_idx;
  3890. pream_idx++;
  3891. /* Fill HT20 rate code */
  3892. for (i = 0; i < num_tx_chain; i++) {
  3893. for (j = 0; j < 8; j++) {
  3894. rate_code[rate_idx] =
  3895. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3896. rate_idx++;
  3897. }
  3898. }
  3899. pream_table[pream_idx] = rate_idx;
  3900. pream_idx++;
  3901. /* Fill HT40 rate code */
  3902. for (i = 0; i < num_tx_chain; i++) {
  3903. for (j = 0; j < 8; j++) {
  3904. rate_code[rate_idx] =
  3905. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3906. rate_idx++;
  3907. }
  3908. }
  3909. pream_table[pream_idx] = rate_idx;
  3910. pream_idx++;
  3911. /* Fill VHT20 rate code */
  3912. for (i = 0; i < num_tx_chain; i++) {
  3913. for (j = 0; j < 10; j++) {
  3914. rate_code[rate_idx] =
  3915. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3916. rate_idx++;
  3917. }
  3918. }
  3919. pream_table[pream_idx] = rate_idx;
  3920. pream_idx++;
  3921. /* Fill VHT40 rate code */
  3922. for (i = 0; i < num_tx_chain; i++) {
  3923. for (j = 0; j < 10; j++) {
  3924. rate_code[rate_idx] =
  3925. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3926. rate_idx++;
  3927. }
  3928. }
  3929. pream_table[pream_idx] = rate_idx;
  3930. pream_idx++;
  3931. /* Fill VHT80 rate code */
  3932. for (i = 0; i < num_tx_chain; i++) {
  3933. for (j = 0; j < 10; j++) {
  3934. rate_code[rate_idx] =
  3935. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3936. rate_idx++;
  3937. }
  3938. }
  3939. pream_table[pream_idx] = rate_idx;
  3940. pream_idx++;
  3941. rate_code[rate_idx++] =
  3942. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3943. rate_code[rate_idx++] =
  3944. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3945. rate_code[rate_idx++] =
  3946. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3947. rate_code[rate_idx++] =
  3948. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3949. rate_code[rate_idx++] =
  3950. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3951. pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
  3952. }
  3953. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  3954. {
  3955. u32 num_tx_chain;
  3956. u8 rate_code[WMI_TPC_RATE_MAX];
  3957. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  3958. struct wmi_pdev_tpc_config_event *ev;
  3959. struct ath10k_tpc_stats *tpc_stats;
  3960. ev = (struct wmi_pdev_tpc_config_event *)skb->data;
  3961. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  3962. if (!tpc_stats)
  3963. return;
  3964. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3965. ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
  3966. num_tx_chain);
  3967. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  3968. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  3969. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  3970. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  3971. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  3972. tpc_stats->twice_antenna_reduction =
  3973. __le32_to_cpu(ev->twice_antenna_reduction);
  3974. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  3975. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  3976. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3977. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  3978. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3979. rate_code, pream_table,
  3980. WMI_TPC_TABLE_TYPE_CDD);
  3981. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3982. rate_code, pream_table,
  3983. WMI_TPC_TABLE_TYPE_STBC);
  3984. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3985. rate_code, pream_table,
  3986. WMI_TPC_TABLE_TYPE_TXBF);
  3987. ath10k_debug_tpc_stats_process(ar, tpc_stats);
  3988. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3989. "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  3990. __le32_to_cpu(ev->chan_freq),
  3991. __le32_to_cpu(ev->phy_mode),
  3992. __le32_to_cpu(ev->ctl),
  3993. __le32_to_cpu(ev->reg_domain),
  3994. a_sle32_to_cpu(ev->twice_antenna_gain),
  3995. __le32_to_cpu(ev->twice_antenna_reduction),
  3996. __le32_to_cpu(ev->power_limit),
  3997. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  3998. __le32_to_cpu(ev->num_tx_chain),
  3999. __le32_to_cpu(ev->rate_max));
  4000. }
  4001. static u8
  4002. ath10k_wmi_tpc_final_get_rate(struct ath10k *ar,
  4003. struct wmi_pdev_tpc_final_table_event *ev,
  4004. u32 rate_idx, u32 num_chains,
  4005. u32 rate_code, u8 type, u32 pream_idx)
  4006. {
  4007. u8 tpc, num_streams, preamble, ch, stm_idx;
  4008. s8 pow_agcdd, pow_agstbc, pow_agtxbf;
  4009. int pream;
  4010. num_streams = ATH10K_HW_NSS(rate_code);
  4011. preamble = ATH10K_HW_PREAMBLE(rate_code);
  4012. ch = num_chains - 1;
  4013. stm_idx = num_streams - 1;
  4014. pream = -1;
  4015. if (__le32_to_cpu(ev->chan_freq) <= 2483) {
  4016. switch (pream_idx) {
  4017. case WMI_TPC_PREAM_2GHZ_CCK:
  4018. pream = 0;
  4019. break;
  4020. case WMI_TPC_PREAM_2GHZ_OFDM:
  4021. pream = 1;
  4022. break;
  4023. case WMI_TPC_PREAM_2GHZ_HT20:
  4024. case WMI_TPC_PREAM_2GHZ_VHT20:
  4025. pream = 2;
  4026. break;
  4027. case WMI_TPC_PREAM_2GHZ_HT40:
  4028. case WMI_TPC_PREAM_2GHZ_VHT40:
  4029. pream = 3;
  4030. break;
  4031. case WMI_TPC_PREAM_2GHZ_VHT80:
  4032. pream = 4;
  4033. break;
  4034. default:
  4035. pream = -1;
  4036. break;
  4037. }
  4038. }
  4039. if (__le32_to_cpu(ev->chan_freq) >= 5180) {
  4040. switch (pream_idx) {
  4041. case WMI_TPC_PREAM_5GHZ_OFDM:
  4042. pream = 0;
  4043. break;
  4044. case WMI_TPC_PREAM_5GHZ_HT20:
  4045. case WMI_TPC_PREAM_5GHZ_VHT20:
  4046. pream = 1;
  4047. break;
  4048. case WMI_TPC_PREAM_5GHZ_HT40:
  4049. case WMI_TPC_PREAM_5GHZ_VHT40:
  4050. pream = 2;
  4051. break;
  4052. case WMI_TPC_PREAM_5GHZ_VHT80:
  4053. pream = 3;
  4054. break;
  4055. case WMI_TPC_PREAM_5GHZ_HTCUP:
  4056. pream = 4;
  4057. break;
  4058. default:
  4059. pream = -1;
  4060. break;
  4061. }
  4062. }
  4063. if (pream == 4)
  4064. tpc = min_t(u8, ev->rates_array[rate_idx],
  4065. ev->max_reg_allow_pow[ch]);
  4066. else
  4067. tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx],
  4068. ev->max_reg_allow_pow[ch]),
  4069. ev->ctl_power_table[0][pream][stm_idx]);
  4070. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  4071. goto out;
  4072. if (preamble == WMI_RATE_PREAMBLE_CCK)
  4073. goto out;
  4074. if (num_chains <= num_streams)
  4075. goto out;
  4076. switch (type) {
  4077. case WMI_TPC_TABLE_TYPE_STBC:
  4078. pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx];
  4079. if (pream == 4)
  4080. tpc = min_t(u8, tpc, pow_agstbc);
  4081. else
  4082. tpc = min_t(u8, min_t(u8, tpc, pow_agstbc),
  4083. ev->ctl_power_table[0][pream][stm_idx]);
  4084. break;
  4085. case WMI_TPC_TABLE_TYPE_TXBF:
  4086. pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx];
  4087. if (pream == 4)
  4088. tpc = min_t(u8, tpc, pow_agtxbf);
  4089. else
  4090. tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf),
  4091. ev->ctl_power_table[1][pream][stm_idx]);
  4092. break;
  4093. case WMI_TPC_TABLE_TYPE_CDD:
  4094. pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx];
  4095. if (pream == 4)
  4096. tpc = min_t(u8, tpc, pow_agcdd);
  4097. else
  4098. tpc = min_t(u8, min_t(u8, tpc, pow_agcdd),
  4099. ev->ctl_power_table[0][pream][stm_idx]);
  4100. break;
  4101. default:
  4102. ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type);
  4103. tpc = 0;
  4104. break;
  4105. }
  4106. out:
  4107. return tpc;
  4108. }
  4109. static void
  4110. ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar,
  4111. struct wmi_pdev_tpc_final_table_event *ev,
  4112. struct ath10k_tpc_stats_final *tpc_stats,
  4113. u8 *rate_code, u16 *pream_table, u8 type)
  4114. {
  4115. u32 i, j, pream_idx, flags;
  4116. u8 tpc[WMI_TPC_TX_N_CHAIN];
  4117. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  4118. char buff[WMI_TPC_BUF_SIZE];
  4119. flags = __le32_to_cpu(ev->flags);
  4120. switch (type) {
  4121. case WMI_TPC_TABLE_TYPE_CDD:
  4122. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  4123. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  4124. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4125. return;
  4126. }
  4127. break;
  4128. case WMI_TPC_TABLE_TYPE_STBC:
  4129. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  4130. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  4131. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4132. return;
  4133. }
  4134. break;
  4135. case WMI_TPC_TABLE_TYPE_TXBF:
  4136. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  4137. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  4138. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4139. return;
  4140. }
  4141. break;
  4142. default:
  4143. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4144. "invalid table type in wmi tpc event: %d\n", type);
  4145. return;
  4146. }
  4147. pream_idx = 0;
  4148. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  4149. memset(tpc_value, 0, sizeof(tpc_value));
  4150. memset(buff, 0, sizeof(buff));
  4151. if (i == pream_table[pream_idx])
  4152. pream_idx++;
  4153. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  4154. if (j >= __le32_to_cpu(ev->num_tx_chain))
  4155. break;
  4156. tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1,
  4157. rate_code[i],
  4158. type, pream_idx);
  4159. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  4160. strncat(tpc_value, buff, strlen(buff));
  4161. }
  4162. tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx;
  4163. tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i];
  4164. memcpy(tpc_stats->tpc_table_final[type].tpc_value[i],
  4165. tpc_value, sizeof(tpc_value));
  4166. }
  4167. }
  4168. void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb)
  4169. {
  4170. u32 num_tx_chain;
  4171. u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
  4172. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  4173. struct wmi_pdev_tpc_final_table_event *ev;
  4174. struct ath10k_tpc_stats_final *tpc_stats;
  4175. ev = (struct wmi_pdev_tpc_final_table_event *)skb->data;
  4176. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  4177. if (!tpc_stats)
  4178. return;
  4179. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4180. ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
  4181. num_tx_chain);
  4182. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  4183. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  4184. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  4185. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  4186. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  4187. tpc_stats->twice_antenna_reduction =
  4188. __le32_to_cpu(ev->twice_antenna_reduction);
  4189. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  4190. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  4191. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4192. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  4193. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4194. rate_code, pream_table,
  4195. WMI_TPC_TABLE_TYPE_CDD);
  4196. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4197. rate_code, pream_table,
  4198. WMI_TPC_TABLE_TYPE_STBC);
  4199. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4200. rate_code, pream_table,
  4201. WMI_TPC_TABLE_TYPE_TXBF);
  4202. ath10k_debug_tpc_stats_final_process(ar, tpc_stats);
  4203. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4204. "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  4205. __le32_to_cpu(ev->chan_freq),
  4206. __le32_to_cpu(ev->phy_mode),
  4207. __le32_to_cpu(ev->ctl),
  4208. __le32_to_cpu(ev->reg_domain),
  4209. a_sle32_to_cpu(ev->twice_antenna_gain),
  4210. __le32_to_cpu(ev->twice_antenna_reduction),
  4211. __le32_to_cpu(ev->power_limit),
  4212. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  4213. __le32_to_cpu(ev->num_tx_chain),
  4214. __le32_to_cpu(ev->rate_max));
  4215. }
  4216. static void
  4217. ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
  4218. {
  4219. struct wmi_tdls_peer_event *ev;
  4220. struct ath10k_peer *peer;
  4221. struct ath10k_vif *arvif;
  4222. int vdev_id;
  4223. int peer_status;
  4224. int peer_reason;
  4225. u8 reason;
  4226. if (skb->len < sizeof(*ev)) {
  4227. ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
  4228. skb->len);
  4229. return;
  4230. }
  4231. ev = (struct wmi_tdls_peer_event *)skb->data;
  4232. vdev_id = __le32_to_cpu(ev->vdev_id);
  4233. peer_status = __le32_to_cpu(ev->peer_status);
  4234. peer_reason = __le32_to_cpu(ev->peer_reason);
  4235. spin_lock_bh(&ar->data_lock);
  4236. peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
  4237. spin_unlock_bh(&ar->data_lock);
  4238. if (!peer) {
  4239. ath10k_warn(ar, "failed to find peer entry for %pM\n",
  4240. ev->peer_macaddr.addr);
  4241. return;
  4242. }
  4243. switch (peer_status) {
  4244. case WMI_TDLS_SHOULD_TEARDOWN:
  4245. switch (peer_reason) {
  4246. case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
  4247. case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
  4248. case WMI_TDLS_TEARDOWN_REASON_RSSI:
  4249. reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
  4250. break;
  4251. default:
  4252. reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
  4253. break;
  4254. }
  4255. arvif = ath10k_get_arvif(ar, vdev_id);
  4256. if (!arvif) {
  4257. ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
  4258. vdev_id);
  4259. return;
  4260. }
  4261. ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
  4262. NL80211_TDLS_TEARDOWN, reason,
  4263. GFP_ATOMIC);
  4264. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4265. "received tdls teardown event for peer %pM reason %u\n",
  4266. ev->peer_macaddr.addr, peer_reason);
  4267. break;
  4268. default:
  4269. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4270. "received unknown tdls peer event %u\n",
  4271. peer_status);
  4272. break;
  4273. }
  4274. }
  4275. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  4276. {
  4277. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  4278. }
  4279. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  4280. {
  4281. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  4282. }
  4283. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  4284. {
  4285. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  4286. }
  4287. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  4288. {
  4289. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  4290. }
  4291. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  4292. {
  4293. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  4294. }
  4295. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  4296. struct sk_buff *skb)
  4297. {
  4298. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  4299. }
  4300. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  4301. {
  4302. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  4303. }
  4304. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  4305. {
  4306. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  4307. }
  4308. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  4309. {
  4310. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  4311. }
  4312. static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
  4313. u32 num_units, u32 unit_len)
  4314. {
  4315. dma_addr_t paddr;
  4316. u32 pool_size;
  4317. int idx = ar->wmi.num_mem_chunks;
  4318. void *vaddr;
  4319. pool_size = num_units * round_up(unit_len, 4);
  4320. vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
  4321. if (!vaddr)
  4322. return -ENOMEM;
  4323. memset(vaddr, 0, pool_size);
  4324. ar->wmi.mem_chunks[idx].vaddr = vaddr;
  4325. ar->wmi.mem_chunks[idx].paddr = paddr;
  4326. ar->wmi.mem_chunks[idx].len = pool_size;
  4327. ar->wmi.mem_chunks[idx].req_id = req_id;
  4328. ar->wmi.num_mem_chunks++;
  4329. return num_units;
  4330. }
  4331. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  4332. u32 num_units, u32 unit_len)
  4333. {
  4334. int ret;
  4335. while (num_units) {
  4336. ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
  4337. if (ret < 0)
  4338. return ret;
  4339. num_units -= ret;
  4340. }
  4341. return 0;
  4342. }
  4343. static bool
  4344. ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
  4345. const struct wlan_host_mem_req **mem_reqs,
  4346. u32 num_mem_reqs)
  4347. {
  4348. u32 req_id, num_units, unit_size, num_unit_info;
  4349. u32 pool_size;
  4350. int i, j;
  4351. bool found;
  4352. if (ar->wmi.num_mem_chunks != num_mem_reqs)
  4353. return false;
  4354. for (i = 0; i < num_mem_reqs; ++i) {
  4355. req_id = __le32_to_cpu(mem_reqs[i]->req_id);
  4356. num_units = __le32_to_cpu(mem_reqs[i]->num_units);
  4357. unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
  4358. num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
  4359. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4360. if (ar->num_active_peers)
  4361. num_units = ar->num_active_peers + 1;
  4362. else
  4363. num_units = ar->max_num_peers + 1;
  4364. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4365. num_units = ar->max_num_peers + 1;
  4366. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4367. num_units = ar->max_num_vdevs + 1;
  4368. }
  4369. found = false;
  4370. for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
  4371. if (ar->wmi.mem_chunks[j].req_id == req_id) {
  4372. pool_size = num_units * round_up(unit_size, 4);
  4373. if (ar->wmi.mem_chunks[j].len == pool_size) {
  4374. found = true;
  4375. break;
  4376. }
  4377. }
  4378. }
  4379. if (!found)
  4380. return false;
  4381. }
  4382. return true;
  4383. }
  4384. static int
  4385. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4386. struct wmi_svc_rdy_ev_arg *arg)
  4387. {
  4388. struct wmi_service_ready_event *ev;
  4389. size_t i, n;
  4390. if (skb->len < sizeof(*ev))
  4391. return -EPROTO;
  4392. ev = (void *)skb->data;
  4393. skb_pull(skb, sizeof(*ev));
  4394. arg->min_tx_power = ev->hw_min_tx_power;
  4395. arg->max_tx_power = ev->hw_max_tx_power;
  4396. arg->ht_cap = ev->ht_cap_info;
  4397. arg->vht_cap = ev->vht_cap_info;
  4398. arg->sw_ver0 = ev->sw_version;
  4399. arg->sw_ver1 = ev->sw_version_1;
  4400. arg->phy_capab = ev->phy_capability;
  4401. arg->num_rf_chains = ev->num_rf_chains;
  4402. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4403. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4404. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4405. arg->num_mem_reqs = ev->num_mem_reqs;
  4406. arg->service_map = ev->wmi_service_bitmap;
  4407. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4408. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4409. ARRAY_SIZE(arg->mem_reqs));
  4410. for (i = 0; i < n; i++)
  4411. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4412. if (skb->len <
  4413. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4414. return -EPROTO;
  4415. return 0;
  4416. }
  4417. static int
  4418. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4419. struct wmi_svc_rdy_ev_arg *arg)
  4420. {
  4421. struct wmi_10x_service_ready_event *ev;
  4422. int i, n;
  4423. if (skb->len < sizeof(*ev))
  4424. return -EPROTO;
  4425. ev = (void *)skb->data;
  4426. skb_pull(skb, sizeof(*ev));
  4427. arg->min_tx_power = ev->hw_min_tx_power;
  4428. arg->max_tx_power = ev->hw_max_tx_power;
  4429. arg->ht_cap = ev->ht_cap_info;
  4430. arg->vht_cap = ev->vht_cap_info;
  4431. arg->sw_ver0 = ev->sw_version;
  4432. arg->phy_capab = ev->phy_capability;
  4433. arg->num_rf_chains = ev->num_rf_chains;
  4434. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4435. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4436. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4437. arg->num_mem_reqs = ev->num_mem_reqs;
  4438. arg->service_map = ev->wmi_service_bitmap;
  4439. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4440. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4441. ARRAY_SIZE(arg->mem_reqs));
  4442. for (i = 0; i < n; i++)
  4443. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4444. if (skb->len <
  4445. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4446. return -EPROTO;
  4447. return 0;
  4448. }
  4449. static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
  4450. {
  4451. struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
  4452. struct sk_buff *skb = ar->svc_rdy_skb;
  4453. struct wmi_svc_rdy_ev_arg arg = {};
  4454. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  4455. int ret;
  4456. bool allocated;
  4457. if (!skb) {
  4458. ath10k_warn(ar, "invalid service ready event skb\n");
  4459. return;
  4460. }
  4461. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  4462. if (ret) {
  4463. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  4464. return;
  4465. }
  4466. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  4467. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  4468. arg.service_map_len);
  4469. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  4470. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  4471. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  4472. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  4473. ar->fw_version_major =
  4474. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  4475. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  4476. ar->fw_version_release =
  4477. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  4478. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  4479. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  4480. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  4481. ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
  4482. ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
  4483. ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
  4484. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  4485. arg.service_map, arg.service_map_len);
  4486. if (ar->num_rf_chains > ar->max_spatial_stream) {
  4487. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  4488. ar->num_rf_chains, ar->max_spatial_stream);
  4489. ar->num_rf_chains = ar->max_spatial_stream;
  4490. }
  4491. if (!ar->cfg_tx_chainmask) {
  4492. ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  4493. ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  4494. }
  4495. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  4496. snprintf(ar->hw->wiphy->fw_version,
  4497. sizeof(ar->hw->wiphy->fw_version),
  4498. "%u.%u.%u.%u",
  4499. ar->fw_version_major,
  4500. ar->fw_version_minor,
  4501. ar->fw_version_release,
  4502. ar->fw_version_build);
  4503. }
  4504. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  4505. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  4506. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  4507. num_mem_reqs);
  4508. return;
  4509. }
  4510. if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
  4511. if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
  4512. ar->running_fw->fw_file.fw_features))
  4513. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
  4514. ar->max_num_vdevs;
  4515. else
  4516. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
  4517. ar->max_num_vdevs;
  4518. ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
  4519. ar->max_num_vdevs;
  4520. ar->num_tids = ar->num_active_peers * 2;
  4521. ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
  4522. }
  4523. /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
  4524. * and WMI_SERVICE_IRAM_TIDS, etc.
  4525. */
  4526. allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
  4527. num_mem_reqs);
  4528. if (allocated)
  4529. goto skip_mem_alloc;
  4530. /* Either this event is received during boot time or there is a change
  4531. * in memory requirement from firmware when compared to last request.
  4532. * Free any old memory and do a fresh allocation based on the current
  4533. * memory requirement.
  4534. */
  4535. ath10k_wmi_free_host_mem(ar);
  4536. for (i = 0; i < num_mem_reqs; ++i) {
  4537. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  4538. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  4539. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  4540. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  4541. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4542. if (ar->num_active_peers)
  4543. num_units = ar->num_active_peers + 1;
  4544. else
  4545. num_units = ar->max_num_peers + 1;
  4546. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4547. /* number of units to allocate is number of
  4548. * peers, 1 extra for self peer on target
  4549. * this needs to be tied, host and target
  4550. * can get out of sync
  4551. */
  4552. num_units = ar->max_num_peers + 1;
  4553. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4554. num_units = ar->max_num_vdevs + 1;
  4555. }
  4556. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4557. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  4558. req_id,
  4559. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  4560. num_unit_info,
  4561. unit_size,
  4562. num_units);
  4563. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  4564. unit_size);
  4565. if (ret)
  4566. return;
  4567. }
  4568. skip_mem_alloc:
  4569. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4570. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
  4571. __le32_to_cpu(arg.min_tx_power),
  4572. __le32_to_cpu(arg.max_tx_power),
  4573. __le32_to_cpu(arg.ht_cap),
  4574. __le32_to_cpu(arg.vht_cap),
  4575. __le32_to_cpu(arg.sw_ver0),
  4576. __le32_to_cpu(arg.sw_ver1),
  4577. __le32_to_cpu(arg.fw_build),
  4578. __le32_to_cpu(arg.phy_capab),
  4579. __le32_to_cpu(arg.num_rf_chains),
  4580. __le32_to_cpu(arg.eeprom_rd),
  4581. __le32_to_cpu(arg.num_mem_reqs));
  4582. dev_kfree_skb(skb);
  4583. ar->svc_rdy_skb = NULL;
  4584. complete(&ar->wmi.service_ready);
  4585. }
  4586. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  4587. {
  4588. ar->svc_rdy_skb = skb;
  4589. queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
  4590. }
  4591. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4592. struct wmi_rdy_ev_arg *arg)
  4593. {
  4594. struct wmi_ready_event *ev = (void *)skb->data;
  4595. if (skb->len < sizeof(*ev))
  4596. return -EPROTO;
  4597. skb_pull(skb, sizeof(*ev));
  4598. arg->sw_version = ev->sw_version;
  4599. arg->abi_version = ev->abi_version;
  4600. arg->status = ev->status;
  4601. arg->mac_addr = ev->mac_addr.addr;
  4602. return 0;
  4603. }
  4604. static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
  4605. struct wmi_roam_ev_arg *arg)
  4606. {
  4607. struct wmi_roam_ev *ev = (void *)skb->data;
  4608. if (skb->len < sizeof(*ev))
  4609. return -EPROTO;
  4610. skb_pull(skb, sizeof(*ev));
  4611. arg->vdev_id = ev->vdev_id;
  4612. arg->reason = ev->reason;
  4613. return 0;
  4614. }
  4615. static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
  4616. struct sk_buff *skb,
  4617. struct wmi_echo_ev_arg *arg)
  4618. {
  4619. struct wmi_echo_event *ev = (void *)skb->data;
  4620. arg->value = ev->value;
  4621. return 0;
  4622. }
  4623. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  4624. {
  4625. struct wmi_rdy_ev_arg arg = {};
  4626. int ret;
  4627. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  4628. if (ret) {
  4629. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  4630. return ret;
  4631. }
  4632. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4633. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  4634. __le32_to_cpu(arg.sw_version),
  4635. __le32_to_cpu(arg.abi_version),
  4636. arg.mac_addr,
  4637. __le32_to_cpu(arg.status));
  4638. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  4639. complete(&ar->wmi.unified_ready);
  4640. return 0;
  4641. }
  4642. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  4643. {
  4644. const struct wmi_pdev_temperature_event *ev;
  4645. ev = (struct wmi_pdev_temperature_event *)skb->data;
  4646. if (WARN_ON(skb->len < sizeof(*ev)))
  4647. return -EPROTO;
  4648. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  4649. return 0;
  4650. }
  4651. static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
  4652. struct sk_buff *skb)
  4653. {
  4654. struct wmi_pdev_bss_chan_info_event *ev;
  4655. struct survey_info *survey;
  4656. u64 busy, total, tx, rx, rx_bss;
  4657. u32 freq, noise_floor;
  4658. u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
  4659. int idx;
  4660. ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
  4661. if (WARN_ON(skb->len < sizeof(*ev)))
  4662. return -EPROTO;
  4663. freq = __le32_to_cpu(ev->freq);
  4664. noise_floor = __le32_to_cpu(ev->noise_floor);
  4665. busy = __le64_to_cpu(ev->cycle_busy);
  4666. total = __le64_to_cpu(ev->cycle_total);
  4667. tx = __le64_to_cpu(ev->cycle_tx);
  4668. rx = __le64_to_cpu(ev->cycle_rx);
  4669. rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
  4670. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4671. "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
  4672. freq, noise_floor, busy, total, tx, rx, rx_bss);
  4673. spin_lock_bh(&ar->data_lock);
  4674. idx = freq_to_idx(ar, freq);
  4675. if (idx >= ARRAY_SIZE(ar->survey)) {
  4676. ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
  4677. freq, idx);
  4678. goto exit;
  4679. }
  4680. survey = &ar->survey[idx];
  4681. survey->noise = noise_floor;
  4682. survey->time = div_u64(total, cc_freq_hz);
  4683. survey->time_busy = div_u64(busy, cc_freq_hz);
  4684. survey->time_rx = div_u64(rx_bss, cc_freq_hz);
  4685. survey->time_tx = div_u64(tx, cc_freq_hz);
  4686. survey->filled |= (SURVEY_INFO_NOISE_DBM |
  4687. SURVEY_INFO_TIME |
  4688. SURVEY_INFO_TIME_BUSY |
  4689. SURVEY_INFO_TIME_RX |
  4690. SURVEY_INFO_TIME_TX);
  4691. exit:
  4692. spin_unlock_bh(&ar->data_lock);
  4693. complete(&ar->bss_survey_done);
  4694. return 0;
  4695. }
  4696. static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
  4697. {
  4698. if (ar->hw_params.hw_ops->set_coverage_class) {
  4699. spin_lock_bh(&ar->data_lock);
  4700. /* This call only ensures that the modified coverage class
  4701. * persists in case the firmware sets the registers back to
  4702. * their default value. So calling it is only necessary if the
  4703. * coverage class has a non-zero value.
  4704. */
  4705. if (ar->fw_coverage.coverage_class)
  4706. queue_work(ar->workqueue, &ar->set_coverage_class_work);
  4707. spin_unlock_bh(&ar->data_lock);
  4708. }
  4709. }
  4710. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4711. {
  4712. struct wmi_cmd_hdr *cmd_hdr;
  4713. enum wmi_event_id id;
  4714. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4715. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4716. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4717. goto out;
  4718. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4719. switch (id) {
  4720. case WMI_MGMT_RX_EVENTID:
  4721. ath10k_wmi_event_mgmt_rx(ar, skb);
  4722. /* mgmt_rx() owns the skb now! */
  4723. return;
  4724. case WMI_SCAN_EVENTID:
  4725. ath10k_wmi_event_scan(ar, skb);
  4726. ath10k_wmi_queue_set_coverage_class_work(ar);
  4727. break;
  4728. case WMI_CHAN_INFO_EVENTID:
  4729. ath10k_wmi_event_chan_info(ar, skb);
  4730. break;
  4731. case WMI_ECHO_EVENTID:
  4732. ath10k_wmi_event_echo(ar, skb);
  4733. break;
  4734. case WMI_DEBUG_MESG_EVENTID:
  4735. ath10k_wmi_event_debug_mesg(ar, skb);
  4736. ath10k_wmi_queue_set_coverage_class_work(ar);
  4737. break;
  4738. case WMI_UPDATE_STATS_EVENTID:
  4739. ath10k_wmi_event_update_stats(ar, skb);
  4740. break;
  4741. case WMI_VDEV_START_RESP_EVENTID:
  4742. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4743. ath10k_wmi_queue_set_coverage_class_work(ar);
  4744. break;
  4745. case WMI_VDEV_STOPPED_EVENTID:
  4746. ath10k_wmi_event_vdev_stopped(ar, skb);
  4747. ath10k_wmi_queue_set_coverage_class_work(ar);
  4748. break;
  4749. case WMI_PEER_STA_KICKOUT_EVENTID:
  4750. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4751. break;
  4752. case WMI_HOST_SWBA_EVENTID:
  4753. ath10k_wmi_event_host_swba(ar, skb);
  4754. break;
  4755. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  4756. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4757. break;
  4758. case WMI_PHYERR_EVENTID:
  4759. ath10k_wmi_event_phyerr(ar, skb);
  4760. break;
  4761. case WMI_ROAM_EVENTID:
  4762. ath10k_wmi_event_roam(ar, skb);
  4763. ath10k_wmi_queue_set_coverage_class_work(ar);
  4764. break;
  4765. case WMI_PROFILE_MATCH:
  4766. ath10k_wmi_event_profile_match(ar, skb);
  4767. break;
  4768. case WMI_DEBUG_PRINT_EVENTID:
  4769. ath10k_wmi_event_debug_print(ar, skb);
  4770. ath10k_wmi_queue_set_coverage_class_work(ar);
  4771. break;
  4772. case WMI_PDEV_QVIT_EVENTID:
  4773. ath10k_wmi_event_pdev_qvit(ar, skb);
  4774. break;
  4775. case WMI_WLAN_PROFILE_DATA_EVENTID:
  4776. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4777. break;
  4778. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  4779. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4780. break;
  4781. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  4782. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4783. break;
  4784. case WMI_RTT_ERROR_REPORT_EVENTID:
  4785. ath10k_wmi_event_rtt_error_report(ar, skb);
  4786. break;
  4787. case WMI_WOW_WAKEUP_HOST_EVENTID:
  4788. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4789. break;
  4790. case WMI_DCS_INTERFERENCE_EVENTID:
  4791. ath10k_wmi_event_dcs_interference(ar, skb);
  4792. break;
  4793. case WMI_PDEV_TPC_CONFIG_EVENTID:
  4794. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4795. break;
  4796. case WMI_PDEV_FTM_INTG_EVENTID:
  4797. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  4798. break;
  4799. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  4800. ath10k_wmi_event_gtk_offload_status(ar, skb);
  4801. break;
  4802. case WMI_GTK_REKEY_FAIL_EVENTID:
  4803. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  4804. break;
  4805. case WMI_TX_DELBA_COMPLETE_EVENTID:
  4806. ath10k_wmi_event_delba_complete(ar, skb);
  4807. break;
  4808. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  4809. ath10k_wmi_event_addba_complete(ar, skb);
  4810. break;
  4811. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  4812. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  4813. break;
  4814. case WMI_SERVICE_READY_EVENTID:
  4815. ath10k_wmi_event_service_ready(ar, skb);
  4816. return;
  4817. case WMI_READY_EVENTID:
  4818. ath10k_wmi_event_ready(ar, skb);
  4819. ath10k_wmi_queue_set_coverage_class_work(ar);
  4820. break;
  4821. default:
  4822. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4823. break;
  4824. }
  4825. out:
  4826. dev_kfree_skb(skb);
  4827. }
  4828. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4829. {
  4830. struct wmi_cmd_hdr *cmd_hdr;
  4831. enum wmi_10x_event_id id;
  4832. bool consumed;
  4833. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4834. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4835. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4836. goto out;
  4837. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4838. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4839. /* Ready event must be handled normally also in UTF mode so that we
  4840. * know the UTF firmware has booted, others we are just bypass WMI
  4841. * events to testmode.
  4842. */
  4843. if (consumed && id != WMI_10X_READY_EVENTID) {
  4844. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4845. "wmi testmode consumed 0x%x\n", id);
  4846. goto out;
  4847. }
  4848. switch (id) {
  4849. case WMI_10X_MGMT_RX_EVENTID:
  4850. ath10k_wmi_event_mgmt_rx(ar, skb);
  4851. /* mgmt_rx() owns the skb now! */
  4852. return;
  4853. case WMI_10X_SCAN_EVENTID:
  4854. ath10k_wmi_event_scan(ar, skb);
  4855. ath10k_wmi_queue_set_coverage_class_work(ar);
  4856. break;
  4857. case WMI_10X_CHAN_INFO_EVENTID:
  4858. ath10k_wmi_event_chan_info(ar, skb);
  4859. break;
  4860. case WMI_10X_ECHO_EVENTID:
  4861. ath10k_wmi_event_echo(ar, skb);
  4862. break;
  4863. case WMI_10X_DEBUG_MESG_EVENTID:
  4864. ath10k_wmi_event_debug_mesg(ar, skb);
  4865. ath10k_wmi_queue_set_coverage_class_work(ar);
  4866. break;
  4867. case WMI_10X_UPDATE_STATS_EVENTID:
  4868. ath10k_wmi_event_update_stats(ar, skb);
  4869. break;
  4870. case WMI_10X_VDEV_START_RESP_EVENTID:
  4871. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4872. ath10k_wmi_queue_set_coverage_class_work(ar);
  4873. break;
  4874. case WMI_10X_VDEV_STOPPED_EVENTID:
  4875. ath10k_wmi_event_vdev_stopped(ar, skb);
  4876. ath10k_wmi_queue_set_coverage_class_work(ar);
  4877. break;
  4878. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  4879. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4880. break;
  4881. case WMI_10X_HOST_SWBA_EVENTID:
  4882. ath10k_wmi_event_host_swba(ar, skb);
  4883. break;
  4884. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  4885. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4886. break;
  4887. case WMI_10X_PHYERR_EVENTID:
  4888. ath10k_wmi_event_phyerr(ar, skb);
  4889. break;
  4890. case WMI_10X_ROAM_EVENTID:
  4891. ath10k_wmi_event_roam(ar, skb);
  4892. ath10k_wmi_queue_set_coverage_class_work(ar);
  4893. break;
  4894. case WMI_10X_PROFILE_MATCH:
  4895. ath10k_wmi_event_profile_match(ar, skb);
  4896. break;
  4897. case WMI_10X_DEBUG_PRINT_EVENTID:
  4898. ath10k_wmi_event_debug_print(ar, skb);
  4899. ath10k_wmi_queue_set_coverage_class_work(ar);
  4900. break;
  4901. case WMI_10X_PDEV_QVIT_EVENTID:
  4902. ath10k_wmi_event_pdev_qvit(ar, skb);
  4903. break;
  4904. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  4905. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4906. break;
  4907. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  4908. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4909. break;
  4910. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  4911. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4912. break;
  4913. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  4914. ath10k_wmi_event_rtt_error_report(ar, skb);
  4915. break;
  4916. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  4917. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4918. break;
  4919. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  4920. ath10k_wmi_event_dcs_interference(ar, skb);
  4921. break;
  4922. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  4923. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4924. break;
  4925. case WMI_10X_INST_RSSI_STATS_EVENTID:
  4926. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4927. break;
  4928. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  4929. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4930. break;
  4931. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  4932. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4933. break;
  4934. case WMI_10X_SERVICE_READY_EVENTID:
  4935. ath10k_wmi_event_service_ready(ar, skb);
  4936. return;
  4937. case WMI_10X_READY_EVENTID:
  4938. ath10k_wmi_event_ready(ar, skb);
  4939. ath10k_wmi_queue_set_coverage_class_work(ar);
  4940. break;
  4941. case WMI_10X_PDEV_UTF_EVENTID:
  4942. /* ignore utf events */
  4943. break;
  4944. default:
  4945. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4946. break;
  4947. }
  4948. out:
  4949. dev_kfree_skb(skb);
  4950. }
  4951. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4952. {
  4953. struct wmi_cmd_hdr *cmd_hdr;
  4954. enum wmi_10_2_event_id id;
  4955. bool consumed;
  4956. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4957. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4958. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4959. goto out;
  4960. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4961. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4962. /* Ready event must be handled normally also in UTF mode so that we
  4963. * know the UTF firmware has booted, others we are just bypass WMI
  4964. * events to testmode.
  4965. */
  4966. if (consumed && id != WMI_10_2_READY_EVENTID) {
  4967. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4968. "wmi testmode consumed 0x%x\n", id);
  4969. goto out;
  4970. }
  4971. switch (id) {
  4972. case WMI_10_2_MGMT_RX_EVENTID:
  4973. ath10k_wmi_event_mgmt_rx(ar, skb);
  4974. /* mgmt_rx() owns the skb now! */
  4975. return;
  4976. case WMI_10_2_SCAN_EVENTID:
  4977. ath10k_wmi_event_scan(ar, skb);
  4978. ath10k_wmi_queue_set_coverage_class_work(ar);
  4979. break;
  4980. case WMI_10_2_CHAN_INFO_EVENTID:
  4981. ath10k_wmi_event_chan_info(ar, skb);
  4982. break;
  4983. case WMI_10_2_ECHO_EVENTID:
  4984. ath10k_wmi_event_echo(ar, skb);
  4985. break;
  4986. case WMI_10_2_DEBUG_MESG_EVENTID:
  4987. ath10k_wmi_event_debug_mesg(ar, skb);
  4988. ath10k_wmi_queue_set_coverage_class_work(ar);
  4989. break;
  4990. case WMI_10_2_UPDATE_STATS_EVENTID:
  4991. ath10k_wmi_event_update_stats(ar, skb);
  4992. break;
  4993. case WMI_10_2_VDEV_START_RESP_EVENTID:
  4994. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4995. ath10k_wmi_queue_set_coverage_class_work(ar);
  4996. break;
  4997. case WMI_10_2_VDEV_STOPPED_EVENTID:
  4998. ath10k_wmi_event_vdev_stopped(ar, skb);
  4999. ath10k_wmi_queue_set_coverage_class_work(ar);
  5000. break;
  5001. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  5002. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5003. break;
  5004. case WMI_10_2_HOST_SWBA_EVENTID:
  5005. ath10k_wmi_event_host_swba(ar, skb);
  5006. break;
  5007. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  5008. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5009. break;
  5010. case WMI_10_2_PHYERR_EVENTID:
  5011. ath10k_wmi_event_phyerr(ar, skb);
  5012. break;
  5013. case WMI_10_2_ROAM_EVENTID:
  5014. ath10k_wmi_event_roam(ar, skb);
  5015. ath10k_wmi_queue_set_coverage_class_work(ar);
  5016. break;
  5017. case WMI_10_2_PROFILE_MATCH:
  5018. ath10k_wmi_event_profile_match(ar, skb);
  5019. break;
  5020. case WMI_10_2_DEBUG_PRINT_EVENTID:
  5021. ath10k_wmi_event_debug_print(ar, skb);
  5022. ath10k_wmi_queue_set_coverage_class_work(ar);
  5023. break;
  5024. case WMI_10_2_PDEV_QVIT_EVENTID:
  5025. ath10k_wmi_event_pdev_qvit(ar, skb);
  5026. break;
  5027. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  5028. ath10k_wmi_event_wlan_profile_data(ar, skb);
  5029. break;
  5030. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  5031. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  5032. break;
  5033. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  5034. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  5035. break;
  5036. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  5037. ath10k_wmi_event_rtt_error_report(ar, skb);
  5038. break;
  5039. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  5040. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  5041. break;
  5042. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  5043. ath10k_wmi_event_dcs_interference(ar, skb);
  5044. break;
  5045. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  5046. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5047. break;
  5048. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  5049. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  5050. break;
  5051. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  5052. ath10k_wmi_event_vdev_standby_req(ar, skb);
  5053. ath10k_wmi_queue_set_coverage_class_work(ar);
  5054. break;
  5055. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  5056. ath10k_wmi_event_vdev_resume_req(ar, skb);
  5057. ath10k_wmi_queue_set_coverage_class_work(ar);
  5058. break;
  5059. case WMI_10_2_SERVICE_READY_EVENTID:
  5060. ath10k_wmi_event_service_ready(ar, skb);
  5061. return;
  5062. case WMI_10_2_READY_EVENTID:
  5063. ath10k_wmi_event_ready(ar, skb);
  5064. ath10k_wmi_queue_set_coverage_class_work(ar);
  5065. break;
  5066. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  5067. ath10k_wmi_event_temperature(ar, skb);
  5068. break;
  5069. case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
  5070. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  5071. break;
  5072. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  5073. case WMI_10_2_GPIO_INPUT_EVENTID:
  5074. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  5075. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  5076. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  5077. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  5078. case WMI_10_2_WDS_PEER_EVENTID:
  5079. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5080. "received event id %d not implemented\n", id);
  5081. break;
  5082. default:
  5083. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5084. break;
  5085. }
  5086. out:
  5087. dev_kfree_skb(skb);
  5088. }
  5089. static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
  5090. {
  5091. struct wmi_cmd_hdr *cmd_hdr;
  5092. enum wmi_10_4_event_id id;
  5093. bool consumed;
  5094. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5095. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5096. if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
  5097. goto out;
  5098. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5099. consumed = ath10k_tm_event_wmi(ar, id, skb);
  5100. /* Ready event must be handled normally also in UTF mode so that we
  5101. * know the UTF firmware has booted, others we are just bypass WMI
  5102. * events to testmode.
  5103. */
  5104. if (consumed && id != WMI_10_4_READY_EVENTID) {
  5105. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5106. "wmi testmode consumed 0x%x\n", id);
  5107. goto out;
  5108. }
  5109. switch (id) {
  5110. case WMI_10_4_MGMT_RX_EVENTID:
  5111. ath10k_wmi_event_mgmt_rx(ar, skb);
  5112. /* mgmt_rx() owns the skb now! */
  5113. return;
  5114. case WMI_10_4_ECHO_EVENTID:
  5115. ath10k_wmi_event_echo(ar, skb);
  5116. break;
  5117. case WMI_10_4_DEBUG_MESG_EVENTID:
  5118. ath10k_wmi_event_debug_mesg(ar, skb);
  5119. ath10k_wmi_queue_set_coverage_class_work(ar);
  5120. break;
  5121. case WMI_10_4_SERVICE_READY_EVENTID:
  5122. ath10k_wmi_event_service_ready(ar, skb);
  5123. return;
  5124. case WMI_10_4_SCAN_EVENTID:
  5125. ath10k_wmi_event_scan(ar, skb);
  5126. ath10k_wmi_queue_set_coverage_class_work(ar);
  5127. break;
  5128. case WMI_10_4_CHAN_INFO_EVENTID:
  5129. ath10k_wmi_event_chan_info(ar, skb);
  5130. break;
  5131. case WMI_10_4_PHYERR_EVENTID:
  5132. ath10k_wmi_event_phyerr(ar, skb);
  5133. break;
  5134. case WMI_10_4_READY_EVENTID:
  5135. ath10k_wmi_event_ready(ar, skb);
  5136. ath10k_wmi_queue_set_coverage_class_work(ar);
  5137. break;
  5138. case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
  5139. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5140. break;
  5141. case WMI_10_4_ROAM_EVENTID:
  5142. ath10k_wmi_event_roam(ar, skb);
  5143. ath10k_wmi_queue_set_coverage_class_work(ar);
  5144. break;
  5145. case WMI_10_4_HOST_SWBA_EVENTID:
  5146. ath10k_wmi_event_host_swba(ar, skb);
  5147. break;
  5148. case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
  5149. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5150. break;
  5151. case WMI_10_4_DEBUG_PRINT_EVENTID:
  5152. ath10k_wmi_event_debug_print(ar, skb);
  5153. ath10k_wmi_queue_set_coverage_class_work(ar);
  5154. break;
  5155. case WMI_10_4_VDEV_START_RESP_EVENTID:
  5156. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5157. ath10k_wmi_queue_set_coverage_class_work(ar);
  5158. break;
  5159. case WMI_10_4_VDEV_STOPPED_EVENTID:
  5160. ath10k_wmi_event_vdev_stopped(ar, skb);
  5161. ath10k_wmi_queue_set_coverage_class_work(ar);
  5162. break;
  5163. case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
  5164. case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
  5165. case WMI_10_4_WDS_PEER_EVENTID:
  5166. case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID:
  5167. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5168. "received event id %d not implemented\n", id);
  5169. break;
  5170. case WMI_10_4_UPDATE_STATS_EVENTID:
  5171. ath10k_wmi_event_update_stats(ar, skb);
  5172. break;
  5173. case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
  5174. ath10k_wmi_event_temperature(ar, skb);
  5175. break;
  5176. case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
  5177. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  5178. break;
  5179. case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
  5180. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5181. break;
  5182. case WMI_10_4_TDLS_PEER_EVENTID:
  5183. ath10k_wmi_handle_tdls_peer_event(ar, skb);
  5184. break;
  5185. case WMI_10_4_PDEV_TPC_TABLE_EVENTID:
  5186. ath10k_wmi_event_tpc_final_table(ar, skb);
  5187. break;
  5188. default:
  5189. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5190. break;
  5191. }
  5192. out:
  5193. dev_kfree_skb(skb);
  5194. }
  5195. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  5196. {
  5197. int ret;
  5198. ret = ath10k_wmi_rx(ar, skb);
  5199. if (ret)
  5200. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  5201. }
  5202. int ath10k_wmi_connect(struct ath10k *ar)
  5203. {
  5204. int status;
  5205. struct ath10k_htc_svc_conn_req conn_req;
  5206. struct ath10k_htc_svc_conn_resp conn_resp;
  5207. memset(&conn_req, 0, sizeof(conn_req));
  5208. memset(&conn_resp, 0, sizeof(conn_resp));
  5209. /* these fields are the same for all service endpoints */
  5210. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  5211. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  5212. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  5213. /* connect to control service */
  5214. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  5215. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  5216. if (status) {
  5217. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  5218. status);
  5219. return status;
  5220. }
  5221. ar->wmi.eid = conn_resp.eid;
  5222. return 0;
  5223. }
  5224. static struct sk_buff *
  5225. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  5226. u16 ctl2g, u16 ctl5g,
  5227. enum wmi_dfs_region dfs_reg)
  5228. {
  5229. struct wmi_pdev_set_regdomain_cmd *cmd;
  5230. struct sk_buff *skb;
  5231. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5232. if (!skb)
  5233. return ERR_PTR(-ENOMEM);
  5234. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  5235. cmd->reg_domain = __cpu_to_le32(rd);
  5236. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  5237. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  5238. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  5239. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  5240. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5241. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  5242. rd, rd2g, rd5g, ctl2g, ctl5g);
  5243. return skb;
  5244. }
  5245. static struct sk_buff *
  5246. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  5247. rd5g, u16 ctl2g, u16 ctl5g,
  5248. enum wmi_dfs_region dfs_reg)
  5249. {
  5250. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  5251. struct sk_buff *skb;
  5252. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5253. if (!skb)
  5254. return ERR_PTR(-ENOMEM);
  5255. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  5256. cmd->reg_domain = __cpu_to_le32(rd);
  5257. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  5258. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  5259. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  5260. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  5261. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  5262. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5263. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  5264. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  5265. return skb;
  5266. }
  5267. static struct sk_buff *
  5268. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  5269. {
  5270. struct wmi_pdev_suspend_cmd *cmd;
  5271. struct sk_buff *skb;
  5272. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5273. if (!skb)
  5274. return ERR_PTR(-ENOMEM);
  5275. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  5276. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  5277. return skb;
  5278. }
  5279. static struct sk_buff *
  5280. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  5281. {
  5282. struct sk_buff *skb;
  5283. skb = ath10k_wmi_alloc_skb(ar, 0);
  5284. if (!skb)
  5285. return ERR_PTR(-ENOMEM);
  5286. return skb;
  5287. }
  5288. static struct sk_buff *
  5289. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  5290. {
  5291. struct wmi_pdev_set_param_cmd *cmd;
  5292. struct sk_buff *skb;
  5293. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  5294. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  5295. id);
  5296. return ERR_PTR(-EOPNOTSUPP);
  5297. }
  5298. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5299. if (!skb)
  5300. return ERR_PTR(-ENOMEM);
  5301. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  5302. cmd->param_id = __cpu_to_le32(id);
  5303. cmd->param_value = __cpu_to_le32(value);
  5304. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  5305. id, value);
  5306. return skb;
  5307. }
  5308. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  5309. struct wmi_host_mem_chunks *chunks)
  5310. {
  5311. struct host_memory_chunk *chunk;
  5312. int i;
  5313. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  5314. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  5315. chunk = &chunks->items[i];
  5316. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  5317. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  5318. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  5319. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5320. "wmi chunk %d len %d requested, addr 0x%llx\n",
  5321. i,
  5322. ar->wmi.mem_chunks[i].len,
  5323. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  5324. }
  5325. }
  5326. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  5327. {
  5328. struct wmi_init_cmd *cmd;
  5329. struct sk_buff *buf;
  5330. struct wmi_resource_config config = {};
  5331. u32 len, val;
  5332. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  5333. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  5334. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  5335. config.num_offload_reorder_bufs =
  5336. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  5337. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  5338. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  5339. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  5340. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  5341. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  5342. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5343. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5344. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5345. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  5346. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5347. config.scan_max_pending_reqs =
  5348. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  5349. config.bmiss_offload_max_vdev =
  5350. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  5351. config.roam_offload_max_vdev =
  5352. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  5353. config.roam_offload_max_ap_profiles =
  5354. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5355. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  5356. config.num_mcast_table_elems =
  5357. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  5358. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  5359. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  5360. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  5361. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  5362. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  5363. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5364. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5365. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  5366. config.gtk_offload_max_vdev =
  5367. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  5368. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  5369. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  5370. len = sizeof(*cmd) +
  5371. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5372. buf = ath10k_wmi_alloc_skb(ar, len);
  5373. if (!buf)
  5374. return ERR_PTR(-ENOMEM);
  5375. cmd = (struct wmi_init_cmd *)buf->data;
  5376. memcpy(&cmd->resource_config, &config, sizeof(config));
  5377. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5378. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  5379. return buf;
  5380. }
  5381. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  5382. {
  5383. struct wmi_init_cmd_10x *cmd;
  5384. struct sk_buff *buf;
  5385. struct wmi_resource_config_10x config = {};
  5386. u32 len, val;
  5387. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5388. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5389. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5390. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5391. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5392. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5393. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5394. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5395. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5396. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5397. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5398. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5399. config.scan_max_pending_reqs =
  5400. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5401. config.bmiss_offload_max_vdev =
  5402. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5403. config.roam_offload_max_vdev =
  5404. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5405. config.roam_offload_max_ap_profiles =
  5406. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5407. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5408. config.num_mcast_table_elems =
  5409. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5410. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5411. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5412. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5413. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  5414. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5415. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5416. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5417. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5418. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5419. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5420. len = sizeof(*cmd) +
  5421. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5422. buf = ath10k_wmi_alloc_skb(ar, len);
  5423. if (!buf)
  5424. return ERR_PTR(-ENOMEM);
  5425. cmd = (struct wmi_init_cmd_10x *)buf->data;
  5426. memcpy(&cmd->resource_config, &config, sizeof(config));
  5427. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5428. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  5429. return buf;
  5430. }
  5431. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  5432. {
  5433. struct wmi_init_cmd_10_2 *cmd;
  5434. struct sk_buff *buf;
  5435. struct wmi_resource_config_10x config = {};
  5436. u32 len, val, features;
  5437. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5438. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5439. if (ath10k_peer_stats_enabled(ar)) {
  5440. config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
  5441. config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
  5442. } else {
  5443. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5444. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5445. }
  5446. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5447. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5448. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5449. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5450. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5451. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5452. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5453. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5454. config.scan_max_pending_reqs =
  5455. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5456. config.bmiss_offload_max_vdev =
  5457. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5458. config.roam_offload_max_vdev =
  5459. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5460. config.roam_offload_max_ap_profiles =
  5461. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5462. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5463. config.num_mcast_table_elems =
  5464. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5465. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5466. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5467. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5468. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  5469. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5470. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5471. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5472. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5473. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5474. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5475. len = sizeof(*cmd) +
  5476. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5477. buf = ath10k_wmi_alloc_skb(ar, len);
  5478. if (!buf)
  5479. return ERR_PTR(-ENOMEM);
  5480. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  5481. features = WMI_10_2_RX_BATCH_MODE;
  5482. if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
  5483. test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
  5484. features |= WMI_10_2_COEX_GPIO;
  5485. if (ath10k_peer_stats_enabled(ar))
  5486. features |= WMI_10_2_PEER_STATS;
  5487. if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
  5488. features |= WMI_10_2_BSS_CHAN_INFO;
  5489. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  5490. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  5491. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5492. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  5493. return buf;
  5494. }
  5495. static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
  5496. {
  5497. struct wmi_init_cmd_10_4 *cmd;
  5498. struct sk_buff *buf;
  5499. struct wmi_resource_config_10_4 config = {};
  5500. u32 len;
  5501. config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
  5502. config.num_peers = __cpu_to_le32(ar->max_num_peers);
  5503. config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
  5504. config.num_tids = __cpu_to_le32(ar->num_tids);
  5505. config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
  5506. config.num_offload_reorder_buffs =
  5507. __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
  5508. config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
  5509. config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
  5510. config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
  5511. config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
  5512. config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5513. config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5514. config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5515. config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
  5516. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5517. config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
  5518. config.bmiss_offload_max_vdev =
  5519. __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
  5520. config.roam_offload_max_vdev =
  5521. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
  5522. config.roam_offload_max_ap_profiles =
  5523. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
  5524. config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
  5525. config.num_mcast_table_elems =
  5526. __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
  5527. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
  5528. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
  5529. config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
  5530. config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
  5531. config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
  5532. config.rx_skip_defrag_timeout_dup_detection_check =
  5533. __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
  5534. config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
  5535. config.gtk_offload_max_vdev =
  5536. __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
  5537. config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
  5538. config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
  5539. config.max_peer_ext_stats =
  5540. __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
  5541. config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
  5542. config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
  5543. config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
  5544. config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
  5545. config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
  5546. config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
  5547. config.tt_support =
  5548. __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
  5549. config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
  5550. config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
  5551. config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
  5552. len = sizeof(*cmd) +
  5553. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5554. buf = ath10k_wmi_alloc_skb(ar, len);
  5555. if (!buf)
  5556. return ERR_PTR(-ENOMEM);
  5557. cmd = (struct wmi_init_cmd_10_4 *)buf->data;
  5558. memcpy(&cmd->resource_config, &config, sizeof(config));
  5559. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5560. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
  5561. return buf;
  5562. }
  5563. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  5564. {
  5565. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  5566. return -EINVAL;
  5567. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  5568. return -EINVAL;
  5569. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  5570. return -EINVAL;
  5571. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  5572. return -EINVAL;
  5573. return 0;
  5574. }
  5575. static size_t
  5576. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  5577. {
  5578. int len = 0;
  5579. if (arg->ie_len) {
  5580. len += sizeof(struct wmi_ie_data);
  5581. len += roundup(arg->ie_len, 4);
  5582. }
  5583. if (arg->n_channels) {
  5584. len += sizeof(struct wmi_chan_list);
  5585. len += sizeof(__le32) * arg->n_channels;
  5586. }
  5587. if (arg->n_ssids) {
  5588. len += sizeof(struct wmi_ssid_list);
  5589. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  5590. }
  5591. if (arg->n_bssids) {
  5592. len += sizeof(struct wmi_bssid_list);
  5593. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5594. }
  5595. return len;
  5596. }
  5597. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  5598. const struct wmi_start_scan_arg *arg)
  5599. {
  5600. u32 scan_id;
  5601. u32 scan_req_id;
  5602. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  5603. scan_id |= arg->scan_id;
  5604. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5605. scan_req_id |= arg->scan_req_id;
  5606. cmn->scan_id = __cpu_to_le32(scan_id);
  5607. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  5608. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  5609. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  5610. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  5611. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  5612. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  5613. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  5614. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  5615. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  5616. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  5617. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  5618. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  5619. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  5620. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  5621. }
  5622. static void
  5623. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  5624. const struct wmi_start_scan_arg *arg)
  5625. {
  5626. struct wmi_ie_data *ie;
  5627. struct wmi_chan_list *channels;
  5628. struct wmi_ssid_list *ssids;
  5629. struct wmi_bssid_list *bssids;
  5630. void *ptr = tlvs->tlvs;
  5631. int i;
  5632. if (arg->n_channels) {
  5633. channels = ptr;
  5634. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  5635. channels->num_chan = __cpu_to_le32(arg->n_channels);
  5636. for (i = 0; i < arg->n_channels; i++)
  5637. channels->channel_list[i].freq =
  5638. __cpu_to_le16(arg->channels[i]);
  5639. ptr += sizeof(*channels);
  5640. ptr += sizeof(__le32) * arg->n_channels;
  5641. }
  5642. if (arg->n_ssids) {
  5643. ssids = ptr;
  5644. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  5645. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  5646. for (i = 0; i < arg->n_ssids; i++) {
  5647. ssids->ssids[i].ssid_len =
  5648. __cpu_to_le32(arg->ssids[i].len);
  5649. memcpy(&ssids->ssids[i].ssid,
  5650. arg->ssids[i].ssid,
  5651. arg->ssids[i].len);
  5652. }
  5653. ptr += sizeof(*ssids);
  5654. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  5655. }
  5656. if (arg->n_bssids) {
  5657. bssids = ptr;
  5658. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  5659. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  5660. for (i = 0; i < arg->n_bssids; i++)
  5661. ether_addr_copy(bssids->bssid_list[i].addr,
  5662. arg->bssids[i].bssid);
  5663. ptr += sizeof(*bssids);
  5664. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5665. }
  5666. if (arg->ie_len) {
  5667. ie = ptr;
  5668. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  5669. ie->ie_len = __cpu_to_le32(arg->ie_len);
  5670. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  5671. ptr += sizeof(*ie);
  5672. ptr += roundup(arg->ie_len, 4);
  5673. }
  5674. }
  5675. static struct sk_buff *
  5676. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  5677. const struct wmi_start_scan_arg *arg)
  5678. {
  5679. struct wmi_start_scan_cmd *cmd;
  5680. struct sk_buff *skb;
  5681. size_t len;
  5682. int ret;
  5683. ret = ath10k_wmi_start_scan_verify(arg);
  5684. if (ret)
  5685. return ERR_PTR(ret);
  5686. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5687. skb = ath10k_wmi_alloc_skb(ar, len);
  5688. if (!skb)
  5689. return ERR_PTR(-ENOMEM);
  5690. cmd = (struct wmi_start_scan_cmd *)skb->data;
  5691. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5692. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5693. cmd->burst_duration_ms = __cpu_to_le32(0);
  5694. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  5695. return skb;
  5696. }
  5697. static struct sk_buff *
  5698. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  5699. const struct wmi_start_scan_arg *arg)
  5700. {
  5701. struct wmi_10x_start_scan_cmd *cmd;
  5702. struct sk_buff *skb;
  5703. size_t len;
  5704. int ret;
  5705. ret = ath10k_wmi_start_scan_verify(arg);
  5706. if (ret)
  5707. return ERR_PTR(ret);
  5708. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5709. skb = ath10k_wmi_alloc_skb(ar, len);
  5710. if (!skb)
  5711. return ERR_PTR(-ENOMEM);
  5712. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  5713. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5714. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5715. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  5716. return skb;
  5717. }
  5718. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  5719. struct wmi_start_scan_arg *arg)
  5720. {
  5721. /* setup commonly used values */
  5722. arg->scan_req_id = 1;
  5723. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  5724. arg->dwell_time_active = 50;
  5725. arg->dwell_time_passive = 150;
  5726. arg->min_rest_time = 50;
  5727. arg->max_rest_time = 500;
  5728. arg->repeat_probe_time = 0;
  5729. arg->probe_spacing_time = 0;
  5730. arg->idle_time = 0;
  5731. arg->max_scan_time = 20000;
  5732. arg->probe_delay = 5;
  5733. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  5734. | WMI_SCAN_EVENT_COMPLETED
  5735. | WMI_SCAN_EVENT_BSS_CHANNEL
  5736. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  5737. | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
  5738. | WMI_SCAN_EVENT_DEQUEUED;
  5739. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  5740. arg->n_bssids = 1;
  5741. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  5742. }
  5743. static struct sk_buff *
  5744. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  5745. const struct wmi_stop_scan_arg *arg)
  5746. {
  5747. struct wmi_stop_scan_cmd *cmd;
  5748. struct sk_buff *skb;
  5749. u32 scan_id;
  5750. u32 req_id;
  5751. if (arg->req_id > 0xFFF)
  5752. return ERR_PTR(-EINVAL);
  5753. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  5754. return ERR_PTR(-EINVAL);
  5755. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5756. if (!skb)
  5757. return ERR_PTR(-ENOMEM);
  5758. scan_id = arg->u.scan_id;
  5759. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  5760. req_id = arg->req_id;
  5761. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5762. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  5763. cmd->req_type = __cpu_to_le32(arg->req_type);
  5764. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  5765. cmd->scan_id = __cpu_to_le32(scan_id);
  5766. cmd->scan_req_id = __cpu_to_le32(req_id);
  5767. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5768. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  5769. arg->req_id, arg->req_type, arg->u.scan_id);
  5770. return skb;
  5771. }
  5772. static struct sk_buff *
  5773. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  5774. enum wmi_vdev_type type,
  5775. enum wmi_vdev_subtype subtype,
  5776. const u8 macaddr[ETH_ALEN])
  5777. {
  5778. struct wmi_vdev_create_cmd *cmd;
  5779. struct sk_buff *skb;
  5780. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5781. if (!skb)
  5782. return ERR_PTR(-ENOMEM);
  5783. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  5784. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5785. cmd->vdev_type = __cpu_to_le32(type);
  5786. cmd->vdev_subtype = __cpu_to_le32(subtype);
  5787. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  5788. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5789. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  5790. vdev_id, type, subtype, macaddr);
  5791. return skb;
  5792. }
  5793. static struct sk_buff *
  5794. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  5795. {
  5796. struct wmi_vdev_delete_cmd *cmd;
  5797. struct sk_buff *skb;
  5798. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5799. if (!skb)
  5800. return ERR_PTR(-ENOMEM);
  5801. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  5802. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5803. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5804. "WMI vdev delete id %d\n", vdev_id);
  5805. return skb;
  5806. }
  5807. static struct sk_buff *
  5808. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  5809. const struct wmi_vdev_start_request_arg *arg,
  5810. bool restart)
  5811. {
  5812. struct wmi_vdev_start_request_cmd *cmd;
  5813. struct sk_buff *skb;
  5814. const char *cmdname;
  5815. u32 flags = 0;
  5816. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  5817. return ERR_PTR(-EINVAL);
  5818. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  5819. return ERR_PTR(-EINVAL);
  5820. if (restart)
  5821. cmdname = "restart";
  5822. else
  5823. cmdname = "start";
  5824. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5825. if (!skb)
  5826. return ERR_PTR(-ENOMEM);
  5827. if (arg->hidden_ssid)
  5828. flags |= WMI_VDEV_START_HIDDEN_SSID;
  5829. if (arg->pmf_enabled)
  5830. flags |= WMI_VDEV_START_PMF_ENABLED;
  5831. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  5832. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5833. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  5834. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  5835. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  5836. cmd->flags = __cpu_to_le32(flags);
  5837. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  5838. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  5839. if (arg->ssid) {
  5840. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  5841. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  5842. }
  5843. ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
  5844. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5845. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  5846. cmdname, arg->vdev_id,
  5847. flags, arg->channel.freq, arg->channel.mode,
  5848. cmd->chan.flags, arg->channel.max_power);
  5849. return skb;
  5850. }
  5851. static struct sk_buff *
  5852. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  5853. {
  5854. struct wmi_vdev_stop_cmd *cmd;
  5855. struct sk_buff *skb;
  5856. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5857. if (!skb)
  5858. return ERR_PTR(-ENOMEM);
  5859. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  5860. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5861. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  5862. return skb;
  5863. }
  5864. static struct sk_buff *
  5865. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  5866. const u8 *bssid)
  5867. {
  5868. struct wmi_vdev_up_cmd *cmd;
  5869. struct sk_buff *skb;
  5870. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5871. if (!skb)
  5872. return ERR_PTR(-ENOMEM);
  5873. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  5874. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5875. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  5876. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  5877. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5878. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  5879. vdev_id, aid, bssid);
  5880. return skb;
  5881. }
  5882. static struct sk_buff *
  5883. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  5884. {
  5885. struct wmi_vdev_down_cmd *cmd;
  5886. struct sk_buff *skb;
  5887. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5888. if (!skb)
  5889. return ERR_PTR(-ENOMEM);
  5890. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  5891. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5892. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5893. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  5894. return skb;
  5895. }
  5896. static struct sk_buff *
  5897. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  5898. u32 param_id, u32 param_value)
  5899. {
  5900. struct wmi_vdev_set_param_cmd *cmd;
  5901. struct sk_buff *skb;
  5902. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  5903. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5904. "vdev param %d not supported by firmware\n",
  5905. param_id);
  5906. return ERR_PTR(-EOPNOTSUPP);
  5907. }
  5908. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5909. if (!skb)
  5910. return ERR_PTR(-ENOMEM);
  5911. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  5912. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5913. cmd->param_id = __cpu_to_le32(param_id);
  5914. cmd->param_value = __cpu_to_le32(param_value);
  5915. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5916. "wmi vdev id 0x%x set param %d value %d\n",
  5917. vdev_id, param_id, param_value);
  5918. return skb;
  5919. }
  5920. static struct sk_buff *
  5921. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  5922. const struct wmi_vdev_install_key_arg *arg)
  5923. {
  5924. struct wmi_vdev_install_key_cmd *cmd;
  5925. struct sk_buff *skb;
  5926. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  5927. return ERR_PTR(-EINVAL);
  5928. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  5929. return ERR_PTR(-EINVAL);
  5930. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  5931. if (!skb)
  5932. return ERR_PTR(-ENOMEM);
  5933. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  5934. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5935. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  5936. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  5937. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  5938. cmd->key_len = __cpu_to_le32(arg->key_len);
  5939. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  5940. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  5941. if (arg->macaddr)
  5942. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  5943. if (arg->key_data)
  5944. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  5945. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5946. "wmi vdev install key idx %d cipher %d len %d\n",
  5947. arg->key_idx, arg->key_cipher, arg->key_len);
  5948. return skb;
  5949. }
  5950. static struct sk_buff *
  5951. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  5952. const struct wmi_vdev_spectral_conf_arg *arg)
  5953. {
  5954. struct wmi_vdev_spectral_conf_cmd *cmd;
  5955. struct sk_buff *skb;
  5956. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5957. if (!skb)
  5958. return ERR_PTR(-ENOMEM);
  5959. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  5960. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5961. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  5962. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  5963. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  5964. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  5965. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  5966. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  5967. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  5968. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  5969. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  5970. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  5971. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  5972. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  5973. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  5974. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  5975. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  5976. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  5977. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  5978. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  5979. return skb;
  5980. }
  5981. static struct sk_buff *
  5982. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  5983. u32 trigger, u32 enable)
  5984. {
  5985. struct wmi_vdev_spectral_enable_cmd *cmd;
  5986. struct sk_buff *skb;
  5987. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5988. if (!skb)
  5989. return ERR_PTR(-ENOMEM);
  5990. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  5991. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5992. cmd->trigger_cmd = __cpu_to_le32(trigger);
  5993. cmd->enable_cmd = __cpu_to_le32(enable);
  5994. return skb;
  5995. }
  5996. static struct sk_buff *
  5997. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  5998. const u8 peer_addr[ETH_ALEN],
  5999. enum wmi_peer_type peer_type)
  6000. {
  6001. struct wmi_peer_create_cmd *cmd;
  6002. struct sk_buff *skb;
  6003. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6004. if (!skb)
  6005. return ERR_PTR(-ENOMEM);
  6006. cmd = (struct wmi_peer_create_cmd *)skb->data;
  6007. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6008. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6009. cmd->peer_type = __cpu_to_le32(peer_type);
  6010. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6011. "wmi peer create vdev_id %d peer_addr %pM\n",
  6012. vdev_id, peer_addr);
  6013. return skb;
  6014. }
  6015. static struct sk_buff *
  6016. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  6017. const u8 peer_addr[ETH_ALEN])
  6018. {
  6019. struct wmi_peer_delete_cmd *cmd;
  6020. struct sk_buff *skb;
  6021. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6022. if (!skb)
  6023. return ERR_PTR(-ENOMEM);
  6024. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  6025. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6026. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6027. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6028. "wmi peer delete vdev_id %d peer_addr %pM\n",
  6029. vdev_id, peer_addr);
  6030. return skb;
  6031. }
  6032. static struct sk_buff *
  6033. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  6034. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  6035. {
  6036. struct wmi_peer_flush_tids_cmd *cmd;
  6037. struct sk_buff *skb;
  6038. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6039. if (!skb)
  6040. return ERR_PTR(-ENOMEM);
  6041. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  6042. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6043. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  6044. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6045. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6046. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  6047. vdev_id, peer_addr, tid_bitmap);
  6048. return skb;
  6049. }
  6050. static struct sk_buff *
  6051. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  6052. const u8 *peer_addr,
  6053. enum wmi_peer_param param_id,
  6054. u32 param_value)
  6055. {
  6056. struct wmi_peer_set_param_cmd *cmd;
  6057. struct sk_buff *skb;
  6058. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6059. if (!skb)
  6060. return ERR_PTR(-ENOMEM);
  6061. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  6062. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6063. cmd->param_id = __cpu_to_le32(param_id);
  6064. cmd->param_value = __cpu_to_le32(param_value);
  6065. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6066. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6067. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  6068. vdev_id, peer_addr, param_id, param_value);
  6069. return skb;
  6070. }
  6071. static struct sk_buff *
  6072. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  6073. enum wmi_sta_ps_mode psmode)
  6074. {
  6075. struct wmi_sta_powersave_mode_cmd *cmd;
  6076. struct sk_buff *skb;
  6077. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6078. if (!skb)
  6079. return ERR_PTR(-ENOMEM);
  6080. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  6081. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6082. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  6083. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6084. "wmi set powersave id 0x%x mode %d\n",
  6085. vdev_id, psmode);
  6086. return skb;
  6087. }
  6088. static struct sk_buff *
  6089. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  6090. enum wmi_sta_powersave_param param_id,
  6091. u32 value)
  6092. {
  6093. struct wmi_sta_powersave_param_cmd *cmd;
  6094. struct sk_buff *skb;
  6095. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6096. if (!skb)
  6097. return ERR_PTR(-ENOMEM);
  6098. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  6099. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6100. cmd->param_id = __cpu_to_le32(param_id);
  6101. cmd->param_value = __cpu_to_le32(value);
  6102. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6103. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  6104. vdev_id, param_id, value);
  6105. return skb;
  6106. }
  6107. static struct sk_buff *
  6108. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6109. enum wmi_ap_ps_peer_param param_id, u32 value)
  6110. {
  6111. struct wmi_ap_ps_peer_cmd *cmd;
  6112. struct sk_buff *skb;
  6113. if (!mac)
  6114. return ERR_PTR(-EINVAL);
  6115. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6116. if (!skb)
  6117. return ERR_PTR(-ENOMEM);
  6118. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  6119. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6120. cmd->param_id = __cpu_to_le32(param_id);
  6121. cmd->param_value = __cpu_to_le32(value);
  6122. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6123. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6124. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  6125. vdev_id, param_id, value, mac);
  6126. return skb;
  6127. }
  6128. static struct sk_buff *
  6129. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  6130. const struct wmi_scan_chan_list_arg *arg)
  6131. {
  6132. struct wmi_scan_chan_list_cmd *cmd;
  6133. struct sk_buff *skb;
  6134. struct wmi_channel_arg *ch;
  6135. struct wmi_channel *ci;
  6136. int len;
  6137. int i;
  6138. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  6139. skb = ath10k_wmi_alloc_skb(ar, len);
  6140. if (!skb)
  6141. return ERR_PTR(-EINVAL);
  6142. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  6143. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  6144. for (i = 0; i < arg->n_channels; i++) {
  6145. ch = &arg->channels[i];
  6146. ci = &cmd->chan_info[i];
  6147. ath10k_wmi_put_wmi_channel(ci, ch);
  6148. }
  6149. return skb;
  6150. }
  6151. static void
  6152. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  6153. const struct wmi_peer_assoc_complete_arg *arg)
  6154. {
  6155. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  6156. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6157. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  6158. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  6159. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  6160. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  6161. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  6162. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  6163. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  6164. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  6165. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  6166. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  6167. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  6168. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  6169. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  6170. cmd->peer_legacy_rates.num_rates =
  6171. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  6172. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  6173. arg->peer_legacy_rates.num_rates);
  6174. cmd->peer_ht_rates.num_rates =
  6175. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  6176. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  6177. arg->peer_ht_rates.num_rates);
  6178. cmd->peer_vht_rates.rx_max_rate =
  6179. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  6180. cmd->peer_vht_rates.rx_mcs_set =
  6181. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  6182. cmd->peer_vht_rates.tx_max_rate =
  6183. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  6184. cmd->peer_vht_rates.tx_mcs_set =
  6185. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  6186. }
  6187. static void
  6188. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  6189. const struct wmi_peer_assoc_complete_arg *arg)
  6190. {
  6191. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  6192. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6193. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  6194. }
  6195. static void
  6196. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  6197. const struct wmi_peer_assoc_complete_arg *arg)
  6198. {
  6199. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6200. }
  6201. static void
  6202. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  6203. const struct wmi_peer_assoc_complete_arg *arg)
  6204. {
  6205. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  6206. int max_mcs, max_nss;
  6207. u32 info0;
  6208. /* TODO: Is using max values okay with firmware? */
  6209. max_mcs = 0xf;
  6210. max_nss = 0xf;
  6211. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  6212. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  6213. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6214. cmd->info0 = __cpu_to_le32(info0);
  6215. }
  6216. static void
  6217. ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
  6218. const struct wmi_peer_assoc_complete_arg *arg)
  6219. {
  6220. struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
  6221. ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
  6222. if (arg->peer_bw_rxnss_override)
  6223. cmd->peer_bw_rxnss_override =
  6224. __cpu_to_le32((arg->peer_bw_rxnss_override - 1) |
  6225. BIT(PEER_BW_RXNSS_OVERRIDE_OFFSET));
  6226. else
  6227. cmd->peer_bw_rxnss_override = 0;
  6228. }
  6229. static int
  6230. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  6231. {
  6232. if (arg->peer_mpdu_density > 16)
  6233. return -EINVAL;
  6234. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  6235. return -EINVAL;
  6236. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  6237. return -EINVAL;
  6238. return 0;
  6239. }
  6240. static struct sk_buff *
  6241. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  6242. const struct wmi_peer_assoc_complete_arg *arg)
  6243. {
  6244. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  6245. struct sk_buff *skb;
  6246. int ret;
  6247. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6248. if (ret)
  6249. return ERR_PTR(ret);
  6250. skb = ath10k_wmi_alloc_skb(ar, len);
  6251. if (!skb)
  6252. return ERR_PTR(-ENOMEM);
  6253. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  6254. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6255. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6256. arg->vdev_id, arg->addr,
  6257. arg->peer_reassoc ? "reassociate" : "new");
  6258. return skb;
  6259. }
  6260. static struct sk_buff *
  6261. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  6262. const struct wmi_peer_assoc_complete_arg *arg)
  6263. {
  6264. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  6265. struct sk_buff *skb;
  6266. int ret;
  6267. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6268. if (ret)
  6269. return ERR_PTR(ret);
  6270. skb = ath10k_wmi_alloc_skb(ar, len);
  6271. if (!skb)
  6272. return ERR_PTR(-ENOMEM);
  6273. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  6274. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6275. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6276. arg->vdev_id, arg->addr,
  6277. arg->peer_reassoc ? "reassociate" : "new");
  6278. return skb;
  6279. }
  6280. static struct sk_buff *
  6281. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  6282. const struct wmi_peer_assoc_complete_arg *arg)
  6283. {
  6284. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  6285. struct sk_buff *skb;
  6286. int ret;
  6287. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6288. if (ret)
  6289. return ERR_PTR(ret);
  6290. skb = ath10k_wmi_alloc_skb(ar, len);
  6291. if (!skb)
  6292. return ERR_PTR(-ENOMEM);
  6293. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  6294. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6295. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6296. arg->vdev_id, arg->addr,
  6297. arg->peer_reassoc ? "reassociate" : "new");
  6298. return skb;
  6299. }
  6300. static struct sk_buff *
  6301. ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
  6302. const struct wmi_peer_assoc_complete_arg *arg)
  6303. {
  6304. size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
  6305. struct sk_buff *skb;
  6306. int ret;
  6307. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6308. if (ret)
  6309. return ERR_PTR(ret);
  6310. skb = ath10k_wmi_alloc_skb(ar, len);
  6311. if (!skb)
  6312. return ERR_PTR(-ENOMEM);
  6313. ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
  6314. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6315. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6316. arg->vdev_id, arg->addr,
  6317. arg->peer_reassoc ? "reassociate" : "new");
  6318. return skb;
  6319. }
  6320. static struct sk_buff *
  6321. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  6322. {
  6323. struct sk_buff *skb;
  6324. skb = ath10k_wmi_alloc_skb(ar, 0);
  6325. if (!skb)
  6326. return ERR_PTR(-ENOMEM);
  6327. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  6328. return skb;
  6329. }
  6330. static struct sk_buff *
  6331. ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
  6332. enum wmi_bss_survey_req_type type)
  6333. {
  6334. struct wmi_pdev_chan_info_req_cmd *cmd;
  6335. struct sk_buff *skb;
  6336. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6337. if (!skb)
  6338. return ERR_PTR(-ENOMEM);
  6339. cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
  6340. cmd->type = __cpu_to_le32(type);
  6341. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6342. "wmi pdev bss info request type %d\n", type);
  6343. return skb;
  6344. }
  6345. /* This function assumes the beacon is already DMA mapped */
  6346. static struct sk_buff *
  6347. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  6348. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  6349. bool deliver_cab)
  6350. {
  6351. struct wmi_bcn_tx_ref_cmd *cmd;
  6352. struct sk_buff *skb;
  6353. struct ieee80211_hdr *hdr;
  6354. u16 fc;
  6355. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6356. if (!skb)
  6357. return ERR_PTR(-ENOMEM);
  6358. hdr = (struct ieee80211_hdr *)bcn;
  6359. fc = le16_to_cpu(hdr->frame_control);
  6360. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  6361. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6362. cmd->data_len = __cpu_to_le32(bcn_len);
  6363. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  6364. cmd->msdu_id = 0;
  6365. cmd->frame_control = __cpu_to_le32(fc);
  6366. cmd->flags = 0;
  6367. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  6368. if (dtim_zero)
  6369. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  6370. if (deliver_cab)
  6371. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  6372. return skb;
  6373. }
  6374. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  6375. const struct wmi_wmm_params_arg *arg)
  6376. {
  6377. params->cwmin = __cpu_to_le32(arg->cwmin);
  6378. params->cwmax = __cpu_to_le32(arg->cwmax);
  6379. params->aifs = __cpu_to_le32(arg->aifs);
  6380. params->txop = __cpu_to_le32(arg->txop);
  6381. params->acm = __cpu_to_le32(arg->acm);
  6382. params->no_ack = __cpu_to_le32(arg->no_ack);
  6383. }
  6384. static struct sk_buff *
  6385. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  6386. const struct wmi_wmm_params_all_arg *arg)
  6387. {
  6388. struct wmi_pdev_set_wmm_params *cmd;
  6389. struct sk_buff *skb;
  6390. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6391. if (!skb)
  6392. return ERR_PTR(-ENOMEM);
  6393. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  6394. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  6395. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  6396. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  6397. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  6398. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  6399. return skb;
  6400. }
  6401. static struct sk_buff *
  6402. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
  6403. {
  6404. struct wmi_request_stats_cmd *cmd;
  6405. struct sk_buff *skb;
  6406. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6407. if (!skb)
  6408. return ERR_PTR(-ENOMEM);
  6409. cmd = (struct wmi_request_stats_cmd *)skb->data;
  6410. cmd->stats_id = __cpu_to_le32(stats_mask);
  6411. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
  6412. stats_mask);
  6413. return skb;
  6414. }
  6415. static struct sk_buff *
  6416. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  6417. enum wmi_force_fw_hang_type type, u32 delay_ms)
  6418. {
  6419. struct wmi_force_fw_hang_cmd *cmd;
  6420. struct sk_buff *skb;
  6421. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6422. if (!skb)
  6423. return ERR_PTR(-ENOMEM);
  6424. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  6425. cmd->type = __cpu_to_le32(type);
  6426. cmd->delay_ms = __cpu_to_le32(delay_ms);
  6427. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  6428. type, delay_ms);
  6429. return skb;
  6430. }
  6431. static struct sk_buff *
  6432. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6433. u32 log_level)
  6434. {
  6435. struct wmi_dbglog_cfg_cmd *cmd;
  6436. struct sk_buff *skb;
  6437. u32 cfg;
  6438. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6439. if (!skb)
  6440. return ERR_PTR(-ENOMEM);
  6441. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  6442. if (module_enable) {
  6443. cfg = SM(log_level,
  6444. ATH10K_DBGLOG_CFG_LOG_LVL);
  6445. } else {
  6446. /* set back defaults, all modules with WARN level */
  6447. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6448. ATH10K_DBGLOG_CFG_LOG_LVL);
  6449. module_enable = ~0;
  6450. }
  6451. cmd->module_enable = __cpu_to_le32(module_enable);
  6452. cmd->module_valid = __cpu_to_le32(~0);
  6453. cmd->config_enable = __cpu_to_le32(cfg);
  6454. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6455. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6456. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  6457. __le32_to_cpu(cmd->module_enable),
  6458. __le32_to_cpu(cmd->module_valid),
  6459. __le32_to_cpu(cmd->config_enable),
  6460. __le32_to_cpu(cmd->config_valid));
  6461. return skb;
  6462. }
  6463. static struct sk_buff *
  6464. ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6465. u32 log_level)
  6466. {
  6467. struct wmi_10_4_dbglog_cfg_cmd *cmd;
  6468. struct sk_buff *skb;
  6469. u32 cfg;
  6470. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6471. if (!skb)
  6472. return ERR_PTR(-ENOMEM);
  6473. cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
  6474. if (module_enable) {
  6475. cfg = SM(log_level,
  6476. ATH10K_DBGLOG_CFG_LOG_LVL);
  6477. } else {
  6478. /* set back defaults, all modules with WARN level */
  6479. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6480. ATH10K_DBGLOG_CFG_LOG_LVL);
  6481. module_enable = ~0;
  6482. }
  6483. cmd->module_enable = __cpu_to_le64(module_enable);
  6484. cmd->module_valid = __cpu_to_le64(~0);
  6485. cmd->config_enable = __cpu_to_le32(cfg);
  6486. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6487. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6488. "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
  6489. __le64_to_cpu(cmd->module_enable),
  6490. __le64_to_cpu(cmd->module_valid),
  6491. __le32_to_cpu(cmd->config_enable),
  6492. __le32_to_cpu(cmd->config_valid));
  6493. return skb;
  6494. }
  6495. static struct sk_buff *
  6496. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  6497. {
  6498. struct wmi_pdev_pktlog_enable_cmd *cmd;
  6499. struct sk_buff *skb;
  6500. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6501. if (!skb)
  6502. return ERR_PTR(-ENOMEM);
  6503. ev_bitmap &= ATH10K_PKTLOG_ANY;
  6504. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  6505. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  6506. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  6507. ev_bitmap);
  6508. return skb;
  6509. }
  6510. static struct sk_buff *
  6511. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  6512. {
  6513. struct sk_buff *skb;
  6514. skb = ath10k_wmi_alloc_skb(ar, 0);
  6515. if (!skb)
  6516. return ERR_PTR(-ENOMEM);
  6517. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  6518. return skb;
  6519. }
  6520. static struct sk_buff *
  6521. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  6522. u32 duration, u32 next_offset,
  6523. u32 enabled)
  6524. {
  6525. struct wmi_pdev_set_quiet_cmd *cmd;
  6526. struct sk_buff *skb;
  6527. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6528. if (!skb)
  6529. return ERR_PTR(-ENOMEM);
  6530. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  6531. cmd->period = __cpu_to_le32(period);
  6532. cmd->duration = __cpu_to_le32(duration);
  6533. cmd->next_start = __cpu_to_le32(next_offset);
  6534. cmd->enabled = __cpu_to_le32(enabled);
  6535. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6536. "wmi quiet param: period %u duration %u enabled %d\n",
  6537. period, duration, enabled);
  6538. return skb;
  6539. }
  6540. static struct sk_buff *
  6541. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  6542. const u8 *mac)
  6543. {
  6544. struct wmi_addba_clear_resp_cmd *cmd;
  6545. struct sk_buff *skb;
  6546. if (!mac)
  6547. return ERR_PTR(-EINVAL);
  6548. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6549. if (!skb)
  6550. return ERR_PTR(-ENOMEM);
  6551. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  6552. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6553. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6554. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6555. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  6556. vdev_id, mac);
  6557. return skb;
  6558. }
  6559. static struct sk_buff *
  6560. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6561. u32 tid, u32 buf_size)
  6562. {
  6563. struct wmi_addba_send_cmd *cmd;
  6564. struct sk_buff *skb;
  6565. if (!mac)
  6566. return ERR_PTR(-EINVAL);
  6567. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6568. if (!skb)
  6569. return ERR_PTR(-ENOMEM);
  6570. cmd = (struct wmi_addba_send_cmd *)skb->data;
  6571. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6572. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6573. cmd->tid = __cpu_to_le32(tid);
  6574. cmd->buffersize = __cpu_to_le32(buf_size);
  6575. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6576. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  6577. vdev_id, mac, tid, buf_size);
  6578. return skb;
  6579. }
  6580. static struct sk_buff *
  6581. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6582. u32 tid, u32 status)
  6583. {
  6584. struct wmi_addba_setresponse_cmd *cmd;
  6585. struct sk_buff *skb;
  6586. if (!mac)
  6587. return ERR_PTR(-EINVAL);
  6588. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6589. if (!skb)
  6590. return ERR_PTR(-ENOMEM);
  6591. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  6592. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6593. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6594. cmd->tid = __cpu_to_le32(tid);
  6595. cmd->statuscode = __cpu_to_le32(status);
  6596. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6597. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  6598. vdev_id, mac, tid, status);
  6599. return skb;
  6600. }
  6601. static struct sk_buff *
  6602. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6603. u32 tid, u32 initiator, u32 reason)
  6604. {
  6605. struct wmi_delba_send_cmd *cmd;
  6606. struct sk_buff *skb;
  6607. if (!mac)
  6608. return ERR_PTR(-EINVAL);
  6609. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6610. if (!skb)
  6611. return ERR_PTR(-ENOMEM);
  6612. cmd = (struct wmi_delba_send_cmd *)skb->data;
  6613. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6614. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6615. cmd->tid = __cpu_to_le32(tid);
  6616. cmd->initiator = __cpu_to_le32(initiator);
  6617. cmd->reasoncode = __cpu_to_le32(reason);
  6618. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6619. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  6620. vdev_id, mac, tid, initiator, reason);
  6621. return skb;
  6622. }
  6623. static struct sk_buff *
  6624. ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
  6625. {
  6626. struct wmi_pdev_get_tpc_config_cmd *cmd;
  6627. struct sk_buff *skb;
  6628. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6629. if (!skb)
  6630. return ERR_PTR(-ENOMEM);
  6631. cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
  6632. cmd->param = __cpu_to_le32(param);
  6633. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6634. "wmi pdev get tcp config param:%d\n", param);
  6635. return skb;
  6636. }
  6637. size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
  6638. {
  6639. struct ath10k_fw_stats_peer *i;
  6640. size_t num = 0;
  6641. list_for_each_entry(i, head, list)
  6642. ++num;
  6643. return num;
  6644. }
  6645. size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
  6646. {
  6647. struct ath10k_fw_stats_vdev *i;
  6648. size_t num = 0;
  6649. list_for_each_entry(i, head, list)
  6650. ++num;
  6651. return num;
  6652. }
  6653. static void
  6654. ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6655. char *buf, u32 *length)
  6656. {
  6657. u32 len = *length;
  6658. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6659. len += scnprintf(buf + len, buf_len - len, "\n");
  6660. len += scnprintf(buf + len, buf_len - len, "%30s\n",
  6661. "ath10k PDEV stats");
  6662. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6663. "=================");
  6664. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6665. "Channel noise floor", pdev->ch_noise_floor);
  6666. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6667. "Channel TX power", pdev->chan_tx_power);
  6668. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6669. "TX frame count", pdev->tx_frame_count);
  6670. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6671. "RX frame count", pdev->rx_frame_count);
  6672. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6673. "RX clear count", pdev->rx_clear_count);
  6674. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6675. "Cycle count", pdev->cycle_count);
  6676. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6677. "PHY error count", pdev->phy_err_count);
  6678. *length = len;
  6679. }
  6680. static void
  6681. ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6682. char *buf, u32 *length)
  6683. {
  6684. u32 len = *length;
  6685. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6686. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6687. "RTS bad count", pdev->rts_bad);
  6688. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6689. "RTS good count", pdev->rts_good);
  6690. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6691. "FCS bad count", pdev->fcs_bad);
  6692. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6693. "No beacon count", pdev->no_beacons);
  6694. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6695. "MIB int count", pdev->mib_int_count);
  6696. len += scnprintf(buf + len, buf_len - len, "\n");
  6697. *length = len;
  6698. }
  6699. static void
  6700. ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6701. char *buf, u32 *length)
  6702. {
  6703. u32 len = *length;
  6704. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6705. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6706. "ath10k PDEV TX stats");
  6707. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6708. "=================");
  6709. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6710. "HTT cookies queued", pdev->comp_queued);
  6711. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6712. "HTT cookies disp.", pdev->comp_delivered);
  6713. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6714. "MSDU queued", pdev->msdu_enqued);
  6715. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6716. "MPDU queued", pdev->mpdu_enqued);
  6717. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6718. "MSDUs dropped", pdev->wmm_drop);
  6719. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6720. "Local enqued", pdev->local_enqued);
  6721. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6722. "Local freed", pdev->local_freed);
  6723. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6724. "HW queued", pdev->hw_queued);
  6725. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6726. "PPDUs reaped", pdev->hw_reaped);
  6727. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6728. "Num underruns", pdev->underrun);
  6729. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6730. "PPDUs cleaned", pdev->tx_abort);
  6731. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6732. "MPDUs requed", pdev->mpdus_requed);
  6733. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6734. "Excessive retries", pdev->tx_ko);
  6735. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6736. "HW rate", pdev->data_rc);
  6737. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6738. "Sched self tiggers", pdev->self_triggers);
  6739. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6740. "Dropped due to SW retries",
  6741. pdev->sw_retry_failure);
  6742. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6743. "Illegal rate phy errors",
  6744. pdev->illgl_rate_phy_err);
  6745. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6746. "Pdev continuous xretry", pdev->pdev_cont_xretry);
  6747. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6748. "TX timeout", pdev->pdev_tx_timeout);
  6749. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6750. "PDEV resets", pdev->pdev_resets);
  6751. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6752. "PHY underrun", pdev->phy_underrun);
  6753. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6754. "MPDU is more than txop limit", pdev->txop_ovf);
  6755. *length = len;
  6756. }
  6757. static void
  6758. ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6759. char *buf, u32 *length)
  6760. {
  6761. u32 len = *length;
  6762. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6763. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6764. "ath10k PDEV RX stats");
  6765. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6766. "=================");
  6767. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6768. "Mid PPDU route change",
  6769. pdev->mid_ppdu_route_change);
  6770. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6771. "Tot. number of statuses", pdev->status_rcvd);
  6772. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6773. "Extra frags on rings 0", pdev->r0_frags);
  6774. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6775. "Extra frags on rings 1", pdev->r1_frags);
  6776. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6777. "Extra frags on rings 2", pdev->r2_frags);
  6778. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6779. "Extra frags on rings 3", pdev->r3_frags);
  6780. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6781. "MSDUs delivered to HTT", pdev->htt_msdus);
  6782. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6783. "MPDUs delivered to HTT", pdev->htt_mpdus);
  6784. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6785. "MSDUs delivered to stack", pdev->loc_msdus);
  6786. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6787. "MPDUs delivered to stack", pdev->loc_mpdus);
  6788. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6789. "Oversized AMSUs", pdev->oversize_amsdu);
  6790. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6791. "PHY errors", pdev->phy_errs);
  6792. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6793. "PHY errors drops", pdev->phy_err_drop);
  6794. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6795. "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
  6796. *length = len;
  6797. }
  6798. static void
  6799. ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
  6800. char *buf, u32 *length)
  6801. {
  6802. u32 len = *length;
  6803. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6804. int i;
  6805. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6806. "vdev id", vdev->vdev_id);
  6807. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6808. "beacon snr", vdev->beacon_snr);
  6809. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6810. "data snr", vdev->data_snr);
  6811. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6812. "num rx frames", vdev->num_rx_frames);
  6813. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6814. "num rts fail", vdev->num_rts_fail);
  6815. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6816. "num rts success", vdev->num_rts_success);
  6817. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6818. "num rx err", vdev->num_rx_err);
  6819. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6820. "num rx discard", vdev->num_rx_discard);
  6821. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6822. "num tx not acked", vdev->num_tx_not_acked);
  6823. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
  6824. len += scnprintf(buf + len, buf_len - len,
  6825. "%25s [%02d] %u\n",
  6826. "num tx frames", i,
  6827. vdev->num_tx_frames[i]);
  6828. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
  6829. len += scnprintf(buf + len, buf_len - len,
  6830. "%25s [%02d] %u\n",
  6831. "num tx frames retries", i,
  6832. vdev->num_tx_frames_retries[i]);
  6833. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
  6834. len += scnprintf(buf + len, buf_len - len,
  6835. "%25s [%02d] %u\n",
  6836. "num tx frames failures", i,
  6837. vdev->num_tx_frames_failures[i]);
  6838. for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
  6839. len += scnprintf(buf + len, buf_len - len,
  6840. "%25s [%02d] 0x%08x\n",
  6841. "tx rate history", i,
  6842. vdev->tx_rate_history[i]);
  6843. for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
  6844. len += scnprintf(buf + len, buf_len - len,
  6845. "%25s [%02d] %u\n",
  6846. "beacon rssi history", i,
  6847. vdev->beacon_rssi_history[i]);
  6848. len += scnprintf(buf + len, buf_len - len, "\n");
  6849. *length = len;
  6850. }
  6851. static void
  6852. ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
  6853. char *buf, u32 *length)
  6854. {
  6855. u32 len = *length;
  6856. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6857. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  6858. "Peer MAC address", peer->peer_macaddr);
  6859. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6860. "Peer RSSI", peer->peer_rssi);
  6861. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6862. "Peer TX rate", peer->peer_tx_rate);
  6863. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6864. "Peer RX rate", peer->peer_rx_rate);
  6865. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6866. "Peer RX duration", peer->rx_duration);
  6867. len += scnprintf(buf + len, buf_len - len, "\n");
  6868. *length = len;
  6869. }
  6870. void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
  6871. struct ath10k_fw_stats *fw_stats,
  6872. char *buf)
  6873. {
  6874. u32 len = 0;
  6875. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6876. const struct ath10k_fw_stats_pdev *pdev;
  6877. const struct ath10k_fw_stats_vdev *vdev;
  6878. const struct ath10k_fw_stats_peer *peer;
  6879. size_t num_peers;
  6880. size_t num_vdevs;
  6881. spin_lock_bh(&ar->data_lock);
  6882. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6883. struct ath10k_fw_stats_pdev, list);
  6884. if (!pdev) {
  6885. ath10k_warn(ar, "failed to get pdev stats\n");
  6886. goto unlock;
  6887. }
  6888. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6889. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6890. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6891. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6892. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6893. len += scnprintf(buf + len, buf_len - len, "\n");
  6894. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6895. "ath10k VDEV stats", num_vdevs);
  6896. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6897. "=================");
  6898. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6899. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6900. }
  6901. len += scnprintf(buf + len, buf_len - len, "\n");
  6902. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6903. "ath10k PEER stats", num_peers);
  6904. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6905. "=================");
  6906. list_for_each_entry(peer, &fw_stats->peers, list) {
  6907. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6908. }
  6909. unlock:
  6910. spin_unlock_bh(&ar->data_lock);
  6911. if (len >= buf_len)
  6912. buf[len - 1] = 0;
  6913. else
  6914. buf[len] = 0;
  6915. }
  6916. void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
  6917. struct ath10k_fw_stats *fw_stats,
  6918. char *buf)
  6919. {
  6920. unsigned int len = 0;
  6921. unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6922. const struct ath10k_fw_stats_pdev *pdev;
  6923. const struct ath10k_fw_stats_vdev *vdev;
  6924. const struct ath10k_fw_stats_peer *peer;
  6925. size_t num_peers;
  6926. size_t num_vdevs;
  6927. spin_lock_bh(&ar->data_lock);
  6928. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6929. struct ath10k_fw_stats_pdev, list);
  6930. if (!pdev) {
  6931. ath10k_warn(ar, "failed to get pdev stats\n");
  6932. goto unlock;
  6933. }
  6934. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6935. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6936. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6937. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6938. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6939. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6940. len += scnprintf(buf + len, buf_len - len, "\n");
  6941. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6942. "ath10k VDEV stats", num_vdevs);
  6943. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6944. "=================");
  6945. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6946. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6947. }
  6948. len += scnprintf(buf + len, buf_len - len, "\n");
  6949. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6950. "ath10k PEER stats", num_peers);
  6951. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6952. "=================");
  6953. list_for_each_entry(peer, &fw_stats->peers, list) {
  6954. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6955. }
  6956. unlock:
  6957. spin_unlock_bh(&ar->data_lock);
  6958. if (len >= buf_len)
  6959. buf[len - 1] = 0;
  6960. else
  6961. buf[len] = 0;
  6962. }
  6963. static struct sk_buff *
  6964. ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
  6965. u32 detect_level, u32 detect_margin)
  6966. {
  6967. struct wmi_pdev_set_adaptive_cca_params *cmd;
  6968. struct sk_buff *skb;
  6969. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6970. if (!skb)
  6971. return ERR_PTR(-ENOMEM);
  6972. cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
  6973. cmd->enable = __cpu_to_le32(enable);
  6974. cmd->cca_detect_level = __cpu_to_le32(detect_level);
  6975. cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
  6976. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6977. "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
  6978. enable, detect_level, detect_margin);
  6979. return skb;
  6980. }
  6981. static void
  6982. ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev,
  6983. char *buf, u32 *length)
  6984. {
  6985. u32 len = *length;
  6986. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6987. u32 val;
  6988. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6989. "vdev id", vdev->vdev_id);
  6990. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6991. "ppdu aggr count", vdev->ppdu_aggr_cnt);
  6992. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6993. "ppdu noack", vdev->ppdu_noack);
  6994. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6995. "mpdu queued", vdev->mpdu_queued);
  6996. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6997. "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt);
  6998. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6999. "mpdu sw requeued", vdev->mpdu_sw_requeued);
  7000. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7001. "mpdu success retry", vdev->mpdu_suc_retry);
  7002. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7003. "mpdu success multitry", vdev->mpdu_suc_multitry);
  7004. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7005. "mpdu fail retry", vdev->mpdu_fail_retry);
  7006. val = vdev->tx_ftm_suc;
  7007. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7008. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7009. "tx ftm success",
  7010. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7011. val = vdev->tx_ftm_suc_retry;
  7012. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7013. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7014. "tx ftm success retry",
  7015. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7016. val = vdev->tx_ftm_fail;
  7017. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7018. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7019. "tx ftm fail",
  7020. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7021. val = vdev->rx_ftmr_cnt;
  7022. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7023. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7024. "rx ftm request count",
  7025. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7026. val = vdev->rx_ftmr_dup_cnt;
  7027. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7028. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7029. "rx ftm request dup count",
  7030. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7031. val = vdev->rx_iftmr_cnt;
  7032. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7033. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7034. "rx initial ftm req count",
  7035. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7036. val = vdev->rx_iftmr_dup_cnt;
  7037. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7038. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7039. "rx initial ftm req dup cnt",
  7040. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7041. len += scnprintf(buf + len, buf_len - len, "\n");
  7042. *length = len;
  7043. }
  7044. void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
  7045. struct ath10k_fw_stats *fw_stats,
  7046. char *buf)
  7047. {
  7048. u32 len = 0;
  7049. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7050. const struct ath10k_fw_stats_pdev *pdev;
  7051. const struct ath10k_fw_stats_vdev_extd *vdev;
  7052. const struct ath10k_fw_stats_peer *peer;
  7053. size_t num_peers;
  7054. size_t num_vdevs;
  7055. spin_lock_bh(&ar->data_lock);
  7056. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7057. struct ath10k_fw_stats_pdev, list);
  7058. if (!pdev) {
  7059. ath10k_warn(ar, "failed to get pdev stats\n");
  7060. goto unlock;
  7061. }
  7062. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7063. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7064. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7065. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  7066. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7067. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7068. "HW paused", pdev->hw_paused);
  7069. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7070. "Seqs posted", pdev->seq_posted);
  7071. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7072. "Seqs failed queueing", pdev->seq_failed_queueing);
  7073. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7074. "Seqs completed", pdev->seq_completed);
  7075. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7076. "Seqs restarted", pdev->seq_restarted);
  7077. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7078. "MU Seqs posted", pdev->mu_seq_posted);
  7079. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7080. "MPDUs SW flushed", pdev->mpdus_sw_flush);
  7081. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7082. "MPDUs HW filtered", pdev->mpdus_hw_filter);
  7083. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7084. "MPDUs truncated", pdev->mpdus_truncated);
  7085. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7086. "MPDUs receive no ACK", pdev->mpdus_ack_failed);
  7087. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7088. "MPDUs expired", pdev->mpdus_expired);
  7089. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7090. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7091. "Num Rx Overflow errors", pdev->rx_ovfl_errs);
  7092. len += scnprintf(buf + len, buf_len - len, "\n");
  7093. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7094. "ath10k VDEV stats", num_vdevs);
  7095. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7096. "=================");
  7097. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7098. ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len);
  7099. }
  7100. len += scnprintf(buf + len, buf_len - len, "\n");
  7101. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7102. "ath10k PEER stats", num_peers);
  7103. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7104. "=================");
  7105. list_for_each_entry(peer, &fw_stats->peers, list) {
  7106. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  7107. }
  7108. unlock:
  7109. spin_unlock_bh(&ar->data_lock);
  7110. if (len >= buf_len)
  7111. buf[len - 1] = 0;
  7112. else
  7113. buf[len] = 0;
  7114. }
  7115. int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
  7116. enum wmi_vdev_subtype subtype)
  7117. {
  7118. switch (subtype) {
  7119. case WMI_VDEV_SUBTYPE_NONE:
  7120. return WMI_VDEV_SUBTYPE_LEGACY_NONE;
  7121. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7122. return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
  7123. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7124. return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
  7125. case WMI_VDEV_SUBTYPE_P2P_GO:
  7126. return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
  7127. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7128. return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
  7129. case WMI_VDEV_SUBTYPE_MESH_11S:
  7130. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7131. return -ENOTSUPP;
  7132. }
  7133. return -ENOTSUPP;
  7134. }
  7135. static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
  7136. enum wmi_vdev_subtype subtype)
  7137. {
  7138. switch (subtype) {
  7139. case WMI_VDEV_SUBTYPE_NONE:
  7140. return WMI_VDEV_SUBTYPE_10_2_4_NONE;
  7141. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7142. return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
  7143. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7144. return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
  7145. case WMI_VDEV_SUBTYPE_P2P_GO:
  7146. return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
  7147. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7148. return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
  7149. case WMI_VDEV_SUBTYPE_MESH_11S:
  7150. return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
  7151. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7152. return -ENOTSUPP;
  7153. }
  7154. return -ENOTSUPP;
  7155. }
  7156. static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
  7157. enum wmi_vdev_subtype subtype)
  7158. {
  7159. switch (subtype) {
  7160. case WMI_VDEV_SUBTYPE_NONE:
  7161. return WMI_VDEV_SUBTYPE_10_4_NONE;
  7162. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7163. return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
  7164. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7165. return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
  7166. case WMI_VDEV_SUBTYPE_P2P_GO:
  7167. return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
  7168. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7169. return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
  7170. case WMI_VDEV_SUBTYPE_MESH_11S:
  7171. return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
  7172. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7173. return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
  7174. }
  7175. return -ENOTSUPP;
  7176. }
  7177. static struct sk_buff *
  7178. ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
  7179. enum wmi_host_platform_type type,
  7180. u32 fw_feature_bitmap)
  7181. {
  7182. struct wmi_ext_resource_config_10_4_cmd *cmd;
  7183. struct sk_buff *skb;
  7184. u32 num_tdls_sleep_sta = 0;
  7185. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7186. if (!skb)
  7187. return ERR_PTR(-ENOMEM);
  7188. if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
  7189. num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
  7190. cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
  7191. cmd->host_platform_config = __cpu_to_le32(type);
  7192. cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
  7193. cmd->wlan_gpio_priority = __cpu_to_le32(-1);
  7194. cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
  7195. cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
  7196. cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
  7197. cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
  7198. cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
  7199. cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
  7200. cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
  7201. cmd->max_tdls_concurrent_buffer_sta =
  7202. __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
  7203. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7204. "wmi ext resource config host type %d firmware feature bitmap %08x\n",
  7205. type, fw_feature_bitmap);
  7206. return skb;
  7207. }
  7208. static struct sk_buff *
  7209. ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
  7210. enum wmi_tdls_state state)
  7211. {
  7212. struct wmi_10_4_tdls_set_state_cmd *cmd;
  7213. struct sk_buff *skb;
  7214. u32 options = 0;
  7215. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7216. if (!skb)
  7217. return ERR_PTR(-ENOMEM);
  7218. if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
  7219. state == WMI_TDLS_ENABLE_ACTIVE)
  7220. state = WMI_TDLS_ENABLE_PASSIVE;
  7221. if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
  7222. options |= WMI_TDLS_BUFFER_STA_EN;
  7223. cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
  7224. cmd->vdev_id = __cpu_to_le32(vdev_id);
  7225. cmd->state = __cpu_to_le32(state);
  7226. cmd->notification_interval_ms = __cpu_to_le32(5000);
  7227. cmd->tx_discovery_threshold = __cpu_to_le32(100);
  7228. cmd->tx_teardown_threshold = __cpu_to_le32(5);
  7229. cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
  7230. cmd->rssi_delta = __cpu_to_le32(-20);
  7231. cmd->tdls_options = __cpu_to_le32(options);
  7232. cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
  7233. cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
  7234. cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
  7235. cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
  7236. cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
  7237. cmd->teardown_notification_ms = __cpu_to_le32(10);
  7238. cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
  7239. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
  7240. state, vdev_id);
  7241. return skb;
  7242. }
  7243. static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
  7244. {
  7245. u32 peer_qos = 0;
  7246. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
  7247. peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
  7248. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
  7249. peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
  7250. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
  7251. peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
  7252. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
  7253. peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
  7254. peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
  7255. return peer_qos;
  7256. }
  7257. static struct sk_buff *
  7258. ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param)
  7259. {
  7260. struct wmi_pdev_get_tpc_table_cmd *cmd;
  7261. struct sk_buff *skb;
  7262. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7263. if (!skb)
  7264. return ERR_PTR(-ENOMEM);
  7265. cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data;
  7266. cmd->param = __cpu_to_le32(param);
  7267. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7268. "wmi pdev get tpc table param:%d\n", param);
  7269. return skb;
  7270. }
  7271. static struct sk_buff *
  7272. ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
  7273. const struct wmi_tdls_peer_update_cmd_arg *arg,
  7274. const struct wmi_tdls_peer_capab_arg *cap,
  7275. const struct wmi_channel_arg *chan_arg)
  7276. {
  7277. struct wmi_10_4_tdls_peer_update_cmd *cmd;
  7278. struct wmi_tdls_peer_capabilities *peer_cap;
  7279. struct wmi_channel *chan;
  7280. struct sk_buff *skb;
  7281. u32 peer_qos;
  7282. int len, chan_len;
  7283. int i;
  7284. /* tdls peer update cmd has place holder for one channel*/
  7285. chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
  7286. len = sizeof(*cmd) + chan_len * sizeof(*chan);
  7287. skb = ath10k_wmi_alloc_skb(ar, len);
  7288. if (!skb)
  7289. return ERR_PTR(-ENOMEM);
  7290. memset(skb->data, 0, sizeof(*cmd));
  7291. cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
  7292. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  7293. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  7294. cmd->peer_state = __cpu_to_le32(arg->peer_state);
  7295. peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
  7296. cap->peer_max_sp);
  7297. peer_cap = &cmd->peer_capab;
  7298. peer_cap->peer_qos = __cpu_to_le32(peer_qos);
  7299. peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
  7300. peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
  7301. peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
  7302. peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
  7303. peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
  7304. peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
  7305. for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
  7306. peer_cap->peer_operclass[i] = cap->peer_operclass[i];
  7307. peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
  7308. peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
  7309. peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
  7310. for (i = 0; i < cap->peer_chan_len; i++) {
  7311. chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
  7312. ath10k_wmi_put_wmi_channel(chan, &chan_arg[i]);
  7313. }
  7314. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7315. "wmi tdls peer update vdev %i state %d n_chans %u\n",
  7316. arg->vdev_id, arg->peer_state, cap->peer_chan_len);
  7317. return skb;
  7318. }
  7319. static struct sk_buff *
  7320. ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
  7321. {
  7322. struct wmi_echo_cmd *cmd;
  7323. struct sk_buff *skb;
  7324. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7325. if (!skb)
  7326. return ERR_PTR(-ENOMEM);
  7327. cmd = (struct wmi_echo_cmd *)skb->data;
  7328. cmd->value = cpu_to_le32(value);
  7329. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7330. "wmi echo value 0x%08x\n", value);
  7331. return skb;
  7332. }
  7333. int
  7334. ath10k_wmi_barrier(struct ath10k *ar)
  7335. {
  7336. int ret;
  7337. int time_left;
  7338. spin_lock_bh(&ar->data_lock);
  7339. reinit_completion(&ar->wmi.barrier);
  7340. spin_unlock_bh(&ar->data_lock);
  7341. ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
  7342. if (ret) {
  7343. ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
  7344. return ret;
  7345. }
  7346. time_left = wait_for_completion_timeout(&ar->wmi.barrier,
  7347. ATH10K_WMI_BARRIER_TIMEOUT_HZ);
  7348. if (!time_left)
  7349. return -ETIMEDOUT;
  7350. return 0;
  7351. }
  7352. static const struct wmi_ops wmi_ops = {
  7353. .rx = ath10k_wmi_op_rx,
  7354. .map_svc = wmi_main_svc_map,
  7355. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7356. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7357. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7358. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7359. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7360. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7361. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7362. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7363. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7364. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7365. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  7366. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7367. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7368. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7369. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7370. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  7371. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7372. .gen_init = ath10k_wmi_op_gen_init,
  7373. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7374. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7375. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7376. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7377. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7378. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7379. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7380. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7381. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7382. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7383. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7384. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7385. /* .gen_vdev_wmm_conf not implemented */
  7386. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7387. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7388. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7389. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7390. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  7391. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7392. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7393. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7394. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7395. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7396. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7397. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7398. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7399. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7400. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7401. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7402. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7403. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7404. /* .gen_pdev_get_temperature not implemented */
  7405. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7406. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7407. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7408. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7409. .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  7410. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7411. .gen_echo = ath10k_wmi_op_gen_echo,
  7412. /* .gen_bcn_tmpl not implemented */
  7413. /* .gen_prb_tmpl not implemented */
  7414. /* .gen_p2p_go_bcn_ie not implemented */
  7415. /* .gen_adaptive_qcs not implemented */
  7416. /* .gen_pdev_enable_adaptive_cca not implemented */
  7417. };
  7418. static const struct wmi_ops wmi_10_1_ops = {
  7419. .rx = ath10k_wmi_10_1_op_rx,
  7420. .map_svc = wmi_10x_svc_map,
  7421. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7422. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  7423. .gen_init = ath10k_wmi_10_1_op_gen_init,
  7424. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7425. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7426. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  7427. /* .gen_pdev_get_temperature not implemented */
  7428. /* shared with main branch */
  7429. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7430. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7431. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7432. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7433. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7434. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7435. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7436. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7437. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7438. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7439. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7440. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7441. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7442. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7443. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7444. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7445. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7446. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7447. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7448. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7449. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7450. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7451. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7452. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7453. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7454. /* .gen_vdev_wmm_conf not implemented */
  7455. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7456. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7457. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7458. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7459. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7460. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7461. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7462. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7463. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7464. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7465. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7466. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7467. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7468. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7469. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7470. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7471. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7472. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7473. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7474. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7475. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7476. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7477. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7478. .gen_echo = ath10k_wmi_op_gen_echo,
  7479. /* .gen_bcn_tmpl not implemented */
  7480. /* .gen_prb_tmpl not implemented */
  7481. /* .gen_p2p_go_bcn_ie not implemented */
  7482. /* .gen_adaptive_qcs not implemented */
  7483. /* .gen_pdev_enable_adaptive_cca not implemented */
  7484. };
  7485. static const struct wmi_ops wmi_10_2_ops = {
  7486. .rx = ath10k_wmi_10_2_op_rx,
  7487. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  7488. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7489. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7490. /* .gen_pdev_get_temperature not implemented */
  7491. /* shared with 10.1 */
  7492. .map_svc = wmi_10x_svc_map,
  7493. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7494. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7495. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7496. .gen_echo = ath10k_wmi_op_gen_echo,
  7497. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7498. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7499. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7500. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7501. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7502. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7503. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7504. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7505. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7506. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7507. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7508. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7509. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7510. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7511. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7512. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7513. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7514. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7515. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7516. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7517. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7518. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7519. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7520. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7521. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7522. /* .gen_vdev_wmm_conf not implemented */
  7523. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7524. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7525. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7526. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7527. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7528. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7529. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7530. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7531. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7532. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7533. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7534. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7535. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7536. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7537. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7538. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7539. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7540. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7541. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7542. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7543. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7544. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7545. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7546. /* .gen_pdev_enable_adaptive_cca not implemented */
  7547. };
  7548. static const struct wmi_ops wmi_10_2_4_ops = {
  7549. .rx = ath10k_wmi_10_2_op_rx,
  7550. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  7551. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7552. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7553. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7554. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7555. /* shared with 10.1 */
  7556. .map_svc = wmi_10x_svc_map,
  7557. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7558. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7559. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7560. .gen_echo = ath10k_wmi_op_gen_echo,
  7561. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7562. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7563. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7564. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7565. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7566. .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
  7567. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7568. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7569. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7570. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7571. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7572. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7573. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7574. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7575. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7576. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7577. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7578. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7579. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7580. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7581. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7582. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7583. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7584. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7585. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7586. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7587. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7588. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7589. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7590. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7591. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7592. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7593. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7594. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7595. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7596. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7597. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7598. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7599. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7600. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7601. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7602. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7603. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7604. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7605. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7606. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7607. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7608. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7609. .gen_pdev_enable_adaptive_cca =
  7610. ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  7611. .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  7612. /* .gen_bcn_tmpl not implemented */
  7613. /* .gen_prb_tmpl not implemented */
  7614. /* .gen_p2p_go_bcn_ie not implemented */
  7615. /* .gen_adaptive_qcs not implemented */
  7616. };
  7617. static const struct wmi_ops wmi_10_4_ops = {
  7618. .rx = ath10k_wmi_10_4_op_rx,
  7619. .map_svc = wmi_10_4_svc_map,
  7620. .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
  7621. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7622. .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
  7623. .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
  7624. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7625. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7626. .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
  7627. .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
  7628. .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
  7629. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7630. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7631. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7632. .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
  7633. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7634. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7635. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7636. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7637. .gen_init = ath10k_wmi_10_4_op_gen_init,
  7638. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7639. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7640. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7641. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7642. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7643. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7644. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7645. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7646. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7647. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7648. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7649. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7650. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7651. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7652. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7653. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7654. .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
  7655. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7656. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7657. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7658. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7659. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7660. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7661. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7662. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7663. .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
  7664. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7665. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7666. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7667. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7668. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7669. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7670. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7671. .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
  7672. .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
  7673. .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
  7674. .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
  7675. .gen_pdev_get_tpc_table_cmdid =
  7676. ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid,
  7677. /* shared with 10.2 */
  7678. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7679. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7680. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7681. .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
  7682. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7683. .gen_echo = ath10k_wmi_op_gen_echo,
  7684. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7685. };
  7686. int ath10k_wmi_attach(struct ath10k *ar)
  7687. {
  7688. switch (ar->running_fw->fw_file.wmi_op_version) {
  7689. case ATH10K_FW_WMI_OP_VERSION_10_4:
  7690. ar->wmi.ops = &wmi_10_4_ops;
  7691. ar->wmi.cmd = &wmi_10_4_cmd_map;
  7692. ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
  7693. ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
  7694. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7695. break;
  7696. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  7697. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  7698. ar->wmi.ops = &wmi_10_2_4_ops;
  7699. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  7700. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  7701. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7702. break;
  7703. case ATH10K_FW_WMI_OP_VERSION_10_2:
  7704. ar->wmi.cmd = &wmi_10_2_cmd_map;
  7705. ar->wmi.ops = &wmi_10_2_ops;
  7706. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7707. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7708. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7709. break;
  7710. case ATH10K_FW_WMI_OP_VERSION_10_1:
  7711. ar->wmi.cmd = &wmi_10x_cmd_map;
  7712. ar->wmi.ops = &wmi_10_1_ops;
  7713. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7714. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7715. ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
  7716. break;
  7717. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  7718. ar->wmi.cmd = &wmi_cmd_map;
  7719. ar->wmi.ops = &wmi_ops;
  7720. ar->wmi.vdev_param = &wmi_vdev_param_map;
  7721. ar->wmi.pdev_param = &wmi_pdev_param_map;
  7722. ar->wmi.peer_flags = &wmi_peer_flags_map;
  7723. break;
  7724. case ATH10K_FW_WMI_OP_VERSION_TLV:
  7725. ath10k_wmi_tlv_attach(ar);
  7726. break;
  7727. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  7728. case ATH10K_FW_WMI_OP_VERSION_MAX:
  7729. ath10k_err(ar, "unsupported WMI op version: %d\n",
  7730. ar->running_fw->fw_file.wmi_op_version);
  7731. return -EINVAL;
  7732. }
  7733. init_completion(&ar->wmi.service_ready);
  7734. init_completion(&ar->wmi.unified_ready);
  7735. init_completion(&ar->wmi.barrier);
  7736. INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
  7737. return 0;
  7738. }
  7739. void ath10k_wmi_free_host_mem(struct ath10k *ar)
  7740. {
  7741. int i;
  7742. /* free the host memory chunks requested by firmware */
  7743. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  7744. dma_free_coherent(ar->dev,
  7745. ar->wmi.mem_chunks[i].len,
  7746. ar->wmi.mem_chunks[i].vaddr,
  7747. ar->wmi.mem_chunks[i].paddr);
  7748. }
  7749. ar->wmi.num_mem_chunks = 0;
  7750. }
  7751. void ath10k_wmi_detach(struct ath10k *ar)
  7752. {
  7753. cancel_work_sync(&ar->svc_rdy_work);
  7754. if (ar->svc_rdy_skb)
  7755. dev_kfree_skb(ar->svc_rdy_skb);
  7756. }