core.h 27 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  4. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  5. *
  6. * Permission to use, copy, modify, and/or distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _CORE_H_
  19. #define _CORE_H_
  20. #include <linux/completion.h>
  21. #include <linux/if_ether.h>
  22. #include <linux/types.h>
  23. #include <linux/pci.h>
  24. #include <linux/uuid.h>
  25. #include <linux/time.h>
  26. #include "htt.h"
  27. #include "htc.h"
  28. #include "hw.h"
  29. #include "targaddrs.h"
  30. #include "wmi.h"
  31. #include "../ath.h"
  32. #include "../regd.h"
  33. #include "../dfs_pattern_detector.h"
  34. #include "spectral.h"
  35. #include "thermal.h"
  36. #include "wow.h"
  37. #include "swap.h"
  38. #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
  39. #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  40. #define WO(_f) ((_f##_OFFSET) >> 2)
  41. #define ATH10K_SCAN_ID 0
  42. #define WMI_READY_TIMEOUT (5 * HZ)
  43. #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
  44. #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
  45. #define ATH10K_NUM_CHANS 40
  46. /* Antenna noise floor */
  47. #define ATH10K_DEFAULT_NOISE_FLOOR -95
  48. #define ATH10K_MAX_NUM_MGMT_PENDING 128
  49. /* number of failed packets (20 packets with 16 sw reties each) */
  50. #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
  51. /*
  52. * Use insanely high numbers to make sure that the firmware implementation
  53. * won't start, we have the same functionality already in hostapd. Unit
  54. * is seconds.
  55. */
  56. #define ATH10K_KEEPALIVE_MIN_IDLE 3747
  57. #define ATH10K_KEEPALIVE_MAX_IDLE 3895
  58. #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
  59. /* NAPI poll budget */
  60. #define ATH10K_NAPI_BUDGET 64
  61. /* SMBIOS type containing Board Data File Name Extension */
  62. #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
  63. /* SMBIOS type structure length (excluding strings-set) */
  64. #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9
  65. /* Offset pointing to Board Data File Name Extension */
  66. #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8
  67. /* Board Data File Name Extension string length.
  68. * String format: BDF_<Customer ID>_<Extension>\0
  69. */
  70. #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20
  71. /* The magic used by QCA spec */
  72. #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
  73. struct ath10k;
  74. enum ath10k_bus {
  75. ATH10K_BUS_PCI,
  76. ATH10K_BUS_AHB,
  77. ATH10K_BUS_SDIO,
  78. ATH10K_BUS_USB,
  79. ATH10K_BUS_SNOC,
  80. };
  81. static inline const char *ath10k_bus_str(enum ath10k_bus bus)
  82. {
  83. switch (bus) {
  84. case ATH10K_BUS_PCI:
  85. return "pci";
  86. case ATH10K_BUS_AHB:
  87. return "ahb";
  88. case ATH10K_BUS_SDIO:
  89. return "sdio";
  90. case ATH10K_BUS_USB:
  91. return "usb";
  92. case ATH10K_BUS_SNOC:
  93. return "snoc";
  94. }
  95. return "unknown";
  96. }
  97. enum ath10k_skb_flags {
  98. ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
  99. ATH10K_SKB_F_DTIM_ZERO = BIT(1),
  100. ATH10K_SKB_F_DELIVER_CAB = BIT(2),
  101. ATH10K_SKB_F_MGMT = BIT(3),
  102. ATH10K_SKB_F_QOS = BIT(4),
  103. };
  104. struct ath10k_skb_cb {
  105. dma_addr_t paddr;
  106. u8 flags;
  107. u8 eid;
  108. u16 msdu_id;
  109. struct ieee80211_vif *vif;
  110. struct ieee80211_txq *txq;
  111. } __packed;
  112. struct ath10k_skb_rxcb {
  113. dma_addr_t paddr;
  114. struct hlist_node hlist;
  115. };
  116. static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
  117. {
  118. BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
  119. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  120. return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
  121. }
  122. static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
  123. {
  124. BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
  125. return (struct ath10k_skb_rxcb *)skb->cb;
  126. }
  127. #define ATH10K_RXCB_SKB(rxcb) \
  128. container_of((void *)rxcb, struct sk_buff, cb)
  129. static inline u32 host_interest_item_address(u32 item_offset)
  130. {
  131. return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
  132. }
  133. struct ath10k_bmi {
  134. bool done_sent;
  135. };
  136. struct ath10k_mem_chunk {
  137. void *vaddr;
  138. dma_addr_t paddr;
  139. u32 len;
  140. u32 req_id;
  141. };
  142. struct ath10k_wmi {
  143. enum ath10k_htc_ep_id eid;
  144. struct completion service_ready;
  145. struct completion unified_ready;
  146. struct completion barrier;
  147. wait_queue_head_t tx_credits_wq;
  148. DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
  149. struct wmi_cmd_map *cmd;
  150. struct wmi_vdev_param_map *vdev_param;
  151. struct wmi_pdev_param_map *pdev_param;
  152. const struct wmi_ops *ops;
  153. const struct wmi_peer_flags_map *peer_flags;
  154. u32 num_mem_chunks;
  155. u32 rx_decap_mode;
  156. struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
  157. };
  158. struct ath10k_fw_stats_peer {
  159. struct list_head list;
  160. u8 peer_macaddr[ETH_ALEN];
  161. u32 peer_rssi;
  162. u32 peer_tx_rate;
  163. u32 peer_rx_rate; /* 10x only */
  164. u32 rx_duration;
  165. };
  166. struct ath10k_fw_extd_stats_peer {
  167. struct list_head list;
  168. u8 peer_macaddr[ETH_ALEN];
  169. u32 rx_duration;
  170. };
  171. struct ath10k_fw_stats_vdev {
  172. struct list_head list;
  173. u32 vdev_id;
  174. u32 beacon_snr;
  175. u32 data_snr;
  176. u32 num_tx_frames[4];
  177. u32 num_rx_frames;
  178. u32 num_tx_frames_retries[4];
  179. u32 num_tx_frames_failures[4];
  180. u32 num_rts_fail;
  181. u32 num_rts_success;
  182. u32 num_rx_err;
  183. u32 num_rx_discard;
  184. u32 num_tx_not_acked;
  185. u32 tx_rate_history[10];
  186. u32 beacon_rssi_history[10];
  187. };
  188. struct ath10k_fw_stats_vdev_extd {
  189. struct list_head list;
  190. u32 vdev_id;
  191. u32 ppdu_aggr_cnt;
  192. u32 ppdu_noack;
  193. u32 mpdu_queued;
  194. u32 ppdu_nonaggr_cnt;
  195. u32 mpdu_sw_requeued;
  196. u32 mpdu_suc_retry;
  197. u32 mpdu_suc_multitry;
  198. u32 mpdu_fail_retry;
  199. u32 tx_ftm_suc;
  200. u32 tx_ftm_suc_retry;
  201. u32 tx_ftm_fail;
  202. u32 rx_ftmr_cnt;
  203. u32 rx_ftmr_dup_cnt;
  204. u32 rx_iftmr_cnt;
  205. u32 rx_iftmr_dup_cnt;
  206. };
  207. struct ath10k_fw_stats_pdev {
  208. struct list_head list;
  209. /* PDEV stats */
  210. s32 ch_noise_floor;
  211. u32 tx_frame_count; /* Cycles spent transmitting frames */
  212. u32 rx_frame_count; /* Cycles spent receiving frames */
  213. u32 rx_clear_count; /* Total channel busy time, evidently */
  214. u32 cycle_count; /* Total on-channel time */
  215. u32 phy_err_count;
  216. u32 chan_tx_power;
  217. u32 ack_rx_bad;
  218. u32 rts_bad;
  219. u32 rts_good;
  220. u32 fcs_bad;
  221. u32 no_beacons;
  222. u32 mib_int_count;
  223. /* PDEV TX stats */
  224. s32 comp_queued;
  225. s32 comp_delivered;
  226. s32 msdu_enqued;
  227. s32 mpdu_enqued;
  228. s32 wmm_drop;
  229. s32 local_enqued;
  230. s32 local_freed;
  231. s32 hw_queued;
  232. s32 hw_reaped;
  233. s32 underrun;
  234. u32 hw_paused;
  235. s32 tx_abort;
  236. s32 mpdus_requed;
  237. u32 tx_ko;
  238. u32 data_rc;
  239. u32 self_triggers;
  240. u32 sw_retry_failure;
  241. u32 illgl_rate_phy_err;
  242. u32 pdev_cont_xretry;
  243. u32 pdev_tx_timeout;
  244. u32 pdev_resets;
  245. u32 phy_underrun;
  246. u32 txop_ovf;
  247. u32 seq_posted;
  248. u32 seq_failed_queueing;
  249. u32 seq_completed;
  250. u32 seq_restarted;
  251. u32 mu_seq_posted;
  252. u32 mpdus_sw_flush;
  253. u32 mpdus_hw_filter;
  254. u32 mpdus_truncated;
  255. u32 mpdus_ack_failed;
  256. u32 mpdus_expired;
  257. /* PDEV RX stats */
  258. s32 mid_ppdu_route_change;
  259. s32 status_rcvd;
  260. s32 r0_frags;
  261. s32 r1_frags;
  262. s32 r2_frags;
  263. s32 r3_frags;
  264. s32 htt_msdus;
  265. s32 htt_mpdus;
  266. s32 loc_msdus;
  267. s32 loc_mpdus;
  268. s32 oversize_amsdu;
  269. s32 phy_errs;
  270. s32 phy_err_drop;
  271. s32 mpdu_errs;
  272. s32 rx_ovfl_errs;
  273. };
  274. struct ath10k_fw_stats {
  275. bool extended;
  276. struct list_head pdevs;
  277. struct list_head vdevs;
  278. struct list_head peers;
  279. struct list_head peers_extd;
  280. };
  281. #define ATH10K_TPC_TABLE_TYPE_FLAG 1
  282. #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF
  283. struct ath10k_tpc_table {
  284. u32 pream_idx[WMI_TPC_RATE_MAX];
  285. u8 rate_code[WMI_TPC_RATE_MAX];
  286. char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  287. };
  288. struct ath10k_tpc_stats {
  289. u32 reg_domain;
  290. u32 chan_freq;
  291. u32 phy_mode;
  292. u32 twice_antenna_reduction;
  293. u32 twice_max_rd_power;
  294. s32 twice_antenna_gain;
  295. u32 power_limit;
  296. u32 num_tx_chain;
  297. u32 ctl;
  298. u32 rate_max;
  299. u8 flag[WMI_TPC_FLAG];
  300. struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
  301. };
  302. struct ath10k_tpc_table_final {
  303. u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];
  304. u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
  305. char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  306. };
  307. struct ath10k_tpc_stats_final {
  308. u32 reg_domain;
  309. u32 chan_freq;
  310. u32 phy_mode;
  311. u32 twice_antenna_reduction;
  312. u32 twice_max_rd_power;
  313. s32 twice_antenna_gain;
  314. u32 power_limit;
  315. u32 num_tx_chain;
  316. u32 ctl;
  317. u32 rate_max;
  318. u8 flag[WMI_TPC_FLAG];
  319. struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];
  320. };
  321. struct ath10k_dfs_stats {
  322. u32 phy_errors;
  323. u32 pulses_total;
  324. u32 pulses_detected;
  325. u32 pulses_discarded;
  326. u32 radar_detected;
  327. };
  328. #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
  329. struct ath10k_peer {
  330. struct list_head list;
  331. struct ieee80211_vif *vif;
  332. struct ieee80211_sta *sta;
  333. bool removed;
  334. int vdev_id;
  335. u8 addr[ETH_ALEN];
  336. DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
  337. /* protected by ar->data_lock */
  338. struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
  339. };
  340. struct ath10k_txq {
  341. struct list_head list;
  342. unsigned long num_fw_queued;
  343. unsigned long num_push_allowed;
  344. };
  345. enum ath10k_pkt_rx_err {
  346. ATH10K_PKT_RX_ERR_FCS,
  347. ATH10K_PKT_RX_ERR_TKIP,
  348. ATH10K_PKT_RX_ERR_CRYPT,
  349. ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,
  350. ATH10K_PKT_RX_ERR_MAX,
  351. };
  352. enum ath10k_ampdu_subfrm_num {
  353. ATH10K_AMPDU_SUBFRM_NUM_10,
  354. ATH10K_AMPDU_SUBFRM_NUM_20,
  355. ATH10K_AMPDU_SUBFRM_NUM_30,
  356. ATH10K_AMPDU_SUBFRM_NUM_40,
  357. ATH10K_AMPDU_SUBFRM_NUM_50,
  358. ATH10K_AMPDU_SUBFRM_NUM_60,
  359. ATH10K_AMPDU_SUBFRM_NUM_MORE,
  360. ATH10K_AMPDU_SUBFRM_NUM_MAX,
  361. };
  362. enum ath10k_amsdu_subfrm_num {
  363. ATH10K_AMSDU_SUBFRM_NUM_1,
  364. ATH10K_AMSDU_SUBFRM_NUM_2,
  365. ATH10K_AMSDU_SUBFRM_NUM_3,
  366. ATH10K_AMSDU_SUBFRM_NUM_4,
  367. ATH10K_AMSDU_SUBFRM_NUM_MORE,
  368. ATH10K_AMSDU_SUBFRM_NUM_MAX,
  369. };
  370. struct ath10k_sta_tid_stats {
  371. unsigned long int rx_pkt_from_fw;
  372. unsigned long int rx_pkt_unchained;
  373. unsigned long int rx_pkt_drop_chained;
  374. unsigned long int rx_pkt_drop_filter;
  375. unsigned long int rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
  376. unsigned long int rx_pkt_queued_for_mac;
  377. unsigned long int rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
  378. unsigned long int rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
  379. };
  380. struct ath10k_sta {
  381. struct ath10k_vif *arvif;
  382. /* the following are protected by ar->data_lock */
  383. u32 changed; /* IEEE80211_RC_* */
  384. u32 bw;
  385. u32 nss;
  386. u32 smps;
  387. u16 peer_id;
  388. struct rate_info txrate;
  389. struct work_struct update_wk;
  390. u64 rx_duration;
  391. #ifdef CONFIG_MAC80211_DEBUGFS
  392. /* protected by conf_mutex */
  393. bool aggr_mode;
  394. /* Protected with ar->data_lock */
  395. struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
  396. #endif
  397. };
  398. #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
  399. enum ath10k_beacon_state {
  400. ATH10K_BEACON_SCHEDULED = 0,
  401. ATH10K_BEACON_SENDING,
  402. ATH10K_BEACON_SENT,
  403. };
  404. struct ath10k_vif {
  405. struct list_head list;
  406. u32 vdev_id;
  407. u16 peer_id;
  408. enum wmi_vdev_type vdev_type;
  409. enum wmi_vdev_subtype vdev_subtype;
  410. u32 beacon_interval;
  411. u32 dtim_period;
  412. struct sk_buff *beacon;
  413. /* protected by data_lock */
  414. enum ath10k_beacon_state beacon_state;
  415. void *beacon_buf;
  416. dma_addr_t beacon_paddr;
  417. unsigned long tx_paused; /* arbitrary values defined by target */
  418. struct ath10k *ar;
  419. struct ieee80211_vif *vif;
  420. bool is_started;
  421. bool is_up;
  422. bool spectral_enabled;
  423. bool ps;
  424. u32 aid;
  425. u8 bssid[ETH_ALEN];
  426. struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
  427. s8 def_wep_key_idx;
  428. u16 tx_seq_no;
  429. union {
  430. struct {
  431. u32 uapsd;
  432. } sta;
  433. struct {
  434. /* 512 stations */
  435. u8 tim_bitmap[64];
  436. u8 tim_len;
  437. u32 ssid_len;
  438. u8 ssid[IEEE80211_MAX_SSID_LEN];
  439. bool hidden_ssid;
  440. /* P2P_IE with NoA attribute for P2P_GO case */
  441. u32 noa_len;
  442. u8 *noa_data;
  443. } ap;
  444. } u;
  445. bool use_cts_prot;
  446. bool nohwcrypt;
  447. int num_legacy_stations;
  448. int txpower;
  449. struct wmi_wmm_params_all_arg wmm_params;
  450. struct work_struct ap_csa_work;
  451. struct delayed_work connection_loss_work;
  452. struct cfg80211_bitrate_mask bitrate_mask;
  453. };
  454. struct ath10k_vif_iter {
  455. u32 vdev_id;
  456. struct ath10k_vif *arvif;
  457. };
  458. /* Copy Engine register dump, protected by ce-lock */
  459. struct ath10k_ce_crash_data {
  460. __le32 base_addr;
  461. __le32 src_wr_idx;
  462. __le32 src_r_idx;
  463. __le32 dst_wr_idx;
  464. __le32 dst_r_idx;
  465. };
  466. struct ath10k_ce_crash_hdr {
  467. __le32 ce_count;
  468. __le32 reserved[3]; /* for future use */
  469. struct ath10k_ce_crash_data entries[];
  470. };
  471. #define MAX_MEM_DUMP_TYPE 5
  472. /* used for crash-dump storage, protected by data-lock */
  473. struct ath10k_fw_crash_data {
  474. guid_t guid;
  475. struct timespec64 timestamp;
  476. __le32 registers[REG_DUMP_COUNT_QCA988X];
  477. struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
  478. u8 *ramdump_buf;
  479. size_t ramdump_buf_len;
  480. };
  481. struct ath10k_debug {
  482. struct dentry *debugfs_phy;
  483. struct ath10k_fw_stats fw_stats;
  484. struct completion fw_stats_complete;
  485. bool fw_stats_done;
  486. unsigned long htt_stats_mask;
  487. struct delayed_work htt_stats_dwork;
  488. struct ath10k_dfs_stats dfs_stats;
  489. struct ath_dfs_pool_stats dfs_pool_stats;
  490. /* used for tpc-dump storage, protected by data-lock */
  491. struct ath10k_tpc_stats *tpc_stats;
  492. struct ath10k_tpc_stats_final *tpc_stats_final;
  493. struct completion tpc_complete;
  494. /* protected by conf_mutex */
  495. u64 fw_dbglog_mask;
  496. u32 fw_dbglog_level;
  497. u32 reg_addr;
  498. u32 nf_cal_period;
  499. void *cal_data;
  500. };
  501. enum ath10k_state {
  502. ATH10K_STATE_OFF = 0,
  503. ATH10K_STATE_ON,
  504. /* When doing firmware recovery the device is first powered down.
  505. * mac80211 is supposed to call in to start() hook later on. It is
  506. * however possible that driver unloading and firmware crash overlap.
  507. * mac80211 can wait on conf_mutex in stop() while the device is
  508. * stopped in ath10k_core_restart() work holding conf_mutex. The state
  509. * RESTARTED means that the device is up and mac80211 has started hw
  510. * reconfiguration. Once mac80211 is done with the reconfiguration we
  511. * set the state to STATE_ON in reconfig_complete().
  512. */
  513. ATH10K_STATE_RESTARTING,
  514. ATH10K_STATE_RESTARTED,
  515. /* The device has crashed while restarting hw. This state is like ON
  516. * but commands are blocked in HTC and -ECOMM response is given. This
  517. * prevents completion timeouts and makes the driver more responsive to
  518. * userspace commands. This is also prevents recursive recovery.
  519. */
  520. ATH10K_STATE_WEDGED,
  521. /* factory tests */
  522. ATH10K_STATE_UTF,
  523. };
  524. enum ath10k_firmware_mode {
  525. /* the default mode, standard 802.11 functionality */
  526. ATH10K_FIRMWARE_MODE_NORMAL,
  527. /* factory tests etc */
  528. ATH10K_FIRMWARE_MODE_UTF,
  529. };
  530. enum ath10k_fw_features {
  531. /* wmi_mgmt_rx_hdr contains extra RSSI information */
  532. ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
  533. /* Firmware from 10X branch. Deprecated, don't use in new code. */
  534. ATH10K_FW_FEATURE_WMI_10X = 1,
  535. /* firmware support tx frame management over WMI, otherwise it's HTT */
  536. ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
  537. /* Firmware does not support P2P */
  538. ATH10K_FW_FEATURE_NO_P2P = 3,
  539. /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
  540. * bit is required to be set as well. Deprecated, don't use in new
  541. * code.
  542. */
  543. ATH10K_FW_FEATURE_WMI_10_2 = 4,
  544. /* Some firmware revisions lack proper multi-interface client powersave
  545. * implementation. Enabling PS could result in connection drops,
  546. * traffic stalls, etc.
  547. */
  548. ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
  549. /* Some firmware revisions have an incomplete WoWLAN implementation
  550. * despite WMI service bit being advertised. This feature flag is used
  551. * to distinguish whether WoWLAN is really supported or not.
  552. */
  553. ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
  554. /* Don't trust error code from otp.bin */
  555. ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
  556. /* Some firmware revisions pad 4th hw address to 4 byte boundary making
  557. * it 8 bytes long in Native Wifi Rx decap.
  558. */
  559. ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
  560. /* Firmware supports bypassing PLL setting on init. */
  561. ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
  562. /* Raw mode support. If supported, FW supports receiving and trasmitting
  563. * frames in raw mode.
  564. */
  565. ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
  566. /* Firmware Supports Adaptive CCA*/
  567. ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
  568. /* Firmware supports management frame protection */
  569. ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
  570. /* Firmware supports pull-push model where host shares it's software
  571. * queue state with firmware and firmware generates fetch requests
  572. * telling host which queues to dequeue tx from.
  573. *
  574. * Primary function of this is improved MU-MIMO performance with
  575. * multiple clients.
  576. */
  577. ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
  578. /* Firmware supports BT-Coex without reloading firmware via pdev param.
  579. * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of
  580. * extended resource config should be enabled always. This firmware IE
  581. * is used to configure WMI_COEX_GPIO_SUPPORT.
  582. */
  583. ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,
  584. /* Unused flag and proven to be not working, enable this if you want
  585. * to experiment sending NULL func data frames in HTT TX
  586. */
  587. ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,
  588. /* Firmware allow other BSS mesh broadcast/multicast frames without
  589. * creating monitor interface. Appropriate rxfilters are programmed for
  590. * mesh vdev by firmware itself. This feature flags will be used for
  591. * not creating monitor vdev while configuring mesh node.
  592. */
  593. ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,
  594. /* Firmware does not support power save in station mode. */
  595. ATH10K_FW_FEATURE_NO_PS = 17,
  596. /* Firmware allows management tx by reference instead of by value. */
  597. ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,
  598. /* Firmware load is done externally, not by bmi */
  599. ATH10K_FW_FEATURE_NON_BMI = 19,
  600. /* keep last */
  601. ATH10K_FW_FEATURE_COUNT,
  602. };
  603. enum ath10k_dev_flags {
  604. /* Indicates that ath10k device is during CAC phase of DFS */
  605. ATH10K_CAC_RUNNING,
  606. ATH10K_FLAG_CORE_REGISTERED,
  607. /* Device has crashed and needs to restart. This indicates any pending
  608. * waiters should immediately cancel instead of waiting for a time out.
  609. */
  610. ATH10K_FLAG_CRASH_FLUSH,
  611. /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
  612. * Raw mode supports both hardware and software crypto. Native WiFi only
  613. * supports hardware crypto.
  614. */
  615. ATH10K_FLAG_RAW_MODE,
  616. /* Disable HW crypto engine */
  617. ATH10K_FLAG_HW_CRYPTO_DISABLED,
  618. /* Bluetooth coexistance enabled */
  619. ATH10K_FLAG_BTCOEX,
  620. /* Per Station statistics service */
  621. ATH10K_FLAG_PEER_STATS,
  622. };
  623. enum ath10k_cal_mode {
  624. ATH10K_CAL_MODE_FILE,
  625. ATH10K_CAL_MODE_OTP,
  626. ATH10K_CAL_MODE_DT,
  627. ATH10K_PRE_CAL_MODE_FILE,
  628. ATH10K_PRE_CAL_MODE_DT,
  629. ATH10K_CAL_MODE_EEPROM,
  630. };
  631. enum ath10k_crypt_mode {
  632. /* Only use hardware crypto engine */
  633. ATH10K_CRYPT_MODE_HW,
  634. /* Only use software crypto engine */
  635. ATH10K_CRYPT_MODE_SW,
  636. };
  637. static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
  638. {
  639. switch (mode) {
  640. case ATH10K_CAL_MODE_FILE:
  641. return "file";
  642. case ATH10K_CAL_MODE_OTP:
  643. return "otp";
  644. case ATH10K_CAL_MODE_DT:
  645. return "dt";
  646. case ATH10K_PRE_CAL_MODE_FILE:
  647. return "pre-cal-file";
  648. case ATH10K_PRE_CAL_MODE_DT:
  649. return "pre-cal-dt";
  650. case ATH10K_CAL_MODE_EEPROM:
  651. return "eeprom";
  652. }
  653. return "unknown";
  654. }
  655. enum ath10k_scan_state {
  656. ATH10K_SCAN_IDLE,
  657. ATH10K_SCAN_STARTING,
  658. ATH10K_SCAN_RUNNING,
  659. ATH10K_SCAN_ABORTING,
  660. };
  661. static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
  662. {
  663. switch (state) {
  664. case ATH10K_SCAN_IDLE:
  665. return "idle";
  666. case ATH10K_SCAN_STARTING:
  667. return "starting";
  668. case ATH10K_SCAN_RUNNING:
  669. return "running";
  670. case ATH10K_SCAN_ABORTING:
  671. return "aborting";
  672. }
  673. return "unknown";
  674. }
  675. enum ath10k_tx_pause_reason {
  676. ATH10K_TX_PAUSE_Q_FULL,
  677. ATH10K_TX_PAUSE_MAX,
  678. };
  679. struct ath10k_fw_file {
  680. const struct firmware *firmware;
  681. char fw_version[ETHTOOL_FWVERS_LEN];
  682. DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
  683. enum ath10k_fw_wmi_op_version wmi_op_version;
  684. enum ath10k_fw_htt_op_version htt_op_version;
  685. const void *firmware_data;
  686. size_t firmware_len;
  687. const void *otp_data;
  688. size_t otp_len;
  689. const void *codeswap_data;
  690. size_t codeswap_len;
  691. /* The original idea of struct ath10k_fw_file was that it only
  692. * contains struct firmware and pointers to various parts (actual
  693. * firmware binary, otp, metadata etc) of the file. This seg_info
  694. * is actually created separate but as this is used similarly as
  695. * the other firmware components it's more convenient to have it
  696. * here.
  697. */
  698. struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
  699. };
  700. struct ath10k_fw_components {
  701. const struct firmware *board;
  702. const void *board_data;
  703. size_t board_len;
  704. struct ath10k_fw_file fw_file;
  705. };
  706. struct ath10k_per_peer_tx_stats {
  707. u32 succ_bytes;
  708. u32 retry_bytes;
  709. u32 failed_bytes;
  710. u8 ratecode;
  711. u8 flags;
  712. u16 peer_id;
  713. u16 succ_pkts;
  714. u16 retry_pkts;
  715. u16 failed_pkts;
  716. u16 duration;
  717. u32 reserved1;
  718. u32 reserved2;
  719. };
  720. struct ath10k {
  721. struct ath_common ath_common;
  722. struct ieee80211_hw *hw;
  723. struct ieee80211_ops *ops;
  724. struct device *dev;
  725. u8 mac_addr[ETH_ALEN];
  726. enum ath10k_hw_rev hw_rev;
  727. u16 dev_id;
  728. u32 chip_id;
  729. u32 target_version;
  730. u8 fw_version_major;
  731. u32 fw_version_minor;
  732. u16 fw_version_release;
  733. u16 fw_version_build;
  734. u32 fw_stats_req_mask;
  735. u32 phy_capability;
  736. u32 hw_min_tx_power;
  737. u32 hw_max_tx_power;
  738. u32 hw_eeprom_rd;
  739. u32 ht_cap_info;
  740. u32 vht_cap_info;
  741. u32 num_rf_chains;
  742. u32 max_spatial_stream;
  743. /* protected by conf_mutex */
  744. u32 low_5ghz_chan;
  745. u32 high_5ghz_chan;
  746. bool ani_enabled;
  747. bool p2p;
  748. struct {
  749. enum ath10k_bus bus;
  750. const struct ath10k_hif_ops *ops;
  751. } hif;
  752. struct completion target_suspend;
  753. const struct ath10k_hw_regs *regs;
  754. const struct ath10k_hw_ce_regs *hw_ce_regs;
  755. const struct ath10k_hw_values *hw_values;
  756. struct ath10k_bmi bmi;
  757. struct ath10k_wmi wmi;
  758. struct ath10k_htc htc;
  759. struct ath10k_htt htt;
  760. struct ath10k_hw_params hw_params;
  761. /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
  762. struct ath10k_fw_components normal_mode_fw;
  763. /* READ-ONLY images of the running firmware, which can be either
  764. * normal or UTF. Do not modify, release etc!
  765. */
  766. const struct ath10k_fw_components *running_fw;
  767. const struct firmware *pre_cal_file;
  768. const struct firmware *cal_file;
  769. struct {
  770. u32 vendor;
  771. u32 device;
  772. u32 subsystem_vendor;
  773. u32 subsystem_device;
  774. bool bmi_ids_valid;
  775. u8 bmi_board_id;
  776. u8 bmi_chip_id;
  777. char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
  778. } id;
  779. int fw_api;
  780. int bd_api;
  781. enum ath10k_cal_mode cal_mode;
  782. struct {
  783. struct completion started;
  784. struct completion completed;
  785. struct completion on_channel;
  786. struct delayed_work timeout;
  787. enum ath10k_scan_state state;
  788. bool is_roc;
  789. int vdev_id;
  790. int roc_freq;
  791. bool roc_notify;
  792. } scan;
  793. struct {
  794. struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
  795. } mac;
  796. /* should never be NULL; needed for regular htt rx */
  797. struct ieee80211_channel *rx_channel;
  798. /* valid during scan; needed for mgmt rx during scan */
  799. struct ieee80211_channel *scan_channel;
  800. /* current operating channel definition */
  801. struct cfg80211_chan_def chandef;
  802. /* currently configured operating channel in firmware */
  803. struct ieee80211_channel *tgt_oper_chan;
  804. unsigned long long free_vdev_map;
  805. struct ath10k_vif *monitor_arvif;
  806. bool monitor;
  807. int monitor_vdev_id;
  808. bool monitor_started;
  809. unsigned int filter_flags;
  810. unsigned long dev_flags;
  811. bool dfs_block_radar_events;
  812. /* protected by conf_mutex */
  813. bool radar_enabled;
  814. int num_started_vdevs;
  815. /* Protected by conf-mutex */
  816. u8 cfg_tx_chainmask;
  817. u8 cfg_rx_chainmask;
  818. struct completion install_key_done;
  819. struct completion vdev_setup_done;
  820. struct workqueue_struct *workqueue;
  821. /* Auxiliary workqueue */
  822. struct workqueue_struct *workqueue_aux;
  823. /* prevents concurrent FW reconfiguration */
  824. struct mutex conf_mutex;
  825. /* protects shared structure data */
  826. spinlock_t data_lock;
  827. /* protects: ar->txqs, artxq->list */
  828. spinlock_t txqs_lock;
  829. struct list_head txqs;
  830. struct list_head arvifs;
  831. struct list_head peers;
  832. struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
  833. wait_queue_head_t peer_mapping_wq;
  834. /* protected by conf_mutex */
  835. int num_peers;
  836. int num_stations;
  837. int max_num_peers;
  838. int max_num_stations;
  839. int max_num_vdevs;
  840. int max_num_tdls_vdevs;
  841. int num_active_peers;
  842. int num_tids;
  843. struct work_struct svc_rdy_work;
  844. struct sk_buff *svc_rdy_skb;
  845. struct work_struct offchan_tx_work;
  846. struct sk_buff_head offchan_tx_queue;
  847. struct completion offchan_tx_completed;
  848. struct sk_buff *offchan_tx_skb;
  849. struct work_struct wmi_mgmt_tx_work;
  850. struct sk_buff_head wmi_mgmt_tx_queue;
  851. enum ath10k_state state;
  852. struct work_struct register_work;
  853. struct work_struct restart_work;
  854. /* cycle count is reported twice for each visited channel during scan.
  855. * access protected by data_lock
  856. */
  857. u32 survey_last_rx_clear_count;
  858. u32 survey_last_cycle_count;
  859. struct survey_info survey[ATH10K_NUM_CHANS];
  860. /* Channel info events are expected to come in pairs without and with
  861. * COMPLETE flag set respectively for each channel visit during scan.
  862. *
  863. * However there are deviations from this rule. This flag is used to
  864. * avoid reporting garbage data.
  865. */
  866. bool ch_info_can_report_survey;
  867. struct completion bss_survey_done;
  868. struct dfs_pattern_detector *dfs_detector;
  869. unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
  870. #ifdef CONFIG_ATH10K_DEBUGFS
  871. struct ath10k_debug debug;
  872. struct {
  873. /* relay(fs) channel for spectral scan */
  874. struct rchan *rfs_chan_spec_scan;
  875. /* spectral_mode and spec_config are protected by conf_mutex */
  876. enum ath10k_spectral_mode mode;
  877. struct ath10k_spec_scan config;
  878. } spectral;
  879. #endif
  880. u32 pktlog_filter;
  881. #ifdef CONFIG_DEV_COREDUMP
  882. struct {
  883. struct ath10k_fw_crash_data *fw_crash_data;
  884. } coredump;
  885. #endif
  886. struct {
  887. /* protected by conf_mutex */
  888. struct ath10k_fw_components utf_mode_fw;
  889. /* protected by data_lock */
  890. bool utf_monitor;
  891. } testmode;
  892. struct {
  893. /* protected by data_lock */
  894. u32 fw_crash_counter;
  895. u32 fw_warm_reset_counter;
  896. u32 fw_cold_reset_counter;
  897. } stats;
  898. struct ath10k_thermal thermal;
  899. struct ath10k_wow wow;
  900. struct ath10k_per_peer_tx_stats peer_tx_stats;
  901. /* NAPI */
  902. struct net_device napi_dev;
  903. struct napi_struct napi;
  904. struct work_struct set_coverage_class_work;
  905. /* protected by conf_mutex */
  906. struct {
  907. /* writing also protected by data_lock */
  908. s16 coverage_class;
  909. u32 reg_phyclk;
  910. u32 reg_slottime_conf;
  911. u32 reg_slottime_orig;
  912. u32 reg_ack_cts_timeout_conf;
  913. u32 reg_ack_cts_timeout_orig;
  914. } fw_coverage;
  915. u32 ampdu_reference;
  916. void *ce_priv;
  917. u32 sta_tid_stats_mask;
  918. /* must be last */
  919. u8 drv_priv[0] __aligned(sizeof(void *));
  920. };
  921. static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
  922. {
  923. if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
  924. test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  925. return true;
  926. return false;
  927. }
  928. extern unsigned long ath10k_coredump_mask;
  929. struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
  930. enum ath10k_bus bus,
  931. enum ath10k_hw_rev hw_rev,
  932. const struct ath10k_hif_ops *hif_ops);
  933. void ath10k_core_destroy(struct ath10k *ar);
  934. void ath10k_core_get_fw_features_str(struct ath10k *ar,
  935. char *buf,
  936. size_t max_len);
  937. int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
  938. struct ath10k_fw_file *fw_file);
  939. int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
  940. const struct ath10k_fw_components *fw_components);
  941. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
  942. void ath10k_core_stop(struct ath10k *ar);
  943. int ath10k_core_register(struct ath10k *ar, u32 chip_id);
  944. void ath10k_core_unregister(struct ath10k *ar);
  945. #endif /* _CORE_H_ */