qede_main.c 57 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/pci.h>
  34. #include <linux/version.h>
  35. #include <linux/device.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/skbuff.h>
  39. #include <linux/errno.h>
  40. #include <linux/list.h>
  41. #include <linux/string.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/interrupt.h>
  44. #include <asm/byteorder.h>
  45. #include <asm/param.h>
  46. #include <linux/io.h>
  47. #include <linux/netdev_features.h>
  48. #include <linux/udp.h>
  49. #include <linux/tcp.h>
  50. #include <net/udp_tunnel.h>
  51. #include <linux/ip.h>
  52. #include <net/ipv6.h>
  53. #include <net/tcp.h>
  54. #include <linux/if_ether.h>
  55. #include <linux/if_vlan.h>
  56. #include <linux/pkt_sched.h>
  57. #include <linux/ethtool.h>
  58. #include <linux/in.h>
  59. #include <linux/random.h>
  60. #include <net/ip6_checksum.h>
  61. #include <linux/bitops.h>
  62. #include <linux/vmalloc.h>
  63. #include "qede.h"
  64. #include "qede_ptp.h"
  65. static char version[] =
  66. "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
  67. MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
  68. MODULE_LICENSE("GPL");
  69. MODULE_VERSION(DRV_MODULE_VERSION);
  70. static uint debug;
  71. module_param(debug, uint, 0);
  72. MODULE_PARM_DESC(debug, " Default debug msglevel");
  73. static const struct qed_eth_ops *qed_ops;
  74. #define CHIP_NUM_57980S_40 0x1634
  75. #define CHIP_NUM_57980S_10 0x1666
  76. #define CHIP_NUM_57980S_MF 0x1636
  77. #define CHIP_NUM_57980S_100 0x1644
  78. #define CHIP_NUM_57980S_50 0x1654
  79. #define CHIP_NUM_57980S_25 0x1656
  80. #define CHIP_NUM_57980S_IOV 0x1664
  81. #define CHIP_NUM_AH 0x8070
  82. #define CHIP_NUM_AH_IOV 0x8090
  83. #ifndef PCI_DEVICE_ID_NX2_57980E
  84. #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
  85. #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
  86. #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
  87. #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
  88. #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
  89. #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
  90. #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
  91. #define PCI_DEVICE_ID_AH CHIP_NUM_AH
  92. #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
  93. #endif
  94. enum qede_pci_private {
  95. QEDE_PRIVATE_PF,
  96. QEDE_PRIVATE_VF
  97. };
  98. static const struct pci_device_id qede_pci_tbl[] = {
  99. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
  100. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
  101. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
  102. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
  103. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
  104. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
  105. #ifdef CONFIG_QED_SRIOV
  106. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
  107. #endif
  108. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
  109. #ifdef CONFIG_QED_SRIOV
  110. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
  111. #endif
  112. { 0 }
  113. };
  114. MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
  115. static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
  116. #define TX_TIMEOUT (5 * HZ)
  117. /* Utilize last protocol index for XDP */
  118. #define XDP_PI 11
  119. static void qede_remove(struct pci_dev *pdev);
  120. static void qede_shutdown(struct pci_dev *pdev);
  121. static void qede_link_update(void *dev, struct qed_link_output *link);
  122. /* The qede lock is used to protect driver state change and driver flows that
  123. * are not reentrant.
  124. */
  125. void __qede_lock(struct qede_dev *edev)
  126. {
  127. mutex_lock(&edev->qede_lock);
  128. }
  129. void __qede_unlock(struct qede_dev *edev)
  130. {
  131. mutex_unlock(&edev->qede_lock);
  132. }
  133. #ifdef CONFIG_QED_SRIOV
  134. static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
  135. __be16 vlan_proto)
  136. {
  137. struct qede_dev *edev = netdev_priv(ndev);
  138. if (vlan > 4095) {
  139. DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
  140. return -EINVAL;
  141. }
  142. if (vlan_proto != htons(ETH_P_8021Q))
  143. return -EPROTONOSUPPORT;
  144. DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
  145. vlan, vf);
  146. return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
  147. }
  148. static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
  149. {
  150. struct qede_dev *edev = netdev_priv(ndev);
  151. DP_VERBOSE(edev, QED_MSG_IOV,
  152. "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
  153. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
  154. if (!is_valid_ether_addr(mac)) {
  155. DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
  156. return -EINVAL;
  157. }
  158. return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
  159. }
  160. static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
  161. {
  162. struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
  163. struct qed_dev_info *qed_info = &edev->dev_info.common;
  164. struct qed_update_vport_params *vport_params;
  165. int rc;
  166. vport_params = vzalloc(sizeof(*vport_params));
  167. if (!vport_params)
  168. return -ENOMEM;
  169. DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
  170. rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
  171. /* Enable/Disable Tx switching for PF */
  172. if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
  173. qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
  174. vport_params->vport_id = 0;
  175. vport_params->update_tx_switching_flg = 1;
  176. vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
  177. edev->ops->vport_update(edev->cdev, vport_params);
  178. }
  179. vfree(vport_params);
  180. return rc;
  181. }
  182. #endif
  183. static struct pci_driver qede_pci_driver = {
  184. .name = "qede",
  185. .id_table = qede_pci_tbl,
  186. .probe = qede_probe,
  187. .remove = qede_remove,
  188. .shutdown = qede_shutdown,
  189. #ifdef CONFIG_QED_SRIOV
  190. .sriov_configure = qede_sriov_configure,
  191. #endif
  192. };
  193. static struct qed_eth_cb_ops qede_ll_ops = {
  194. {
  195. #ifdef CONFIG_RFS_ACCEL
  196. .arfs_filter_op = qede_arfs_filter_op,
  197. #endif
  198. .link_update = qede_link_update,
  199. },
  200. .force_mac = qede_force_mac,
  201. .ports_update = qede_udp_ports_update,
  202. };
  203. static int qede_netdev_event(struct notifier_block *this, unsigned long event,
  204. void *ptr)
  205. {
  206. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  207. struct ethtool_drvinfo drvinfo;
  208. struct qede_dev *edev;
  209. if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
  210. goto done;
  211. /* Check whether this is a qede device */
  212. if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
  213. goto done;
  214. memset(&drvinfo, 0, sizeof(drvinfo));
  215. ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
  216. if (strcmp(drvinfo.driver, "qede"))
  217. goto done;
  218. edev = netdev_priv(ndev);
  219. switch (event) {
  220. case NETDEV_CHANGENAME:
  221. /* Notify qed of the name change */
  222. if (!edev->ops || !edev->ops->common)
  223. goto done;
  224. edev->ops->common->set_name(edev->cdev, edev->ndev->name);
  225. break;
  226. case NETDEV_CHANGEADDR:
  227. edev = netdev_priv(ndev);
  228. qede_rdma_event_changeaddr(edev);
  229. break;
  230. }
  231. done:
  232. return NOTIFY_DONE;
  233. }
  234. static struct notifier_block qede_netdev_notifier = {
  235. .notifier_call = qede_netdev_event,
  236. };
  237. static
  238. int __init qede_init(void)
  239. {
  240. int ret;
  241. pr_info("qede_init: %s\n", version);
  242. qed_ops = qed_get_eth_ops();
  243. if (!qed_ops) {
  244. pr_notice("Failed to get qed ethtool operations\n");
  245. return -EINVAL;
  246. }
  247. /* Must register notifier before pci ops, since we might miss
  248. * interface rename after pci probe and netdev registration.
  249. */
  250. ret = register_netdevice_notifier(&qede_netdev_notifier);
  251. if (ret) {
  252. pr_notice("Failed to register netdevice_notifier\n");
  253. qed_put_eth_ops();
  254. return -EINVAL;
  255. }
  256. ret = pci_register_driver(&qede_pci_driver);
  257. if (ret) {
  258. pr_notice("Failed to register driver\n");
  259. unregister_netdevice_notifier(&qede_netdev_notifier);
  260. qed_put_eth_ops();
  261. return -EINVAL;
  262. }
  263. return 0;
  264. }
  265. static void __exit qede_cleanup(void)
  266. {
  267. if (debug & QED_LOG_INFO_MASK)
  268. pr_info("qede_cleanup called\n");
  269. unregister_netdevice_notifier(&qede_netdev_notifier);
  270. pci_unregister_driver(&qede_pci_driver);
  271. qed_put_eth_ops();
  272. }
  273. module_init(qede_init);
  274. module_exit(qede_cleanup);
  275. static int qede_open(struct net_device *ndev);
  276. static int qede_close(struct net_device *ndev);
  277. void qede_fill_by_demand_stats(struct qede_dev *edev)
  278. {
  279. struct qede_stats_common *p_common = &edev->stats.common;
  280. struct qed_eth_stats stats;
  281. edev->ops->get_vport_stats(edev->cdev, &stats);
  282. p_common->no_buff_discards = stats.common.no_buff_discards;
  283. p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
  284. p_common->ttl0_discard = stats.common.ttl0_discard;
  285. p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
  286. p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
  287. p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
  288. p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
  289. p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
  290. p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
  291. p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
  292. p_common->mac_filter_discards = stats.common.mac_filter_discards;
  293. p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
  294. p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
  295. p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
  296. p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
  297. p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
  298. p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
  299. p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
  300. p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
  301. p_common->coalesced_events = stats.common.tpa_coalesced_events;
  302. p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
  303. p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
  304. p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
  305. p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
  306. p_common->rx_65_to_127_byte_packets =
  307. stats.common.rx_65_to_127_byte_packets;
  308. p_common->rx_128_to_255_byte_packets =
  309. stats.common.rx_128_to_255_byte_packets;
  310. p_common->rx_256_to_511_byte_packets =
  311. stats.common.rx_256_to_511_byte_packets;
  312. p_common->rx_512_to_1023_byte_packets =
  313. stats.common.rx_512_to_1023_byte_packets;
  314. p_common->rx_1024_to_1518_byte_packets =
  315. stats.common.rx_1024_to_1518_byte_packets;
  316. p_common->rx_crc_errors = stats.common.rx_crc_errors;
  317. p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
  318. p_common->rx_pause_frames = stats.common.rx_pause_frames;
  319. p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
  320. p_common->rx_align_errors = stats.common.rx_align_errors;
  321. p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
  322. p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
  323. p_common->rx_jabbers = stats.common.rx_jabbers;
  324. p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
  325. p_common->rx_fragments = stats.common.rx_fragments;
  326. p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
  327. p_common->tx_65_to_127_byte_packets =
  328. stats.common.tx_65_to_127_byte_packets;
  329. p_common->tx_128_to_255_byte_packets =
  330. stats.common.tx_128_to_255_byte_packets;
  331. p_common->tx_256_to_511_byte_packets =
  332. stats.common.tx_256_to_511_byte_packets;
  333. p_common->tx_512_to_1023_byte_packets =
  334. stats.common.tx_512_to_1023_byte_packets;
  335. p_common->tx_1024_to_1518_byte_packets =
  336. stats.common.tx_1024_to_1518_byte_packets;
  337. p_common->tx_pause_frames = stats.common.tx_pause_frames;
  338. p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
  339. p_common->brb_truncates = stats.common.brb_truncates;
  340. p_common->brb_discards = stats.common.brb_discards;
  341. p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
  342. if (QEDE_IS_BB(edev)) {
  343. struct qede_stats_bb *p_bb = &edev->stats.bb;
  344. p_bb->rx_1519_to_1522_byte_packets =
  345. stats.bb.rx_1519_to_1522_byte_packets;
  346. p_bb->rx_1519_to_2047_byte_packets =
  347. stats.bb.rx_1519_to_2047_byte_packets;
  348. p_bb->rx_2048_to_4095_byte_packets =
  349. stats.bb.rx_2048_to_4095_byte_packets;
  350. p_bb->rx_4096_to_9216_byte_packets =
  351. stats.bb.rx_4096_to_9216_byte_packets;
  352. p_bb->rx_9217_to_16383_byte_packets =
  353. stats.bb.rx_9217_to_16383_byte_packets;
  354. p_bb->tx_1519_to_2047_byte_packets =
  355. stats.bb.tx_1519_to_2047_byte_packets;
  356. p_bb->tx_2048_to_4095_byte_packets =
  357. stats.bb.tx_2048_to_4095_byte_packets;
  358. p_bb->tx_4096_to_9216_byte_packets =
  359. stats.bb.tx_4096_to_9216_byte_packets;
  360. p_bb->tx_9217_to_16383_byte_packets =
  361. stats.bb.tx_9217_to_16383_byte_packets;
  362. p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
  363. p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
  364. } else {
  365. struct qede_stats_ah *p_ah = &edev->stats.ah;
  366. p_ah->rx_1519_to_max_byte_packets =
  367. stats.ah.rx_1519_to_max_byte_packets;
  368. p_ah->tx_1519_to_max_byte_packets =
  369. stats.ah.tx_1519_to_max_byte_packets;
  370. }
  371. }
  372. static void qede_get_stats64(struct net_device *dev,
  373. struct rtnl_link_stats64 *stats)
  374. {
  375. struct qede_dev *edev = netdev_priv(dev);
  376. struct qede_stats_common *p_common;
  377. qede_fill_by_demand_stats(edev);
  378. p_common = &edev->stats.common;
  379. stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
  380. p_common->rx_bcast_pkts;
  381. stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
  382. p_common->tx_bcast_pkts;
  383. stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
  384. p_common->rx_bcast_bytes;
  385. stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
  386. p_common->tx_bcast_bytes;
  387. stats->tx_errors = p_common->tx_err_drop_pkts;
  388. stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
  389. stats->rx_fifo_errors = p_common->no_buff_discards;
  390. if (QEDE_IS_BB(edev))
  391. stats->collisions = edev->stats.bb.tx_total_collisions;
  392. stats->rx_crc_errors = p_common->rx_crc_errors;
  393. stats->rx_frame_errors = p_common->rx_align_errors;
  394. }
  395. #ifdef CONFIG_QED_SRIOV
  396. static int qede_get_vf_config(struct net_device *dev, int vfidx,
  397. struct ifla_vf_info *ivi)
  398. {
  399. struct qede_dev *edev = netdev_priv(dev);
  400. if (!edev->ops)
  401. return -EINVAL;
  402. return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
  403. }
  404. static int qede_set_vf_rate(struct net_device *dev, int vfidx,
  405. int min_tx_rate, int max_tx_rate)
  406. {
  407. struct qede_dev *edev = netdev_priv(dev);
  408. return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
  409. max_tx_rate);
  410. }
  411. static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
  412. {
  413. struct qede_dev *edev = netdev_priv(dev);
  414. if (!edev->ops)
  415. return -EINVAL;
  416. return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
  417. }
  418. static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
  419. int link_state)
  420. {
  421. struct qede_dev *edev = netdev_priv(dev);
  422. if (!edev->ops)
  423. return -EINVAL;
  424. return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
  425. }
  426. static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
  427. {
  428. struct qede_dev *edev = netdev_priv(dev);
  429. if (!edev->ops)
  430. return -EINVAL;
  431. return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
  432. }
  433. #endif
  434. static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  435. {
  436. struct qede_dev *edev = netdev_priv(dev);
  437. if (!netif_running(dev))
  438. return -EAGAIN;
  439. switch (cmd) {
  440. case SIOCSHWTSTAMP:
  441. return qede_ptp_hw_ts(edev, ifr);
  442. default:
  443. DP_VERBOSE(edev, QED_MSG_DEBUG,
  444. "default IOCTL cmd 0x%x\n", cmd);
  445. return -EOPNOTSUPP;
  446. }
  447. return 0;
  448. }
  449. static const struct net_device_ops qede_netdev_ops = {
  450. .ndo_open = qede_open,
  451. .ndo_stop = qede_close,
  452. .ndo_start_xmit = qede_start_xmit,
  453. .ndo_set_rx_mode = qede_set_rx_mode,
  454. .ndo_set_mac_address = qede_set_mac_addr,
  455. .ndo_validate_addr = eth_validate_addr,
  456. .ndo_change_mtu = qede_change_mtu,
  457. .ndo_do_ioctl = qede_ioctl,
  458. #ifdef CONFIG_QED_SRIOV
  459. .ndo_set_vf_mac = qede_set_vf_mac,
  460. .ndo_set_vf_vlan = qede_set_vf_vlan,
  461. .ndo_set_vf_trust = qede_set_vf_trust,
  462. #endif
  463. .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
  464. .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
  465. .ndo_fix_features = qede_fix_features,
  466. .ndo_set_features = qede_set_features,
  467. .ndo_get_stats64 = qede_get_stats64,
  468. #ifdef CONFIG_QED_SRIOV
  469. .ndo_set_vf_link_state = qede_set_vf_link_state,
  470. .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
  471. .ndo_get_vf_config = qede_get_vf_config,
  472. .ndo_set_vf_rate = qede_set_vf_rate,
  473. #endif
  474. .ndo_udp_tunnel_add = qede_udp_tunnel_add,
  475. .ndo_udp_tunnel_del = qede_udp_tunnel_del,
  476. .ndo_features_check = qede_features_check,
  477. .ndo_bpf = qede_xdp,
  478. #ifdef CONFIG_RFS_ACCEL
  479. .ndo_rx_flow_steer = qede_rx_flow_steer,
  480. #endif
  481. };
  482. static const struct net_device_ops qede_netdev_vf_ops = {
  483. .ndo_open = qede_open,
  484. .ndo_stop = qede_close,
  485. .ndo_start_xmit = qede_start_xmit,
  486. .ndo_set_rx_mode = qede_set_rx_mode,
  487. .ndo_set_mac_address = qede_set_mac_addr,
  488. .ndo_validate_addr = eth_validate_addr,
  489. .ndo_change_mtu = qede_change_mtu,
  490. .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
  491. .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
  492. .ndo_fix_features = qede_fix_features,
  493. .ndo_set_features = qede_set_features,
  494. .ndo_get_stats64 = qede_get_stats64,
  495. .ndo_udp_tunnel_add = qede_udp_tunnel_add,
  496. .ndo_udp_tunnel_del = qede_udp_tunnel_del,
  497. .ndo_features_check = qede_features_check,
  498. };
  499. static const struct net_device_ops qede_netdev_vf_xdp_ops = {
  500. .ndo_open = qede_open,
  501. .ndo_stop = qede_close,
  502. .ndo_start_xmit = qede_start_xmit,
  503. .ndo_set_rx_mode = qede_set_rx_mode,
  504. .ndo_set_mac_address = qede_set_mac_addr,
  505. .ndo_validate_addr = eth_validate_addr,
  506. .ndo_change_mtu = qede_change_mtu,
  507. .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
  508. .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
  509. .ndo_fix_features = qede_fix_features,
  510. .ndo_set_features = qede_set_features,
  511. .ndo_get_stats64 = qede_get_stats64,
  512. .ndo_udp_tunnel_add = qede_udp_tunnel_add,
  513. .ndo_udp_tunnel_del = qede_udp_tunnel_del,
  514. .ndo_features_check = qede_features_check,
  515. .ndo_bpf = qede_xdp,
  516. };
  517. /* -------------------------------------------------------------------------
  518. * START OF PROBE / REMOVE
  519. * -------------------------------------------------------------------------
  520. */
  521. static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
  522. struct pci_dev *pdev,
  523. struct qed_dev_eth_info *info,
  524. u32 dp_module, u8 dp_level)
  525. {
  526. struct net_device *ndev;
  527. struct qede_dev *edev;
  528. ndev = alloc_etherdev_mqs(sizeof(*edev),
  529. info->num_queues, info->num_queues);
  530. if (!ndev) {
  531. pr_err("etherdev allocation failed\n");
  532. return NULL;
  533. }
  534. edev = netdev_priv(ndev);
  535. edev->ndev = ndev;
  536. edev->cdev = cdev;
  537. edev->pdev = pdev;
  538. edev->dp_module = dp_module;
  539. edev->dp_level = dp_level;
  540. edev->ops = qed_ops;
  541. edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
  542. edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
  543. DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
  544. info->num_queues, info->num_queues);
  545. SET_NETDEV_DEV(ndev, &pdev->dev);
  546. memset(&edev->stats, 0, sizeof(edev->stats));
  547. memcpy(&edev->dev_info, info, sizeof(*info));
  548. /* As ethtool doesn't have the ability to show WoL behavior as
  549. * 'default', if device supports it declare it's enabled.
  550. */
  551. if (edev->dev_info.common.wol_support)
  552. edev->wol_enabled = true;
  553. INIT_LIST_HEAD(&edev->vlan_list);
  554. return edev;
  555. }
  556. static void qede_init_ndev(struct qede_dev *edev)
  557. {
  558. struct net_device *ndev = edev->ndev;
  559. struct pci_dev *pdev = edev->pdev;
  560. bool udp_tunnel_enable = false;
  561. netdev_features_t hw_features;
  562. pci_set_drvdata(pdev, ndev);
  563. ndev->mem_start = edev->dev_info.common.pci_mem_start;
  564. ndev->base_addr = ndev->mem_start;
  565. ndev->mem_end = edev->dev_info.common.pci_mem_end;
  566. ndev->irq = edev->dev_info.common.pci_irq;
  567. ndev->watchdog_timeo = TX_TIMEOUT;
  568. if (IS_VF(edev)) {
  569. if (edev->dev_info.xdp_supported)
  570. ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
  571. else
  572. ndev->netdev_ops = &qede_netdev_vf_ops;
  573. } else {
  574. ndev->netdev_ops = &qede_netdev_ops;
  575. }
  576. qede_set_ethtool_ops(ndev);
  577. ndev->priv_flags |= IFF_UNICAST_FLT;
  578. /* user-changeble features */
  579. hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
  580. NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  581. NETIF_F_TSO | NETIF_F_TSO6;
  582. if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1)
  583. hw_features |= NETIF_F_NTUPLE;
  584. if (edev->dev_info.common.vxlan_enable ||
  585. edev->dev_info.common.geneve_enable)
  586. udp_tunnel_enable = true;
  587. if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
  588. hw_features |= NETIF_F_TSO_ECN;
  589. ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  590. NETIF_F_SG | NETIF_F_TSO |
  591. NETIF_F_TSO_ECN | NETIF_F_TSO6 |
  592. NETIF_F_RXCSUM;
  593. }
  594. if (udp_tunnel_enable) {
  595. hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
  596. NETIF_F_GSO_UDP_TUNNEL_CSUM);
  597. ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
  598. NETIF_F_GSO_UDP_TUNNEL_CSUM);
  599. }
  600. if (edev->dev_info.common.gre_enable) {
  601. hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
  602. ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
  603. NETIF_F_GSO_GRE_CSUM);
  604. }
  605. ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
  606. NETIF_F_HIGHDMA;
  607. ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
  608. NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
  609. NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
  610. ndev->hw_features = hw_features;
  611. /* MTU range: 46 - 9600 */
  612. ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
  613. ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
  614. /* Set network device HW mac */
  615. ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
  616. ndev->mtu = edev->dev_info.common.mtu;
  617. }
  618. /* This function converts from 32b param to two params of level and module
  619. * Input 32b decoding:
  620. * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
  621. * 'happy' flow, e.g. memory allocation failed.
  622. * b30 - enable all INFO prints. INFO prints are for major steps in the flow
  623. * and provide important parameters.
  624. * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
  625. * module. VERBOSE prints are for tracking the specific flow in low level.
  626. *
  627. * Notice that the level should be that of the lowest required logs.
  628. */
  629. void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
  630. {
  631. *p_dp_level = QED_LEVEL_NOTICE;
  632. *p_dp_module = 0;
  633. if (debug & QED_LOG_VERBOSE_MASK) {
  634. *p_dp_level = QED_LEVEL_VERBOSE;
  635. *p_dp_module = (debug & 0x3FFFFFFF);
  636. } else if (debug & QED_LOG_INFO_MASK) {
  637. *p_dp_level = QED_LEVEL_INFO;
  638. } else if (debug & QED_LOG_NOTICE_MASK) {
  639. *p_dp_level = QED_LEVEL_NOTICE;
  640. }
  641. }
  642. static void qede_free_fp_array(struct qede_dev *edev)
  643. {
  644. if (edev->fp_array) {
  645. struct qede_fastpath *fp;
  646. int i;
  647. for_each_queue(i) {
  648. fp = &edev->fp_array[i];
  649. kfree(fp->sb_info);
  650. /* Handle mem alloc failure case where qede_init_fp
  651. * didn't register xdp_rxq_info yet.
  652. * Implicit only (fp->type & QEDE_FASTPATH_RX)
  653. */
  654. if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
  655. xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
  656. kfree(fp->rxq);
  657. kfree(fp->xdp_tx);
  658. kfree(fp->txq);
  659. }
  660. kfree(edev->fp_array);
  661. }
  662. edev->num_queues = 0;
  663. edev->fp_num_tx = 0;
  664. edev->fp_num_rx = 0;
  665. }
  666. static int qede_alloc_fp_array(struct qede_dev *edev)
  667. {
  668. u8 fp_combined, fp_rx = edev->fp_num_rx;
  669. struct qede_fastpath *fp;
  670. int i;
  671. edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
  672. sizeof(*edev->fp_array), GFP_KERNEL);
  673. if (!edev->fp_array) {
  674. DP_NOTICE(edev, "fp array allocation failed\n");
  675. goto err;
  676. }
  677. fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
  678. /* Allocate the FP elements for Rx queues followed by combined and then
  679. * the Tx. This ordering should be maintained so that the respective
  680. * queues (Rx or Tx) will be together in the fastpath array and the
  681. * associated ids will be sequential.
  682. */
  683. for_each_queue(i) {
  684. fp = &edev->fp_array[i];
  685. fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
  686. if (!fp->sb_info) {
  687. DP_NOTICE(edev, "sb info struct allocation failed\n");
  688. goto err;
  689. }
  690. if (fp_rx) {
  691. fp->type = QEDE_FASTPATH_RX;
  692. fp_rx--;
  693. } else if (fp_combined) {
  694. fp->type = QEDE_FASTPATH_COMBINED;
  695. fp_combined--;
  696. } else {
  697. fp->type = QEDE_FASTPATH_TX;
  698. }
  699. if (fp->type & QEDE_FASTPATH_TX) {
  700. fp->txq = kzalloc(sizeof(*fp->txq), GFP_KERNEL);
  701. if (!fp->txq)
  702. goto err;
  703. }
  704. if (fp->type & QEDE_FASTPATH_RX) {
  705. fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
  706. if (!fp->rxq)
  707. goto err;
  708. if (edev->xdp_prog) {
  709. fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
  710. GFP_KERNEL);
  711. if (!fp->xdp_tx)
  712. goto err;
  713. fp->type |= QEDE_FASTPATH_XDP;
  714. }
  715. }
  716. }
  717. return 0;
  718. err:
  719. qede_free_fp_array(edev);
  720. return -ENOMEM;
  721. }
  722. static void qede_sp_task(struct work_struct *work)
  723. {
  724. struct qede_dev *edev = container_of(work, struct qede_dev,
  725. sp_task.work);
  726. __qede_lock(edev);
  727. if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
  728. if (edev->state == QEDE_STATE_OPEN)
  729. qede_config_rx_mode(edev->ndev);
  730. #ifdef CONFIG_RFS_ACCEL
  731. if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
  732. if (edev->state == QEDE_STATE_OPEN)
  733. qede_process_arfs_filters(edev, false);
  734. }
  735. #endif
  736. __qede_unlock(edev);
  737. }
  738. static void qede_update_pf_params(struct qed_dev *cdev)
  739. {
  740. struct qed_pf_params pf_params;
  741. /* 64 rx + 64 tx + 64 XDP */
  742. memset(&pf_params, 0, sizeof(struct qed_pf_params));
  743. pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * 3;
  744. /* Same for VFs - make sure they'll have sufficient connections
  745. * to support XDP Tx queues.
  746. */
  747. pf_params.eth_pf_params.num_vf_cons = 48;
  748. pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
  749. qed_ops->common->update_pf_params(cdev, &pf_params);
  750. }
  751. #define QEDE_FW_VER_STR_SIZE 80
  752. static void qede_log_probe(struct qede_dev *edev)
  753. {
  754. struct qed_dev_info *p_dev_info = &edev->dev_info.common;
  755. u8 buf[QEDE_FW_VER_STR_SIZE];
  756. size_t left_size;
  757. snprintf(buf, QEDE_FW_VER_STR_SIZE,
  758. "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
  759. p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
  760. p_dev_info->fw_eng,
  761. (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
  762. QED_MFW_VERSION_3_OFFSET,
  763. (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
  764. QED_MFW_VERSION_2_OFFSET,
  765. (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
  766. QED_MFW_VERSION_1_OFFSET,
  767. (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
  768. QED_MFW_VERSION_0_OFFSET);
  769. left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
  770. if (p_dev_info->mbi_version && left_size)
  771. snprintf(buf + strlen(buf), left_size,
  772. " [MBI %d.%d.%d]",
  773. (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
  774. QED_MBI_VERSION_2_OFFSET,
  775. (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
  776. QED_MBI_VERSION_1_OFFSET,
  777. (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
  778. QED_MBI_VERSION_0_OFFSET);
  779. pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
  780. PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
  781. buf, edev->ndev->name);
  782. }
  783. enum qede_probe_mode {
  784. QEDE_PROBE_NORMAL,
  785. };
  786. static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
  787. bool is_vf, enum qede_probe_mode mode)
  788. {
  789. struct qed_probe_params probe_params;
  790. struct qed_slowpath_params sp_params;
  791. struct qed_dev_eth_info dev_info;
  792. struct qede_dev *edev;
  793. struct qed_dev *cdev;
  794. int rc;
  795. if (unlikely(dp_level & QED_LEVEL_INFO))
  796. pr_notice("Starting qede probe\n");
  797. memset(&probe_params, 0, sizeof(probe_params));
  798. probe_params.protocol = QED_PROTOCOL_ETH;
  799. probe_params.dp_module = dp_module;
  800. probe_params.dp_level = dp_level;
  801. probe_params.is_vf = is_vf;
  802. cdev = qed_ops->common->probe(pdev, &probe_params);
  803. if (!cdev) {
  804. rc = -ENODEV;
  805. goto err0;
  806. }
  807. qede_update_pf_params(cdev);
  808. /* Start the Slowpath-process */
  809. memset(&sp_params, 0, sizeof(sp_params));
  810. sp_params.int_mode = QED_INT_MODE_MSIX;
  811. sp_params.drv_major = QEDE_MAJOR_VERSION;
  812. sp_params.drv_minor = QEDE_MINOR_VERSION;
  813. sp_params.drv_rev = QEDE_REVISION_VERSION;
  814. sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
  815. strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
  816. rc = qed_ops->common->slowpath_start(cdev, &sp_params);
  817. if (rc) {
  818. pr_notice("Cannot start slowpath\n");
  819. goto err1;
  820. }
  821. /* Learn information crucial for qede to progress */
  822. rc = qed_ops->fill_dev_info(cdev, &dev_info);
  823. if (rc)
  824. goto err2;
  825. edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
  826. dp_level);
  827. if (!edev) {
  828. rc = -ENOMEM;
  829. goto err2;
  830. }
  831. if (is_vf)
  832. edev->flags |= QEDE_FLAG_IS_VF;
  833. qede_init_ndev(edev);
  834. rc = qede_rdma_dev_add(edev);
  835. if (rc)
  836. goto err3;
  837. /* Prepare the lock prior to the registration of the netdev,
  838. * as once it's registered we might reach flows requiring it
  839. * [it's even possible to reach a flow needing it directly
  840. * from there, although it's unlikely].
  841. */
  842. INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
  843. mutex_init(&edev->qede_lock);
  844. rc = register_netdev(edev->ndev);
  845. if (rc) {
  846. DP_NOTICE(edev, "Cannot register net-device\n");
  847. goto err4;
  848. }
  849. edev->ops->common->set_name(cdev, edev->ndev->name);
  850. /* PTP not supported on VFs */
  851. if (!is_vf)
  852. qede_ptp_enable(edev, true);
  853. edev->ops->register_ops(cdev, &qede_ll_ops, edev);
  854. #ifdef CONFIG_DCB
  855. if (!IS_VF(edev))
  856. qede_set_dcbnl_ops(edev->ndev);
  857. #endif
  858. edev->rx_copybreak = QEDE_RX_HDR_SIZE;
  859. qede_log_probe(edev);
  860. return 0;
  861. err4:
  862. qede_rdma_dev_remove(edev);
  863. err3:
  864. free_netdev(edev->ndev);
  865. err2:
  866. qed_ops->common->slowpath_stop(cdev);
  867. err1:
  868. qed_ops->common->remove(cdev);
  869. err0:
  870. return rc;
  871. }
  872. static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  873. {
  874. bool is_vf = false;
  875. u32 dp_module = 0;
  876. u8 dp_level = 0;
  877. switch ((enum qede_pci_private)id->driver_data) {
  878. case QEDE_PRIVATE_VF:
  879. if (debug & QED_LOG_VERBOSE_MASK)
  880. dev_err(&pdev->dev, "Probing a VF\n");
  881. is_vf = true;
  882. break;
  883. default:
  884. if (debug & QED_LOG_VERBOSE_MASK)
  885. dev_err(&pdev->dev, "Probing a PF\n");
  886. }
  887. qede_config_debug(debug, &dp_module, &dp_level);
  888. return __qede_probe(pdev, dp_module, dp_level, is_vf,
  889. QEDE_PROBE_NORMAL);
  890. }
  891. enum qede_remove_mode {
  892. QEDE_REMOVE_NORMAL,
  893. };
  894. static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
  895. {
  896. struct net_device *ndev = pci_get_drvdata(pdev);
  897. struct qede_dev *edev = netdev_priv(ndev);
  898. struct qed_dev *cdev = edev->cdev;
  899. DP_INFO(edev, "Starting qede_remove\n");
  900. unregister_netdev(ndev);
  901. cancel_delayed_work_sync(&edev->sp_task);
  902. qede_ptp_disable(edev);
  903. qede_rdma_dev_remove(edev);
  904. edev->ops->common->set_power_state(cdev, PCI_D0);
  905. pci_set_drvdata(pdev, NULL);
  906. /* Use global ops since we've freed edev */
  907. qed_ops->common->slowpath_stop(cdev);
  908. if (system_state == SYSTEM_POWER_OFF)
  909. return;
  910. qed_ops->common->remove(cdev);
  911. /* Since this can happen out-of-sync with other flows,
  912. * don't release the netdevice until after slowpath stop
  913. * has been called to guarantee various other contexts
  914. * [e.g., QED register callbacks] won't break anything when
  915. * accessing the netdevice.
  916. */
  917. free_netdev(ndev);
  918. dev_info(&pdev->dev, "Ending qede_remove successfully\n");
  919. }
  920. static void qede_remove(struct pci_dev *pdev)
  921. {
  922. __qede_remove(pdev, QEDE_REMOVE_NORMAL);
  923. }
  924. static void qede_shutdown(struct pci_dev *pdev)
  925. {
  926. __qede_remove(pdev, QEDE_REMOVE_NORMAL);
  927. }
  928. /* -------------------------------------------------------------------------
  929. * START OF LOAD / UNLOAD
  930. * -------------------------------------------------------------------------
  931. */
  932. static int qede_set_num_queues(struct qede_dev *edev)
  933. {
  934. int rc;
  935. u16 rss_num;
  936. /* Setup queues according to possible resources*/
  937. if (edev->req_queues)
  938. rss_num = edev->req_queues;
  939. else
  940. rss_num = netif_get_num_default_rss_queues() *
  941. edev->dev_info.common.num_hwfns;
  942. rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
  943. rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
  944. if (rc > 0) {
  945. /* Managed to request interrupts for our queues */
  946. edev->num_queues = rc;
  947. DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
  948. QEDE_QUEUE_CNT(edev), rss_num);
  949. rc = 0;
  950. }
  951. edev->fp_num_tx = edev->req_num_tx;
  952. edev->fp_num_rx = edev->req_num_rx;
  953. return rc;
  954. }
  955. static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
  956. u16 sb_id)
  957. {
  958. if (sb_info->sb_virt) {
  959. edev->ops->common->sb_release(edev->cdev, sb_info, sb_id);
  960. dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
  961. (void *)sb_info->sb_virt, sb_info->sb_phys);
  962. memset(sb_info, 0, sizeof(*sb_info));
  963. }
  964. }
  965. /* This function allocates fast-path status block memory */
  966. static int qede_alloc_mem_sb(struct qede_dev *edev,
  967. struct qed_sb_info *sb_info, u16 sb_id)
  968. {
  969. struct status_block_e4 *sb_virt;
  970. dma_addr_t sb_phys;
  971. int rc;
  972. sb_virt = dma_alloc_coherent(&edev->pdev->dev,
  973. sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
  974. if (!sb_virt) {
  975. DP_ERR(edev, "Status block allocation failed\n");
  976. return -ENOMEM;
  977. }
  978. rc = edev->ops->common->sb_init(edev->cdev, sb_info,
  979. sb_virt, sb_phys, sb_id,
  980. QED_SB_TYPE_L2_QUEUE);
  981. if (rc) {
  982. DP_ERR(edev, "Status block initialization failed\n");
  983. dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
  984. sb_virt, sb_phys);
  985. return rc;
  986. }
  987. return 0;
  988. }
  989. static void qede_free_rx_buffers(struct qede_dev *edev,
  990. struct qede_rx_queue *rxq)
  991. {
  992. u16 i;
  993. for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
  994. struct sw_rx_data *rx_buf;
  995. struct page *data;
  996. rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
  997. data = rx_buf->data;
  998. dma_unmap_page(&edev->pdev->dev,
  999. rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
  1000. rx_buf->data = NULL;
  1001. __free_page(data);
  1002. }
  1003. }
  1004. static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
  1005. {
  1006. int i;
  1007. if (edev->gro_disable)
  1008. return;
  1009. for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
  1010. struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
  1011. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  1012. if (replace_buf->data) {
  1013. dma_unmap_page(&edev->pdev->dev,
  1014. replace_buf->mapping,
  1015. PAGE_SIZE, DMA_FROM_DEVICE);
  1016. __free_page(replace_buf->data);
  1017. }
  1018. }
  1019. }
  1020. static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
  1021. {
  1022. qede_free_sge_mem(edev, rxq);
  1023. /* Free rx buffers */
  1024. qede_free_rx_buffers(edev, rxq);
  1025. /* Free the parallel SW ring */
  1026. kfree(rxq->sw_rx_ring);
  1027. /* Free the real RQ ring used by FW */
  1028. edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
  1029. edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
  1030. }
  1031. static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
  1032. {
  1033. dma_addr_t mapping;
  1034. int i;
  1035. if (edev->gro_disable)
  1036. return 0;
  1037. for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
  1038. struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
  1039. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  1040. replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
  1041. if (unlikely(!replace_buf->data)) {
  1042. DP_NOTICE(edev,
  1043. "Failed to allocate TPA skb pool [replacement buffer]\n");
  1044. goto err;
  1045. }
  1046. mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
  1047. PAGE_SIZE, DMA_FROM_DEVICE);
  1048. if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
  1049. DP_NOTICE(edev,
  1050. "Failed to map TPA replacement buffer\n");
  1051. goto err;
  1052. }
  1053. replace_buf->mapping = mapping;
  1054. tpa_info->buffer.page_offset = 0;
  1055. tpa_info->buffer_mapping = mapping;
  1056. tpa_info->state = QEDE_AGG_STATE_NONE;
  1057. }
  1058. return 0;
  1059. err:
  1060. qede_free_sge_mem(edev, rxq);
  1061. edev->gro_disable = 1;
  1062. edev->ndev->features &= ~NETIF_F_GRO_HW;
  1063. return -ENOMEM;
  1064. }
  1065. /* This function allocates all memory needed per Rx queue */
  1066. static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
  1067. {
  1068. int i, rc, size;
  1069. rxq->num_rx_buffers = edev->q_num_rx_buffers;
  1070. rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
  1071. rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : 0;
  1072. /* Make sure that the headroom and payload fit in a single page */
  1073. if (rxq->rx_buf_size + rxq->rx_headroom > PAGE_SIZE)
  1074. rxq->rx_buf_size = PAGE_SIZE - rxq->rx_headroom;
  1075. /* Segment size to spilt a page in multiple equal parts,
  1076. * unless XDP is used in which case we'd use the entire page.
  1077. */
  1078. if (!edev->xdp_prog)
  1079. rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
  1080. else
  1081. rxq->rx_buf_seg_size = PAGE_SIZE;
  1082. /* Allocate the parallel driver ring for Rx buffers */
  1083. size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
  1084. rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
  1085. if (!rxq->sw_rx_ring) {
  1086. DP_ERR(edev, "Rx buffers ring allocation failed\n");
  1087. rc = -ENOMEM;
  1088. goto err;
  1089. }
  1090. /* Allocate FW Rx ring */
  1091. rc = edev->ops->common->chain_alloc(edev->cdev,
  1092. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  1093. QED_CHAIN_MODE_NEXT_PTR,
  1094. QED_CHAIN_CNT_TYPE_U16,
  1095. RX_RING_SIZE,
  1096. sizeof(struct eth_rx_bd),
  1097. &rxq->rx_bd_ring, NULL);
  1098. if (rc)
  1099. goto err;
  1100. /* Allocate FW completion ring */
  1101. rc = edev->ops->common->chain_alloc(edev->cdev,
  1102. QED_CHAIN_USE_TO_CONSUME,
  1103. QED_CHAIN_MODE_PBL,
  1104. QED_CHAIN_CNT_TYPE_U16,
  1105. RX_RING_SIZE,
  1106. sizeof(union eth_rx_cqe),
  1107. &rxq->rx_comp_ring, NULL);
  1108. if (rc)
  1109. goto err;
  1110. /* Allocate buffers for the Rx ring */
  1111. rxq->filled_buffers = 0;
  1112. for (i = 0; i < rxq->num_rx_buffers; i++) {
  1113. rc = qede_alloc_rx_buffer(rxq, false);
  1114. if (rc) {
  1115. DP_ERR(edev,
  1116. "Rx buffers allocation failed at index %d\n", i);
  1117. goto err;
  1118. }
  1119. }
  1120. rc = qede_alloc_sge_mem(edev, rxq);
  1121. err:
  1122. return rc;
  1123. }
  1124. static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
  1125. {
  1126. /* Free the parallel SW ring */
  1127. if (txq->is_xdp)
  1128. kfree(txq->sw_tx_ring.xdp);
  1129. else
  1130. kfree(txq->sw_tx_ring.skbs);
  1131. /* Free the real RQ ring used by FW */
  1132. edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
  1133. }
  1134. /* This function allocates all memory needed per Tx queue */
  1135. static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
  1136. {
  1137. union eth_tx_bd_types *p_virt;
  1138. int size, rc;
  1139. txq->num_tx_buffers = edev->q_num_tx_buffers;
  1140. /* Allocate the parallel driver ring for Tx buffers */
  1141. if (txq->is_xdp) {
  1142. size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
  1143. txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
  1144. if (!txq->sw_tx_ring.xdp)
  1145. goto err;
  1146. } else {
  1147. size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
  1148. txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
  1149. if (!txq->sw_tx_ring.skbs)
  1150. goto err;
  1151. }
  1152. rc = edev->ops->common->chain_alloc(edev->cdev,
  1153. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  1154. QED_CHAIN_MODE_PBL,
  1155. QED_CHAIN_CNT_TYPE_U16,
  1156. txq->num_tx_buffers,
  1157. sizeof(*p_virt),
  1158. &txq->tx_pbl, NULL);
  1159. if (rc)
  1160. goto err;
  1161. return 0;
  1162. err:
  1163. qede_free_mem_txq(edev, txq);
  1164. return -ENOMEM;
  1165. }
  1166. /* This function frees all memory of a single fp */
  1167. static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
  1168. {
  1169. qede_free_mem_sb(edev, fp->sb_info, fp->id);
  1170. if (fp->type & QEDE_FASTPATH_RX)
  1171. qede_free_mem_rxq(edev, fp->rxq);
  1172. if (fp->type & QEDE_FASTPATH_XDP)
  1173. qede_free_mem_txq(edev, fp->xdp_tx);
  1174. if (fp->type & QEDE_FASTPATH_TX)
  1175. qede_free_mem_txq(edev, fp->txq);
  1176. }
  1177. /* This function allocates all memory needed for a single fp (i.e. an entity
  1178. * which contains status block, one rx queue and/or multiple per-TC tx queues.
  1179. */
  1180. static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
  1181. {
  1182. int rc = 0;
  1183. rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
  1184. if (rc)
  1185. goto out;
  1186. if (fp->type & QEDE_FASTPATH_RX) {
  1187. rc = qede_alloc_mem_rxq(edev, fp->rxq);
  1188. if (rc)
  1189. goto out;
  1190. }
  1191. if (fp->type & QEDE_FASTPATH_XDP) {
  1192. rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
  1193. if (rc)
  1194. goto out;
  1195. }
  1196. if (fp->type & QEDE_FASTPATH_TX) {
  1197. rc = qede_alloc_mem_txq(edev, fp->txq);
  1198. if (rc)
  1199. goto out;
  1200. }
  1201. out:
  1202. return rc;
  1203. }
  1204. static void qede_free_mem_load(struct qede_dev *edev)
  1205. {
  1206. int i;
  1207. for_each_queue(i) {
  1208. struct qede_fastpath *fp = &edev->fp_array[i];
  1209. qede_free_mem_fp(edev, fp);
  1210. }
  1211. }
  1212. /* This function allocates all qede memory at NIC load. */
  1213. static int qede_alloc_mem_load(struct qede_dev *edev)
  1214. {
  1215. int rc = 0, queue_id;
  1216. for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
  1217. struct qede_fastpath *fp = &edev->fp_array[queue_id];
  1218. rc = qede_alloc_mem_fp(edev, fp);
  1219. if (rc) {
  1220. DP_ERR(edev,
  1221. "Failed to allocate memory for fastpath - rss id = %d\n",
  1222. queue_id);
  1223. qede_free_mem_load(edev);
  1224. return rc;
  1225. }
  1226. }
  1227. return 0;
  1228. }
  1229. /* This function inits fp content and resets the SB, RXQ and TXQ structures */
  1230. static void qede_init_fp(struct qede_dev *edev)
  1231. {
  1232. int queue_id, rxq_index = 0, txq_index = 0;
  1233. struct qede_fastpath *fp;
  1234. for_each_queue(queue_id) {
  1235. fp = &edev->fp_array[queue_id];
  1236. fp->edev = edev;
  1237. fp->id = queue_id;
  1238. if (fp->type & QEDE_FASTPATH_XDP) {
  1239. fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
  1240. rxq_index);
  1241. fp->xdp_tx->is_xdp = 1;
  1242. }
  1243. if (fp->type & QEDE_FASTPATH_RX) {
  1244. fp->rxq->rxq_id = rxq_index++;
  1245. /* Determine how to map buffers for this queue */
  1246. if (fp->type & QEDE_FASTPATH_XDP)
  1247. fp->rxq->data_direction = DMA_BIDIRECTIONAL;
  1248. else
  1249. fp->rxq->data_direction = DMA_FROM_DEVICE;
  1250. fp->rxq->dev = &edev->pdev->dev;
  1251. /* Driver have no error path from here */
  1252. WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
  1253. fp->rxq->rxq_id) < 0);
  1254. }
  1255. if (fp->type & QEDE_FASTPATH_TX) {
  1256. fp->txq->index = txq_index++;
  1257. if (edev->dev_info.is_legacy)
  1258. fp->txq->is_legacy = 1;
  1259. fp->txq->dev = &edev->pdev->dev;
  1260. }
  1261. snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
  1262. edev->ndev->name, queue_id);
  1263. }
  1264. edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
  1265. }
  1266. static int qede_set_real_num_queues(struct qede_dev *edev)
  1267. {
  1268. int rc = 0;
  1269. rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
  1270. if (rc) {
  1271. DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
  1272. return rc;
  1273. }
  1274. rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
  1275. if (rc) {
  1276. DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
  1277. return rc;
  1278. }
  1279. return 0;
  1280. }
  1281. static void qede_napi_disable_remove(struct qede_dev *edev)
  1282. {
  1283. int i;
  1284. for_each_queue(i) {
  1285. napi_disable(&edev->fp_array[i].napi);
  1286. netif_napi_del(&edev->fp_array[i].napi);
  1287. }
  1288. }
  1289. static void qede_napi_add_enable(struct qede_dev *edev)
  1290. {
  1291. int i;
  1292. /* Add NAPI objects */
  1293. for_each_queue(i) {
  1294. netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
  1295. qede_poll, NAPI_POLL_WEIGHT);
  1296. napi_enable(&edev->fp_array[i].napi);
  1297. }
  1298. }
  1299. static void qede_sync_free_irqs(struct qede_dev *edev)
  1300. {
  1301. int i;
  1302. for (i = 0; i < edev->int_info.used_cnt; i++) {
  1303. if (edev->int_info.msix_cnt) {
  1304. synchronize_irq(edev->int_info.msix[i].vector);
  1305. free_irq(edev->int_info.msix[i].vector,
  1306. &edev->fp_array[i]);
  1307. } else {
  1308. edev->ops->common->simd_handler_clean(edev->cdev, i);
  1309. }
  1310. }
  1311. edev->int_info.used_cnt = 0;
  1312. }
  1313. static int qede_req_msix_irqs(struct qede_dev *edev)
  1314. {
  1315. int i, rc;
  1316. /* Sanitize number of interrupts == number of prepared RSS queues */
  1317. if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
  1318. DP_ERR(edev,
  1319. "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
  1320. QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
  1321. return -EINVAL;
  1322. }
  1323. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  1324. #ifdef CONFIG_RFS_ACCEL
  1325. struct qede_fastpath *fp = &edev->fp_array[i];
  1326. if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
  1327. rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
  1328. edev->int_info.msix[i].vector);
  1329. if (rc) {
  1330. DP_ERR(edev, "Failed to add CPU rmap\n");
  1331. qede_free_arfs(edev);
  1332. }
  1333. }
  1334. #endif
  1335. rc = request_irq(edev->int_info.msix[i].vector,
  1336. qede_msix_fp_int, 0, edev->fp_array[i].name,
  1337. &edev->fp_array[i]);
  1338. if (rc) {
  1339. DP_ERR(edev, "Request fp %d irq failed\n", i);
  1340. qede_sync_free_irqs(edev);
  1341. return rc;
  1342. }
  1343. DP_VERBOSE(edev, NETIF_MSG_INTR,
  1344. "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
  1345. edev->fp_array[i].name, i,
  1346. &edev->fp_array[i]);
  1347. edev->int_info.used_cnt++;
  1348. }
  1349. return 0;
  1350. }
  1351. static void qede_simd_fp_handler(void *cookie)
  1352. {
  1353. struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
  1354. napi_schedule_irqoff(&fp->napi);
  1355. }
  1356. static int qede_setup_irqs(struct qede_dev *edev)
  1357. {
  1358. int i, rc = 0;
  1359. /* Learn Interrupt configuration */
  1360. rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
  1361. if (rc)
  1362. return rc;
  1363. if (edev->int_info.msix_cnt) {
  1364. rc = qede_req_msix_irqs(edev);
  1365. if (rc)
  1366. return rc;
  1367. edev->ndev->irq = edev->int_info.msix[0].vector;
  1368. } else {
  1369. const struct qed_common_ops *ops;
  1370. /* qed should learn receive the RSS ids and callbacks */
  1371. ops = edev->ops->common;
  1372. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
  1373. ops->simd_handler_config(edev->cdev,
  1374. &edev->fp_array[i], i,
  1375. qede_simd_fp_handler);
  1376. edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
  1377. }
  1378. return 0;
  1379. }
  1380. static int qede_drain_txq(struct qede_dev *edev,
  1381. struct qede_tx_queue *txq, bool allow_drain)
  1382. {
  1383. int rc, cnt = 1000;
  1384. while (txq->sw_tx_cons != txq->sw_tx_prod) {
  1385. if (!cnt) {
  1386. if (allow_drain) {
  1387. DP_NOTICE(edev,
  1388. "Tx queue[%d] is stuck, requesting MCP to drain\n",
  1389. txq->index);
  1390. rc = edev->ops->common->drain(edev->cdev);
  1391. if (rc)
  1392. return rc;
  1393. return qede_drain_txq(edev, txq, false);
  1394. }
  1395. DP_NOTICE(edev,
  1396. "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
  1397. txq->index, txq->sw_tx_prod,
  1398. txq->sw_tx_cons);
  1399. return -ENODEV;
  1400. }
  1401. cnt--;
  1402. usleep_range(1000, 2000);
  1403. barrier();
  1404. }
  1405. /* FW finished processing, wait for HW to transmit all tx packets */
  1406. usleep_range(1000, 2000);
  1407. return 0;
  1408. }
  1409. static int qede_stop_txq(struct qede_dev *edev,
  1410. struct qede_tx_queue *txq, int rss_id)
  1411. {
  1412. return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
  1413. }
  1414. static int qede_stop_queues(struct qede_dev *edev)
  1415. {
  1416. struct qed_update_vport_params *vport_update_params;
  1417. struct qed_dev *cdev = edev->cdev;
  1418. struct qede_fastpath *fp;
  1419. int rc, i;
  1420. /* Disable the vport */
  1421. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1422. if (!vport_update_params)
  1423. return -ENOMEM;
  1424. vport_update_params->vport_id = 0;
  1425. vport_update_params->update_vport_active_flg = 1;
  1426. vport_update_params->vport_active_flg = 0;
  1427. vport_update_params->update_rss_flg = 0;
  1428. rc = edev->ops->vport_update(cdev, vport_update_params);
  1429. vfree(vport_update_params);
  1430. if (rc) {
  1431. DP_ERR(edev, "Failed to update vport\n");
  1432. return rc;
  1433. }
  1434. /* Flush Tx queues. If needed, request drain from MCP */
  1435. for_each_queue(i) {
  1436. fp = &edev->fp_array[i];
  1437. if (fp->type & QEDE_FASTPATH_TX) {
  1438. rc = qede_drain_txq(edev, fp->txq, true);
  1439. if (rc)
  1440. return rc;
  1441. }
  1442. if (fp->type & QEDE_FASTPATH_XDP) {
  1443. rc = qede_drain_txq(edev, fp->xdp_tx, true);
  1444. if (rc)
  1445. return rc;
  1446. }
  1447. }
  1448. /* Stop all Queues in reverse order */
  1449. for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
  1450. fp = &edev->fp_array[i];
  1451. /* Stop the Tx Queue(s) */
  1452. if (fp->type & QEDE_FASTPATH_TX) {
  1453. rc = qede_stop_txq(edev, fp->txq, i);
  1454. if (rc)
  1455. return rc;
  1456. }
  1457. /* Stop the Rx Queue */
  1458. if (fp->type & QEDE_FASTPATH_RX) {
  1459. rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
  1460. if (rc) {
  1461. DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
  1462. return rc;
  1463. }
  1464. }
  1465. /* Stop the XDP forwarding queue */
  1466. if (fp->type & QEDE_FASTPATH_XDP) {
  1467. rc = qede_stop_txq(edev, fp->xdp_tx, i);
  1468. if (rc)
  1469. return rc;
  1470. bpf_prog_put(fp->rxq->xdp_prog);
  1471. }
  1472. }
  1473. /* Stop the vport */
  1474. rc = edev->ops->vport_stop(cdev, 0);
  1475. if (rc)
  1476. DP_ERR(edev, "Failed to stop VPORT\n");
  1477. return rc;
  1478. }
  1479. static int qede_start_txq(struct qede_dev *edev,
  1480. struct qede_fastpath *fp,
  1481. struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
  1482. {
  1483. dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
  1484. u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
  1485. struct qed_queue_start_common_params params;
  1486. struct qed_txq_start_ret_params ret_params;
  1487. int rc;
  1488. memset(&params, 0, sizeof(params));
  1489. memset(&ret_params, 0, sizeof(ret_params));
  1490. /* Let the XDP queue share the queue-zone with one of the regular txq.
  1491. * We don't really care about its coalescing.
  1492. */
  1493. if (txq->is_xdp)
  1494. params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
  1495. else
  1496. params.queue_id = txq->index;
  1497. params.p_sb = fp->sb_info;
  1498. params.sb_idx = sb_idx;
  1499. rc = edev->ops->q_tx_start(edev->cdev, rss_id, &params, phys_table,
  1500. page_cnt, &ret_params);
  1501. if (rc) {
  1502. DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
  1503. return rc;
  1504. }
  1505. txq->doorbell_addr = ret_params.p_doorbell;
  1506. txq->handle = ret_params.p_handle;
  1507. /* Determine the FW consumer address associated */
  1508. txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
  1509. /* Prepare the doorbell parameters */
  1510. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
  1511. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
  1512. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
  1513. DQ_XCM_ETH_TX_BD_PROD_CMD);
  1514. txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
  1515. return rc;
  1516. }
  1517. static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
  1518. {
  1519. int vlan_removal_en = 1;
  1520. struct qed_dev *cdev = edev->cdev;
  1521. struct qed_dev_info *qed_info = &edev->dev_info.common;
  1522. struct qed_update_vport_params *vport_update_params;
  1523. struct qed_queue_start_common_params q_params;
  1524. struct qed_start_vport_params start = {0};
  1525. int rc, i;
  1526. if (!edev->num_queues) {
  1527. DP_ERR(edev,
  1528. "Cannot update V-VPORT as active as there are no Rx queues\n");
  1529. return -EINVAL;
  1530. }
  1531. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1532. if (!vport_update_params)
  1533. return -ENOMEM;
  1534. start.handle_ptp_pkts = !!(edev->ptp);
  1535. start.gro_enable = !edev->gro_disable;
  1536. start.mtu = edev->ndev->mtu;
  1537. start.vport_id = 0;
  1538. start.drop_ttl0 = true;
  1539. start.remove_inner_vlan = vlan_removal_en;
  1540. start.clear_stats = clear_stats;
  1541. rc = edev->ops->vport_start(cdev, &start);
  1542. if (rc) {
  1543. DP_ERR(edev, "Start V-PORT failed %d\n", rc);
  1544. goto out;
  1545. }
  1546. DP_VERBOSE(edev, NETIF_MSG_IFUP,
  1547. "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
  1548. start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
  1549. for_each_queue(i) {
  1550. struct qede_fastpath *fp = &edev->fp_array[i];
  1551. dma_addr_t p_phys_table;
  1552. u32 page_cnt;
  1553. if (fp->type & QEDE_FASTPATH_RX) {
  1554. struct qed_rxq_start_ret_params ret_params;
  1555. struct qede_rx_queue *rxq = fp->rxq;
  1556. __le16 *val;
  1557. memset(&ret_params, 0, sizeof(ret_params));
  1558. memset(&q_params, 0, sizeof(q_params));
  1559. q_params.queue_id = rxq->rxq_id;
  1560. q_params.vport_id = 0;
  1561. q_params.p_sb = fp->sb_info;
  1562. q_params.sb_idx = RX_PI;
  1563. p_phys_table =
  1564. qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
  1565. page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
  1566. rc = edev->ops->q_rx_start(cdev, i, &q_params,
  1567. rxq->rx_buf_size,
  1568. rxq->rx_bd_ring.p_phys_addr,
  1569. p_phys_table,
  1570. page_cnt, &ret_params);
  1571. if (rc) {
  1572. DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
  1573. rc);
  1574. goto out;
  1575. }
  1576. /* Use the return parameters */
  1577. rxq->hw_rxq_prod_addr = ret_params.p_prod;
  1578. rxq->handle = ret_params.p_handle;
  1579. val = &fp->sb_info->sb_virt->pi_array[RX_PI];
  1580. rxq->hw_cons_ptr = val;
  1581. qede_update_rx_prod(edev, rxq);
  1582. }
  1583. if (fp->type & QEDE_FASTPATH_XDP) {
  1584. rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
  1585. if (rc)
  1586. goto out;
  1587. fp->rxq->xdp_prog = bpf_prog_add(edev->xdp_prog, 1);
  1588. if (IS_ERR(fp->rxq->xdp_prog)) {
  1589. rc = PTR_ERR(fp->rxq->xdp_prog);
  1590. fp->rxq->xdp_prog = NULL;
  1591. goto out;
  1592. }
  1593. }
  1594. if (fp->type & QEDE_FASTPATH_TX) {
  1595. rc = qede_start_txq(edev, fp, fp->txq, i, TX_PI(0));
  1596. if (rc)
  1597. goto out;
  1598. }
  1599. }
  1600. /* Prepare and send the vport enable */
  1601. vport_update_params->vport_id = start.vport_id;
  1602. vport_update_params->update_vport_active_flg = 1;
  1603. vport_update_params->vport_active_flg = 1;
  1604. if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
  1605. qed_info->tx_switching) {
  1606. vport_update_params->update_tx_switching_flg = 1;
  1607. vport_update_params->tx_switching_flg = 1;
  1608. }
  1609. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  1610. &vport_update_params->update_rss_flg);
  1611. rc = edev->ops->vport_update(cdev, vport_update_params);
  1612. if (rc)
  1613. DP_ERR(edev, "Update V-PORT failed %d\n", rc);
  1614. out:
  1615. vfree(vport_update_params);
  1616. return rc;
  1617. }
  1618. enum qede_unload_mode {
  1619. QEDE_UNLOAD_NORMAL,
  1620. };
  1621. static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
  1622. bool is_locked)
  1623. {
  1624. struct qed_link_params link_params;
  1625. int rc;
  1626. DP_INFO(edev, "Starting qede unload\n");
  1627. if (!is_locked)
  1628. __qede_lock(edev);
  1629. edev->state = QEDE_STATE_CLOSED;
  1630. qede_rdma_dev_event_close(edev);
  1631. /* Close OS Tx */
  1632. netif_tx_disable(edev->ndev);
  1633. netif_carrier_off(edev->ndev);
  1634. /* Reset the link */
  1635. memset(&link_params, 0, sizeof(link_params));
  1636. link_params.link_up = false;
  1637. edev->ops->common->set_link(edev->cdev, &link_params);
  1638. rc = qede_stop_queues(edev);
  1639. if (rc) {
  1640. qede_sync_free_irqs(edev);
  1641. goto out;
  1642. }
  1643. DP_INFO(edev, "Stopped Queues\n");
  1644. qede_vlan_mark_nonconfigured(edev);
  1645. edev->ops->fastpath_stop(edev->cdev);
  1646. if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
  1647. qede_poll_for_freeing_arfs_filters(edev);
  1648. qede_free_arfs(edev);
  1649. }
  1650. /* Release the interrupts */
  1651. qede_sync_free_irqs(edev);
  1652. edev->ops->common->set_fp_int(edev->cdev, 0);
  1653. qede_napi_disable_remove(edev);
  1654. qede_free_mem_load(edev);
  1655. qede_free_fp_array(edev);
  1656. out:
  1657. if (!is_locked)
  1658. __qede_unlock(edev);
  1659. DP_INFO(edev, "Ending qede unload\n");
  1660. }
  1661. enum qede_load_mode {
  1662. QEDE_LOAD_NORMAL,
  1663. QEDE_LOAD_RELOAD,
  1664. };
  1665. static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
  1666. bool is_locked)
  1667. {
  1668. struct qed_link_params link_params;
  1669. int rc;
  1670. DP_INFO(edev, "Starting qede load\n");
  1671. if (!is_locked)
  1672. __qede_lock(edev);
  1673. rc = qede_set_num_queues(edev);
  1674. if (rc)
  1675. goto out;
  1676. rc = qede_alloc_fp_array(edev);
  1677. if (rc)
  1678. goto out;
  1679. qede_init_fp(edev);
  1680. rc = qede_alloc_mem_load(edev);
  1681. if (rc)
  1682. goto err1;
  1683. DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
  1684. QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
  1685. rc = qede_set_real_num_queues(edev);
  1686. if (rc)
  1687. goto err2;
  1688. if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
  1689. rc = qede_alloc_arfs(edev);
  1690. if (rc)
  1691. DP_NOTICE(edev, "aRFS memory allocation failed\n");
  1692. }
  1693. qede_napi_add_enable(edev);
  1694. DP_INFO(edev, "Napi added and enabled\n");
  1695. rc = qede_setup_irqs(edev);
  1696. if (rc)
  1697. goto err3;
  1698. DP_INFO(edev, "Setup IRQs succeeded\n");
  1699. rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
  1700. if (rc)
  1701. goto err4;
  1702. DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
  1703. /* Program un-configured VLANs */
  1704. qede_configure_vlan_filters(edev);
  1705. /* Ask for link-up using current configuration */
  1706. memset(&link_params, 0, sizeof(link_params));
  1707. link_params.link_up = true;
  1708. edev->ops->common->set_link(edev->cdev, &link_params);
  1709. edev->state = QEDE_STATE_OPEN;
  1710. DP_INFO(edev, "Ending successfully qede load\n");
  1711. goto out;
  1712. err4:
  1713. qede_sync_free_irqs(edev);
  1714. memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
  1715. err3:
  1716. qede_napi_disable_remove(edev);
  1717. err2:
  1718. qede_free_mem_load(edev);
  1719. err1:
  1720. edev->ops->common->set_fp_int(edev->cdev, 0);
  1721. qede_free_fp_array(edev);
  1722. edev->num_queues = 0;
  1723. edev->fp_num_tx = 0;
  1724. edev->fp_num_rx = 0;
  1725. out:
  1726. if (!is_locked)
  1727. __qede_unlock(edev);
  1728. return rc;
  1729. }
  1730. /* 'func' should be able to run between unload and reload assuming interface
  1731. * is actually running, or afterwards in case it's currently DOWN.
  1732. */
  1733. void qede_reload(struct qede_dev *edev,
  1734. struct qede_reload_args *args, bool is_locked)
  1735. {
  1736. if (!is_locked)
  1737. __qede_lock(edev);
  1738. /* Since qede_lock is held, internal state wouldn't change even
  1739. * if netdev state would start transitioning. Check whether current
  1740. * internal configuration indicates device is up, then reload.
  1741. */
  1742. if (edev->state == QEDE_STATE_OPEN) {
  1743. qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
  1744. if (args)
  1745. args->func(edev, args);
  1746. qede_load(edev, QEDE_LOAD_RELOAD, true);
  1747. /* Since no one is going to do it for us, re-configure */
  1748. qede_config_rx_mode(edev->ndev);
  1749. } else if (args) {
  1750. args->func(edev, args);
  1751. }
  1752. if (!is_locked)
  1753. __qede_unlock(edev);
  1754. }
  1755. /* called with rtnl_lock */
  1756. static int qede_open(struct net_device *ndev)
  1757. {
  1758. struct qede_dev *edev = netdev_priv(ndev);
  1759. int rc;
  1760. netif_carrier_off(ndev);
  1761. edev->ops->common->set_power_state(edev->cdev, PCI_D0);
  1762. rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
  1763. if (rc)
  1764. return rc;
  1765. udp_tunnel_get_rx_info(ndev);
  1766. edev->ops->common->update_drv_state(edev->cdev, true);
  1767. return 0;
  1768. }
  1769. static int qede_close(struct net_device *ndev)
  1770. {
  1771. struct qede_dev *edev = netdev_priv(ndev);
  1772. qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
  1773. edev->ops->common->update_drv_state(edev->cdev, false);
  1774. return 0;
  1775. }
  1776. static void qede_link_update(void *dev, struct qed_link_output *link)
  1777. {
  1778. struct qede_dev *edev = dev;
  1779. if (!netif_running(edev->ndev)) {
  1780. DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
  1781. return;
  1782. }
  1783. if (link->link_up) {
  1784. if (!netif_carrier_ok(edev->ndev)) {
  1785. DP_NOTICE(edev, "Link is up\n");
  1786. netif_tx_start_all_queues(edev->ndev);
  1787. netif_carrier_on(edev->ndev);
  1788. qede_rdma_dev_event_open(edev);
  1789. }
  1790. } else {
  1791. if (netif_carrier_ok(edev->ndev)) {
  1792. DP_NOTICE(edev, "Link is down\n");
  1793. netif_tx_disable(edev->ndev);
  1794. netif_carrier_off(edev->ndev);
  1795. qede_rdma_dev_event_close(edev);
  1796. }
  1797. }
  1798. }