qede_fp.c 48 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/netdevice.h>
  33. #include <linux/etherdevice.h>
  34. #include <linux/skbuff.h>
  35. #include <linux/bpf_trace.h>
  36. #include <net/udp_tunnel.h>
  37. #include <linux/ip.h>
  38. #include <net/ipv6.h>
  39. #include <net/tcp.h>
  40. #include <linux/if_ether.h>
  41. #include <linux/if_vlan.h>
  42. #include <net/ip6_checksum.h>
  43. #include "qede_ptp.h"
  44. #include <linux/qed/qed_if.h>
  45. #include "qede.h"
  46. /*********************************
  47. * Content also used by slowpath *
  48. *********************************/
  49. int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy)
  50. {
  51. struct sw_rx_data *sw_rx_data;
  52. struct eth_rx_bd *rx_bd;
  53. dma_addr_t mapping;
  54. struct page *data;
  55. /* In case lazy-allocation is allowed, postpone allocation until the
  56. * end of the NAPI run. We'd still need to make sure the Rx ring has
  57. * sufficient buffers to guarantee an additional Rx interrupt.
  58. */
  59. if (allow_lazy && likely(rxq->filled_buffers > 12)) {
  60. rxq->filled_buffers--;
  61. return 0;
  62. }
  63. data = alloc_pages(GFP_ATOMIC, 0);
  64. if (unlikely(!data))
  65. return -ENOMEM;
  66. /* Map the entire page as it would be used
  67. * for multiple RX buffer segment size mapping.
  68. */
  69. mapping = dma_map_page(rxq->dev, data, 0,
  70. PAGE_SIZE, rxq->data_direction);
  71. if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
  72. __free_page(data);
  73. return -ENOMEM;
  74. }
  75. sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  76. sw_rx_data->page_offset = 0;
  77. sw_rx_data->data = data;
  78. sw_rx_data->mapping = mapping;
  79. /* Advance PROD and get BD pointer */
  80. rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
  81. WARN_ON(!rx_bd);
  82. rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
  83. rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping) +
  84. rxq->rx_headroom);
  85. rxq->sw_rx_prod++;
  86. rxq->filled_buffers++;
  87. return 0;
  88. }
  89. /* Unmap the data and free skb */
  90. int qede_free_tx_pkt(struct qede_dev *edev, struct qede_tx_queue *txq, int *len)
  91. {
  92. u16 idx = txq->sw_tx_cons;
  93. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  94. struct eth_tx_1st_bd *first_bd;
  95. struct eth_tx_bd *tx_data_bd;
  96. int bds_consumed = 0;
  97. int nbds;
  98. bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
  99. int i, split_bd_len = 0;
  100. if (unlikely(!skb)) {
  101. DP_ERR(edev,
  102. "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
  103. idx, txq->sw_tx_cons, txq->sw_tx_prod);
  104. return -1;
  105. }
  106. *len = skb->len;
  107. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  108. bds_consumed++;
  109. nbds = first_bd->data.nbds;
  110. if (data_split) {
  111. struct eth_tx_bd *split = (struct eth_tx_bd *)
  112. qed_chain_consume(&txq->tx_pbl);
  113. split_bd_len = BD_UNMAP_LEN(split);
  114. bds_consumed++;
  115. }
  116. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  117. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  118. /* Unmap the data of the skb frags */
  119. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
  120. tx_data_bd = (struct eth_tx_bd *)
  121. qed_chain_consume(&txq->tx_pbl);
  122. dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
  123. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  124. }
  125. while (bds_consumed++ < nbds)
  126. qed_chain_consume(&txq->tx_pbl);
  127. /* Free skb */
  128. dev_kfree_skb_any(skb);
  129. txq->sw_tx_ring.skbs[idx].skb = NULL;
  130. txq->sw_tx_ring.skbs[idx].flags = 0;
  131. return 0;
  132. }
  133. /* Unmap the data and free skb when mapping failed during start_xmit */
  134. static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
  135. struct eth_tx_1st_bd *first_bd,
  136. int nbd, bool data_split)
  137. {
  138. u16 idx = txq->sw_tx_prod;
  139. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  140. struct eth_tx_bd *tx_data_bd;
  141. int i, split_bd_len = 0;
  142. /* Return prod to its position before this skb was handled */
  143. qed_chain_set_prod(&txq->tx_pbl,
  144. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  145. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  146. if (data_split) {
  147. struct eth_tx_bd *split = (struct eth_tx_bd *)
  148. qed_chain_produce(&txq->tx_pbl);
  149. split_bd_len = BD_UNMAP_LEN(split);
  150. nbd--;
  151. }
  152. dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
  153. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  154. /* Unmap the data of the skb frags */
  155. for (i = 0; i < nbd; i++) {
  156. tx_data_bd = (struct eth_tx_bd *)
  157. qed_chain_produce(&txq->tx_pbl);
  158. if (tx_data_bd->nbytes)
  159. dma_unmap_page(txq->dev,
  160. BD_UNMAP_ADDR(tx_data_bd),
  161. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  162. }
  163. /* Return again prod to its position before this skb was handled */
  164. qed_chain_set_prod(&txq->tx_pbl,
  165. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  166. /* Free skb */
  167. dev_kfree_skb_any(skb);
  168. txq->sw_tx_ring.skbs[idx].skb = NULL;
  169. txq->sw_tx_ring.skbs[idx].flags = 0;
  170. }
  171. static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
  172. {
  173. u32 rc = XMIT_L4_CSUM;
  174. __be16 l3_proto;
  175. if (skb->ip_summed != CHECKSUM_PARTIAL)
  176. return XMIT_PLAIN;
  177. l3_proto = vlan_get_protocol(skb);
  178. if (l3_proto == htons(ETH_P_IPV6) &&
  179. (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
  180. *ipv6_ext = 1;
  181. if (skb->encapsulation) {
  182. rc |= XMIT_ENC;
  183. if (skb_is_gso(skb)) {
  184. unsigned short gso_type = skb_shinfo(skb)->gso_type;
  185. if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
  186. (gso_type & SKB_GSO_GRE_CSUM))
  187. rc |= XMIT_ENC_GSO_L4_CSUM;
  188. rc |= XMIT_LSO;
  189. return rc;
  190. }
  191. }
  192. if (skb_is_gso(skb))
  193. rc |= XMIT_LSO;
  194. return rc;
  195. }
  196. static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
  197. struct eth_tx_2nd_bd *second_bd,
  198. struct eth_tx_3rd_bd *third_bd)
  199. {
  200. u8 l4_proto;
  201. u16 bd2_bits1 = 0, bd2_bits2 = 0;
  202. bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
  203. bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
  204. ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
  205. << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
  206. bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
  207. ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
  208. if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
  209. l4_proto = ipv6_hdr(skb)->nexthdr;
  210. else
  211. l4_proto = ip_hdr(skb)->protocol;
  212. if (l4_proto == IPPROTO_UDP)
  213. bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
  214. if (third_bd)
  215. third_bd->data.bitfields |=
  216. cpu_to_le16(((tcp_hdrlen(skb) / 4) &
  217. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
  218. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
  219. second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
  220. second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
  221. }
  222. static int map_frag_to_bd(struct qede_tx_queue *txq,
  223. skb_frag_t *frag, struct eth_tx_bd *bd)
  224. {
  225. dma_addr_t mapping;
  226. /* Map skb non-linear frag data for DMA */
  227. mapping = skb_frag_dma_map(txq->dev, frag, 0,
  228. skb_frag_size(frag), DMA_TO_DEVICE);
  229. if (unlikely(dma_mapping_error(txq->dev, mapping)))
  230. return -ENOMEM;
  231. /* Setup the data pointer of the frag data */
  232. BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
  233. return 0;
  234. }
  235. static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
  236. {
  237. if (is_encap_pkt)
  238. return (skb_inner_transport_header(skb) +
  239. inner_tcp_hdrlen(skb) - skb->data);
  240. else
  241. return (skb_transport_header(skb) +
  242. tcp_hdrlen(skb) - skb->data);
  243. }
  244. /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
  245. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  246. static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
  247. {
  248. int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
  249. if (xmit_type & XMIT_LSO) {
  250. int hlen;
  251. hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
  252. /* linear payload would require its own BD */
  253. if (skb_headlen(skb) > hlen)
  254. allowed_frags--;
  255. }
  256. return (skb_shinfo(skb)->nr_frags > allowed_frags);
  257. }
  258. #endif
  259. static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
  260. {
  261. /* wmb makes sure that the BDs data is updated before updating the
  262. * producer, otherwise FW may read old data from the BDs.
  263. */
  264. wmb();
  265. barrier();
  266. writel(txq->tx_db.raw, txq->doorbell_addr);
  267. /* Fence required to flush the write combined buffer, since another
  268. * CPU may write to the same doorbell address and data may be lost
  269. * due to relaxed order nature of write combined bar.
  270. */
  271. wmb();
  272. }
  273. static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,
  274. struct sw_rx_data *metadata, u16 padding, u16 length)
  275. {
  276. struct qede_tx_queue *txq = fp->xdp_tx;
  277. struct eth_tx_1st_bd *first_bd;
  278. u16 idx = txq->sw_tx_prod;
  279. u16 val;
  280. if (!qed_chain_get_elem_left(&txq->tx_pbl)) {
  281. txq->stopped_cnt++;
  282. return -ENOMEM;
  283. }
  284. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  285. memset(first_bd, 0, sizeof(*first_bd));
  286. first_bd->data.bd_flags.bitfields =
  287. BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
  288. val = (length & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  289. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  290. first_bd->data.bitfields |= cpu_to_le16(val);
  291. first_bd->data.nbds = 1;
  292. /* We can safely ignore the offset, as it's 0 for XDP */
  293. BD_SET_UNMAP_ADDR_LEN(first_bd, metadata->mapping + padding, length);
  294. /* Synchronize the buffer back to device, as program [probably]
  295. * has changed it.
  296. */
  297. dma_sync_single_for_device(&edev->pdev->dev,
  298. metadata->mapping + padding,
  299. length, PCI_DMA_TODEVICE);
  300. txq->sw_tx_ring.xdp[idx].page = metadata->data;
  301. txq->sw_tx_ring.xdp[idx].mapping = metadata->mapping;
  302. txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
  303. /* Mark the fastpath for future XDP doorbell */
  304. fp->xdp_xmit = 1;
  305. return 0;
  306. }
  307. int qede_txq_has_work(struct qede_tx_queue *txq)
  308. {
  309. u16 hw_bd_cons;
  310. /* Tell compiler that consumer and producer can change */
  311. barrier();
  312. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  313. if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
  314. return 0;
  315. return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
  316. }
  317. static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  318. {
  319. u16 hw_bd_cons, idx;
  320. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  321. barrier();
  322. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  323. qed_chain_consume(&txq->tx_pbl);
  324. idx = txq->sw_tx_cons;
  325. dma_unmap_page(&edev->pdev->dev,
  326. txq->sw_tx_ring.xdp[idx].mapping,
  327. PAGE_SIZE, DMA_BIDIRECTIONAL);
  328. __free_page(txq->sw_tx_ring.xdp[idx].page);
  329. txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
  330. txq->xmit_pkts++;
  331. }
  332. }
  333. static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  334. {
  335. struct netdev_queue *netdev_txq;
  336. u16 hw_bd_cons;
  337. unsigned int pkts_compl = 0, bytes_compl = 0;
  338. int rc;
  339. netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
  340. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  341. barrier();
  342. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  343. int len = 0;
  344. rc = qede_free_tx_pkt(edev, txq, &len);
  345. if (rc) {
  346. DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
  347. hw_bd_cons,
  348. qed_chain_get_cons_idx(&txq->tx_pbl));
  349. break;
  350. }
  351. bytes_compl += len;
  352. pkts_compl++;
  353. txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
  354. txq->xmit_pkts++;
  355. }
  356. netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
  357. /* Need to make the tx_bd_cons update visible to start_xmit()
  358. * before checking for netif_tx_queue_stopped(). Without the
  359. * memory barrier, there is a small possibility that
  360. * start_xmit() will miss it and cause the queue to be stopped
  361. * forever.
  362. * On the other hand we need an rmb() here to ensure the proper
  363. * ordering of bit testing in the following
  364. * netif_tx_queue_stopped(txq) call.
  365. */
  366. smp_mb();
  367. if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
  368. /* Taking tx_lock is needed to prevent reenabling the queue
  369. * while it's empty. This could have happen if rx_action() gets
  370. * suspended in qede_tx_int() after the condition before
  371. * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
  372. *
  373. * stops the queue->sees fresh tx_bd_cons->releases the queue->
  374. * sends some packets consuming the whole queue again->
  375. * stops the queue
  376. */
  377. __netif_tx_lock(netdev_txq, smp_processor_id());
  378. if ((netif_tx_queue_stopped(netdev_txq)) &&
  379. (edev->state == QEDE_STATE_OPEN) &&
  380. (qed_chain_get_elem_left(&txq->tx_pbl)
  381. >= (MAX_SKB_FRAGS + 1))) {
  382. netif_tx_wake_queue(netdev_txq);
  383. DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
  384. "Wake queue was called\n");
  385. }
  386. __netif_tx_unlock(netdev_txq);
  387. }
  388. return 0;
  389. }
  390. bool qede_has_rx_work(struct qede_rx_queue *rxq)
  391. {
  392. u16 hw_comp_cons, sw_comp_cons;
  393. /* Tell compiler that status block fields can change */
  394. barrier();
  395. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  396. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  397. return hw_comp_cons != sw_comp_cons;
  398. }
  399. static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
  400. {
  401. qed_chain_consume(&rxq->rx_bd_ring);
  402. rxq->sw_rx_cons++;
  403. }
  404. /* This function reuses the buffer(from an offset) from
  405. * consumer index to producer index in the bd ring
  406. */
  407. static inline void qede_reuse_page(struct qede_rx_queue *rxq,
  408. struct sw_rx_data *curr_cons)
  409. {
  410. struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
  411. struct sw_rx_data *curr_prod;
  412. dma_addr_t new_mapping;
  413. curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  414. *curr_prod = *curr_cons;
  415. new_mapping = curr_prod->mapping + curr_prod->page_offset;
  416. rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
  417. rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping) +
  418. rxq->rx_headroom);
  419. rxq->sw_rx_prod++;
  420. curr_cons->data = NULL;
  421. }
  422. /* In case of allocation failures reuse buffers
  423. * from consumer index to produce buffers for firmware
  424. */
  425. void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
  426. {
  427. struct sw_rx_data *curr_cons;
  428. for (; count > 0; count--) {
  429. curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  430. qede_reuse_page(rxq, curr_cons);
  431. qede_rx_bd_ring_consume(rxq);
  432. }
  433. }
  434. static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
  435. struct sw_rx_data *curr_cons)
  436. {
  437. /* Move to the next segment in the page */
  438. curr_cons->page_offset += rxq->rx_buf_seg_size;
  439. if (curr_cons->page_offset == PAGE_SIZE) {
  440. if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
  441. /* Since we failed to allocate new buffer
  442. * current buffer can be used again.
  443. */
  444. curr_cons->page_offset -= rxq->rx_buf_seg_size;
  445. return -ENOMEM;
  446. }
  447. dma_unmap_page(rxq->dev, curr_cons->mapping,
  448. PAGE_SIZE, rxq->data_direction);
  449. } else {
  450. /* Increment refcount of the page as we don't want
  451. * network stack to take the ownership of the page
  452. * which can be recycled multiple times by the driver.
  453. */
  454. page_ref_inc(curr_cons->data);
  455. qede_reuse_page(rxq, curr_cons);
  456. }
  457. return 0;
  458. }
  459. void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
  460. {
  461. u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
  462. u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
  463. struct eth_rx_prod_data rx_prods = {0};
  464. /* Update producers */
  465. rx_prods.bd_prod = cpu_to_le16(bd_prod);
  466. rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
  467. /* Make sure that the BD and SGE data is updated before updating the
  468. * producers since FW might read the BD/SGE right after the producer
  469. * is updated.
  470. */
  471. wmb();
  472. internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
  473. (u32 *)&rx_prods);
  474. /* mmiowb is needed to synchronize doorbell writes from more than one
  475. * processor. It guarantees that the write arrives to the device before
  476. * the napi lock is released and another qede_poll is called (possibly
  477. * on another CPU). Without this barrier, the next doorbell can bypass
  478. * this doorbell. This is applicable to IA64/Altix systems.
  479. */
  480. mmiowb();
  481. }
  482. static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
  483. {
  484. enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
  485. enum rss_hash_type htype;
  486. u32 hash = 0;
  487. htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
  488. if (htype) {
  489. hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
  490. (htype == RSS_HASH_TYPE_IPV6)) ?
  491. PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
  492. hash = le32_to_cpu(rss_hash);
  493. }
  494. skb_set_hash(skb, hash, hash_type);
  495. }
  496. static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
  497. {
  498. skb_checksum_none_assert(skb);
  499. if (csum_flag & QEDE_CSUM_UNNECESSARY)
  500. skb->ip_summed = CHECKSUM_UNNECESSARY;
  501. if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) {
  502. skb->csum_level = 1;
  503. skb->encapsulation = 1;
  504. }
  505. }
  506. static inline void qede_skb_receive(struct qede_dev *edev,
  507. struct qede_fastpath *fp,
  508. struct qede_rx_queue *rxq,
  509. struct sk_buff *skb, u16 vlan_tag)
  510. {
  511. if (vlan_tag)
  512. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
  513. napi_gro_receive(&fp->napi, skb);
  514. }
  515. static void qede_set_gro_params(struct qede_dev *edev,
  516. struct sk_buff *skb,
  517. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  518. {
  519. u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
  520. if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
  521. PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
  522. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
  523. else
  524. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
  525. skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
  526. cqe->header_len;
  527. }
  528. static int qede_fill_frag_skb(struct qede_dev *edev,
  529. struct qede_rx_queue *rxq,
  530. u8 tpa_agg_index, u16 len_on_bd)
  531. {
  532. struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
  533. NUM_RX_BDS_MAX];
  534. struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
  535. struct sk_buff *skb = tpa_info->skb;
  536. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  537. goto out;
  538. /* Add one frag and update the appropriate fields in the skb */
  539. skb_fill_page_desc(skb, tpa_info->frag_id++,
  540. current_bd->data, current_bd->page_offset,
  541. len_on_bd);
  542. if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
  543. /* Incr page ref count to reuse on allocation failure
  544. * so that it doesn't get freed while freeing SKB.
  545. */
  546. page_ref_inc(current_bd->data);
  547. goto out;
  548. }
  549. qed_chain_consume(&rxq->rx_bd_ring);
  550. rxq->sw_rx_cons++;
  551. skb->data_len += len_on_bd;
  552. skb->truesize += rxq->rx_buf_seg_size;
  553. skb->len += len_on_bd;
  554. return 0;
  555. out:
  556. tpa_info->state = QEDE_AGG_STATE_ERROR;
  557. qede_recycle_rx_bd_ring(rxq, 1);
  558. return -ENOMEM;
  559. }
  560. static bool qede_tunn_exist(u16 flag)
  561. {
  562. return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
  563. PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
  564. }
  565. static u8 qede_check_tunn_csum(u16 flag)
  566. {
  567. u16 csum_flag = 0;
  568. u8 tcsum = 0;
  569. if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
  570. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
  571. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
  572. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
  573. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  574. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  575. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  576. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  577. tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
  578. }
  579. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
  580. PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
  581. PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  582. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  583. if (csum_flag & flag)
  584. return QEDE_CSUM_ERROR;
  585. return QEDE_CSUM_UNNECESSARY | tcsum;
  586. }
  587. static void qede_tpa_start(struct qede_dev *edev,
  588. struct qede_rx_queue *rxq,
  589. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  590. {
  591. struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  592. struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
  593. struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
  594. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  595. dma_addr_t mapping = tpa_info->buffer_mapping;
  596. struct sw_rx_data *sw_rx_data_cons;
  597. struct sw_rx_data *sw_rx_data_prod;
  598. sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  599. sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  600. /* Use pre-allocated replacement buffer - we can't release the agg.
  601. * start until its over and we don't want to risk allocation failing
  602. * here, so re-allocate when aggregation will be over.
  603. */
  604. sw_rx_data_prod->mapping = replace_buf->mapping;
  605. sw_rx_data_prod->data = replace_buf->data;
  606. rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
  607. rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
  608. sw_rx_data_prod->page_offset = replace_buf->page_offset;
  609. rxq->sw_rx_prod++;
  610. /* move partial skb from cons to pool (don't unmap yet)
  611. * save mapping, incase we drop the packet later on.
  612. */
  613. tpa_info->buffer = *sw_rx_data_cons;
  614. mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
  615. le32_to_cpu(rx_bd_cons->addr.lo));
  616. tpa_info->buffer_mapping = mapping;
  617. rxq->sw_rx_cons++;
  618. /* set tpa state to start only if we are able to allocate skb
  619. * for this aggregation, otherwise mark as error and aggregation will
  620. * be dropped
  621. */
  622. tpa_info->skb = netdev_alloc_skb(edev->ndev,
  623. le16_to_cpu(cqe->len_on_first_bd));
  624. if (unlikely(!tpa_info->skb)) {
  625. DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
  626. tpa_info->state = QEDE_AGG_STATE_ERROR;
  627. goto cons_buf;
  628. }
  629. /* Start filling in the aggregation info */
  630. skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
  631. tpa_info->frag_id = 0;
  632. tpa_info->state = QEDE_AGG_STATE_START;
  633. /* Store some information from first CQE */
  634. tpa_info->start_cqe_placement_offset = cqe->placement_offset;
  635. tpa_info->start_cqe_bd_len = le16_to_cpu(cqe->len_on_first_bd);
  636. if ((le16_to_cpu(cqe->pars_flags.flags) >>
  637. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
  638. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
  639. tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
  640. else
  641. tpa_info->vlan_tag = 0;
  642. qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
  643. /* This is needed in order to enable forwarding support */
  644. qede_set_gro_params(edev, tpa_info->skb, cqe);
  645. cons_buf: /* We still need to handle bd_len_list to consume buffers */
  646. if (likely(cqe->ext_bd_len_list[0]))
  647. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  648. le16_to_cpu(cqe->ext_bd_len_list[0]));
  649. if (unlikely(cqe->ext_bd_len_list[1])) {
  650. DP_ERR(edev,
  651. "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
  652. tpa_info->state = QEDE_AGG_STATE_ERROR;
  653. }
  654. }
  655. #ifdef CONFIG_INET
  656. static void qede_gro_ip_csum(struct sk_buff *skb)
  657. {
  658. const struct iphdr *iph = ip_hdr(skb);
  659. struct tcphdr *th;
  660. skb_set_transport_header(skb, sizeof(struct iphdr));
  661. th = tcp_hdr(skb);
  662. th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
  663. iph->saddr, iph->daddr, 0);
  664. tcp_gro_complete(skb);
  665. }
  666. static void qede_gro_ipv6_csum(struct sk_buff *skb)
  667. {
  668. struct ipv6hdr *iph = ipv6_hdr(skb);
  669. struct tcphdr *th;
  670. skb_set_transport_header(skb, sizeof(struct ipv6hdr));
  671. th = tcp_hdr(skb);
  672. th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
  673. &iph->saddr, &iph->daddr, 0);
  674. tcp_gro_complete(skb);
  675. }
  676. #endif
  677. static void qede_gro_receive(struct qede_dev *edev,
  678. struct qede_fastpath *fp,
  679. struct sk_buff *skb,
  680. u16 vlan_tag)
  681. {
  682. /* FW can send a single MTU sized packet from gro flow
  683. * due to aggregation timeout/last segment etc. which
  684. * is not expected to be a gro packet. If a skb has zero
  685. * frags then simply push it in the stack as non gso skb.
  686. */
  687. if (unlikely(!skb->data_len)) {
  688. skb_shinfo(skb)->gso_type = 0;
  689. skb_shinfo(skb)->gso_size = 0;
  690. goto send_skb;
  691. }
  692. #ifdef CONFIG_INET
  693. if (skb_shinfo(skb)->gso_size) {
  694. skb_reset_network_header(skb);
  695. switch (skb->protocol) {
  696. case htons(ETH_P_IP):
  697. qede_gro_ip_csum(skb);
  698. break;
  699. case htons(ETH_P_IPV6):
  700. qede_gro_ipv6_csum(skb);
  701. break;
  702. default:
  703. DP_ERR(edev,
  704. "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
  705. ntohs(skb->protocol));
  706. }
  707. }
  708. #endif
  709. send_skb:
  710. skb_record_rx_queue(skb, fp->rxq->rxq_id);
  711. qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
  712. }
  713. static inline void qede_tpa_cont(struct qede_dev *edev,
  714. struct qede_rx_queue *rxq,
  715. struct eth_fast_path_rx_tpa_cont_cqe *cqe)
  716. {
  717. int i;
  718. for (i = 0; cqe->len_list[i]; i++)
  719. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  720. le16_to_cpu(cqe->len_list[i]));
  721. if (unlikely(i > 1))
  722. DP_ERR(edev,
  723. "Strange - TPA cont with more than a single len_list entry\n");
  724. }
  725. static int qede_tpa_end(struct qede_dev *edev,
  726. struct qede_fastpath *fp,
  727. struct eth_fast_path_rx_tpa_end_cqe *cqe)
  728. {
  729. struct qede_rx_queue *rxq = fp->rxq;
  730. struct qede_agg_info *tpa_info;
  731. struct sk_buff *skb;
  732. int i;
  733. tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  734. skb = tpa_info->skb;
  735. for (i = 0; cqe->len_list[i]; i++)
  736. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  737. le16_to_cpu(cqe->len_list[i]));
  738. if (unlikely(i > 1))
  739. DP_ERR(edev,
  740. "Strange - TPA emd with more than a single len_list entry\n");
  741. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  742. goto err;
  743. /* Sanity */
  744. if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
  745. DP_ERR(edev,
  746. "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
  747. cqe->num_of_bds, tpa_info->frag_id);
  748. if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
  749. DP_ERR(edev,
  750. "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
  751. le16_to_cpu(cqe->total_packet_len), skb->len);
  752. memcpy(skb->data,
  753. page_address(tpa_info->buffer.data) +
  754. tpa_info->start_cqe_placement_offset +
  755. tpa_info->buffer.page_offset, tpa_info->start_cqe_bd_len);
  756. /* Finalize the SKB */
  757. skb->protocol = eth_type_trans(skb, edev->ndev);
  758. skb->ip_summed = CHECKSUM_UNNECESSARY;
  759. /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
  760. * to skb_shinfo(skb)->gso_segs
  761. */
  762. NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
  763. qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
  764. tpa_info->state = QEDE_AGG_STATE_NONE;
  765. return 1;
  766. err:
  767. tpa_info->state = QEDE_AGG_STATE_NONE;
  768. dev_kfree_skb_any(tpa_info->skb);
  769. tpa_info->skb = NULL;
  770. return 0;
  771. }
  772. static u8 qede_check_notunn_csum(u16 flag)
  773. {
  774. u16 csum_flag = 0;
  775. u8 csum = 0;
  776. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  777. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  778. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  779. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  780. csum = QEDE_CSUM_UNNECESSARY;
  781. }
  782. csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  783. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  784. if (csum_flag & flag)
  785. return QEDE_CSUM_ERROR;
  786. return csum;
  787. }
  788. static u8 qede_check_csum(u16 flag)
  789. {
  790. if (!qede_tunn_exist(flag))
  791. return qede_check_notunn_csum(flag);
  792. else
  793. return qede_check_tunn_csum(flag);
  794. }
  795. static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
  796. u16 flag)
  797. {
  798. u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
  799. if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
  800. ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
  801. (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
  802. PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
  803. return true;
  804. return false;
  805. }
  806. /* Return true iff packet is to be passed to stack */
  807. static bool qede_rx_xdp(struct qede_dev *edev,
  808. struct qede_fastpath *fp,
  809. struct qede_rx_queue *rxq,
  810. struct bpf_prog *prog,
  811. struct sw_rx_data *bd,
  812. struct eth_fast_path_rx_reg_cqe *cqe,
  813. u16 *data_offset, u16 *len)
  814. {
  815. struct xdp_buff xdp;
  816. enum xdp_action act;
  817. xdp.data_hard_start = page_address(bd->data);
  818. xdp.data = xdp.data_hard_start + *data_offset;
  819. xdp_set_data_meta_invalid(&xdp);
  820. xdp.data_end = xdp.data + *len;
  821. xdp.rxq = &rxq->xdp_rxq;
  822. /* Queues always have a full reset currently, so for the time
  823. * being until there's atomic program replace just mark read
  824. * side for map helpers.
  825. */
  826. rcu_read_lock();
  827. act = bpf_prog_run_xdp(prog, &xdp);
  828. rcu_read_unlock();
  829. /* Recalculate, as XDP might have changed the headers */
  830. *data_offset = xdp.data - xdp.data_hard_start;
  831. *len = xdp.data_end - xdp.data;
  832. if (act == XDP_PASS)
  833. return true;
  834. /* Count number of packets not to be passed to stack */
  835. rxq->xdp_no_pass++;
  836. switch (act) {
  837. case XDP_TX:
  838. /* We need the replacement buffer before transmit. */
  839. if (qede_alloc_rx_buffer(rxq, true)) {
  840. qede_recycle_rx_bd_ring(rxq, 1);
  841. trace_xdp_exception(edev->ndev, prog, act);
  842. return false;
  843. }
  844. /* Now if there's a transmission problem, we'd still have to
  845. * throw current buffer, as replacement was already allocated.
  846. */
  847. if (qede_xdp_xmit(edev, fp, bd, *data_offset, *len)) {
  848. dma_unmap_page(rxq->dev, bd->mapping,
  849. PAGE_SIZE, DMA_BIDIRECTIONAL);
  850. __free_page(bd->data);
  851. trace_xdp_exception(edev->ndev, prog, act);
  852. }
  853. /* Regardless, we've consumed an Rx BD */
  854. qede_rx_bd_ring_consume(rxq);
  855. return false;
  856. default:
  857. bpf_warn_invalid_xdp_action(act);
  858. case XDP_ABORTED:
  859. trace_xdp_exception(edev->ndev, prog, act);
  860. case XDP_DROP:
  861. qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
  862. }
  863. return false;
  864. }
  865. static struct sk_buff *qede_rx_allocate_skb(struct qede_dev *edev,
  866. struct qede_rx_queue *rxq,
  867. struct sw_rx_data *bd, u16 len,
  868. u16 pad)
  869. {
  870. unsigned int offset = bd->page_offset + pad;
  871. struct skb_frag_struct *frag;
  872. struct page *page = bd->data;
  873. unsigned int pull_len;
  874. struct sk_buff *skb;
  875. unsigned char *va;
  876. /* Allocate a new SKB with a sufficient large header len */
  877. skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
  878. if (unlikely(!skb))
  879. return NULL;
  880. /* Copy data into SKB - if it's small, we can simply copy it and
  881. * re-use the already allcoated & mapped memory.
  882. */
  883. if (len + pad <= edev->rx_copybreak) {
  884. skb_put_data(skb, page_address(page) + offset, len);
  885. qede_reuse_page(rxq, bd);
  886. goto out;
  887. }
  888. frag = &skb_shinfo(skb)->frags[0];
  889. skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
  890. page, offset, len, rxq->rx_buf_seg_size);
  891. va = skb_frag_address(frag);
  892. pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
  893. /* Align the pull_len to optimize memcpy */
  894. memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
  895. /* Correct the skb & frag sizes offset after the pull */
  896. skb_frag_size_sub(frag, pull_len);
  897. frag->page_offset += pull_len;
  898. skb->data_len -= pull_len;
  899. skb->tail += pull_len;
  900. if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
  901. /* Incr page ref count to reuse on allocation failure so
  902. * that it doesn't get freed while freeing SKB [as its
  903. * already mapped there].
  904. */
  905. page_ref_inc(page);
  906. dev_kfree_skb_any(skb);
  907. return NULL;
  908. }
  909. out:
  910. /* We've consumed the first BD and prepared an SKB */
  911. qede_rx_bd_ring_consume(rxq);
  912. return skb;
  913. }
  914. static int qede_rx_build_jumbo(struct qede_dev *edev,
  915. struct qede_rx_queue *rxq,
  916. struct sk_buff *skb,
  917. struct eth_fast_path_rx_reg_cqe *cqe,
  918. u16 first_bd_len)
  919. {
  920. u16 pkt_len = le16_to_cpu(cqe->pkt_len);
  921. struct sw_rx_data *bd;
  922. u16 bd_cons_idx;
  923. u8 num_frags;
  924. pkt_len -= first_bd_len;
  925. /* We've already used one BD for the SKB. Now take care of the rest */
  926. for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
  927. u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
  928. pkt_len;
  929. if (unlikely(!cur_size)) {
  930. DP_ERR(edev,
  931. "Still got %d BDs for mapping jumbo, but length became 0\n",
  932. num_frags);
  933. goto out;
  934. }
  935. /* We need a replacement buffer for each BD */
  936. if (unlikely(qede_alloc_rx_buffer(rxq, true)))
  937. goto out;
  938. /* Now that we've allocated the replacement buffer,
  939. * we can safely consume the next BD and map it to the SKB.
  940. */
  941. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  942. bd = &rxq->sw_rx_ring[bd_cons_idx];
  943. qede_rx_bd_ring_consume(rxq);
  944. dma_unmap_page(rxq->dev, bd->mapping,
  945. PAGE_SIZE, DMA_FROM_DEVICE);
  946. skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
  947. bd->data, 0, cur_size);
  948. skb->truesize += PAGE_SIZE;
  949. skb->data_len += cur_size;
  950. skb->len += cur_size;
  951. pkt_len -= cur_size;
  952. }
  953. if (unlikely(pkt_len))
  954. DP_ERR(edev,
  955. "Mapped all BDs of jumbo, but still have %d bytes\n",
  956. pkt_len);
  957. out:
  958. return num_frags;
  959. }
  960. static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
  961. struct qede_fastpath *fp,
  962. struct qede_rx_queue *rxq,
  963. union eth_rx_cqe *cqe,
  964. enum eth_rx_cqe_type type)
  965. {
  966. switch (type) {
  967. case ETH_RX_CQE_TYPE_TPA_START:
  968. qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
  969. return 0;
  970. case ETH_RX_CQE_TYPE_TPA_CONT:
  971. qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
  972. return 0;
  973. case ETH_RX_CQE_TYPE_TPA_END:
  974. return qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
  975. default:
  976. return 0;
  977. }
  978. }
  979. static int qede_rx_process_cqe(struct qede_dev *edev,
  980. struct qede_fastpath *fp,
  981. struct qede_rx_queue *rxq)
  982. {
  983. struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
  984. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  985. u16 len, pad, bd_cons_idx, parse_flag;
  986. enum eth_rx_cqe_type cqe_type;
  987. union eth_rx_cqe *cqe;
  988. struct sw_rx_data *bd;
  989. struct sk_buff *skb;
  990. __le16 flags;
  991. u8 csum_flag;
  992. /* Get the CQE from the completion ring */
  993. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  994. cqe_type = cqe->fast_path_regular.type;
  995. /* Process an unlikely slowpath event */
  996. if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
  997. struct eth_slow_path_rx_cqe *sp_cqe;
  998. sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
  999. edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
  1000. return 0;
  1001. }
  1002. /* Handle TPA cqes */
  1003. if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
  1004. return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
  1005. /* Get the data from the SW ring; Consume it only after it's evident
  1006. * we wouldn't recycle it.
  1007. */
  1008. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1009. bd = &rxq->sw_rx_ring[bd_cons_idx];
  1010. fp_cqe = &cqe->fast_path_regular;
  1011. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1012. pad = fp_cqe->placement_offset + rxq->rx_headroom;
  1013. /* Run eBPF program if one is attached */
  1014. if (xdp_prog)
  1015. if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe,
  1016. &pad, &len))
  1017. return 0;
  1018. /* If this is an error packet then drop it */
  1019. flags = cqe->fast_path_regular.pars_flags.flags;
  1020. parse_flag = le16_to_cpu(flags);
  1021. csum_flag = qede_check_csum(parse_flag);
  1022. if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
  1023. if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag))
  1024. rxq->rx_ip_frags++;
  1025. else
  1026. rxq->rx_hw_errors++;
  1027. }
  1028. /* Basic validation passed; Need to prepare an SKB. This would also
  1029. * guarantee to finally consume the first BD upon success.
  1030. */
  1031. skb = qede_rx_allocate_skb(edev, rxq, bd, len, pad);
  1032. if (!skb) {
  1033. rxq->rx_alloc_errors++;
  1034. qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
  1035. return 0;
  1036. }
  1037. /* In case of Jumbo packet, several PAGE_SIZEd buffers will be pointed
  1038. * by a single cqe.
  1039. */
  1040. if (fp_cqe->bd_num > 1) {
  1041. u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
  1042. fp_cqe, len);
  1043. if (unlikely(unmapped_frags > 0)) {
  1044. qede_recycle_rx_bd_ring(rxq, unmapped_frags);
  1045. dev_kfree_skb_any(skb);
  1046. return 0;
  1047. }
  1048. }
  1049. /* The SKB contains all the data. Now prepare meta-magic */
  1050. skb->protocol = eth_type_trans(skb, edev->ndev);
  1051. qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
  1052. qede_set_skb_csum(skb, csum_flag);
  1053. skb_record_rx_queue(skb, rxq->rxq_id);
  1054. qede_ptp_record_rx_ts(edev, cqe, skb);
  1055. /* SKB is prepared - pass it to stack */
  1056. qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
  1057. return 1;
  1058. }
  1059. static int qede_rx_int(struct qede_fastpath *fp, int budget)
  1060. {
  1061. struct qede_rx_queue *rxq = fp->rxq;
  1062. struct qede_dev *edev = fp->edev;
  1063. int work_done = 0, rcv_pkts = 0;
  1064. u16 hw_comp_cons, sw_comp_cons;
  1065. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1066. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1067. /* Memory barrier to prevent the CPU from doing speculative reads of CQE
  1068. * / BD in the while-loop before reading hw_comp_cons. If the CQE is
  1069. * read before it is written by FW, then FW writes CQE and SB, and then
  1070. * the CPU reads the hw_comp_cons, it will use an old CQE.
  1071. */
  1072. rmb();
  1073. /* Loop to complete all indicated BDs */
  1074. while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
  1075. rcv_pkts += qede_rx_process_cqe(edev, fp, rxq);
  1076. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1077. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1078. work_done++;
  1079. }
  1080. rxq->rcv_pkts += rcv_pkts;
  1081. /* Allocate replacement buffers */
  1082. while (rxq->num_rx_buffers - rxq->filled_buffers)
  1083. if (qede_alloc_rx_buffer(rxq, false))
  1084. break;
  1085. /* Update producers */
  1086. qede_update_rx_prod(edev, rxq);
  1087. return work_done;
  1088. }
  1089. static bool qede_poll_is_more_work(struct qede_fastpath *fp)
  1090. {
  1091. qed_sb_update_sb_idx(fp->sb_info);
  1092. /* *_has_*_work() reads the status block, thus we need to ensure that
  1093. * status block indices have been actually read (qed_sb_update_sb_idx)
  1094. * prior to this check (*_has_*_work) so that we won't write the
  1095. * "newer" value of the status block to HW (if there was a DMA right
  1096. * after qede_has_rx_work and if there is no rmb, the memory reading
  1097. * (qed_sb_update_sb_idx) may be postponed to right before *_ack_sb).
  1098. * In this case there will never be another interrupt until there is
  1099. * another update of the status block, while there is still unhandled
  1100. * work.
  1101. */
  1102. rmb();
  1103. if (likely(fp->type & QEDE_FASTPATH_RX))
  1104. if (qede_has_rx_work(fp->rxq))
  1105. return true;
  1106. if (fp->type & QEDE_FASTPATH_XDP)
  1107. if (qede_txq_has_work(fp->xdp_tx))
  1108. return true;
  1109. if (likely(fp->type & QEDE_FASTPATH_TX))
  1110. if (qede_txq_has_work(fp->txq))
  1111. return true;
  1112. return false;
  1113. }
  1114. /*********************
  1115. * NDO & API related *
  1116. *********************/
  1117. int qede_poll(struct napi_struct *napi, int budget)
  1118. {
  1119. struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
  1120. napi);
  1121. struct qede_dev *edev = fp->edev;
  1122. int rx_work_done = 0;
  1123. if (likely(fp->type & QEDE_FASTPATH_TX) && qede_txq_has_work(fp->txq))
  1124. qede_tx_int(edev, fp->txq);
  1125. if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
  1126. qede_xdp_tx_int(edev, fp->xdp_tx);
  1127. rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
  1128. qede_has_rx_work(fp->rxq)) ?
  1129. qede_rx_int(fp, budget) : 0;
  1130. if (rx_work_done < budget) {
  1131. if (!qede_poll_is_more_work(fp)) {
  1132. napi_complete_done(napi, rx_work_done);
  1133. /* Update and reenable interrupts */
  1134. qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
  1135. } else {
  1136. rx_work_done = budget;
  1137. }
  1138. }
  1139. if (fp->xdp_xmit) {
  1140. u16 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
  1141. fp->xdp_xmit = 0;
  1142. fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
  1143. qede_update_tx_producer(fp->xdp_tx);
  1144. }
  1145. return rx_work_done;
  1146. }
  1147. irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
  1148. {
  1149. struct qede_fastpath *fp = fp_cookie;
  1150. qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
  1151. napi_schedule_irqoff(&fp->napi);
  1152. return IRQ_HANDLED;
  1153. }
  1154. /* Main transmit function */
  1155. netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev)
  1156. {
  1157. struct qede_dev *edev = netdev_priv(ndev);
  1158. struct netdev_queue *netdev_txq;
  1159. struct qede_tx_queue *txq;
  1160. struct eth_tx_1st_bd *first_bd;
  1161. struct eth_tx_2nd_bd *second_bd = NULL;
  1162. struct eth_tx_3rd_bd *third_bd = NULL;
  1163. struct eth_tx_bd *tx_data_bd = NULL;
  1164. u16 txq_index, val = 0;
  1165. u8 nbd = 0;
  1166. dma_addr_t mapping;
  1167. int rc, frag_idx = 0, ipv6_ext = 0;
  1168. u8 xmit_type;
  1169. u16 idx;
  1170. u16 hlen;
  1171. bool data_split = false;
  1172. /* Get tx-queue context and netdev index */
  1173. txq_index = skb_get_queue_mapping(skb);
  1174. WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
  1175. txq = edev->fp_array[edev->fp_num_rx + txq_index].txq;
  1176. netdev_txq = netdev_get_tx_queue(ndev, txq_index);
  1177. WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
  1178. xmit_type = qede_xmit_type(skb, &ipv6_ext);
  1179. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  1180. if (qede_pkt_req_lin(skb, xmit_type)) {
  1181. if (skb_linearize(skb)) {
  1182. DP_NOTICE(edev,
  1183. "SKB linearization failed - silently dropping this SKB\n");
  1184. dev_kfree_skb_any(skb);
  1185. return NETDEV_TX_OK;
  1186. }
  1187. }
  1188. #endif
  1189. /* Fill the entry in the SW ring and the BDs in the FW ring */
  1190. idx = txq->sw_tx_prod;
  1191. txq->sw_tx_ring.skbs[idx].skb = skb;
  1192. first_bd = (struct eth_tx_1st_bd *)
  1193. qed_chain_produce(&txq->tx_pbl);
  1194. memset(first_bd, 0, sizeof(*first_bd));
  1195. first_bd->data.bd_flags.bitfields =
  1196. 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  1197. if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
  1198. qede_ptp_tx_ts(edev, skb);
  1199. /* Map skb linear data for DMA and set in the first BD */
  1200. mapping = dma_map_single(txq->dev, skb->data,
  1201. skb_headlen(skb), DMA_TO_DEVICE);
  1202. if (unlikely(dma_mapping_error(txq->dev, mapping))) {
  1203. DP_NOTICE(edev, "SKB mapping failed\n");
  1204. qede_free_failed_tx_pkt(txq, first_bd, 0, false);
  1205. qede_update_tx_producer(txq);
  1206. return NETDEV_TX_OK;
  1207. }
  1208. nbd++;
  1209. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  1210. /* In case there is IPv6 with extension headers or LSO we need 2nd and
  1211. * 3rd BDs.
  1212. */
  1213. if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
  1214. second_bd = (struct eth_tx_2nd_bd *)
  1215. qed_chain_produce(&txq->tx_pbl);
  1216. memset(second_bd, 0, sizeof(*second_bd));
  1217. nbd++;
  1218. third_bd = (struct eth_tx_3rd_bd *)
  1219. qed_chain_produce(&txq->tx_pbl);
  1220. memset(third_bd, 0, sizeof(*third_bd));
  1221. nbd++;
  1222. /* We need to fill in additional data in second_bd... */
  1223. tx_data_bd = (struct eth_tx_bd *)second_bd;
  1224. }
  1225. if (skb_vlan_tag_present(skb)) {
  1226. first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
  1227. first_bd->data.bd_flags.bitfields |=
  1228. 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
  1229. }
  1230. /* Fill the parsing flags & params according to the requested offload */
  1231. if (xmit_type & XMIT_L4_CSUM) {
  1232. /* We don't re-calculate IP checksum as it is already done by
  1233. * the upper stack
  1234. */
  1235. first_bd->data.bd_flags.bitfields |=
  1236. 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
  1237. if (xmit_type & XMIT_ENC) {
  1238. first_bd->data.bd_flags.bitfields |=
  1239. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  1240. val |= (1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT);
  1241. }
  1242. /* Legacy FW had flipped behavior in regard to this bit -
  1243. * I.e., needed to set to prevent FW from touching encapsulated
  1244. * packets when it didn't need to.
  1245. */
  1246. if (unlikely(txq->is_legacy))
  1247. val ^= (1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT);
  1248. /* If the packet is IPv6 with extension header, indicate that
  1249. * to FW and pass few params, since the device cracker doesn't
  1250. * support parsing IPv6 with extension header/s.
  1251. */
  1252. if (unlikely(ipv6_ext))
  1253. qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
  1254. }
  1255. if (xmit_type & XMIT_LSO) {
  1256. first_bd->data.bd_flags.bitfields |=
  1257. (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
  1258. third_bd->data.lso_mss =
  1259. cpu_to_le16(skb_shinfo(skb)->gso_size);
  1260. if (unlikely(xmit_type & XMIT_ENC)) {
  1261. first_bd->data.bd_flags.bitfields |=
  1262. 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
  1263. if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
  1264. u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
  1265. first_bd->data.bd_flags.bitfields |= 1 << tmp;
  1266. }
  1267. hlen = qede_get_skb_hlen(skb, true);
  1268. } else {
  1269. first_bd->data.bd_flags.bitfields |=
  1270. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  1271. hlen = qede_get_skb_hlen(skb, false);
  1272. }
  1273. /* @@@TBD - if will not be removed need to check */
  1274. third_bd->data.bitfields |=
  1275. cpu_to_le16(1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT);
  1276. /* Make life easier for FW guys who can't deal with header and
  1277. * data on same BD. If we need to split, use the second bd...
  1278. */
  1279. if (unlikely(skb_headlen(skb) > hlen)) {
  1280. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1281. "TSO split header size is %d (%x:%x)\n",
  1282. first_bd->nbytes, first_bd->addr.hi,
  1283. first_bd->addr.lo);
  1284. mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
  1285. le32_to_cpu(first_bd->addr.lo)) +
  1286. hlen;
  1287. BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
  1288. le16_to_cpu(first_bd->nbytes) -
  1289. hlen);
  1290. /* this marks the BD as one that has no
  1291. * individual mapping
  1292. */
  1293. txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
  1294. first_bd->nbytes = cpu_to_le16(hlen);
  1295. tx_data_bd = (struct eth_tx_bd *)third_bd;
  1296. data_split = true;
  1297. }
  1298. } else {
  1299. val |= ((skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  1300. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT);
  1301. }
  1302. first_bd->data.bitfields = cpu_to_le16(val);
  1303. /* Handle fragmented skb */
  1304. /* special handle for frags inside 2nd and 3rd bds.. */
  1305. while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
  1306. rc = map_frag_to_bd(txq,
  1307. &skb_shinfo(skb)->frags[frag_idx],
  1308. tx_data_bd);
  1309. if (rc) {
  1310. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  1311. qede_update_tx_producer(txq);
  1312. return NETDEV_TX_OK;
  1313. }
  1314. if (tx_data_bd == (struct eth_tx_bd *)second_bd)
  1315. tx_data_bd = (struct eth_tx_bd *)third_bd;
  1316. else
  1317. tx_data_bd = NULL;
  1318. frag_idx++;
  1319. }
  1320. /* map last frags into 4th, 5th .... */
  1321. for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
  1322. tx_data_bd = (struct eth_tx_bd *)
  1323. qed_chain_produce(&txq->tx_pbl);
  1324. memset(tx_data_bd, 0, sizeof(*tx_data_bd));
  1325. rc = map_frag_to_bd(txq,
  1326. &skb_shinfo(skb)->frags[frag_idx],
  1327. tx_data_bd);
  1328. if (rc) {
  1329. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  1330. qede_update_tx_producer(txq);
  1331. return NETDEV_TX_OK;
  1332. }
  1333. }
  1334. /* update the first BD with the actual num BDs */
  1335. first_bd->data.nbds = nbd;
  1336. netdev_tx_sent_queue(netdev_txq, skb->len);
  1337. skb_tx_timestamp(skb);
  1338. /* Advance packet producer only before sending the packet since mapping
  1339. * of pages may fail.
  1340. */
  1341. txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
  1342. /* 'next page' entries are counted in the producer value */
  1343. txq->tx_db.data.bd_prod =
  1344. cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
  1345. if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
  1346. qede_update_tx_producer(txq);
  1347. if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
  1348. < (MAX_SKB_FRAGS + 1))) {
  1349. if (skb->xmit_more)
  1350. qede_update_tx_producer(txq);
  1351. netif_tx_stop_queue(netdev_txq);
  1352. txq->stopped_cnt++;
  1353. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1354. "Stop queue was called\n");
  1355. /* paired memory barrier is in qede_tx_int(), we have to keep
  1356. * ordering of set_bit() in netif_tx_stop_queue() and read of
  1357. * fp->bd_tx_cons
  1358. */
  1359. smp_mb();
  1360. if ((qed_chain_get_elem_left(&txq->tx_pbl) >=
  1361. (MAX_SKB_FRAGS + 1)) &&
  1362. (edev->state == QEDE_STATE_OPEN)) {
  1363. netif_tx_wake_queue(netdev_txq);
  1364. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1365. "Wake queue was called\n");
  1366. }
  1367. }
  1368. return NETDEV_TX_OK;
  1369. }
  1370. /* 8B udp header + 8B base tunnel header + 32B option length */
  1371. #define QEDE_MAX_TUN_HDR_LEN 48
  1372. netdev_features_t qede_features_check(struct sk_buff *skb,
  1373. struct net_device *dev,
  1374. netdev_features_t features)
  1375. {
  1376. if (skb->encapsulation) {
  1377. u8 l4_proto = 0;
  1378. switch (vlan_get_protocol(skb)) {
  1379. case htons(ETH_P_IP):
  1380. l4_proto = ip_hdr(skb)->protocol;
  1381. break;
  1382. case htons(ETH_P_IPV6):
  1383. l4_proto = ipv6_hdr(skb)->nexthdr;
  1384. break;
  1385. default:
  1386. return features;
  1387. }
  1388. /* Disable offloads for geneve tunnels, as HW can't parse
  1389. * the geneve header which has option length greater than 32b
  1390. * and disable offloads for the ports which are not offloaded.
  1391. */
  1392. if (l4_proto == IPPROTO_UDP) {
  1393. struct qede_dev *edev = netdev_priv(dev);
  1394. u16 hdrlen, vxln_port, gnv_port;
  1395. hdrlen = QEDE_MAX_TUN_HDR_LEN;
  1396. vxln_port = edev->vxlan_dst_port;
  1397. gnv_port = edev->geneve_dst_port;
  1398. if ((skb_inner_mac_header(skb) -
  1399. skb_transport_header(skb)) > hdrlen ||
  1400. (ntohs(udp_hdr(skb)->dest) != vxln_port &&
  1401. ntohs(udp_hdr(skb)->dest) != gnv_port))
  1402. return features & ~(NETIF_F_CSUM_MASK |
  1403. NETIF_F_GSO_MASK);
  1404. }
  1405. }
  1406. return features;
  1407. }