e1000_mbx.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495
  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Intel(R) Gigabit Ethernet Linux driver
  3. * Copyright(c) 2007-2014 Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, see <http://www.gnu.org/licenses/>.
  16. *
  17. * The full GNU General Public License is included in this distribution in
  18. * the file called "COPYING".
  19. *
  20. * Contact Information:
  21. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  22. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  23. */
  24. #include "e1000_mbx.h"
  25. /**
  26. * igb_read_mbx - Reads a message from the mailbox
  27. * @hw: pointer to the HW structure
  28. * @msg: The message buffer
  29. * @size: Length of buffer
  30. * @mbx_id: id of mailbox to read
  31. *
  32. * returns SUCCESS if it successfully read message from buffer
  33. **/
  34. s32 igb_read_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id,
  35. bool unlock)
  36. {
  37. struct e1000_mbx_info *mbx = &hw->mbx;
  38. s32 ret_val = -E1000_ERR_MBX;
  39. /* limit read to size of mailbox */
  40. if (size > mbx->size)
  41. size = mbx->size;
  42. if (mbx->ops.read)
  43. ret_val = mbx->ops.read(hw, msg, size, mbx_id, unlock);
  44. return ret_val;
  45. }
  46. /**
  47. * igb_write_mbx - Write a message to the mailbox
  48. * @hw: pointer to the HW structure
  49. * @msg: The message buffer
  50. * @size: Length of buffer
  51. * @mbx_id: id of mailbox to write
  52. *
  53. * returns SUCCESS if it successfully copied message into the buffer
  54. **/
  55. s32 igb_write_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)
  56. {
  57. struct e1000_mbx_info *mbx = &hw->mbx;
  58. s32 ret_val = 0;
  59. if (size > mbx->size)
  60. ret_val = -E1000_ERR_MBX;
  61. else if (mbx->ops.write)
  62. ret_val = mbx->ops.write(hw, msg, size, mbx_id);
  63. return ret_val;
  64. }
  65. /**
  66. * igb_check_for_msg - checks to see if someone sent us mail
  67. * @hw: pointer to the HW structure
  68. * @mbx_id: id of mailbox to check
  69. *
  70. * returns SUCCESS if the Status bit was found or else ERR_MBX
  71. **/
  72. s32 igb_check_for_msg(struct e1000_hw *hw, u16 mbx_id)
  73. {
  74. struct e1000_mbx_info *mbx = &hw->mbx;
  75. s32 ret_val = -E1000_ERR_MBX;
  76. if (mbx->ops.check_for_msg)
  77. ret_val = mbx->ops.check_for_msg(hw, mbx_id);
  78. return ret_val;
  79. }
  80. /**
  81. * igb_check_for_ack - checks to see if someone sent us ACK
  82. * @hw: pointer to the HW structure
  83. * @mbx_id: id of mailbox to check
  84. *
  85. * returns SUCCESS if the Status bit was found or else ERR_MBX
  86. **/
  87. s32 igb_check_for_ack(struct e1000_hw *hw, u16 mbx_id)
  88. {
  89. struct e1000_mbx_info *mbx = &hw->mbx;
  90. s32 ret_val = -E1000_ERR_MBX;
  91. if (mbx->ops.check_for_ack)
  92. ret_val = mbx->ops.check_for_ack(hw, mbx_id);
  93. return ret_val;
  94. }
  95. /**
  96. * igb_check_for_rst - checks to see if other side has reset
  97. * @hw: pointer to the HW structure
  98. * @mbx_id: id of mailbox to check
  99. *
  100. * returns SUCCESS if the Status bit was found or else ERR_MBX
  101. **/
  102. s32 igb_check_for_rst(struct e1000_hw *hw, u16 mbx_id)
  103. {
  104. struct e1000_mbx_info *mbx = &hw->mbx;
  105. s32 ret_val = -E1000_ERR_MBX;
  106. if (mbx->ops.check_for_rst)
  107. ret_val = mbx->ops.check_for_rst(hw, mbx_id);
  108. return ret_val;
  109. }
  110. /**
  111. * igb_unlock_mbx - unlock the mailbox
  112. * @hw: pointer to the HW structure
  113. * @mbx_id: id of mailbox to check
  114. *
  115. * returns SUCCESS if the mailbox was unlocked or else ERR_MBX
  116. **/
  117. s32 igb_unlock_mbx(struct e1000_hw *hw, u16 mbx_id)
  118. {
  119. struct e1000_mbx_info *mbx = &hw->mbx;
  120. s32 ret_val = -E1000_ERR_MBX;
  121. if (mbx->ops.unlock)
  122. ret_val = mbx->ops.unlock(hw, mbx_id);
  123. return ret_val;
  124. }
  125. /**
  126. * igb_poll_for_msg - Wait for message notification
  127. * @hw: pointer to the HW structure
  128. * @mbx_id: id of mailbox to write
  129. *
  130. * returns SUCCESS if it successfully received a message notification
  131. **/
  132. static s32 igb_poll_for_msg(struct e1000_hw *hw, u16 mbx_id)
  133. {
  134. struct e1000_mbx_info *mbx = &hw->mbx;
  135. int countdown = mbx->timeout;
  136. if (!countdown || !mbx->ops.check_for_msg)
  137. goto out;
  138. while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {
  139. countdown--;
  140. if (!countdown)
  141. break;
  142. udelay(mbx->usec_delay);
  143. }
  144. /* if we failed, all future posted messages fail until reset */
  145. if (!countdown)
  146. mbx->timeout = 0;
  147. out:
  148. return countdown ? 0 : -E1000_ERR_MBX;
  149. }
  150. /**
  151. * igb_poll_for_ack - Wait for message acknowledgement
  152. * @hw: pointer to the HW structure
  153. * @mbx_id: id of mailbox to write
  154. *
  155. * returns SUCCESS if it successfully received a message acknowledgement
  156. **/
  157. static s32 igb_poll_for_ack(struct e1000_hw *hw, u16 mbx_id)
  158. {
  159. struct e1000_mbx_info *mbx = &hw->mbx;
  160. int countdown = mbx->timeout;
  161. if (!countdown || !mbx->ops.check_for_ack)
  162. goto out;
  163. while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {
  164. countdown--;
  165. if (!countdown)
  166. break;
  167. udelay(mbx->usec_delay);
  168. }
  169. /* if we failed, all future posted messages fail until reset */
  170. if (!countdown)
  171. mbx->timeout = 0;
  172. out:
  173. return countdown ? 0 : -E1000_ERR_MBX;
  174. }
  175. /**
  176. * igb_read_posted_mbx - Wait for message notification and receive message
  177. * @hw: pointer to the HW structure
  178. * @msg: The message buffer
  179. * @size: Length of buffer
  180. * @mbx_id: id of mailbox to write
  181. *
  182. * returns SUCCESS if it successfully received a message notification and
  183. * copied it into the receive buffer.
  184. **/
  185. static s32 igb_read_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size,
  186. u16 mbx_id)
  187. {
  188. struct e1000_mbx_info *mbx = &hw->mbx;
  189. s32 ret_val = -E1000_ERR_MBX;
  190. if (!mbx->ops.read)
  191. goto out;
  192. ret_val = igb_poll_for_msg(hw, mbx_id);
  193. if (!ret_val)
  194. ret_val = mbx->ops.read(hw, msg, size, mbx_id, true);
  195. out:
  196. return ret_val;
  197. }
  198. /**
  199. * igb_write_posted_mbx - Write a message to the mailbox, wait for ack
  200. * @hw: pointer to the HW structure
  201. * @msg: The message buffer
  202. * @size: Length of buffer
  203. * @mbx_id: id of mailbox to write
  204. *
  205. * returns SUCCESS if it successfully copied message into the buffer and
  206. * received an ack to that message within delay * timeout period
  207. **/
  208. static s32 igb_write_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size,
  209. u16 mbx_id)
  210. {
  211. struct e1000_mbx_info *mbx = &hw->mbx;
  212. s32 ret_val = -E1000_ERR_MBX;
  213. /* exit if either we can't write or there isn't a defined timeout */
  214. if (!mbx->ops.write || !mbx->timeout)
  215. goto out;
  216. /* send msg */
  217. ret_val = mbx->ops.write(hw, msg, size, mbx_id);
  218. /* if msg sent wait until we receive an ack */
  219. if (!ret_val)
  220. ret_val = igb_poll_for_ack(hw, mbx_id);
  221. out:
  222. return ret_val;
  223. }
  224. static s32 igb_check_for_bit_pf(struct e1000_hw *hw, u32 mask)
  225. {
  226. u32 mbvficr = rd32(E1000_MBVFICR);
  227. s32 ret_val = -E1000_ERR_MBX;
  228. if (mbvficr & mask) {
  229. ret_val = 0;
  230. wr32(E1000_MBVFICR, mask);
  231. }
  232. return ret_val;
  233. }
  234. /**
  235. * igb_check_for_msg_pf - checks to see if the VF has sent mail
  236. * @hw: pointer to the HW structure
  237. * @vf_number: the VF index
  238. *
  239. * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
  240. **/
  241. static s32 igb_check_for_msg_pf(struct e1000_hw *hw, u16 vf_number)
  242. {
  243. s32 ret_val = -E1000_ERR_MBX;
  244. if (!igb_check_for_bit_pf(hw, E1000_MBVFICR_VFREQ_VF1 << vf_number)) {
  245. ret_val = 0;
  246. hw->mbx.stats.reqs++;
  247. }
  248. return ret_val;
  249. }
  250. /**
  251. * igb_check_for_ack_pf - checks to see if the VF has ACKed
  252. * @hw: pointer to the HW structure
  253. * @vf_number: the VF index
  254. *
  255. * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
  256. **/
  257. static s32 igb_check_for_ack_pf(struct e1000_hw *hw, u16 vf_number)
  258. {
  259. s32 ret_val = -E1000_ERR_MBX;
  260. if (!igb_check_for_bit_pf(hw, E1000_MBVFICR_VFACK_VF1 << vf_number)) {
  261. ret_val = 0;
  262. hw->mbx.stats.acks++;
  263. }
  264. return ret_val;
  265. }
  266. /**
  267. * igb_check_for_rst_pf - checks to see if the VF has reset
  268. * @hw: pointer to the HW structure
  269. * @vf_number: the VF index
  270. *
  271. * returns SUCCESS if the VF has set the Status bit or else ERR_MBX
  272. **/
  273. static s32 igb_check_for_rst_pf(struct e1000_hw *hw, u16 vf_number)
  274. {
  275. u32 vflre = rd32(E1000_VFLRE);
  276. s32 ret_val = -E1000_ERR_MBX;
  277. if (vflre & BIT(vf_number)) {
  278. ret_val = 0;
  279. wr32(E1000_VFLRE, BIT(vf_number));
  280. hw->mbx.stats.rsts++;
  281. }
  282. return ret_val;
  283. }
  284. /**
  285. * igb_obtain_mbx_lock_pf - obtain mailbox lock
  286. * @hw: pointer to the HW structure
  287. * @vf_number: the VF index
  288. *
  289. * return SUCCESS if we obtained the mailbox lock
  290. **/
  291. static s32 igb_obtain_mbx_lock_pf(struct e1000_hw *hw, u16 vf_number)
  292. {
  293. s32 ret_val = -E1000_ERR_MBX;
  294. u32 p2v_mailbox;
  295. int count = 10;
  296. do {
  297. /* Take ownership of the buffer */
  298. wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU);
  299. /* reserve mailbox for vf use */
  300. p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number));
  301. if (p2v_mailbox & E1000_P2VMAILBOX_PFU) {
  302. ret_val = 0;
  303. break;
  304. }
  305. udelay(1000);
  306. } while (count-- > 0);
  307. return ret_val;
  308. }
  309. /**
  310. * igb_release_mbx_lock_pf - release mailbox lock
  311. * @hw: pointer to the HW structure
  312. * @vf_number: the VF index
  313. *
  314. * return SUCCESS if we released the mailbox lock
  315. **/
  316. static s32 igb_release_mbx_lock_pf(struct e1000_hw *hw, u16 vf_number)
  317. {
  318. u32 p2v_mailbox;
  319. /* drop PF lock of mailbox, if set */
  320. p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number));
  321. if (p2v_mailbox & E1000_P2VMAILBOX_PFU)
  322. wr32(E1000_P2VMAILBOX(vf_number),
  323. p2v_mailbox & ~E1000_P2VMAILBOX_PFU);
  324. return 0;
  325. }
  326. /**
  327. * igb_write_mbx_pf - Places a message in the mailbox
  328. * @hw: pointer to the HW structure
  329. * @msg: The message buffer
  330. * @size: Length of buffer
  331. * @vf_number: the VF index
  332. *
  333. * returns SUCCESS if it successfully copied message into the buffer
  334. **/
  335. static s32 igb_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,
  336. u16 vf_number)
  337. {
  338. s32 ret_val;
  339. u16 i;
  340. /* lock the mailbox to prevent pf/vf race condition */
  341. ret_val = igb_obtain_mbx_lock_pf(hw, vf_number);
  342. if (ret_val)
  343. goto out_no_write;
  344. /* flush msg and acks as we are overwriting the message buffer */
  345. igb_check_for_msg_pf(hw, vf_number);
  346. igb_check_for_ack_pf(hw, vf_number);
  347. /* copy the caller specified message to the mailbox memory buffer */
  348. for (i = 0; i < size; i++)
  349. array_wr32(E1000_VMBMEM(vf_number), i, msg[i]);
  350. /* Interrupt VF to tell it a message has been sent and release buffer*/
  351. wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_STS);
  352. /* update stats */
  353. hw->mbx.stats.msgs_tx++;
  354. out_no_write:
  355. return ret_val;
  356. }
  357. /**
  358. * igb_read_mbx_pf - Read a message from the mailbox
  359. * @hw: pointer to the HW structure
  360. * @msg: The message buffer
  361. * @size: Length of buffer
  362. * @vf_number: the VF index
  363. * @unlock: unlock the mailbox when done?
  364. *
  365. * This function copies a message from the mailbox buffer to the caller's
  366. * memory buffer. The presumption is that the caller knows that there was
  367. * a message due to a VF request so no polling for message is needed.
  368. **/
  369. static s32 igb_read_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,
  370. u16 vf_number, bool unlock)
  371. {
  372. s32 ret_val;
  373. u16 i;
  374. /* lock the mailbox to prevent pf/vf race condition */
  375. ret_val = igb_obtain_mbx_lock_pf(hw, vf_number);
  376. if (ret_val)
  377. goto out_no_read;
  378. /* copy the message to the mailbox memory buffer */
  379. for (i = 0; i < size; i++)
  380. msg[i] = array_rd32(E1000_VMBMEM(vf_number), i);
  381. /* Acknowledge the message and release mailbox lock (or not) */
  382. if (unlock)
  383. wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_ACK);
  384. else
  385. wr32(E1000_P2VMAILBOX(vf_number),
  386. E1000_P2VMAILBOX_ACK | E1000_P2VMAILBOX_PFU);
  387. /* update stats */
  388. hw->mbx.stats.msgs_rx++;
  389. out_no_read:
  390. return ret_val;
  391. }
  392. /**
  393. * e1000_init_mbx_params_pf - set initial values for pf mailbox
  394. * @hw: pointer to the HW structure
  395. *
  396. * Initializes the hw->mbx struct to correct values for pf mailbox
  397. */
  398. s32 igb_init_mbx_params_pf(struct e1000_hw *hw)
  399. {
  400. struct e1000_mbx_info *mbx = &hw->mbx;
  401. mbx->timeout = 0;
  402. mbx->usec_delay = 0;
  403. mbx->size = E1000_VFMAILBOX_SIZE;
  404. mbx->ops.read = igb_read_mbx_pf;
  405. mbx->ops.write = igb_write_mbx_pf;
  406. mbx->ops.read_posted = igb_read_posted_mbx;
  407. mbx->ops.write_posted = igb_write_posted_mbx;
  408. mbx->ops.check_for_msg = igb_check_for_msg_pf;
  409. mbx->ops.check_for_ack = igb_check_for_ack_pf;
  410. mbx->ops.check_for_rst = igb_check_for_rst_pf;
  411. mbx->ops.unlock = igb_release_mbx_lock_pf;
  412. mbx->stats.msgs_tx = 0;
  413. mbx->stats.msgs_rx = 0;
  414. mbx->stats.reqs = 0;
  415. mbx->stats.acks = 0;
  416. mbx->stats.rsts = 0;
  417. return 0;
  418. }