i40e_virtchnl_pf.c 113 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*******************************************************************************
  3. *
  4. * Intel Ethernet Controller XL710 Family Linux Driver
  5. * Copyright(c) 2013 - 2016 Intel Corporation.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program. If not, see <http://www.gnu.org/licenses/>.
  18. *
  19. * The full GNU General Public License is included in this distribution in
  20. * the file called "COPYING".
  21. *
  22. * Contact Information:
  23. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25. *
  26. ******************************************************************************/
  27. #include "i40e.h"
  28. /*********************notification routines***********************/
  29. /**
  30. * i40e_vc_vf_broadcast
  31. * @pf: pointer to the PF structure
  32. * @opcode: operation code
  33. * @retval: return value
  34. * @msg: pointer to the msg buffer
  35. * @msglen: msg length
  36. *
  37. * send a message to all VFs on a given PF
  38. **/
  39. static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
  40. enum virtchnl_ops v_opcode,
  41. i40e_status v_retval, u8 *msg,
  42. u16 msglen)
  43. {
  44. struct i40e_hw *hw = &pf->hw;
  45. struct i40e_vf *vf = pf->vf;
  46. int i;
  47. for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
  48. int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
  49. /* Not all vfs are enabled so skip the ones that are not */
  50. if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
  51. !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
  52. continue;
  53. /* Ignore return value on purpose - a given VF may fail, but
  54. * we need to keep going and send to all of them
  55. */
  56. i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
  57. msg, msglen, NULL);
  58. }
  59. }
  60. /**
  61. * i40e_vc_notify_vf_link_state
  62. * @vf: pointer to the VF structure
  63. *
  64. * send a link status message to a single VF
  65. **/
  66. static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
  67. {
  68. struct virtchnl_pf_event pfe;
  69. struct i40e_pf *pf = vf->pf;
  70. struct i40e_hw *hw = &pf->hw;
  71. struct i40e_link_status *ls = &pf->hw.phy.link_info;
  72. int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
  73. pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
  74. pfe.severity = PF_EVENT_SEVERITY_INFO;
  75. if (vf->link_forced) {
  76. pfe.event_data.link_event.link_status = vf->link_up;
  77. pfe.event_data.link_event.link_speed =
  78. (vf->link_up ? VIRTCHNL_LINK_SPEED_40GB : 0);
  79. } else {
  80. pfe.event_data.link_event.link_status =
  81. ls->link_info & I40E_AQ_LINK_UP;
  82. pfe.event_data.link_event.link_speed =
  83. i40e_virtchnl_link_speed(ls->link_speed);
  84. }
  85. i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
  86. 0, (u8 *)&pfe, sizeof(pfe), NULL);
  87. }
  88. /**
  89. * i40e_vc_notify_link_state
  90. * @pf: pointer to the PF structure
  91. *
  92. * send a link status message to all VFs on a given PF
  93. **/
  94. void i40e_vc_notify_link_state(struct i40e_pf *pf)
  95. {
  96. int i;
  97. for (i = 0; i < pf->num_alloc_vfs; i++)
  98. i40e_vc_notify_vf_link_state(&pf->vf[i]);
  99. }
  100. /**
  101. * i40e_vc_notify_reset
  102. * @pf: pointer to the PF structure
  103. *
  104. * indicate a pending reset to all VFs on a given PF
  105. **/
  106. void i40e_vc_notify_reset(struct i40e_pf *pf)
  107. {
  108. struct virtchnl_pf_event pfe;
  109. pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
  110. pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
  111. i40e_vc_vf_broadcast(pf, VIRTCHNL_OP_EVENT, 0,
  112. (u8 *)&pfe, sizeof(struct virtchnl_pf_event));
  113. }
  114. /**
  115. * i40e_vc_notify_vf_reset
  116. * @vf: pointer to the VF structure
  117. *
  118. * indicate a pending reset to the given VF
  119. **/
  120. void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
  121. {
  122. struct virtchnl_pf_event pfe;
  123. int abs_vf_id;
  124. /* validate the request */
  125. if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
  126. return;
  127. /* verify if the VF is in either init or active before proceeding */
  128. if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
  129. !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
  130. return;
  131. abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
  132. pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
  133. pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
  134. i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, VIRTCHNL_OP_EVENT,
  135. 0, (u8 *)&pfe,
  136. sizeof(struct virtchnl_pf_event), NULL);
  137. }
  138. /***********************misc routines*****************************/
  139. /**
  140. * i40e_vc_disable_vf
  141. * @vf: pointer to the VF info
  142. *
  143. * Disable the VF through a SW reset.
  144. **/
  145. static inline void i40e_vc_disable_vf(struct i40e_vf *vf)
  146. {
  147. int i;
  148. i40e_vc_notify_vf_reset(vf);
  149. /* We want to ensure that an actual reset occurs initiated after this
  150. * function was called. However, we do not want to wait forever, so
  151. * we'll give a reasonable time and print a message if we failed to
  152. * ensure a reset.
  153. */
  154. for (i = 0; i < 20; i++) {
  155. if (i40e_reset_vf(vf, false))
  156. return;
  157. usleep_range(10000, 20000);
  158. }
  159. dev_warn(&vf->pf->pdev->dev,
  160. "Failed to initiate reset for VF %d after 200 milliseconds\n",
  161. vf->vf_id);
  162. }
  163. /**
  164. * i40e_vc_isvalid_vsi_id
  165. * @vf: pointer to the VF info
  166. * @vsi_id: VF relative VSI id
  167. *
  168. * check for the valid VSI id
  169. **/
  170. static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
  171. {
  172. struct i40e_pf *pf = vf->pf;
  173. struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
  174. return (vsi && (vsi->vf_id == vf->vf_id));
  175. }
  176. /**
  177. * i40e_vc_isvalid_queue_id
  178. * @vf: pointer to the VF info
  179. * @vsi_id: vsi id
  180. * @qid: vsi relative queue id
  181. *
  182. * check for the valid queue id
  183. **/
  184. static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
  185. u8 qid)
  186. {
  187. struct i40e_pf *pf = vf->pf;
  188. struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
  189. return (vsi && (qid < vsi->alloc_queue_pairs));
  190. }
  191. /**
  192. * i40e_vc_isvalid_vector_id
  193. * @vf: pointer to the VF info
  194. * @vector_id: VF relative vector id
  195. *
  196. * check for the valid vector id
  197. **/
  198. static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
  199. {
  200. struct i40e_pf *pf = vf->pf;
  201. return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
  202. }
  203. /***********************vf resource mgmt routines*****************/
  204. /**
  205. * i40e_vc_get_pf_queue_id
  206. * @vf: pointer to the VF info
  207. * @vsi_id: id of VSI as provided by the FW
  208. * @vsi_queue_id: vsi relative queue id
  209. *
  210. * return PF relative queue id
  211. **/
  212. static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
  213. u8 vsi_queue_id)
  214. {
  215. struct i40e_pf *pf = vf->pf;
  216. struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
  217. u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
  218. if (!vsi)
  219. return pf_queue_id;
  220. if (le16_to_cpu(vsi->info.mapping_flags) &
  221. I40E_AQ_VSI_QUE_MAP_NONCONTIG)
  222. pf_queue_id =
  223. le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
  224. else
  225. pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
  226. vsi_queue_id;
  227. return pf_queue_id;
  228. }
  229. /**
  230. * i40e_get_real_pf_qid
  231. * @vf: pointer to the VF info
  232. * @vsi_id: vsi id
  233. * @queue_id: queue number
  234. *
  235. * wrapper function to get pf_queue_id handling ADq code as well
  236. **/
  237. static u16 i40e_get_real_pf_qid(struct i40e_vf *vf, u16 vsi_id, u16 queue_id)
  238. {
  239. int i;
  240. if (vf->adq_enabled) {
  241. /* Although VF considers all the queues(can be 1 to 16) as its
  242. * own but they may actually belong to different VSIs(up to 4).
  243. * We need to find which queues belongs to which VSI.
  244. */
  245. for (i = 0; i < vf->num_tc; i++) {
  246. if (queue_id < vf->ch[i].num_qps) {
  247. vsi_id = vf->ch[i].vsi_id;
  248. break;
  249. }
  250. /* find right queue id which is relative to a
  251. * given VSI.
  252. */
  253. queue_id -= vf->ch[i].num_qps;
  254. }
  255. }
  256. return i40e_vc_get_pf_queue_id(vf, vsi_id, queue_id);
  257. }
  258. /**
  259. * i40e_config_irq_link_list
  260. * @vf: pointer to the VF info
  261. * @vsi_id: id of VSI as given by the FW
  262. * @vecmap: irq map info
  263. *
  264. * configure irq link list from the map
  265. **/
  266. static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
  267. struct virtchnl_vector_map *vecmap)
  268. {
  269. unsigned long linklistmap = 0, tempmap;
  270. struct i40e_pf *pf = vf->pf;
  271. struct i40e_hw *hw = &pf->hw;
  272. u16 vsi_queue_id, pf_queue_id;
  273. enum i40e_queue_type qtype;
  274. u16 next_q, vector_id, size;
  275. u32 reg, reg_idx;
  276. u16 itr_idx = 0;
  277. vector_id = vecmap->vector_id;
  278. /* setup the head */
  279. if (0 == vector_id)
  280. reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
  281. else
  282. reg_idx = I40E_VPINT_LNKLSTN(
  283. ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
  284. (vector_id - 1));
  285. if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
  286. /* Special case - No queues mapped on this vector */
  287. wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
  288. goto irq_list_done;
  289. }
  290. tempmap = vecmap->rxq_map;
  291. for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
  292. linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
  293. vsi_queue_id));
  294. }
  295. tempmap = vecmap->txq_map;
  296. for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
  297. linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
  298. vsi_queue_id + 1));
  299. }
  300. size = I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES;
  301. next_q = find_first_bit(&linklistmap, size);
  302. if (unlikely(next_q == size))
  303. goto irq_list_done;
  304. vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
  305. qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
  306. pf_queue_id = i40e_get_real_pf_qid(vf, vsi_id, vsi_queue_id);
  307. reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
  308. wr32(hw, reg_idx, reg);
  309. while (next_q < size) {
  310. switch (qtype) {
  311. case I40E_QUEUE_TYPE_RX:
  312. reg_idx = I40E_QINT_RQCTL(pf_queue_id);
  313. itr_idx = vecmap->rxitr_idx;
  314. break;
  315. case I40E_QUEUE_TYPE_TX:
  316. reg_idx = I40E_QINT_TQCTL(pf_queue_id);
  317. itr_idx = vecmap->txitr_idx;
  318. break;
  319. default:
  320. break;
  321. }
  322. next_q = find_next_bit(&linklistmap, size, next_q + 1);
  323. if (next_q < size) {
  324. vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
  325. qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
  326. pf_queue_id = i40e_get_real_pf_qid(vf,
  327. vsi_id,
  328. vsi_queue_id);
  329. } else {
  330. pf_queue_id = I40E_QUEUE_END_OF_LIST;
  331. qtype = 0;
  332. }
  333. /* format for the RQCTL & TQCTL regs is same */
  334. reg = (vector_id) |
  335. (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
  336. (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
  337. BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
  338. (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
  339. wr32(hw, reg_idx, reg);
  340. }
  341. /* if the vf is running in polling mode and using interrupt zero,
  342. * need to disable auto-mask on enabling zero interrupt for VFs.
  343. */
  344. if ((vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
  345. (vector_id == 0)) {
  346. reg = rd32(hw, I40E_GLINT_CTL);
  347. if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
  348. reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
  349. wr32(hw, I40E_GLINT_CTL, reg);
  350. }
  351. }
  352. irq_list_done:
  353. i40e_flush(hw);
  354. }
  355. /**
  356. * i40e_release_iwarp_qvlist
  357. * @vf: pointer to the VF.
  358. *
  359. **/
  360. static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
  361. {
  362. struct i40e_pf *pf = vf->pf;
  363. struct virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
  364. u32 msix_vf;
  365. u32 i;
  366. if (!vf->qvlist_info)
  367. return;
  368. msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
  369. for (i = 0; i < qvlist_info->num_vectors; i++) {
  370. struct virtchnl_iwarp_qv_info *qv_info;
  371. u32 next_q_index, next_q_type;
  372. struct i40e_hw *hw = &pf->hw;
  373. u32 v_idx, reg_idx, reg;
  374. qv_info = &qvlist_info->qv_info[i];
  375. if (!qv_info)
  376. continue;
  377. v_idx = qv_info->v_idx;
  378. if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
  379. /* Figure out the queue after CEQ and make that the
  380. * first queue.
  381. */
  382. reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
  383. reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
  384. next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
  385. >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
  386. next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
  387. >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
  388. reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
  389. reg = (next_q_index &
  390. I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
  391. (next_q_type <<
  392. I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
  393. wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
  394. }
  395. }
  396. kfree(vf->qvlist_info);
  397. vf->qvlist_info = NULL;
  398. }
  399. /**
  400. * i40e_config_iwarp_qvlist
  401. * @vf: pointer to the VF info
  402. * @qvlist_info: queue and vector list
  403. *
  404. * Return 0 on success or < 0 on error
  405. **/
  406. static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
  407. struct virtchnl_iwarp_qvlist_info *qvlist_info)
  408. {
  409. struct i40e_pf *pf = vf->pf;
  410. struct i40e_hw *hw = &pf->hw;
  411. struct virtchnl_iwarp_qv_info *qv_info;
  412. u32 v_idx, i, reg_idx, reg;
  413. u32 next_q_idx, next_q_type;
  414. u32 msix_vf, size;
  415. size = sizeof(struct virtchnl_iwarp_qvlist_info) +
  416. (sizeof(struct virtchnl_iwarp_qv_info) *
  417. (qvlist_info->num_vectors - 1));
  418. vf->qvlist_info = kzalloc(size, GFP_KERNEL);
  419. if (!vf->qvlist_info)
  420. return -ENOMEM;
  421. vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
  422. msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
  423. for (i = 0; i < qvlist_info->num_vectors; i++) {
  424. qv_info = &qvlist_info->qv_info[i];
  425. if (!qv_info)
  426. continue;
  427. v_idx = qv_info->v_idx;
  428. /* Validate vector id belongs to this vf */
  429. if (!i40e_vc_isvalid_vector_id(vf, v_idx))
  430. goto err;
  431. vf->qvlist_info->qv_info[i] = *qv_info;
  432. reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
  433. /* We might be sharing the interrupt, so get the first queue
  434. * index and type, push it down the list by adding the new
  435. * queue on top. Also link it with the new queue in CEQCTL.
  436. */
  437. reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
  438. next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
  439. I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
  440. next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
  441. I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
  442. if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
  443. reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
  444. reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
  445. (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
  446. (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
  447. (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
  448. (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
  449. wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
  450. reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
  451. reg = (qv_info->ceq_idx &
  452. I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
  453. (I40E_QUEUE_TYPE_PE_CEQ <<
  454. I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
  455. wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
  456. }
  457. if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
  458. reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
  459. (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
  460. (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
  461. wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
  462. }
  463. }
  464. return 0;
  465. err:
  466. kfree(vf->qvlist_info);
  467. vf->qvlist_info = NULL;
  468. return -EINVAL;
  469. }
  470. /**
  471. * i40e_config_vsi_tx_queue
  472. * @vf: pointer to the VF info
  473. * @vsi_id: id of VSI as provided by the FW
  474. * @vsi_queue_id: vsi relative queue index
  475. * @info: config. info
  476. *
  477. * configure tx queue
  478. **/
  479. static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
  480. u16 vsi_queue_id,
  481. struct virtchnl_txq_info *info)
  482. {
  483. struct i40e_pf *pf = vf->pf;
  484. struct i40e_hw *hw = &pf->hw;
  485. struct i40e_hmc_obj_txq tx_ctx;
  486. struct i40e_vsi *vsi;
  487. u16 pf_queue_id;
  488. u32 qtx_ctl;
  489. int ret = 0;
  490. if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
  491. ret = -ENOENT;
  492. goto error_context;
  493. }
  494. pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
  495. vsi = i40e_find_vsi_from_id(pf, vsi_id);
  496. if (!vsi) {
  497. ret = -ENOENT;
  498. goto error_context;
  499. }
  500. /* clear the context structure first */
  501. memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
  502. /* only set the required fields */
  503. tx_ctx.base = info->dma_ring_addr / 128;
  504. tx_ctx.qlen = info->ring_len;
  505. tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
  506. tx_ctx.rdylist_act = 0;
  507. tx_ctx.head_wb_ena = info->headwb_enabled;
  508. tx_ctx.head_wb_addr = info->dma_headwb_addr;
  509. /* clear the context in the HMC */
  510. ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
  511. if (ret) {
  512. dev_err(&pf->pdev->dev,
  513. "Failed to clear VF LAN Tx queue context %d, error: %d\n",
  514. pf_queue_id, ret);
  515. ret = -ENOENT;
  516. goto error_context;
  517. }
  518. /* set the context in the HMC */
  519. ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
  520. if (ret) {
  521. dev_err(&pf->pdev->dev,
  522. "Failed to set VF LAN Tx queue context %d error: %d\n",
  523. pf_queue_id, ret);
  524. ret = -ENOENT;
  525. goto error_context;
  526. }
  527. /* associate this queue with the PCI VF function */
  528. qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
  529. qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
  530. & I40E_QTX_CTL_PF_INDX_MASK);
  531. qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
  532. << I40E_QTX_CTL_VFVM_INDX_SHIFT)
  533. & I40E_QTX_CTL_VFVM_INDX_MASK);
  534. wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
  535. i40e_flush(hw);
  536. error_context:
  537. return ret;
  538. }
  539. /**
  540. * i40e_config_vsi_rx_queue
  541. * @vf: pointer to the VF info
  542. * @vsi_id: id of VSI as provided by the FW
  543. * @vsi_queue_id: vsi relative queue index
  544. * @info: config. info
  545. *
  546. * configure rx queue
  547. **/
  548. static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
  549. u16 vsi_queue_id,
  550. struct virtchnl_rxq_info *info)
  551. {
  552. struct i40e_pf *pf = vf->pf;
  553. struct i40e_hw *hw = &pf->hw;
  554. struct i40e_hmc_obj_rxq rx_ctx;
  555. u16 pf_queue_id;
  556. int ret = 0;
  557. pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
  558. /* clear the context structure first */
  559. memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
  560. /* only set the required fields */
  561. rx_ctx.base = info->dma_ring_addr / 128;
  562. rx_ctx.qlen = info->ring_len;
  563. if (info->splithdr_enabled) {
  564. rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
  565. I40E_RX_SPLIT_IP |
  566. I40E_RX_SPLIT_TCP_UDP |
  567. I40E_RX_SPLIT_SCTP;
  568. /* header length validation */
  569. if (info->hdr_size > ((2 * 1024) - 64)) {
  570. ret = -EINVAL;
  571. goto error_param;
  572. }
  573. rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
  574. /* set split mode 10b */
  575. rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
  576. }
  577. /* databuffer length validation */
  578. if (info->databuffer_size > ((16 * 1024) - 128)) {
  579. ret = -EINVAL;
  580. goto error_param;
  581. }
  582. rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
  583. /* max pkt. length validation */
  584. if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
  585. ret = -EINVAL;
  586. goto error_param;
  587. }
  588. rx_ctx.rxmax = info->max_pkt_size;
  589. /* enable 32bytes desc always */
  590. rx_ctx.dsize = 1;
  591. /* default values */
  592. rx_ctx.lrxqthresh = 1;
  593. rx_ctx.crcstrip = 1;
  594. rx_ctx.prefena = 1;
  595. rx_ctx.l2tsel = 1;
  596. /* clear the context in the HMC */
  597. ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
  598. if (ret) {
  599. dev_err(&pf->pdev->dev,
  600. "Failed to clear VF LAN Rx queue context %d, error: %d\n",
  601. pf_queue_id, ret);
  602. ret = -ENOENT;
  603. goto error_param;
  604. }
  605. /* set the context in the HMC */
  606. ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
  607. if (ret) {
  608. dev_err(&pf->pdev->dev,
  609. "Failed to set VF LAN Rx queue context %d error: %d\n",
  610. pf_queue_id, ret);
  611. ret = -ENOENT;
  612. goto error_param;
  613. }
  614. error_param:
  615. return ret;
  616. }
  617. /**
  618. * i40e_alloc_vsi_res
  619. * @vf: pointer to the VF info
  620. * @idx: VSI index, applies only for ADq mode, zero otherwise
  621. *
  622. * alloc VF vsi context & resources
  623. **/
  624. static int i40e_alloc_vsi_res(struct i40e_vf *vf, u8 idx)
  625. {
  626. struct i40e_mac_filter *f = NULL;
  627. struct i40e_pf *pf = vf->pf;
  628. struct i40e_vsi *vsi;
  629. u64 max_tx_rate = 0;
  630. int ret = 0;
  631. vsi = i40e_vsi_setup(pf, I40E_VSI_SRIOV, pf->vsi[pf->lan_vsi]->seid,
  632. vf->vf_id);
  633. if (!vsi) {
  634. dev_err(&pf->pdev->dev,
  635. "add vsi failed for VF %d, aq_err %d\n",
  636. vf->vf_id, pf->hw.aq.asq_last_status);
  637. ret = -ENOENT;
  638. goto error_alloc_vsi_res;
  639. }
  640. if (!idx) {
  641. u64 hena = i40e_pf_get_default_rss_hena(pf);
  642. u8 broadcast[ETH_ALEN];
  643. vf->lan_vsi_idx = vsi->idx;
  644. vf->lan_vsi_id = vsi->id;
  645. /* If the port VLAN has been configured and then the
  646. * VF driver was removed then the VSI port VLAN
  647. * configuration was destroyed. Check if there is
  648. * a port VLAN and restore the VSI configuration if
  649. * needed.
  650. */
  651. if (vf->port_vlan_id)
  652. i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
  653. spin_lock_bh(&vsi->mac_filter_hash_lock);
  654. if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
  655. f = i40e_add_mac_filter(vsi,
  656. vf->default_lan_addr.addr);
  657. if (!f)
  658. dev_info(&pf->pdev->dev,
  659. "Could not add MAC filter %pM for VF %d\n",
  660. vf->default_lan_addr.addr, vf->vf_id);
  661. }
  662. eth_broadcast_addr(broadcast);
  663. f = i40e_add_mac_filter(vsi, broadcast);
  664. if (!f)
  665. dev_info(&pf->pdev->dev,
  666. "Could not allocate VF broadcast filter\n");
  667. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  668. wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena);
  669. wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32));
  670. /* program mac filter only for VF VSI */
  671. ret = i40e_sync_vsi_filters(vsi);
  672. if (ret)
  673. dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
  674. }
  675. /* storing VSI index and id for ADq and don't apply the mac filter */
  676. if (vf->adq_enabled) {
  677. vf->ch[idx].vsi_idx = vsi->idx;
  678. vf->ch[idx].vsi_id = vsi->id;
  679. }
  680. /* Set VF bandwidth if specified */
  681. if (vf->tx_rate) {
  682. max_tx_rate = vf->tx_rate;
  683. } else if (vf->ch[idx].max_tx_rate) {
  684. max_tx_rate = vf->ch[idx].max_tx_rate;
  685. }
  686. if (max_tx_rate) {
  687. max_tx_rate = div_u64(max_tx_rate, I40E_BW_CREDIT_DIVISOR);
  688. ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
  689. max_tx_rate, 0, NULL);
  690. if (ret)
  691. dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
  692. vf->vf_id, ret);
  693. }
  694. error_alloc_vsi_res:
  695. return ret;
  696. }
  697. /**
  698. * i40e_map_pf_queues_to_vsi
  699. * @vf: pointer to the VF info
  700. *
  701. * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
  702. * function takes care of first part VSILAN_QTABLE, mapping pf queues to VSI.
  703. **/
  704. static void i40e_map_pf_queues_to_vsi(struct i40e_vf *vf)
  705. {
  706. struct i40e_pf *pf = vf->pf;
  707. struct i40e_hw *hw = &pf->hw;
  708. u32 reg, num_tc = 1; /* VF has at least one traffic class */
  709. u16 vsi_id, qps;
  710. int i, j;
  711. if (vf->adq_enabled)
  712. num_tc = vf->num_tc;
  713. for (i = 0; i < num_tc; i++) {
  714. if (vf->adq_enabled) {
  715. qps = vf->ch[i].num_qps;
  716. vsi_id = vf->ch[i].vsi_id;
  717. } else {
  718. qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
  719. vsi_id = vf->lan_vsi_id;
  720. }
  721. for (j = 0; j < 7; j++) {
  722. if (j * 2 >= qps) {
  723. /* end of list */
  724. reg = 0x07FF07FF;
  725. } else {
  726. u16 qid = i40e_vc_get_pf_queue_id(vf,
  727. vsi_id,
  728. j * 2);
  729. reg = qid;
  730. qid = i40e_vc_get_pf_queue_id(vf, vsi_id,
  731. (j * 2) + 1);
  732. reg |= qid << 16;
  733. }
  734. i40e_write_rx_ctl(hw,
  735. I40E_VSILAN_QTABLE(j, vsi_id),
  736. reg);
  737. }
  738. }
  739. }
  740. /**
  741. * i40e_map_pf_to_vf_queues
  742. * @vf: pointer to the VF info
  743. *
  744. * PF maps LQPs to a VF by programming VSILAN_QTABLE & VPLAN_QTABLE. This
  745. * function takes care of the second part VPLAN_QTABLE & completes VF mappings.
  746. **/
  747. static void i40e_map_pf_to_vf_queues(struct i40e_vf *vf)
  748. {
  749. struct i40e_pf *pf = vf->pf;
  750. struct i40e_hw *hw = &pf->hw;
  751. u32 reg, total_qps = 0;
  752. u32 qps, num_tc = 1; /* VF has at least one traffic class */
  753. u16 vsi_id, qid;
  754. int i, j;
  755. if (vf->adq_enabled)
  756. num_tc = vf->num_tc;
  757. for (i = 0; i < num_tc; i++) {
  758. if (vf->adq_enabled) {
  759. qps = vf->ch[i].num_qps;
  760. vsi_id = vf->ch[i].vsi_id;
  761. } else {
  762. qps = pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
  763. vsi_id = vf->lan_vsi_id;
  764. }
  765. for (j = 0; j < qps; j++) {
  766. qid = i40e_vc_get_pf_queue_id(vf, vsi_id, j);
  767. reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
  768. wr32(hw, I40E_VPLAN_QTABLE(total_qps, vf->vf_id),
  769. reg);
  770. total_qps++;
  771. }
  772. }
  773. }
  774. /**
  775. * i40e_enable_vf_mappings
  776. * @vf: pointer to the VF info
  777. *
  778. * enable VF mappings
  779. **/
  780. static void i40e_enable_vf_mappings(struct i40e_vf *vf)
  781. {
  782. struct i40e_pf *pf = vf->pf;
  783. struct i40e_hw *hw = &pf->hw;
  784. u32 reg;
  785. /* Tell the hardware we're using noncontiguous mapping. HW requires
  786. * that VF queues be mapped using this method, even when they are
  787. * contiguous in real life
  788. */
  789. i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
  790. I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  791. /* enable VF vplan_qtable mappings */
  792. reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
  793. wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
  794. i40e_map_pf_to_vf_queues(vf);
  795. i40e_map_pf_queues_to_vsi(vf);
  796. i40e_flush(hw);
  797. }
  798. /**
  799. * i40e_disable_vf_mappings
  800. * @vf: pointer to the VF info
  801. *
  802. * disable VF mappings
  803. **/
  804. static void i40e_disable_vf_mappings(struct i40e_vf *vf)
  805. {
  806. struct i40e_pf *pf = vf->pf;
  807. struct i40e_hw *hw = &pf->hw;
  808. int i;
  809. /* disable qp mappings */
  810. wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
  811. for (i = 0; i < I40E_MAX_VSI_QP; i++)
  812. wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
  813. I40E_QUEUE_END_OF_LIST);
  814. i40e_flush(hw);
  815. }
  816. /**
  817. * i40e_free_vf_res
  818. * @vf: pointer to the VF info
  819. *
  820. * free VF resources
  821. **/
  822. static void i40e_free_vf_res(struct i40e_vf *vf)
  823. {
  824. struct i40e_pf *pf = vf->pf;
  825. struct i40e_hw *hw = &pf->hw;
  826. u32 reg_idx, reg;
  827. int i, j, msix_vf;
  828. /* Start by disabling VF's configuration API to prevent the OS from
  829. * accessing the VF's VSI after it's freed / invalidated.
  830. */
  831. clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
  832. /* It's possible the VF had requeuested more queues than the default so
  833. * do the accounting here when we're about to free them.
  834. */
  835. if (vf->num_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF) {
  836. pf->queues_left += vf->num_queue_pairs -
  837. I40E_DEFAULT_QUEUES_PER_VF;
  838. }
  839. /* free vsi & disconnect it from the parent uplink */
  840. if (vf->lan_vsi_idx) {
  841. i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
  842. vf->lan_vsi_idx = 0;
  843. vf->lan_vsi_id = 0;
  844. vf->num_mac = 0;
  845. }
  846. /* do the accounting and remove additional ADq VSI's */
  847. if (vf->adq_enabled && vf->ch[0].vsi_idx) {
  848. for (j = 0; j < vf->num_tc; j++) {
  849. /* At this point VSI0 is already released so don't
  850. * release it again and only clear their values in
  851. * structure variables
  852. */
  853. if (j)
  854. i40e_vsi_release(pf->vsi[vf->ch[j].vsi_idx]);
  855. vf->ch[j].vsi_idx = 0;
  856. vf->ch[j].vsi_id = 0;
  857. }
  858. }
  859. msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
  860. /* disable interrupts so the VF starts in a known state */
  861. for (i = 0; i < msix_vf; i++) {
  862. /* format is same for both registers */
  863. if (0 == i)
  864. reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
  865. else
  866. reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
  867. (vf->vf_id))
  868. + (i - 1));
  869. wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
  870. i40e_flush(hw);
  871. }
  872. /* clear the irq settings */
  873. for (i = 0; i < msix_vf; i++) {
  874. /* format is same for both registers */
  875. if (0 == i)
  876. reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
  877. else
  878. reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
  879. (vf->vf_id))
  880. + (i - 1));
  881. reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
  882. I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
  883. wr32(hw, reg_idx, reg);
  884. i40e_flush(hw);
  885. }
  886. /* reset some of the state variables keeping track of the resources */
  887. vf->num_queue_pairs = 0;
  888. clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
  889. clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
  890. }
  891. /**
  892. * i40e_alloc_vf_res
  893. * @vf: pointer to the VF info
  894. *
  895. * allocate VF resources
  896. **/
  897. static int i40e_alloc_vf_res(struct i40e_vf *vf)
  898. {
  899. struct i40e_pf *pf = vf->pf;
  900. int total_queue_pairs = 0;
  901. int ret, idx;
  902. if (vf->num_req_queues &&
  903. vf->num_req_queues <= pf->queues_left + I40E_DEFAULT_QUEUES_PER_VF)
  904. pf->num_vf_qps = vf->num_req_queues;
  905. else
  906. pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
  907. /* allocate hw vsi context & associated resources */
  908. ret = i40e_alloc_vsi_res(vf, 0);
  909. if (ret)
  910. goto error_alloc;
  911. total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
  912. /* allocate additional VSIs based on tc information for ADq */
  913. if (vf->adq_enabled) {
  914. if (pf->queues_left >=
  915. (I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF)) {
  916. /* TC 0 always belongs to VF VSI */
  917. for (idx = 1; idx < vf->num_tc; idx++) {
  918. ret = i40e_alloc_vsi_res(vf, idx);
  919. if (ret)
  920. goto error_alloc;
  921. }
  922. /* send correct number of queues */
  923. total_queue_pairs = I40E_MAX_VF_QUEUES;
  924. } else {
  925. dev_info(&pf->pdev->dev, "VF %d: Not enough queues to allocate, disabling ADq\n",
  926. vf->vf_id);
  927. vf->adq_enabled = false;
  928. }
  929. }
  930. /* We account for each VF to get a default number of queue pairs. If
  931. * the VF has now requested more, we need to account for that to make
  932. * certain we never request more queues than we actually have left in
  933. * HW.
  934. */
  935. if (total_queue_pairs > I40E_DEFAULT_QUEUES_PER_VF)
  936. pf->queues_left -=
  937. total_queue_pairs - I40E_DEFAULT_QUEUES_PER_VF;
  938. if (vf->trusted)
  939. set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
  940. else
  941. clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
  942. /* store the total qps number for the runtime
  943. * VF req validation
  944. */
  945. vf->num_queue_pairs = total_queue_pairs;
  946. /* VF is now completely initialized */
  947. set_bit(I40E_VF_STATE_INIT, &vf->vf_states);
  948. error_alloc:
  949. if (ret)
  950. i40e_free_vf_res(vf);
  951. return ret;
  952. }
  953. #define VF_DEVICE_STATUS 0xAA
  954. #define VF_TRANS_PENDING_MASK 0x20
  955. /**
  956. * i40e_quiesce_vf_pci
  957. * @vf: pointer to the VF structure
  958. *
  959. * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
  960. * if the transactions never clear.
  961. **/
  962. static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
  963. {
  964. struct i40e_pf *pf = vf->pf;
  965. struct i40e_hw *hw = &pf->hw;
  966. int vf_abs_id, i;
  967. u32 reg;
  968. vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
  969. wr32(hw, I40E_PF_PCI_CIAA,
  970. VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
  971. for (i = 0; i < 100; i++) {
  972. reg = rd32(hw, I40E_PF_PCI_CIAD);
  973. if ((reg & VF_TRANS_PENDING_MASK) == 0)
  974. return 0;
  975. udelay(1);
  976. }
  977. return -EIO;
  978. }
  979. /**
  980. * i40e_trigger_vf_reset
  981. * @vf: pointer to the VF structure
  982. * @flr: VFLR was issued or not
  983. *
  984. * Trigger hardware to start a reset for a particular VF. Expects the caller
  985. * to wait the proper amount of time to allow hardware to reset the VF before
  986. * it cleans up and restores VF functionality.
  987. **/
  988. static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)
  989. {
  990. struct i40e_pf *pf = vf->pf;
  991. struct i40e_hw *hw = &pf->hw;
  992. u32 reg, reg_idx, bit_idx;
  993. /* warn the VF */
  994. clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
  995. /* Disable VF's configuration API during reset. The flag is re-enabled
  996. * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
  997. * It's normally disabled in i40e_free_vf_res(), but it's safer
  998. * to do it earlier to give some time to finish to any VF config
  999. * functions that may still be running at this point.
  1000. */
  1001. clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
  1002. /* In the case of a VFLR, the HW has already reset the VF and we
  1003. * just need to clean up, so don't hit the VFRTRIG register.
  1004. */
  1005. if (!flr) {
  1006. /* reset VF using VPGEN_VFRTRIG reg */
  1007. reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
  1008. reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
  1009. wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
  1010. i40e_flush(hw);
  1011. }
  1012. /* clear the VFLR bit in GLGEN_VFLRSTAT */
  1013. reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
  1014. bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
  1015. wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
  1016. i40e_flush(hw);
  1017. if (i40e_quiesce_vf_pci(vf))
  1018. dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
  1019. vf->vf_id);
  1020. }
  1021. /**
  1022. * i40e_cleanup_reset_vf
  1023. * @vf: pointer to the VF structure
  1024. *
  1025. * Cleanup a VF after the hardware reset is finished. Expects the caller to
  1026. * have verified whether the reset is finished properly, and ensure the
  1027. * minimum amount of wait time has passed.
  1028. **/
  1029. static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
  1030. {
  1031. struct i40e_pf *pf = vf->pf;
  1032. struct i40e_hw *hw = &pf->hw;
  1033. u32 reg;
  1034. /* free VF resources to begin resetting the VSI state */
  1035. i40e_free_vf_res(vf);
  1036. /* Enable hardware by clearing the reset bit in the VPGEN_VFRTRIG reg.
  1037. * By doing this we allow HW to access VF memory at any point. If we
  1038. * did it any sooner, HW could access memory while it was being freed
  1039. * in i40e_free_vf_res(), causing an IOMMU fault.
  1040. *
  1041. * On the other hand, this needs to be done ASAP, because the VF driver
  1042. * is waiting for this to happen and may report a timeout. It's
  1043. * harmless, but it gets logged into Guest OS kernel log, so best avoid
  1044. * it.
  1045. */
  1046. reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
  1047. reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
  1048. wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
  1049. /* reallocate VF resources to finish resetting the VSI state */
  1050. if (!i40e_alloc_vf_res(vf)) {
  1051. int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
  1052. i40e_enable_vf_mappings(vf);
  1053. set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
  1054. clear_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
  1055. /* Do not notify the client during VF init */
  1056. if (!test_and_clear_bit(I40E_VF_STATE_PRE_ENABLE,
  1057. &vf->vf_states))
  1058. i40e_notify_client_of_vf_reset(pf, abs_vf_id);
  1059. vf->num_vlan = 0;
  1060. }
  1061. /* Tell the VF driver the reset is done. This needs to be done only
  1062. * after VF has been fully initialized, because the VF driver may
  1063. * request resources immediately after setting this flag.
  1064. */
  1065. wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), VIRTCHNL_VFR_VFACTIVE);
  1066. }
  1067. /**
  1068. * i40e_reset_vf
  1069. * @vf: pointer to the VF structure
  1070. * @flr: VFLR was issued or not
  1071. *
  1072. * Returns true if the VF is reset, false otherwise.
  1073. **/
  1074. bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
  1075. {
  1076. struct i40e_pf *pf = vf->pf;
  1077. struct i40e_hw *hw = &pf->hw;
  1078. bool rsd = false;
  1079. u32 reg;
  1080. int i;
  1081. /* If the VFs have been disabled, this means something else is
  1082. * resetting the VF, so we shouldn't continue.
  1083. */
  1084. if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
  1085. return false;
  1086. i40e_trigger_vf_reset(vf, flr);
  1087. /* poll VPGEN_VFRSTAT reg to make sure
  1088. * that reset is complete
  1089. */
  1090. for (i = 0; i < 10; i++) {
  1091. /* VF reset requires driver to first reset the VF and then
  1092. * poll the status register to make sure that the reset
  1093. * completed successfully. Due to internal HW FIFO flushes,
  1094. * we must wait 10ms before the register will be valid.
  1095. */
  1096. usleep_range(10000, 20000);
  1097. reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
  1098. if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
  1099. rsd = true;
  1100. break;
  1101. }
  1102. }
  1103. if (flr)
  1104. usleep_range(10000, 20000);
  1105. if (!rsd)
  1106. dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
  1107. vf->vf_id);
  1108. usleep_range(10000, 20000);
  1109. /* On initial reset, we don't have any queues to disable */
  1110. if (vf->lan_vsi_idx != 0)
  1111. i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
  1112. i40e_cleanup_reset_vf(vf);
  1113. i40e_flush(hw);
  1114. clear_bit(__I40E_VF_DISABLE, pf->state);
  1115. return true;
  1116. }
  1117. /**
  1118. * i40e_reset_all_vfs
  1119. * @pf: pointer to the PF structure
  1120. * @flr: VFLR was issued or not
  1121. *
  1122. * Reset all allocated VFs in one go. First, tell the hardware to reset each
  1123. * VF, then do all the waiting in one chunk, and finally finish restoring each
  1124. * VF after the wait. This is useful during PF routines which need to reset
  1125. * all VFs, as otherwise it must perform these resets in a serialized fashion.
  1126. *
  1127. * Returns true if any VFs were reset, and false otherwise.
  1128. **/
  1129. bool i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
  1130. {
  1131. struct i40e_hw *hw = &pf->hw;
  1132. struct i40e_vf *vf;
  1133. int i, v;
  1134. u32 reg;
  1135. /* If we don't have any VFs, then there is nothing to reset */
  1136. if (!pf->num_alloc_vfs)
  1137. return false;
  1138. /* If VFs have been disabled, there is no need to reset */
  1139. if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
  1140. return false;
  1141. /* Begin reset on all VFs at once */
  1142. for (v = 0; v < pf->num_alloc_vfs; v++)
  1143. i40e_trigger_vf_reset(&pf->vf[v], flr);
  1144. /* HW requires some time to make sure it can flush the FIFO for a VF
  1145. * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
  1146. * sequence to make sure that it has completed. We'll keep track of
  1147. * the VFs using a simple iterator that increments once that VF has
  1148. * finished resetting.
  1149. */
  1150. for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
  1151. usleep_range(10000, 20000);
  1152. /* Check each VF in sequence, beginning with the VF to fail
  1153. * the previous check.
  1154. */
  1155. while (v < pf->num_alloc_vfs) {
  1156. vf = &pf->vf[v];
  1157. reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
  1158. if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
  1159. break;
  1160. /* If the current VF has finished resetting, move on
  1161. * to the next VF in sequence.
  1162. */
  1163. v++;
  1164. }
  1165. }
  1166. if (flr)
  1167. usleep_range(10000, 20000);
  1168. /* Display a warning if at least one VF didn't manage to reset in
  1169. * time, but continue on with the operation.
  1170. */
  1171. if (v < pf->num_alloc_vfs)
  1172. dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
  1173. pf->vf[v].vf_id);
  1174. usleep_range(10000, 20000);
  1175. /* Begin disabling all the rings associated with VFs, but do not wait
  1176. * between each VF.
  1177. */
  1178. for (v = 0; v < pf->num_alloc_vfs; v++) {
  1179. /* On initial reset, we don't have any queues to disable */
  1180. if (pf->vf[v].lan_vsi_idx == 0)
  1181. continue;
  1182. i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
  1183. }
  1184. /* Now that we've notified HW to disable all of the VF rings, wait
  1185. * until they finish.
  1186. */
  1187. for (v = 0; v < pf->num_alloc_vfs; v++) {
  1188. /* On initial reset, we don't have any queues to disable */
  1189. if (pf->vf[v].lan_vsi_idx == 0)
  1190. continue;
  1191. i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
  1192. }
  1193. /* Hw may need up to 50ms to finish disabling the RX queues. We
  1194. * minimize the wait by delaying only once for all VFs.
  1195. */
  1196. mdelay(50);
  1197. /* Finish the reset on each VF */
  1198. for (v = 0; v < pf->num_alloc_vfs; v++)
  1199. i40e_cleanup_reset_vf(&pf->vf[v]);
  1200. i40e_flush(hw);
  1201. clear_bit(__I40E_VF_DISABLE, pf->state);
  1202. return true;
  1203. }
  1204. /**
  1205. * i40e_free_vfs
  1206. * @pf: pointer to the PF structure
  1207. *
  1208. * free VF resources
  1209. **/
  1210. void i40e_free_vfs(struct i40e_pf *pf)
  1211. {
  1212. struct i40e_hw *hw = &pf->hw;
  1213. u32 reg_idx, bit_idx;
  1214. int i, tmp, vf_id;
  1215. if (!pf->vf)
  1216. return;
  1217. while (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
  1218. usleep_range(1000, 2000);
  1219. i40e_notify_client_of_vf_enable(pf, 0);
  1220. /* Amortize wait time by stopping all VFs at the same time */
  1221. for (i = 0; i < pf->num_alloc_vfs; i++) {
  1222. if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
  1223. continue;
  1224. i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[i].lan_vsi_idx]);
  1225. }
  1226. for (i = 0; i < pf->num_alloc_vfs; i++) {
  1227. if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
  1228. continue;
  1229. i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
  1230. }
  1231. /* Disable IOV before freeing resources. This lets any VF drivers
  1232. * running in the host get themselves cleaned up before we yank
  1233. * the carpet out from underneath their feet.
  1234. */
  1235. if (!pci_vfs_assigned(pf->pdev))
  1236. pci_disable_sriov(pf->pdev);
  1237. else
  1238. dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
  1239. /* free up VF resources */
  1240. tmp = pf->num_alloc_vfs;
  1241. pf->num_alloc_vfs = 0;
  1242. for (i = 0; i < tmp; i++) {
  1243. if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
  1244. i40e_free_vf_res(&pf->vf[i]);
  1245. /* disable qp mappings */
  1246. i40e_disable_vf_mappings(&pf->vf[i]);
  1247. }
  1248. kfree(pf->vf);
  1249. pf->vf = NULL;
  1250. /* This check is for when the driver is unloaded while VFs are
  1251. * assigned. Setting the number of VFs to 0 through sysfs is caught
  1252. * before this function ever gets called.
  1253. */
  1254. if (!pci_vfs_assigned(pf->pdev)) {
  1255. /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
  1256. * work correctly when SR-IOV gets re-enabled.
  1257. */
  1258. for (vf_id = 0; vf_id < tmp; vf_id++) {
  1259. reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
  1260. bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
  1261. wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
  1262. }
  1263. }
  1264. clear_bit(__I40E_VF_DISABLE, pf->state);
  1265. }
  1266. #ifdef CONFIG_PCI_IOV
  1267. /**
  1268. * i40e_alloc_vfs
  1269. * @pf: pointer to the PF structure
  1270. * @num_alloc_vfs: number of VFs to allocate
  1271. *
  1272. * allocate VF resources
  1273. **/
  1274. int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
  1275. {
  1276. struct i40e_vf *vfs;
  1277. int i, ret = 0;
  1278. /* Disable interrupt 0 so we don't try to handle the VFLR. */
  1279. i40e_irq_dynamic_disable_icr0(pf);
  1280. /* Check to see if we're just allocating resources for extant VFs */
  1281. if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
  1282. ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
  1283. if (ret) {
  1284. pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
  1285. pf->num_alloc_vfs = 0;
  1286. goto err_iov;
  1287. }
  1288. }
  1289. /* allocate memory */
  1290. vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
  1291. if (!vfs) {
  1292. ret = -ENOMEM;
  1293. goto err_alloc;
  1294. }
  1295. pf->vf = vfs;
  1296. /* apply default profile */
  1297. for (i = 0; i < num_alloc_vfs; i++) {
  1298. vfs[i].pf = pf;
  1299. vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
  1300. vfs[i].vf_id = i;
  1301. /* assign default capabilities */
  1302. set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
  1303. vfs[i].spoofchk = true;
  1304. set_bit(I40E_VF_STATE_PRE_ENABLE, &vfs[i].vf_states);
  1305. }
  1306. pf->num_alloc_vfs = num_alloc_vfs;
  1307. /* VF resources get allocated during reset */
  1308. i40e_reset_all_vfs(pf, false);
  1309. i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
  1310. err_alloc:
  1311. if (ret)
  1312. i40e_free_vfs(pf);
  1313. err_iov:
  1314. /* Re-enable interrupt 0. */
  1315. i40e_irq_dynamic_enable_icr0(pf);
  1316. return ret;
  1317. }
  1318. #endif
  1319. /**
  1320. * i40e_pci_sriov_enable
  1321. * @pdev: pointer to a pci_dev structure
  1322. * @num_vfs: number of VFs to allocate
  1323. *
  1324. * Enable or change the number of VFs
  1325. **/
  1326. static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
  1327. {
  1328. #ifdef CONFIG_PCI_IOV
  1329. struct i40e_pf *pf = pci_get_drvdata(pdev);
  1330. int pre_existing_vfs = pci_num_vf(pdev);
  1331. int err = 0;
  1332. if (test_bit(__I40E_TESTING, pf->state)) {
  1333. dev_warn(&pdev->dev,
  1334. "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
  1335. err = -EPERM;
  1336. goto err_out;
  1337. }
  1338. if (pre_existing_vfs && pre_existing_vfs != num_vfs)
  1339. i40e_free_vfs(pf);
  1340. else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
  1341. goto out;
  1342. if (num_vfs > pf->num_req_vfs) {
  1343. dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
  1344. num_vfs, pf->num_req_vfs);
  1345. err = -EPERM;
  1346. goto err_out;
  1347. }
  1348. dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
  1349. err = i40e_alloc_vfs(pf, num_vfs);
  1350. if (err) {
  1351. dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
  1352. goto err_out;
  1353. }
  1354. out:
  1355. return num_vfs;
  1356. err_out:
  1357. return err;
  1358. #endif
  1359. return 0;
  1360. }
  1361. /**
  1362. * i40e_pci_sriov_configure
  1363. * @pdev: pointer to a pci_dev structure
  1364. * @num_vfs: number of VFs to allocate
  1365. *
  1366. * Enable or change the number of VFs. Called when the user updates the number
  1367. * of VFs in sysfs.
  1368. **/
  1369. int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
  1370. {
  1371. struct i40e_pf *pf = pci_get_drvdata(pdev);
  1372. if (num_vfs) {
  1373. if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
  1374. pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
  1375. i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
  1376. }
  1377. return i40e_pci_sriov_enable(pdev, num_vfs);
  1378. }
  1379. if (!pci_vfs_assigned(pf->pdev)) {
  1380. i40e_free_vfs(pf);
  1381. pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
  1382. i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
  1383. } else {
  1384. dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
  1385. return -EINVAL;
  1386. }
  1387. return 0;
  1388. }
  1389. /***********************virtual channel routines******************/
  1390. /**
  1391. * i40e_vc_send_msg_to_vf
  1392. * @vf: pointer to the VF info
  1393. * @v_opcode: virtual channel opcode
  1394. * @v_retval: virtual channel return value
  1395. * @msg: pointer to the msg buffer
  1396. * @msglen: msg length
  1397. *
  1398. * send msg to VF
  1399. **/
  1400. static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
  1401. u32 v_retval, u8 *msg, u16 msglen)
  1402. {
  1403. struct i40e_pf *pf;
  1404. struct i40e_hw *hw;
  1405. int abs_vf_id;
  1406. i40e_status aq_ret;
  1407. /* validate the request */
  1408. if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
  1409. return -EINVAL;
  1410. pf = vf->pf;
  1411. hw = &pf->hw;
  1412. abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
  1413. /* single place to detect unsuccessful return values */
  1414. if (v_retval) {
  1415. vf->num_invalid_msgs++;
  1416. dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
  1417. vf->vf_id, v_opcode, v_retval);
  1418. if (vf->num_invalid_msgs >
  1419. I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
  1420. dev_err(&pf->pdev->dev,
  1421. "Number of invalid messages exceeded for VF %d\n",
  1422. vf->vf_id);
  1423. dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
  1424. set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
  1425. }
  1426. } else {
  1427. vf->num_valid_msgs++;
  1428. /* reset the invalid counter, if a valid message is received. */
  1429. vf->num_invalid_msgs = 0;
  1430. }
  1431. aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
  1432. msg, msglen, NULL);
  1433. if (aq_ret) {
  1434. dev_info(&pf->pdev->dev,
  1435. "Unable to send the message to VF %d aq_err %d\n",
  1436. vf->vf_id, pf->hw.aq.asq_last_status);
  1437. return -EIO;
  1438. }
  1439. return 0;
  1440. }
  1441. /**
  1442. * i40e_vc_send_resp_to_vf
  1443. * @vf: pointer to the VF info
  1444. * @opcode: operation code
  1445. * @retval: return value
  1446. *
  1447. * send resp msg to VF
  1448. **/
  1449. static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
  1450. enum virtchnl_ops opcode,
  1451. i40e_status retval)
  1452. {
  1453. return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
  1454. }
  1455. /**
  1456. * i40e_vc_get_version_msg
  1457. * @vf: pointer to the VF info
  1458. *
  1459. * called from the VF to request the API version used by the PF
  1460. **/
  1461. static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
  1462. {
  1463. struct virtchnl_version_info info = {
  1464. VIRTCHNL_VERSION_MAJOR, VIRTCHNL_VERSION_MINOR
  1465. };
  1466. vf->vf_ver = *(struct virtchnl_version_info *)msg;
  1467. /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
  1468. if (VF_IS_V10(&vf->vf_ver))
  1469. info.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
  1470. return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
  1471. I40E_SUCCESS, (u8 *)&info,
  1472. sizeof(struct virtchnl_version_info));
  1473. }
  1474. /**
  1475. * i40e_del_qch - delete all the additional VSIs created as a part of ADq
  1476. * @vf: pointer to VF structure
  1477. **/
  1478. static void i40e_del_qch(struct i40e_vf *vf)
  1479. {
  1480. struct i40e_pf *pf = vf->pf;
  1481. int i;
  1482. /* first element in the array belongs to primary VF VSI and we shouldn't
  1483. * delete it. We should however delete the rest of the VSIs created
  1484. */
  1485. for (i = 1; i < vf->num_tc; i++) {
  1486. if (vf->ch[i].vsi_idx) {
  1487. i40e_vsi_release(pf->vsi[vf->ch[i].vsi_idx]);
  1488. vf->ch[i].vsi_idx = 0;
  1489. vf->ch[i].vsi_id = 0;
  1490. }
  1491. }
  1492. }
  1493. /**
  1494. * i40e_vc_get_vf_resources_msg
  1495. * @vf: pointer to the VF info
  1496. * @msg: pointer to the msg buffer
  1497. * @msglen: msg length
  1498. *
  1499. * called from the VF to request its resources
  1500. **/
  1501. static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
  1502. {
  1503. struct virtchnl_vf_resource *vfres = NULL;
  1504. struct i40e_pf *pf = vf->pf;
  1505. i40e_status aq_ret = 0;
  1506. struct i40e_vsi *vsi;
  1507. int num_vsis = 1;
  1508. int len = 0;
  1509. int ret;
  1510. if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
  1511. aq_ret = I40E_ERR_PARAM;
  1512. goto err;
  1513. }
  1514. len = (sizeof(struct virtchnl_vf_resource) +
  1515. sizeof(struct virtchnl_vsi_resource) * num_vsis);
  1516. vfres = kzalloc(len, GFP_KERNEL);
  1517. if (!vfres) {
  1518. aq_ret = I40E_ERR_NO_MEMORY;
  1519. len = 0;
  1520. goto err;
  1521. }
  1522. if (VF_IS_V11(&vf->vf_ver))
  1523. vf->driver_caps = *(u32 *)msg;
  1524. else
  1525. vf->driver_caps = VIRTCHNL_VF_OFFLOAD_L2 |
  1526. VIRTCHNL_VF_OFFLOAD_RSS_REG |
  1527. VIRTCHNL_VF_OFFLOAD_VLAN;
  1528. vfres->vf_cap_flags = VIRTCHNL_VF_OFFLOAD_L2;
  1529. vsi = pf->vsi[vf->lan_vsi_idx];
  1530. if (!vsi->info.pvid)
  1531. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_VLAN;
  1532. if (i40e_vf_client_capable(pf, vf->vf_id) &&
  1533. (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_IWARP)) {
  1534. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_IWARP;
  1535. set_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
  1536. } else {
  1537. clear_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
  1538. }
  1539. if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
  1540. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
  1541. } else {
  1542. if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
  1543. (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))
  1544. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;
  1545. else
  1546. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;
  1547. }
  1548. if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
  1549. if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
  1550. vfres->vf_cap_flags |=
  1551. VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
  1552. }
  1553. if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
  1554. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
  1555. if ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&
  1556. (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
  1557. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
  1558. if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
  1559. if (pf->flags & I40E_FLAG_MFP_ENABLED) {
  1560. dev_err(&pf->pdev->dev,
  1561. "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
  1562. vf->vf_id);
  1563. aq_ret = I40E_ERR_PARAM;
  1564. goto err;
  1565. }
  1566. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
  1567. }
  1568. if (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {
  1569. if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
  1570. vfres->vf_cap_flags |=
  1571. VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
  1572. }
  1573. if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_REQ_QUEUES)
  1574. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_REQ_QUEUES;
  1575. if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)
  1576. vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ADQ;
  1577. vfres->num_vsis = num_vsis;
  1578. vfres->num_queue_pairs = vf->num_queue_pairs;
  1579. vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
  1580. vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
  1581. vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
  1582. if (vf->lan_vsi_idx) {
  1583. vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
  1584. vfres->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV;
  1585. vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
  1586. /* VFs only use TC 0 */
  1587. vfres->vsi_res[0].qset_handle
  1588. = le16_to_cpu(vsi->info.qs_handle[0]);
  1589. ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
  1590. vf->default_lan_addr.addr);
  1591. }
  1592. set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
  1593. err:
  1594. /* send the response back to the VF */
  1595. ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_VF_RESOURCES,
  1596. aq_ret, (u8 *)vfres, len);
  1597. kfree(vfres);
  1598. return ret;
  1599. }
  1600. /**
  1601. * i40e_vc_reset_vf_msg
  1602. * @vf: pointer to the VF info
  1603. * @msg: pointer to the msg buffer
  1604. * @msglen: msg length
  1605. *
  1606. * called from the VF to reset itself,
  1607. * unlike other virtchnl messages, PF driver
  1608. * doesn't send the response back to the VF
  1609. **/
  1610. static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
  1611. {
  1612. if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
  1613. i40e_reset_vf(vf, false);
  1614. }
  1615. /**
  1616. * i40e_getnum_vf_vsi_vlan_filters
  1617. * @vsi: pointer to the vsi
  1618. *
  1619. * called to get the number of VLANs offloaded on this VF
  1620. **/
  1621. static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
  1622. {
  1623. struct i40e_mac_filter *f;
  1624. int num_vlans = 0, bkt;
  1625. hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
  1626. if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
  1627. num_vlans++;
  1628. }
  1629. return num_vlans;
  1630. }
  1631. /**
  1632. * i40e_vc_config_promiscuous_mode_msg
  1633. * @vf: pointer to the VF info
  1634. * @msg: pointer to the msg buffer
  1635. * @msglen: msg length
  1636. *
  1637. * called from the VF to configure the promiscuous mode of
  1638. * VF vsis
  1639. **/
  1640. static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
  1641. u8 *msg, u16 msglen)
  1642. {
  1643. struct virtchnl_promisc_info *info =
  1644. (struct virtchnl_promisc_info *)msg;
  1645. struct i40e_pf *pf = vf->pf;
  1646. struct i40e_hw *hw = &pf->hw;
  1647. struct i40e_mac_filter *f;
  1648. i40e_status aq_ret = 0;
  1649. bool allmulti = false;
  1650. struct i40e_vsi *vsi;
  1651. bool alluni = false;
  1652. int aq_err = 0;
  1653. int bkt;
  1654. vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
  1655. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
  1656. !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
  1657. !vsi) {
  1658. aq_ret = I40E_ERR_PARAM;
  1659. goto error_param;
  1660. }
  1661. if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
  1662. dev_err(&pf->pdev->dev,
  1663. "Unprivileged VF %d is attempting to configure promiscuous mode\n",
  1664. vf->vf_id);
  1665. /* Lie to the VF on purpose. */
  1666. aq_ret = 0;
  1667. goto error_param;
  1668. }
  1669. /* Multicast promiscuous handling*/
  1670. if (info->flags & FLAG_VF_MULTICAST_PROMISC)
  1671. allmulti = true;
  1672. if (vf->port_vlan_id) {
  1673. aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
  1674. allmulti,
  1675. vf->port_vlan_id,
  1676. NULL);
  1677. } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
  1678. hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
  1679. if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
  1680. continue;
  1681. aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
  1682. vsi->seid,
  1683. allmulti,
  1684. f->vlan,
  1685. NULL);
  1686. aq_err = pf->hw.aq.asq_last_status;
  1687. if (aq_ret) {
  1688. dev_err(&pf->pdev->dev,
  1689. "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
  1690. f->vlan,
  1691. i40e_stat_str(&pf->hw, aq_ret),
  1692. i40e_aq_str(&pf->hw, aq_err));
  1693. break;
  1694. }
  1695. }
  1696. } else {
  1697. aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
  1698. allmulti, NULL);
  1699. aq_err = pf->hw.aq.asq_last_status;
  1700. if (aq_ret) {
  1701. dev_err(&pf->pdev->dev,
  1702. "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
  1703. vf->vf_id,
  1704. i40e_stat_str(&pf->hw, aq_ret),
  1705. i40e_aq_str(&pf->hw, aq_err));
  1706. goto error_param;
  1707. }
  1708. }
  1709. if (!aq_ret) {
  1710. dev_info(&pf->pdev->dev,
  1711. "VF %d successfully set multicast promiscuous mode\n",
  1712. vf->vf_id);
  1713. if (allmulti)
  1714. set_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
  1715. else
  1716. clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
  1717. }
  1718. if (info->flags & FLAG_VF_UNICAST_PROMISC)
  1719. alluni = true;
  1720. if (vf->port_vlan_id) {
  1721. aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
  1722. alluni,
  1723. vf->port_vlan_id,
  1724. NULL);
  1725. } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
  1726. hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
  1727. if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
  1728. continue;
  1729. aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
  1730. vsi->seid,
  1731. alluni,
  1732. f->vlan,
  1733. NULL);
  1734. aq_err = pf->hw.aq.asq_last_status;
  1735. if (aq_ret)
  1736. dev_err(&pf->pdev->dev,
  1737. "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
  1738. f->vlan,
  1739. i40e_stat_str(&pf->hw, aq_ret),
  1740. i40e_aq_str(&pf->hw, aq_err));
  1741. }
  1742. } else {
  1743. aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid,
  1744. alluni, NULL,
  1745. true);
  1746. aq_err = pf->hw.aq.asq_last_status;
  1747. if (aq_ret) {
  1748. dev_err(&pf->pdev->dev,
  1749. "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n",
  1750. vf->vf_id, info->flags,
  1751. i40e_stat_str(&pf->hw, aq_ret),
  1752. i40e_aq_str(&pf->hw, aq_err));
  1753. goto error_param;
  1754. }
  1755. }
  1756. if (!aq_ret) {
  1757. dev_info(&pf->pdev->dev,
  1758. "VF %d successfully set unicast promiscuous mode\n",
  1759. vf->vf_id);
  1760. if (alluni)
  1761. set_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
  1762. else
  1763. clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
  1764. }
  1765. error_param:
  1766. /* send the response to the VF */
  1767. return i40e_vc_send_resp_to_vf(vf,
  1768. VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
  1769. aq_ret);
  1770. }
  1771. /**
  1772. * i40e_vc_config_queues_msg
  1773. * @vf: pointer to the VF info
  1774. * @msg: pointer to the msg buffer
  1775. * @msglen: msg length
  1776. *
  1777. * called from the VF to configure the rx/tx
  1778. * queues
  1779. **/
  1780. static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1781. {
  1782. struct virtchnl_vsi_queue_config_info *qci =
  1783. (struct virtchnl_vsi_queue_config_info *)msg;
  1784. struct virtchnl_queue_pair_info *qpi;
  1785. struct i40e_pf *pf = vf->pf;
  1786. u16 vsi_id, vsi_queue_id = 0;
  1787. i40e_status aq_ret = 0;
  1788. int i, j = 0, idx = 0;
  1789. vsi_id = qci->vsi_id;
  1790. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  1791. aq_ret = I40E_ERR_PARAM;
  1792. goto error_param;
  1793. }
  1794. if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1795. aq_ret = I40E_ERR_PARAM;
  1796. goto error_param;
  1797. }
  1798. for (i = 0; i < qci->num_queue_pairs; i++) {
  1799. qpi = &qci->qpair[i];
  1800. if (!vf->adq_enabled) {
  1801. vsi_queue_id = qpi->txq.queue_id;
  1802. if (qpi->txq.vsi_id != qci->vsi_id ||
  1803. qpi->rxq.vsi_id != qci->vsi_id ||
  1804. qpi->rxq.queue_id != vsi_queue_id) {
  1805. aq_ret = I40E_ERR_PARAM;
  1806. goto error_param;
  1807. }
  1808. }
  1809. if (!i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
  1810. aq_ret = I40E_ERR_PARAM;
  1811. goto error_param;
  1812. }
  1813. if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
  1814. &qpi->rxq) ||
  1815. i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
  1816. &qpi->txq)) {
  1817. aq_ret = I40E_ERR_PARAM;
  1818. goto error_param;
  1819. }
  1820. /* For ADq there can be up to 4 VSIs with max 4 queues each.
  1821. * VF does not know about these additional VSIs and all
  1822. * it cares is about its own queues. PF configures these queues
  1823. * to its appropriate VSIs based on TC mapping
  1824. **/
  1825. if (vf->adq_enabled) {
  1826. if (j == (vf->ch[idx].num_qps - 1)) {
  1827. idx++;
  1828. j = 0; /* resetting the queue count */
  1829. vsi_queue_id = 0;
  1830. } else {
  1831. j++;
  1832. vsi_queue_id++;
  1833. }
  1834. vsi_id = vf->ch[idx].vsi_id;
  1835. }
  1836. }
  1837. /* set vsi num_queue_pairs in use to num configured by VF */
  1838. if (!vf->adq_enabled) {
  1839. pf->vsi[vf->lan_vsi_idx]->num_queue_pairs =
  1840. qci->num_queue_pairs;
  1841. } else {
  1842. for (i = 0; i < vf->num_tc; i++)
  1843. pf->vsi[vf->ch[i].vsi_idx]->num_queue_pairs =
  1844. vf->ch[i].num_qps;
  1845. }
  1846. error_param:
  1847. /* send the response to the VF */
  1848. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
  1849. aq_ret);
  1850. }
  1851. /**
  1852. * i40e_validate_queue_map
  1853. * @vsi_id: vsi id
  1854. * @queuemap: Tx or Rx queue map
  1855. *
  1856. * check if Tx or Rx queue map is valid
  1857. **/
  1858. static int i40e_validate_queue_map(struct i40e_vf *vf, u16 vsi_id,
  1859. unsigned long queuemap)
  1860. {
  1861. u16 vsi_queue_id, queue_id;
  1862. for_each_set_bit(vsi_queue_id, &queuemap, I40E_MAX_VSI_QP) {
  1863. if (vf->adq_enabled) {
  1864. vsi_id = vf->ch[vsi_queue_id / I40E_MAX_VF_VSI].vsi_id;
  1865. queue_id = (vsi_queue_id % I40E_DEFAULT_QUEUES_PER_VF);
  1866. } else {
  1867. queue_id = vsi_queue_id;
  1868. }
  1869. if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id))
  1870. return -EINVAL;
  1871. }
  1872. return 0;
  1873. }
  1874. /**
  1875. * i40e_vc_config_irq_map_msg
  1876. * @vf: pointer to the VF info
  1877. * @msg: pointer to the msg buffer
  1878. * @msglen: msg length
  1879. *
  1880. * called from the VF to configure the irq to
  1881. * queue map
  1882. **/
  1883. static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1884. {
  1885. struct virtchnl_irq_map_info *irqmap_info =
  1886. (struct virtchnl_irq_map_info *)msg;
  1887. struct virtchnl_vector_map *map;
  1888. u16 vsi_id, vector_id;
  1889. i40e_status aq_ret = 0;
  1890. int i;
  1891. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  1892. aq_ret = I40E_ERR_PARAM;
  1893. goto error_param;
  1894. }
  1895. for (i = 0; i < irqmap_info->num_vectors; i++) {
  1896. map = &irqmap_info->vecmap[i];
  1897. vector_id = map->vector_id;
  1898. vsi_id = map->vsi_id;
  1899. /* validate msg params */
  1900. if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
  1901. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1902. aq_ret = I40E_ERR_PARAM;
  1903. goto error_param;
  1904. }
  1905. if (i40e_validate_queue_map(vf, vsi_id, map->rxq_map)) {
  1906. aq_ret = I40E_ERR_PARAM;
  1907. goto error_param;
  1908. }
  1909. if (i40e_validate_queue_map(vf, vsi_id, map->txq_map)) {
  1910. aq_ret = I40E_ERR_PARAM;
  1911. goto error_param;
  1912. }
  1913. i40e_config_irq_link_list(vf, vsi_id, map);
  1914. }
  1915. error_param:
  1916. /* send the response to the VF */
  1917. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP,
  1918. aq_ret);
  1919. }
  1920. /**
  1921. * i40e_vc_enable_queues_msg
  1922. * @vf: pointer to the VF info
  1923. * @msg: pointer to the msg buffer
  1924. * @msglen: msg length
  1925. *
  1926. * called from the VF to enable all or specific queue(s)
  1927. **/
  1928. static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1929. {
  1930. struct virtchnl_queue_select *vqs =
  1931. (struct virtchnl_queue_select *)msg;
  1932. struct i40e_pf *pf = vf->pf;
  1933. u16 vsi_id = vqs->vsi_id;
  1934. i40e_status aq_ret = 0;
  1935. int i;
  1936. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  1937. aq_ret = I40E_ERR_PARAM;
  1938. goto error_param;
  1939. }
  1940. if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  1941. aq_ret = I40E_ERR_PARAM;
  1942. goto error_param;
  1943. }
  1944. if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
  1945. aq_ret = I40E_ERR_PARAM;
  1946. goto error_param;
  1947. }
  1948. if (i40e_vsi_start_rings(pf->vsi[vf->lan_vsi_idx]))
  1949. aq_ret = I40E_ERR_TIMEOUT;
  1950. /* need to start the rings for additional ADq VSI's as well */
  1951. if (vf->adq_enabled) {
  1952. /* zero belongs to LAN VSI */
  1953. for (i = 1; i < vf->num_tc; i++) {
  1954. if (i40e_vsi_start_rings(pf->vsi[vf->ch[i].vsi_idx]))
  1955. aq_ret = I40E_ERR_TIMEOUT;
  1956. }
  1957. }
  1958. error_param:
  1959. /* send the response to the VF */
  1960. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES,
  1961. aq_ret);
  1962. }
  1963. /**
  1964. * i40e_vc_disable_queues_msg
  1965. * @vf: pointer to the VF info
  1966. * @msg: pointer to the msg buffer
  1967. * @msglen: msg length
  1968. *
  1969. * called from the VF to disable all or specific
  1970. * queue(s)
  1971. **/
  1972. static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  1973. {
  1974. struct virtchnl_queue_select *vqs =
  1975. (struct virtchnl_queue_select *)msg;
  1976. struct i40e_pf *pf = vf->pf;
  1977. i40e_status aq_ret = 0;
  1978. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  1979. aq_ret = I40E_ERR_PARAM;
  1980. goto error_param;
  1981. }
  1982. if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
  1983. aq_ret = I40E_ERR_PARAM;
  1984. goto error_param;
  1985. }
  1986. if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
  1987. aq_ret = I40E_ERR_PARAM;
  1988. goto error_param;
  1989. }
  1990. i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
  1991. error_param:
  1992. /* send the response to the VF */
  1993. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES,
  1994. aq_ret);
  1995. }
  1996. /**
  1997. * i40e_vc_request_queues_msg
  1998. * @vf: pointer to the VF info
  1999. * @msg: pointer to the msg buffer
  2000. * @msglen: msg length
  2001. *
  2002. * VFs get a default number of queues but can use this message to request a
  2003. * different number. If the request is successful, PF will reset the VF and
  2004. * return 0. If unsuccessful, PF will send message informing VF of number of
  2005. * available queues and return result of sending VF a message.
  2006. **/
  2007. static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg, int msglen)
  2008. {
  2009. struct virtchnl_vf_res_request *vfres =
  2010. (struct virtchnl_vf_res_request *)msg;
  2011. int req_pairs = vfres->num_queue_pairs;
  2012. int cur_pairs = vf->num_queue_pairs;
  2013. struct i40e_pf *pf = vf->pf;
  2014. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
  2015. return -EINVAL;
  2016. if (req_pairs <= 0) {
  2017. dev_err(&pf->pdev->dev,
  2018. "VF %d tried to request %d queues. Ignoring.\n",
  2019. vf->vf_id, req_pairs);
  2020. } else if (req_pairs > I40E_MAX_VF_QUEUES) {
  2021. dev_err(&pf->pdev->dev,
  2022. "VF %d tried to request more than %d queues.\n",
  2023. vf->vf_id,
  2024. I40E_MAX_VF_QUEUES);
  2025. vfres->num_queue_pairs = I40E_MAX_VF_QUEUES;
  2026. } else if (req_pairs - cur_pairs > pf->queues_left) {
  2027. dev_warn(&pf->pdev->dev,
  2028. "VF %d requested %d more queues, but only %d left.\n",
  2029. vf->vf_id,
  2030. req_pairs - cur_pairs,
  2031. pf->queues_left);
  2032. vfres->num_queue_pairs = pf->queues_left + cur_pairs;
  2033. } else {
  2034. /* successful request */
  2035. vf->num_req_queues = req_pairs;
  2036. i40e_vc_notify_vf_reset(vf);
  2037. i40e_reset_vf(vf, false);
  2038. return 0;
  2039. }
  2040. return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES, 0,
  2041. (u8 *)vfres, sizeof(*vfres));
  2042. }
  2043. /**
  2044. * i40e_vc_get_stats_msg
  2045. * @vf: pointer to the VF info
  2046. * @msg: pointer to the msg buffer
  2047. * @msglen: msg length
  2048. *
  2049. * called from the VF to get vsi stats
  2050. **/
  2051. static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2052. {
  2053. struct virtchnl_queue_select *vqs =
  2054. (struct virtchnl_queue_select *)msg;
  2055. struct i40e_pf *pf = vf->pf;
  2056. struct i40e_eth_stats stats;
  2057. i40e_status aq_ret = 0;
  2058. struct i40e_vsi *vsi;
  2059. memset(&stats, 0, sizeof(struct i40e_eth_stats));
  2060. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  2061. aq_ret = I40E_ERR_PARAM;
  2062. goto error_param;
  2063. }
  2064. if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
  2065. aq_ret = I40E_ERR_PARAM;
  2066. goto error_param;
  2067. }
  2068. vsi = pf->vsi[vf->lan_vsi_idx];
  2069. if (!vsi) {
  2070. aq_ret = I40E_ERR_PARAM;
  2071. goto error_param;
  2072. }
  2073. i40e_update_eth_stats(vsi);
  2074. stats = vsi->eth_stats;
  2075. error_param:
  2076. /* send the response back to the VF */
  2077. return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS, aq_ret,
  2078. (u8 *)&stats, sizeof(stats));
  2079. }
  2080. /* If the VF is not trusted restrict the number of MAC/VLAN it can program */
  2081. #define I40E_VC_MAX_MAC_ADDR_PER_VF 12
  2082. #define I40E_VC_MAX_VLAN_PER_VF 8
  2083. /**
  2084. * i40e_check_vf_permission
  2085. * @vf: pointer to the VF info
  2086. * @al: MAC address list from virtchnl
  2087. *
  2088. * Check that the given list of MAC addresses is allowed. Will return -EPERM
  2089. * if any address in the list is not valid. Checks the following conditions:
  2090. *
  2091. * 1) broadcast and zero addresses are never valid
  2092. * 2) unicast addresses are not allowed if the VMM has administratively set
  2093. * the VF MAC address, unless the VF is marked as privileged.
  2094. * 3) There is enough space to add all the addresses.
  2095. *
  2096. * Note that to guarantee consistency, it is expected this function be called
  2097. * while holding the mac_filter_hash_lock, as otherwise the current number of
  2098. * addresses might not be accurate.
  2099. **/
  2100. static inline int i40e_check_vf_permission(struct i40e_vf *vf,
  2101. struct virtchnl_ether_addr_list *al)
  2102. {
  2103. struct i40e_pf *pf = vf->pf;
  2104. int i;
  2105. /* If this VF is not privileged, then we can't add more than a limited
  2106. * number of addresses. Check to make sure that the additions do not
  2107. * push us over the limit.
  2108. */
  2109. if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
  2110. (vf->num_mac + al->num_elements) > I40E_VC_MAX_MAC_ADDR_PER_VF) {
  2111. dev_err(&pf->pdev->dev,
  2112. "Cannot add more MAC addresses, VF is not trusted, switch the VF to trusted to add more functionality\n");
  2113. return -EPERM;
  2114. }
  2115. for (i = 0; i < al->num_elements; i++) {
  2116. u8 *addr = al->list[i].addr;
  2117. if (is_broadcast_ether_addr(addr) ||
  2118. is_zero_ether_addr(addr)) {
  2119. dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n",
  2120. addr);
  2121. return I40E_ERR_INVALID_MAC_ADDR;
  2122. }
  2123. /* If the host VMM administrator has set the VF MAC address
  2124. * administratively via the ndo_set_vf_mac command then deny
  2125. * permission to the VF to add or delete unicast MAC addresses.
  2126. * Unless the VF is privileged and then it can do whatever.
  2127. * The VF may request to set the MAC address filter already
  2128. * assigned to it so do not return an error in that case.
  2129. */
  2130. if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
  2131. !is_multicast_ether_addr(addr) && vf->pf_set_mac &&
  2132. !ether_addr_equal(addr, vf->default_lan_addr.addr)) {
  2133. dev_err(&pf->pdev->dev,
  2134. "VF attempting to override administratively set MAC address, reload the VF driver to resume normal operation\n");
  2135. return -EPERM;
  2136. }
  2137. }
  2138. return 0;
  2139. }
  2140. /**
  2141. * i40e_vc_add_mac_addr_msg
  2142. * @vf: pointer to the VF info
  2143. * @msg: pointer to the msg buffer
  2144. * @msglen: msg length
  2145. *
  2146. * add guest mac address filter
  2147. **/
  2148. static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2149. {
  2150. struct virtchnl_ether_addr_list *al =
  2151. (struct virtchnl_ether_addr_list *)msg;
  2152. struct i40e_pf *pf = vf->pf;
  2153. struct i40e_vsi *vsi = NULL;
  2154. u16 vsi_id = al->vsi_id;
  2155. i40e_status ret = 0;
  2156. int i;
  2157. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
  2158. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  2159. ret = I40E_ERR_PARAM;
  2160. goto error_param;
  2161. }
  2162. vsi = pf->vsi[vf->lan_vsi_idx];
  2163. /* Lock once, because all function inside for loop accesses VSI's
  2164. * MAC filter list which needs to be protected using same lock.
  2165. */
  2166. spin_lock_bh(&vsi->mac_filter_hash_lock);
  2167. ret = i40e_check_vf_permission(vf, al);
  2168. if (ret) {
  2169. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  2170. goto error_param;
  2171. }
  2172. /* add new addresses to the list */
  2173. for (i = 0; i < al->num_elements; i++) {
  2174. struct i40e_mac_filter *f;
  2175. f = i40e_find_mac(vsi, al->list[i].addr);
  2176. if (!f) {
  2177. f = i40e_add_mac_filter(vsi, al->list[i].addr);
  2178. if (!f) {
  2179. dev_err(&pf->pdev->dev,
  2180. "Unable to add MAC filter %pM for VF %d\n",
  2181. al->list[i].addr, vf->vf_id);
  2182. ret = I40E_ERR_PARAM;
  2183. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  2184. goto error_param;
  2185. } else {
  2186. vf->num_mac++;
  2187. }
  2188. }
  2189. }
  2190. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  2191. /* program the updated filter list */
  2192. ret = i40e_sync_vsi_filters(vsi);
  2193. if (ret)
  2194. dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
  2195. vf->vf_id, ret);
  2196. error_param:
  2197. /* send the response to the VF */
  2198. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
  2199. ret);
  2200. }
  2201. /**
  2202. * i40e_vc_del_mac_addr_msg
  2203. * @vf: pointer to the VF info
  2204. * @msg: pointer to the msg buffer
  2205. * @msglen: msg length
  2206. *
  2207. * remove guest mac address filter
  2208. **/
  2209. static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2210. {
  2211. struct virtchnl_ether_addr_list *al =
  2212. (struct virtchnl_ether_addr_list *)msg;
  2213. struct i40e_pf *pf = vf->pf;
  2214. struct i40e_vsi *vsi = NULL;
  2215. u16 vsi_id = al->vsi_id;
  2216. i40e_status ret = 0;
  2217. int i;
  2218. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
  2219. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  2220. ret = I40E_ERR_PARAM;
  2221. goto error_param;
  2222. }
  2223. for (i = 0; i < al->num_elements; i++) {
  2224. if (is_broadcast_ether_addr(al->list[i].addr) ||
  2225. is_zero_ether_addr(al->list[i].addr)) {
  2226. dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
  2227. al->list[i].addr, vf->vf_id);
  2228. ret = I40E_ERR_INVALID_MAC_ADDR;
  2229. goto error_param;
  2230. }
  2231. }
  2232. vsi = pf->vsi[vf->lan_vsi_idx];
  2233. spin_lock_bh(&vsi->mac_filter_hash_lock);
  2234. /* delete addresses from the list */
  2235. for (i = 0; i < al->num_elements; i++)
  2236. if (i40e_del_mac_filter(vsi, al->list[i].addr)) {
  2237. ret = I40E_ERR_INVALID_MAC_ADDR;
  2238. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  2239. goto error_param;
  2240. } else {
  2241. vf->num_mac--;
  2242. }
  2243. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  2244. /* program the updated filter list */
  2245. ret = i40e_sync_vsi_filters(vsi);
  2246. if (ret)
  2247. dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
  2248. vf->vf_id, ret);
  2249. error_param:
  2250. /* send the response to the VF */
  2251. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_ETH_ADDR,
  2252. ret);
  2253. }
  2254. /**
  2255. * i40e_vc_add_vlan_msg
  2256. * @vf: pointer to the VF info
  2257. * @msg: pointer to the msg buffer
  2258. * @msglen: msg length
  2259. *
  2260. * program guest vlan id
  2261. **/
  2262. static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2263. {
  2264. struct virtchnl_vlan_filter_list *vfl =
  2265. (struct virtchnl_vlan_filter_list *)msg;
  2266. struct i40e_pf *pf = vf->pf;
  2267. struct i40e_vsi *vsi = NULL;
  2268. u16 vsi_id = vfl->vsi_id;
  2269. i40e_status aq_ret = 0;
  2270. int i;
  2271. if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
  2272. !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
  2273. dev_err(&pf->pdev->dev,
  2274. "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
  2275. goto error_param;
  2276. }
  2277. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
  2278. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  2279. aq_ret = I40E_ERR_PARAM;
  2280. goto error_param;
  2281. }
  2282. for (i = 0; i < vfl->num_elements; i++) {
  2283. if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
  2284. aq_ret = I40E_ERR_PARAM;
  2285. dev_err(&pf->pdev->dev,
  2286. "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
  2287. goto error_param;
  2288. }
  2289. }
  2290. vsi = pf->vsi[vf->lan_vsi_idx];
  2291. if (vsi->info.pvid) {
  2292. aq_ret = I40E_ERR_PARAM;
  2293. goto error_param;
  2294. }
  2295. i40e_vlan_stripping_enable(vsi);
  2296. for (i = 0; i < vfl->num_elements; i++) {
  2297. /* add new VLAN filter */
  2298. int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
  2299. if (!ret)
  2300. vf->num_vlan++;
  2301. if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
  2302. i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
  2303. true,
  2304. vfl->vlan_id[i],
  2305. NULL);
  2306. if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
  2307. i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
  2308. true,
  2309. vfl->vlan_id[i],
  2310. NULL);
  2311. if (ret)
  2312. dev_err(&pf->pdev->dev,
  2313. "Unable to add VLAN filter %d for VF %d, error %d\n",
  2314. vfl->vlan_id[i], vf->vf_id, ret);
  2315. }
  2316. error_param:
  2317. /* send the response to the VF */
  2318. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_VLAN, aq_ret);
  2319. }
  2320. /**
  2321. * i40e_vc_remove_vlan_msg
  2322. * @vf: pointer to the VF info
  2323. * @msg: pointer to the msg buffer
  2324. * @msglen: msg length
  2325. *
  2326. * remove programmed guest vlan id
  2327. **/
  2328. static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2329. {
  2330. struct virtchnl_vlan_filter_list *vfl =
  2331. (struct virtchnl_vlan_filter_list *)msg;
  2332. struct i40e_pf *pf = vf->pf;
  2333. struct i40e_vsi *vsi = NULL;
  2334. u16 vsi_id = vfl->vsi_id;
  2335. i40e_status aq_ret = 0;
  2336. int i;
  2337. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
  2338. !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
  2339. aq_ret = I40E_ERR_PARAM;
  2340. goto error_param;
  2341. }
  2342. for (i = 0; i < vfl->num_elements; i++) {
  2343. if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
  2344. aq_ret = I40E_ERR_PARAM;
  2345. goto error_param;
  2346. }
  2347. }
  2348. vsi = pf->vsi[vf->lan_vsi_idx];
  2349. if (vsi->info.pvid) {
  2350. aq_ret = I40E_ERR_PARAM;
  2351. goto error_param;
  2352. }
  2353. for (i = 0; i < vfl->num_elements; i++) {
  2354. i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
  2355. vf->num_vlan--;
  2356. if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
  2357. i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
  2358. false,
  2359. vfl->vlan_id[i],
  2360. NULL);
  2361. if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
  2362. i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
  2363. false,
  2364. vfl->vlan_id[i],
  2365. NULL);
  2366. }
  2367. error_param:
  2368. /* send the response to the VF */
  2369. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_VLAN, aq_ret);
  2370. }
  2371. /**
  2372. * i40e_vc_iwarp_msg
  2373. * @vf: pointer to the VF info
  2374. * @msg: pointer to the msg buffer
  2375. * @msglen: msg length
  2376. *
  2377. * called from the VF for the iwarp msgs
  2378. **/
  2379. static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2380. {
  2381. struct i40e_pf *pf = vf->pf;
  2382. int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
  2383. i40e_status aq_ret = 0;
  2384. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
  2385. !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
  2386. aq_ret = I40E_ERR_PARAM;
  2387. goto error_param;
  2388. }
  2389. i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
  2390. msg, msglen);
  2391. error_param:
  2392. /* send the response to the VF */
  2393. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_IWARP,
  2394. aq_ret);
  2395. }
  2396. /**
  2397. * i40e_vc_iwarp_qvmap_msg
  2398. * @vf: pointer to the VF info
  2399. * @msg: pointer to the msg buffer
  2400. * @msglen: msg length
  2401. * @config: config qvmap or release it
  2402. *
  2403. * called from the VF for the iwarp msgs
  2404. **/
  2405. static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
  2406. bool config)
  2407. {
  2408. struct virtchnl_iwarp_qvlist_info *qvlist_info =
  2409. (struct virtchnl_iwarp_qvlist_info *)msg;
  2410. i40e_status aq_ret = 0;
  2411. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
  2412. !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
  2413. aq_ret = I40E_ERR_PARAM;
  2414. goto error_param;
  2415. }
  2416. if (config) {
  2417. if (i40e_config_iwarp_qvlist(vf, qvlist_info))
  2418. aq_ret = I40E_ERR_PARAM;
  2419. } else {
  2420. i40e_release_iwarp_qvlist(vf);
  2421. }
  2422. error_param:
  2423. /* send the response to the VF */
  2424. return i40e_vc_send_resp_to_vf(vf,
  2425. config ? VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP :
  2426. VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP,
  2427. aq_ret);
  2428. }
  2429. /**
  2430. * i40e_vc_config_rss_key
  2431. * @vf: pointer to the VF info
  2432. * @msg: pointer to the msg buffer
  2433. * @msglen: msg length
  2434. *
  2435. * Configure the VF's RSS key
  2436. **/
  2437. static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2438. {
  2439. struct virtchnl_rss_key *vrk =
  2440. (struct virtchnl_rss_key *)msg;
  2441. struct i40e_pf *pf = vf->pf;
  2442. struct i40e_vsi *vsi = NULL;
  2443. u16 vsi_id = vrk->vsi_id;
  2444. i40e_status aq_ret = 0;
  2445. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
  2446. !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
  2447. (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
  2448. aq_ret = I40E_ERR_PARAM;
  2449. goto err;
  2450. }
  2451. vsi = pf->vsi[vf->lan_vsi_idx];
  2452. aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
  2453. err:
  2454. /* send the response to the VF */
  2455. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY,
  2456. aq_ret);
  2457. }
  2458. /**
  2459. * i40e_vc_config_rss_lut
  2460. * @vf: pointer to the VF info
  2461. * @msg: pointer to the msg buffer
  2462. * @msglen: msg length
  2463. *
  2464. * Configure the VF's RSS LUT
  2465. **/
  2466. static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2467. {
  2468. struct virtchnl_rss_lut *vrl =
  2469. (struct virtchnl_rss_lut *)msg;
  2470. struct i40e_pf *pf = vf->pf;
  2471. struct i40e_vsi *vsi = NULL;
  2472. u16 vsi_id = vrl->vsi_id;
  2473. i40e_status aq_ret = 0;
  2474. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
  2475. !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
  2476. (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
  2477. aq_ret = I40E_ERR_PARAM;
  2478. goto err;
  2479. }
  2480. vsi = pf->vsi[vf->lan_vsi_idx];
  2481. aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
  2482. /* send the response to the VF */
  2483. err:
  2484. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT,
  2485. aq_ret);
  2486. }
  2487. /**
  2488. * i40e_vc_get_rss_hena
  2489. * @vf: pointer to the VF info
  2490. * @msg: pointer to the msg buffer
  2491. * @msglen: msg length
  2492. *
  2493. * Return the RSS HENA bits allowed by the hardware
  2494. **/
  2495. static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2496. {
  2497. struct virtchnl_rss_hena *vrh = NULL;
  2498. struct i40e_pf *pf = vf->pf;
  2499. i40e_status aq_ret = 0;
  2500. int len = 0;
  2501. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  2502. aq_ret = I40E_ERR_PARAM;
  2503. goto err;
  2504. }
  2505. len = sizeof(struct virtchnl_rss_hena);
  2506. vrh = kzalloc(len, GFP_KERNEL);
  2507. if (!vrh) {
  2508. aq_ret = I40E_ERR_NO_MEMORY;
  2509. len = 0;
  2510. goto err;
  2511. }
  2512. vrh->hena = i40e_pf_get_default_rss_hena(pf);
  2513. err:
  2514. /* send the response back to the VF */
  2515. aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,
  2516. aq_ret, (u8 *)vrh, len);
  2517. kfree(vrh);
  2518. return aq_ret;
  2519. }
  2520. /**
  2521. * i40e_vc_set_rss_hena
  2522. * @vf: pointer to the VF info
  2523. * @msg: pointer to the msg buffer
  2524. * @msglen: msg length
  2525. *
  2526. * Set the RSS HENA bits for the VF
  2527. **/
  2528. static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
  2529. {
  2530. struct virtchnl_rss_hena *vrh =
  2531. (struct virtchnl_rss_hena *)msg;
  2532. struct i40e_pf *pf = vf->pf;
  2533. struct i40e_hw *hw = &pf->hw;
  2534. i40e_status aq_ret = 0;
  2535. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  2536. aq_ret = I40E_ERR_PARAM;
  2537. goto err;
  2538. }
  2539. i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
  2540. i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
  2541. (u32)(vrh->hena >> 32));
  2542. /* send the response to the VF */
  2543. err:
  2544. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, aq_ret);
  2545. }
  2546. /**
  2547. * i40e_vc_enable_vlan_stripping
  2548. * @vf: pointer to the VF info
  2549. * @msg: pointer to the msg buffer
  2550. * @msglen: msg length
  2551. *
  2552. * Enable vlan header stripping for the VF
  2553. **/
  2554. static int i40e_vc_enable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
  2555. u16 msglen)
  2556. {
  2557. struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
  2558. i40e_status aq_ret = 0;
  2559. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  2560. aq_ret = I40E_ERR_PARAM;
  2561. goto err;
  2562. }
  2563. i40e_vlan_stripping_enable(vsi);
  2564. /* send the response to the VF */
  2565. err:
  2566. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
  2567. aq_ret);
  2568. }
  2569. /**
  2570. * i40e_vc_disable_vlan_stripping
  2571. * @vf: pointer to the VF info
  2572. * @msg: pointer to the msg buffer
  2573. * @msglen: msg length
  2574. *
  2575. * Disable vlan header stripping for the VF
  2576. **/
  2577. static int i40e_vc_disable_vlan_stripping(struct i40e_vf *vf, u8 *msg,
  2578. u16 msglen)
  2579. {
  2580. struct i40e_vsi *vsi = vf->pf->vsi[vf->lan_vsi_idx];
  2581. i40e_status aq_ret = 0;
  2582. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  2583. aq_ret = I40E_ERR_PARAM;
  2584. goto err;
  2585. }
  2586. i40e_vlan_stripping_disable(vsi);
  2587. /* send the response to the VF */
  2588. err:
  2589. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
  2590. aq_ret);
  2591. }
  2592. /**
  2593. * i40e_validate_cloud_filter
  2594. * @mask: mask for TC filter
  2595. * @data: data for TC filter
  2596. *
  2597. * This function validates cloud filter programmed as TC filter for ADq
  2598. **/
  2599. static int i40e_validate_cloud_filter(struct i40e_vf *vf,
  2600. struct virtchnl_filter *tc_filter)
  2601. {
  2602. struct virtchnl_l4_spec mask = tc_filter->mask.tcp_spec;
  2603. struct virtchnl_l4_spec data = tc_filter->data.tcp_spec;
  2604. struct i40e_pf *pf = vf->pf;
  2605. struct i40e_vsi *vsi = NULL;
  2606. struct i40e_mac_filter *f;
  2607. struct hlist_node *h;
  2608. bool found = false;
  2609. int bkt;
  2610. if (!tc_filter->action) {
  2611. dev_info(&pf->pdev->dev,
  2612. "VF %d: Currently ADq doesn't support Drop Action\n",
  2613. vf->vf_id);
  2614. goto err;
  2615. }
  2616. /* action_meta is TC number here to which the filter is applied */
  2617. if (!tc_filter->action_meta ||
  2618. tc_filter->action_meta > I40E_MAX_VF_VSI) {
  2619. dev_info(&pf->pdev->dev, "VF %d: Invalid TC number %u\n",
  2620. vf->vf_id, tc_filter->action_meta);
  2621. goto err;
  2622. }
  2623. /* Check filter if it's programmed for advanced mode or basic mode.
  2624. * There are two ADq modes (for VF only),
  2625. * 1. Basic mode: intended to allow as many filter options as possible
  2626. * to be added to a VF in Non-trusted mode. Main goal is
  2627. * to add filters to its own MAC and VLAN id.
  2628. * 2. Advanced mode: is for allowing filters to be applied other than
  2629. * its own MAC or VLAN. This mode requires the VF to be
  2630. * Trusted.
  2631. */
  2632. if (mask.dst_mac[0] && !mask.dst_ip[0]) {
  2633. vsi = pf->vsi[vf->lan_vsi_idx];
  2634. f = i40e_find_mac(vsi, data.dst_mac);
  2635. if (!f) {
  2636. dev_info(&pf->pdev->dev,
  2637. "Destination MAC %pM doesn't belong to VF %d\n",
  2638. data.dst_mac, vf->vf_id);
  2639. goto err;
  2640. }
  2641. if (mask.vlan_id) {
  2642. hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f,
  2643. hlist) {
  2644. if (f->vlan == ntohs(data.vlan_id)) {
  2645. found = true;
  2646. break;
  2647. }
  2648. }
  2649. if (!found) {
  2650. dev_info(&pf->pdev->dev,
  2651. "VF %d doesn't have any VLAN id %u\n",
  2652. vf->vf_id, ntohs(data.vlan_id));
  2653. goto err;
  2654. }
  2655. }
  2656. } else {
  2657. /* Check if VF is trusted */
  2658. if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
  2659. dev_err(&pf->pdev->dev,
  2660. "VF %d not trusted, make VF trusted to add advanced mode ADq cloud filters\n",
  2661. vf->vf_id);
  2662. return I40E_ERR_CONFIG;
  2663. }
  2664. }
  2665. if (mask.dst_mac[0] & data.dst_mac[0]) {
  2666. if (is_broadcast_ether_addr(data.dst_mac) ||
  2667. is_zero_ether_addr(data.dst_mac)) {
  2668. dev_info(&pf->pdev->dev, "VF %d: Invalid Dest MAC addr %pM\n",
  2669. vf->vf_id, data.dst_mac);
  2670. goto err;
  2671. }
  2672. }
  2673. if (mask.src_mac[0] & data.src_mac[0]) {
  2674. if (is_broadcast_ether_addr(data.src_mac) ||
  2675. is_zero_ether_addr(data.src_mac)) {
  2676. dev_info(&pf->pdev->dev, "VF %d: Invalid Source MAC addr %pM\n",
  2677. vf->vf_id, data.src_mac);
  2678. goto err;
  2679. }
  2680. }
  2681. if (mask.dst_port & data.dst_port) {
  2682. if (!data.dst_port || be16_to_cpu(data.dst_port) > 0xFFFF) {
  2683. dev_info(&pf->pdev->dev, "VF %d: Invalid Dest port\n",
  2684. vf->vf_id);
  2685. goto err;
  2686. }
  2687. }
  2688. if (mask.src_port & data.src_port) {
  2689. if (!data.src_port || be16_to_cpu(data.src_port) > 0xFFFF) {
  2690. dev_info(&pf->pdev->dev, "VF %d: Invalid Source port\n",
  2691. vf->vf_id);
  2692. goto err;
  2693. }
  2694. }
  2695. if (tc_filter->flow_type != VIRTCHNL_TCP_V6_FLOW &&
  2696. tc_filter->flow_type != VIRTCHNL_TCP_V4_FLOW) {
  2697. dev_info(&pf->pdev->dev, "VF %d: Invalid Flow type\n",
  2698. vf->vf_id);
  2699. goto err;
  2700. }
  2701. if (mask.vlan_id & data.vlan_id) {
  2702. if (ntohs(data.vlan_id) > I40E_MAX_VLANID) {
  2703. dev_info(&pf->pdev->dev, "VF %d: invalid VLAN ID\n",
  2704. vf->vf_id);
  2705. goto err;
  2706. }
  2707. }
  2708. return I40E_SUCCESS;
  2709. err:
  2710. return I40E_ERR_CONFIG;
  2711. }
  2712. /**
  2713. * i40e_find_vsi_from_seid - searches for the vsi with the given seid
  2714. * @vf: pointer to the VF info
  2715. * @seid - seid of the vsi it is searching for
  2716. **/
  2717. static struct i40e_vsi *i40e_find_vsi_from_seid(struct i40e_vf *vf, u16 seid)
  2718. {
  2719. struct i40e_pf *pf = vf->pf;
  2720. struct i40e_vsi *vsi = NULL;
  2721. int i;
  2722. for (i = 0; i < vf->num_tc ; i++) {
  2723. vsi = i40e_find_vsi_from_id(pf, vf->ch[i].vsi_id);
  2724. if (vsi && vsi->seid == seid)
  2725. return vsi;
  2726. }
  2727. return NULL;
  2728. }
  2729. /**
  2730. * i40e_del_all_cloud_filters
  2731. * @vf: pointer to the VF info
  2732. *
  2733. * This function deletes all cloud filters
  2734. **/
  2735. static void i40e_del_all_cloud_filters(struct i40e_vf *vf)
  2736. {
  2737. struct i40e_cloud_filter *cfilter = NULL;
  2738. struct i40e_pf *pf = vf->pf;
  2739. struct i40e_vsi *vsi = NULL;
  2740. struct hlist_node *node;
  2741. int ret;
  2742. hlist_for_each_entry_safe(cfilter, node,
  2743. &vf->cloud_filter_list, cloud_node) {
  2744. vsi = i40e_find_vsi_from_seid(vf, cfilter->seid);
  2745. if (!vsi) {
  2746. dev_err(&pf->pdev->dev, "VF %d: no VSI found for matching %u seid, can't delete cloud filter\n",
  2747. vf->vf_id, cfilter->seid);
  2748. continue;
  2749. }
  2750. if (cfilter->dst_port)
  2751. ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
  2752. false);
  2753. else
  2754. ret = i40e_add_del_cloud_filter(vsi, cfilter, false);
  2755. if (ret)
  2756. dev_err(&pf->pdev->dev,
  2757. "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
  2758. vf->vf_id, i40e_stat_str(&pf->hw, ret),
  2759. i40e_aq_str(&pf->hw,
  2760. pf->hw.aq.asq_last_status));
  2761. hlist_del(&cfilter->cloud_node);
  2762. kfree(cfilter);
  2763. vf->num_cloud_filters--;
  2764. }
  2765. }
  2766. /**
  2767. * i40e_vc_del_cloud_filter
  2768. * @vf: pointer to the VF info
  2769. * @msg: pointer to the msg buffer
  2770. *
  2771. * This function deletes a cloud filter programmed as TC filter for ADq
  2772. **/
  2773. static int i40e_vc_del_cloud_filter(struct i40e_vf *vf, u8 *msg)
  2774. {
  2775. struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
  2776. struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
  2777. struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
  2778. struct i40e_cloud_filter cfilter, *cf = NULL;
  2779. struct i40e_pf *pf = vf->pf;
  2780. struct i40e_vsi *vsi = NULL;
  2781. struct hlist_node *node;
  2782. i40e_status aq_ret = 0;
  2783. int i, ret;
  2784. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  2785. aq_ret = I40E_ERR_PARAM;
  2786. goto err;
  2787. }
  2788. if (!vf->adq_enabled) {
  2789. dev_info(&pf->pdev->dev,
  2790. "VF %d: ADq not enabled, can't apply cloud filter\n",
  2791. vf->vf_id);
  2792. aq_ret = I40E_ERR_PARAM;
  2793. goto err;
  2794. }
  2795. if (i40e_validate_cloud_filter(vf, vcf)) {
  2796. dev_info(&pf->pdev->dev,
  2797. "VF %d: Invalid input, can't apply cloud filter\n",
  2798. vf->vf_id);
  2799. aq_ret = I40E_ERR_PARAM;
  2800. goto err;
  2801. }
  2802. memset(&cfilter, 0, sizeof(cfilter));
  2803. /* parse destination mac address */
  2804. for (i = 0; i < ETH_ALEN; i++)
  2805. cfilter.dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
  2806. /* parse source mac address */
  2807. for (i = 0; i < ETH_ALEN; i++)
  2808. cfilter.src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
  2809. cfilter.vlan_id = mask.vlan_id & tcf.vlan_id;
  2810. cfilter.dst_port = mask.dst_port & tcf.dst_port;
  2811. cfilter.src_port = mask.src_port & tcf.src_port;
  2812. switch (vcf->flow_type) {
  2813. case VIRTCHNL_TCP_V4_FLOW:
  2814. cfilter.n_proto = ETH_P_IP;
  2815. if (mask.dst_ip[0] & tcf.dst_ip[0])
  2816. memcpy(&cfilter.ip.v4.dst_ip, tcf.dst_ip,
  2817. ARRAY_SIZE(tcf.dst_ip));
  2818. else if (mask.src_ip[0] & tcf.dst_ip[0])
  2819. memcpy(&cfilter.ip.v4.src_ip, tcf.src_ip,
  2820. ARRAY_SIZE(tcf.dst_ip));
  2821. break;
  2822. case VIRTCHNL_TCP_V6_FLOW:
  2823. cfilter.n_proto = ETH_P_IPV6;
  2824. if (mask.dst_ip[3] & tcf.dst_ip[3])
  2825. memcpy(&cfilter.ip.v6.dst_ip6, tcf.dst_ip,
  2826. sizeof(cfilter.ip.v6.dst_ip6));
  2827. if (mask.src_ip[3] & tcf.src_ip[3])
  2828. memcpy(&cfilter.ip.v6.src_ip6, tcf.src_ip,
  2829. sizeof(cfilter.ip.v6.src_ip6));
  2830. break;
  2831. default:
  2832. /* TC filter can be configured based on different combinations
  2833. * and in this case IP is not a part of filter config
  2834. */
  2835. dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
  2836. vf->vf_id);
  2837. }
  2838. /* get the vsi to which the tc belongs to */
  2839. vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
  2840. cfilter.seid = vsi->seid;
  2841. cfilter.flags = vcf->field_flags;
  2842. /* Deleting TC filter */
  2843. if (tcf.dst_port)
  2844. ret = i40e_add_del_cloud_filter_big_buf(vsi, &cfilter, false);
  2845. else
  2846. ret = i40e_add_del_cloud_filter(vsi, &cfilter, false);
  2847. if (ret) {
  2848. dev_err(&pf->pdev->dev,
  2849. "VF %d: Failed to delete cloud filter, err %s aq_err %s\n",
  2850. vf->vf_id, i40e_stat_str(&pf->hw, ret),
  2851. i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
  2852. goto err;
  2853. }
  2854. hlist_for_each_entry_safe(cf, node,
  2855. &vf->cloud_filter_list, cloud_node) {
  2856. if (cf->seid != cfilter.seid)
  2857. continue;
  2858. if (mask.dst_port)
  2859. if (cfilter.dst_port != cf->dst_port)
  2860. continue;
  2861. if (mask.dst_mac[0])
  2862. if (!ether_addr_equal(cf->src_mac, cfilter.src_mac))
  2863. continue;
  2864. /* for ipv4 data to be valid, only first byte of mask is set */
  2865. if (cfilter.n_proto == ETH_P_IP && mask.dst_ip[0])
  2866. if (memcmp(&cfilter.ip.v4.dst_ip, &cf->ip.v4.dst_ip,
  2867. ARRAY_SIZE(tcf.dst_ip)))
  2868. continue;
  2869. /* for ipv6, mask is set for all sixteen bytes (4 words) */
  2870. if (cfilter.n_proto == ETH_P_IPV6 && mask.dst_ip[3])
  2871. if (memcmp(&cfilter.ip.v6.dst_ip6, &cf->ip.v6.dst_ip6,
  2872. sizeof(cfilter.ip.v6.src_ip6)))
  2873. continue;
  2874. if (mask.vlan_id)
  2875. if (cfilter.vlan_id != cf->vlan_id)
  2876. continue;
  2877. hlist_del(&cf->cloud_node);
  2878. kfree(cf);
  2879. vf->num_cloud_filters--;
  2880. }
  2881. err:
  2882. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DEL_CLOUD_FILTER,
  2883. aq_ret);
  2884. }
  2885. /**
  2886. * i40e_vc_add_cloud_filter
  2887. * @vf: pointer to the VF info
  2888. * @msg: pointer to the msg buffer
  2889. *
  2890. * This function adds a cloud filter programmed as TC filter for ADq
  2891. **/
  2892. static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg)
  2893. {
  2894. struct virtchnl_filter *vcf = (struct virtchnl_filter *)msg;
  2895. struct virtchnl_l4_spec mask = vcf->mask.tcp_spec;
  2896. struct virtchnl_l4_spec tcf = vcf->data.tcp_spec;
  2897. struct i40e_cloud_filter *cfilter = NULL;
  2898. struct i40e_pf *pf = vf->pf;
  2899. struct i40e_vsi *vsi = NULL;
  2900. i40e_status aq_ret = 0;
  2901. int i, ret;
  2902. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  2903. aq_ret = I40E_ERR_PARAM;
  2904. goto err;
  2905. }
  2906. if (!vf->adq_enabled) {
  2907. dev_info(&pf->pdev->dev,
  2908. "VF %d: ADq is not enabled, can't apply cloud filter\n",
  2909. vf->vf_id);
  2910. aq_ret = I40E_ERR_PARAM;
  2911. goto err;
  2912. }
  2913. if (i40e_validate_cloud_filter(vf, vcf)) {
  2914. dev_info(&pf->pdev->dev,
  2915. "VF %d: Invalid input/s, can't apply cloud filter\n",
  2916. vf->vf_id);
  2917. aq_ret = I40E_ERR_PARAM;
  2918. goto err;
  2919. }
  2920. cfilter = kzalloc(sizeof(*cfilter), GFP_KERNEL);
  2921. if (!cfilter)
  2922. return -ENOMEM;
  2923. /* parse destination mac address */
  2924. for (i = 0; i < ETH_ALEN; i++)
  2925. cfilter->dst_mac[i] = mask.dst_mac[i] & tcf.dst_mac[i];
  2926. /* parse source mac address */
  2927. for (i = 0; i < ETH_ALEN; i++)
  2928. cfilter->src_mac[i] = mask.src_mac[i] & tcf.src_mac[i];
  2929. cfilter->vlan_id = mask.vlan_id & tcf.vlan_id;
  2930. cfilter->dst_port = mask.dst_port & tcf.dst_port;
  2931. cfilter->src_port = mask.src_port & tcf.src_port;
  2932. switch (vcf->flow_type) {
  2933. case VIRTCHNL_TCP_V4_FLOW:
  2934. cfilter->n_proto = ETH_P_IP;
  2935. if (mask.dst_ip[0] & tcf.dst_ip[0])
  2936. memcpy(&cfilter->ip.v4.dst_ip, tcf.dst_ip,
  2937. ARRAY_SIZE(tcf.dst_ip));
  2938. else if (mask.src_ip[0] & tcf.dst_ip[0])
  2939. memcpy(&cfilter->ip.v4.src_ip, tcf.src_ip,
  2940. ARRAY_SIZE(tcf.dst_ip));
  2941. break;
  2942. case VIRTCHNL_TCP_V6_FLOW:
  2943. cfilter->n_proto = ETH_P_IPV6;
  2944. if (mask.dst_ip[3] & tcf.dst_ip[3])
  2945. memcpy(&cfilter->ip.v6.dst_ip6, tcf.dst_ip,
  2946. sizeof(cfilter->ip.v6.dst_ip6));
  2947. if (mask.src_ip[3] & tcf.src_ip[3])
  2948. memcpy(&cfilter->ip.v6.src_ip6, tcf.src_ip,
  2949. sizeof(cfilter->ip.v6.src_ip6));
  2950. break;
  2951. default:
  2952. /* TC filter can be configured based on different combinations
  2953. * and in this case IP is not a part of filter config
  2954. */
  2955. dev_info(&pf->pdev->dev, "VF %d: Flow type not configured\n",
  2956. vf->vf_id);
  2957. }
  2958. /* get the VSI to which the TC belongs to */
  2959. vsi = pf->vsi[vf->ch[vcf->action_meta].vsi_idx];
  2960. cfilter->seid = vsi->seid;
  2961. cfilter->flags = vcf->field_flags;
  2962. /* Adding cloud filter programmed as TC filter */
  2963. if (tcf.dst_port)
  2964. ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter, true);
  2965. else
  2966. ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
  2967. if (ret) {
  2968. dev_err(&pf->pdev->dev,
  2969. "VF %d: Failed to add cloud filter, err %s aq_err %s\n",
  2970. vf->vf_id, i40e_stat_str(&pf->hw, ret),
  2971. i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
  2972. goto err;
  2973. }
  2974. INIT_HLIST_NODE(&cfilter->cloud_node);
  2975. hlist_add_head(&cfilter->cloud_node, &vf->cloud_filter_list);
  2976. vf->num_cloud_filters++;
  2977. err:
  2978. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ADD_CLOUD_FILTER,
  2979. aq_ret);
  2980. }
  2981. /**
  2982. * i40e_vc_add_qch_msg: Add queue channel and enable ADq
  2983. * @vf: pointer to the VF info
  2984. * @msg: pointer to the msg buffer
  2985. **/
  2986. static int i40e_vc_add_qch_msg(struct i40e_vf *vf, u8 *msg)
  2987. {
  2988. struct virtchnl_tc_info *tci =
  2989. (struct virtchnl_tc_info *)msg;
  2990. struct i40e_pf *pf = vf->pf;
  2991. struct i40e_link_status *ls = &pf->hw.phy.link_info;
  2992. int i, adq_request_qps = 0, speed = 0;
  2993. i40e_status aq_ret = 0;
  2994. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  2995. aq_ret = I40E_ERR_PARAM;
  2996. goto err;
  2997. }
  2998. /* ADq cannot be applied if spoof check is ON */
  2999. if (vf->spoofchk) {
  3000. dev_err(&pf->pdev->dev,
  3001. "Spoof check is ON, turn it OFF to enable ADq\n");
  3002. aq_ret = I40E_ERR_PARAM;
  3003. goto err;
  3004. }
  3005. if (!(vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ADQ)) {
  3006. dev_err(&pf->pdev->dev,
  3007. "VF %d attempting to enable ADq, but hasn't properly negotiated that capability\n",
  3008. vf->vf_id);
  3009. aq_ret = I40E_ERR_PARAM;
  3010. goto err;
  3011. }
  3012. /* max number of traffic classes for VF currently capped at 4 */
  3013. if (!tci->num_tc || tci->num_tc > I40E_MAX_VF_VSI) {
  3014. dev_err(&pf->pdev->dev,
  3015. "VF %d trying to set %u TCs, valid range 1-4 TCs per VF\n",
  3016. vf->vf_id, tci->num_tc);
  3017. aq_ret = I40E_ERR_PARAM;
  3018. goto err;
  3019. }
  3020. /* validate queues for each TC */
  3021. for (i = 0; i < tci->num_tc; i++)
  3022. if (!tci->list[i].count ||
  3023. tci->list[i].count > I40E_DEFAULT_QUEUES_PER_VF) {
  3024. dev_err(&pf->pdev->dev,
  3025. "VF %d: TC %d trying to set %u queues, valid range 1-4 queues per TC\n",
  3026. vf->vf_id, i, tci->list[i].count);
  3027. aq_ret = I40E_ERR_PARAM;
  3028. goto err;
  3029. }
  3030. /* need Max VF queues but already have default number of queues */
  3031. adq_request_qps = I40E_MAX_VF_QUEUES - I40E_DEFAULT_QUEUES_PER_VF;
  3032. if (pf->queues_left < adq_request_qps) {
  3033. dev_err(&pf->pdev->dev,
  3034. "No queues left to allocate to VF %d\n",
  3035. vf->vf_id);
  3036. aq_ret = I40E_ERR_PARAM;
  3037. goto err;
  3038. } else {
  3039. /* we need to allocate max VF queues to enable ADq so as to
  3040. * make sure ADq enabled VF always gets back queues when it
  3041. * goes through a reset.
  3042. */
  3043. vf->num_queue_pairs = I40E_MAX_VF_QUEUES;
  3044. }
  3045. /* get link speed in MB to validate rate limit */
  3046. switch (ls->link_speed) {
  3047. case VIRTCHNL_LINK_SPEED_100MB:
  3048. speed = SPEED_100;
  3049. break;
  3050. case VIRTCHNL_LINK_SPEED_1GB:
  3051. speed = SPEED_1000;
  3052. break;
  3053. case VIRTCHNL_LINK_SPEED_10GB:
  3054. speed = SPEED_10000;
  3055. break;
  3056. case VIRTCHNL_LINK_SPEED_20GB:
  3057. speed = SPEED_20000;
  3058. break;
  3059. case VIRTCHNL_LINK_SPEED_25GB:
  3060. speed = SPEED_25000;
  3061. break;
  3062. case VIRTCHNL_LINK_SPEED_40GB:
  3063. speed = SPEED_40000;
  3064. break;
  3065. default:
  3066. dev_err(&pf->pdev->dev,
  3067. "Cannot detect link speed\n");
  3068. aq_ret = I40E_ERR_PARAM;
  3069. goto err;
  3070. }
  3071. /* parse data from the queue channel info */
  3072. vf->num_tc = tci->num_tc;
  3073. for (i = 0; i < vf->num_tc; i++) {
  3074. if (tci->list[i].max_tx_rate) {
  3075. if (tci->list[i].max_tx_rate > speed) {
  3076. dev_err(&pf->pdev->dev,
  3077. "Invalid max tx rate %llu specified for VF %d.",
  3078. tci->list[i].max_tx_rate,
  3079. vf->vf_id);
  3080. aq_ret = I40E_ERR_PARAM;
  3081. goto err;
  3082. } else {
  3083. vf->ch[i].max_tx_rate =
  3084. tci->list[i].max_tx_rate;
  3085. }
  3086. }
  3087. vf->ch[i].num_qps = tci->list[i].count;
  3088. }
  3089. /* set this flag only after making sure all inputs are sane */
  3090. vf->adq_enabled = true;
  3091. /* num_req_queues is set when user changes number of queues via ethtool
  3092. * and this causes issue for default VSI(which depends on this variable)
  3093. * when ADq is enabled, hence reset it.
  3094. */
  3095. vf->num_req_queues = 0;
  3096. /* reset the VF in order to allocate resources */
  3097. i40e_vc_notify_vf_reset(vf);
  3098. i40e_reset_vf(vf, false);
  3099. return I40E_SUCCESS;
  3100. /* send the response to the VF */
  3101. err:
  3102. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_ENABLE_CHANNELS,
  3103. aq_ret);
  3104. }
  3105. /**
  3106. * i40e_vc_del_qch_msg
  3107. * @vf: pointer to the VF info
  3108. * @msg: pointer to the msg buffer
  3109. **/
  3110. static int i40e_vc_del_qch_msg(struct i40e_vf *vf, u8 *msg)
  3111. {
  3112. struct i40e_pf *pf = vf->pf;
  3113. i40e_status aq_ret = 0;
  3114. if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
  3115. aq_ret = I40E_ERR_PARAM;
  3116. goto err;
  3117. }
  3118. if (vf->adq_enabled) {
  3119. i40e_del_all_cloud_filters(vf);
  3120. i40e_del_qch(vf);
  3121. vf->adq_enabled = false;
  3122. vf->num_tc = 0;
  3123. dev_info(&pf->pdev->dev,
  3124. "Deleting Queue Channels and cloud filters for ADq on VF %d\n",
  3125. vf->vf_id);
  3126. } else {
  3127. dev_info(&pf->pdev->dev, "VF %d trying to delete queue channels but ADq isn't enabled\n",
  3128. vf->vf_id);
  3129. aq_ret = I40E_ERR_PARAM;
  3130. }
  3131. /* reset the VF in order to allocate resources */
  3132. i40e_vc_notify_vf_reset(vf);
  3133. i40e_reset_vf(vf, false);
  3134. return I40E_SUCCESS;
  3135. err:
  3136. return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_DISABLE_CHANNELS,
  3137. aq_ret);
  3138. }
  3139. /**
  3140. * i40e_vc_process_vf_msg
  3141. * @pf: pointer to the PF structure
  3142. * @vf_id: source VF id
  3143. * @msg: pointer to the msg buffer
  3144. * @msglen: msg length
  3145. * @msghndl: msg handle
  3146. *
  3147. * called from the common aeq/arq handler to
  3148. * process request from VF
  3149. **/
  3150. int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
  3151. u32 v_retval, u8 *msg, u16 msglen)
  3152. {
  3153. struct i40e_hw *hw = &pf->hw;
  3154. int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
  3155. struct i40e_vf *vf;
  3156. int ret;
  3157. pf->vf_aq_requests++;
  3158. if (local_vf_id >= pf->num_alloc_vfs)
  3159. return -EINVAL;
  3160. vf = &(pf->vf[local_vf_id]);
  3161. /* Check if VF is disabled. */
  3162. if (test_bit(I40E_VF_STATE_DISABLED, &vf->vf_states))
  3163. return I40E_ERR_PARAM;
  3164. /* perform basic checks on the msg */
  3165. ret = virtchnl_vc_validate_vf_msg(&vf->vf_ver, v_opcode, msg, msglen);
  3166. /* perform additional checks specific to this driver */
  3167. if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_KEY) {
  3168. struct virtchnl_rss_key *vrk = (struct virtchnl_rss_key *)msg;
  3169. if (vrk->key_len != I40E_HKEY_ARRAY_SIZE)
  3170. ret = -EINVAL;
  3171. } else if (v_opcode == VIRTCHNL_OP_CONFIG_RSS_LUT) {
  3172. struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg;
  3173. if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)
  3174. ret = -EINVAL;
  3175. }
  3176. if (ret) {
  3177. i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
  3178. dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
  3179. local_vf_id, v_opcode, msglen);
  3180. switch (ret) {
  3181. case VIRTCHNL_ERR_PARAM:
  3182. return -EPERM;
  3183. default:
  3184. return -EINVAL;
  3185. }
  3186. }
  3187. switch (v_opcode) {
  3188. case VIRTCHNL_OP_VERSION:
  3189. ret = i40e_vc_get_version_msg(vf, msg);
  3190. break;
  3191. case VIRTCHNL_OP_GET_VF_RESOURCES:
  3192. ret = i40e_vc_get_vf_resources_msg(vf, msg);
  3193. i40e_vc_notify_vf_link_state(vf);
  3194. break;
  3195. case VIRTCHNL_OP_RESET_VF:
  3196. i40e_vc_reset_vf_msg(vf);
  3197. ret = 0;
  3198. break;
  3199. case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
  3200. ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
  3201. break;
  3202. case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
  3203. ret = i40e_vc_config_queues_msg(vf, msg, msglen);
  3204. break;
  3205. case VIRTCHNL_OP_CONFIG_IRQ_MAP:
  3206. ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
  3207. break;
  3208. case VIRTCHNL_OP_ENABLE_QUEUES:
  3209. ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
  3210. i40e_vc_notify_vf_link_state(vf);
  3211. break;
  3212. case VIRTCHNL_OP_DISABLE_QUEUES:
  3213. ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
  3214. break;
  3215. case VIRTCHNL_OP_ADD_ETH_ADDR:
  3216. ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
  3217. break;
  3218. case VIRTCHNL_OP_DEL_ETH_ADDR:
  3219. ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
  3220. break;
  3221. case VIRTCHNL_OP_ADD_VLAN:
  3222. ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
  3223. break;
  3224. case VIRTCHNL_OP_DEL_VLAN:
  3225. ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
  3226. break;
  3227. case VIRTCHNL_OP_GET_STATS:
  3228. ret = i40e_vc_get_stats_msg(vf, msg, msglen);
  3229. break;
  3230. case VIRTCHNL_OP_IWARP:
  3231. ret = i40e_vc_iwarp_msg(vf, msg, msglen);
  3232. break;
  3233. case VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
  3234. ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
  3235. break;
  3236. case VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
  3237. ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
  3238. break;
  3239. case VIRTCHNL_OP_CONFIG_RSS_KEY:
  3240. ret = i40e_vc_config_rss_key(vf, msg, msglen);
  3241. break;
  3242. case VIRTCHNL_OP_CONFIG_RSS_LUT:
  3243. ret = i40e_vc_config_rss_lut(vf, msg, msglen);
  3244. break;
  3245. case VIRTCHNL_OP_GET_RSS_HENA_CAPS:
  3246. ret = i40e_vc_get_rss_hena(vf, msg, msglen);
  3247. break;
  3248. case VIRTCHNL_OP_SET_RSS_HENA:
  3249. ret = i40e_vc_set_rss_hena(vf, msg, msglen);
  3250. break;
  3251. case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
  3252. ret = i40e_vc_enable_vlan_stripping(vf, msg, msglen);
  3253. break;
  3254. case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
  3255. ret = i40e_vc_disable_vlan_stripping(vf, msg, msglen);
  3256. break;
  3257. case VIRTCHNL_OP_REQUEST_QUEUES:
  3258. ret = i40e_vc_request_queues_msg(vf, msg, msglen);
  3259. break;
  3260. case VIRTCHNL_OP_ENABLE_CHANNELS:
  3261. ret = i40e_vc_add_qch_msg(vf, msg);
  3262. break;
  3263. case VIRTCHNL_OP_DISABLE_CHANNELS:
  3264. ret = i40e_vc_del_qch_msg(vf, msg);
  3265. break;
  3266. case VIRTCHNL_OP_ADD_CLOUD_FILTER:
  3267. ret = i40e_vc_add_cloud_filter(vf, msg);
  3268. break;
  3269. case VIRTCHNL_OP_DEL_CLOUD_FILTER:
  3270. ret = i40e_vc_del_cloud_filter(vf, msg);
  3271. break;
  3272. case VIRTCHNL_OP_UNKNOWN:
  3273. default:
  3274. dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
  3275. v_opcode, local_vf_id);
  3276. ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
  3277. I40E_ERR_NOT_IMPLEMENTED);
  3278. break;
  3279. }
  3280. return ret;
  3281. }
  3282. /**
  3283. * i40e_vc_process_vflr_event
  3284. * @pf: pointer to the PF structure
  3285. *
  3286. * called from the vlfr irq handler to
  3287. * free up VF resources and state variables
  3288. **/
  3289. int i40e_vc_process_vflr_event(struct i40e_pf *pf)
  3290. {
  3291. struct i40e_hw *hw = &pf->hw;
  3292. u32 reg, reg_idx, bit_idx;
  3293. struct i40e_vf *vf;
  3294. int vf_id;
  3295. if (!test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
  3296. return 0;
  3297. /* Re-enable the VFLR interrupt cause here, before looking for which
  3298. * VF got reset. Otherwise, if another VF gets a reset while the
  3299. * first one is being processed, that interrupt will be lost, and
  3300. * that VF will be stuck in reset forever.
  3301. */
  3302. reg = rd32(hw, I40E_PFINT_ICR0_ENA);
  3303. reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
  3304. wr32(hw, I40E_PFINT_ICR0_ENA, reg);
  3305. i40e_flush(hw);
  3306. clear_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
  3307. for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
  3308. reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
  3309. bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
  3310. /* read GLGEN_VFLRSTAT register to find out the flr VFs */
  3311. vf = &pf->vf[vf_id];
  3312. reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
  3313. if (reg & BIT(bit_idx))
  3314. /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
  3315. i40e_reset_vf(vf, true);
  3316. }
  3317. return 0;
  3318. }
  3319. /**
  3320. * i40e_ndo_set_vf_mac
  3321. * @netdev: network interface device structure
  3322. * @vf_id: VF identifier
  3323. * @mac: mac address
  3324. *
  3325. * program VF mac address
  3326. **/
  3327. int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
  3328. {
  3329. struct i40e_netdev_priv *np = netdev_priv(netdev);
  3330. struct i40e_vsi *vsi = np->vsi;
  3331. struct i40e_pf *pf = vsi->back;
  3332. struct i40e_mac_filter *f;
  3333. struct i40e_vf *vf;
  3334. int ret = 0;
  3335. struct hlist_node *h;
  3336. int bkt;
  3337. u8 i;
  3338. /* validate the request */
  3339. if (vf_id >= pf->num_alloc_vfs) {
  3340. dev_err(&pf->pdev->dev,
  3341. "Invalid VF Identifier %d\n", vf_id);
  3342. ret = -EINVAL;
  3343. goto error_param;
  3344. }
  3345. vf = &(pf->vf[vf_id]);
  3346. vsi = pf->vsi[vf->lan_vsi_idx];
  3347. /* When the VF is resetting wait until it is done.
  3348. * It can take up to 200 milliseconds,
  3349. * but wait for up to 300 milliseconds to be safe.
  3350. */
  3351. for (i = 0; i < 15; i++) {
  3352. if (test_bit(I40E_VF_STATE_INIT, &vf->vf_states))
  3353. break;
  3354. msleep(20);
  3355. }
  3356. if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
  3357. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  3358. vf_id);
  3359. ret = -EAGAIN;
  3360. goto error_param;
  3361. }
  3362. if (is_multicast_ether_addr(mac)) {
  3363. dev_err(&pf->pdev->dev,
  3364. "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
  3365. ret = -EINVAL;
  3366. goto error_param;
  3367. }
  3368. /* Lock once because below invoked function add/del_filter requires
  3369. * mac_filter_hash_lock to be held
  3370. */
  3371. spin_lock_bh(&vsi->mac_filter_hash_lock);
  3372. /* delete the temporary mac address */
  3373. if (!is_zero_ether_addr(vf->default_lan_addr.addr))
  3374. i40e_del_mac_filter(vsi, vf->default_lan_addr.addr);
  3375. /* Delete all the filters for this VSI - we're going to kill it
  3376. * anyway.
  3377. */
  3378. hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
  3379. __i40e_del_filter(vsi, f);
  3380. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  3381. /* program mac filter */
  3382. if (i40e_sync_vsi_filters(vsi)) {
  3383. dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
  3384. ret = -EIO;
  3385. goto error_param;
  3386. }
  3387. ether_addr_copy(vf->default_lan_addr.addr, mac);
  3388. if (is_zero_ether_addr(mac)) {
  3389. vf->pf_set_mac = false;
  3390. dev_info(&pf->pdev->dev, "Removing MAC on VF %d\n", vf_id);
  3391. } else {
  3392. vf->pf_set_mac = true;
  3393. dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n",
  3394. mac, vf_id);
  3395. }
  3396. /* Force the VF driver stop so it has to reload with new MAC address */
  3397. i40e_vc_disable_vf(vf);
  3398. dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
  3399. error_param:
  3400. return ret;
  3401. }
  3402. /**
  3403. * i40e_vsi_has_vlans - True if VSI has configured VLANs
  3404. * @vsi: pointer to the vsi
  3405. *
  3406. * Check if a VSI has configured any VLANs. False if we have a port VLAN or if
  3407. * we have no configured VLANs. Do not call while holding the
  3408. * mac_filter_hash_lock.
  3409. */
  3410. static bool i40e_vsi_has_vlans(struct i40e_vsi *vsi)
  3411. {
  3412. bool have_vlans;
  3413. /* If we have a port VLAN, then the VSI cannot have any VLANs
  3414. * configured, as all MAC/VLAN filters will be assigned to the PVID.
  3415. */
  3416. if (vsi->info.pvid)
  3417. return false;
  3418. /* Since we don't have a PVID, we know that if the device is in VLAN
  3419. * mode it must be because of a VLAN filter configured on this VSI.
  3420. */
  3421. spin_lock_bh(&vsi->mac_filter_hash_lock);
  3422. have_vlans = i40e_is_vsi_in_vlan(vsi);
  3423. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  3424. return have_vlans;
  3425. }
  3426. /**
  3427. * i40e_ndo_set_vf_port_vlan
  3428. * @netdev: network interface device structure
  3429. * @vf_id: VF identifier
  3430. * @vlan_id: mac address
  3431. * @qos: priority setting
  3432. * @vlan_proto: vlan protocol
  3433. *
  3434. * program VF vlan id and/or qos
  3435. **/
  3436. int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
  3437. u16 vlan_id, u8 qos, __be16 vlan_proto)
  3438. {
  3439. u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
  3440. struct i40e_netdev_priv *np = netdev_priv(netdev);
  3441. struct i40e_pf *pf = np->vsi->back;
  3442. struct i40e_vsi *vsi;
  3443. struct i40e_vf *vf;
  3444. int ret = 0;
  3445. /* validate the request */
  3446. if (vf_id >= pf->num_alloc_vfs) {
  3447. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  3448. ret = -EINVAL;
  3449. goto error_pvid;
  3450. }
  3451. if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
  3452. dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
  3453. ret = -EINVAL;
  3454. goto error_pvid;
  3455. }
  3456. if (vlan_proto != htons(ETH_P_8021Q)) {
  3457. dev_err(&pf->pdev->dev, "VF VLAN protocol is not supported\n");
  3458. ret = -EPROTONOSUPPORT;
  3459. goto error_pvid;
  3460. }
  3461. vf = &(pf->vf[vf_id]);
  3462. vsi = pf->vsi[vf->lan_vsi_idx];
  3463. if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
  3464. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  3465. vf_id);
  3466. ret = -EAGAIN;
  3467. goto error_pvid;
  3468. }
  3469. if (le16_to_cpu(vsi->info.pvid) == vlanprio)
  3470. /* duplicate request, so just return success */
  3471. goto error_pvid;
  3472. if (i40e_vsi_has_vlans(vsi)) {
  3473. dev_err(&pf->pdev->dev,
  3474. "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
  3475. vf_id);
  3476. /* Administrator Error - knock the VF offline until he does
  3477. * the right thing by reconfiguring his network correctly
  3478. * and then reloading the VF driver.
  3479. */
  3480. i40e_vc_disable_vf(vf);
  3481. /* During reset the VF got a new VSI, so refresh the pointer. */
  3482. vsi = pf->vsi[vf->lan_vsi_idx];
  3483. }
  3484. /* Locked once because multiple functions below iterate list */
  3485. spin_lock_bh(&vsi->mac_filter_hash_lock);
  3486. /* Check for condition where there was already a port VLAN ID
  3487. * filter set and now it is being deleted by setting it to zero.
  3488. * Additionally check for the condition where there was a port
  3489. * VLAN but now there is a new and different port VLAN being set.
  3490. * Before deleting all the old VLAN filters we must add new ones
  3491. * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
  3492. * MAC addresses deleted.
  3493. */
  3494. if ((!(vlan_id || qos) ||
  3495. vlanprio != le16_to_cpu(vsi->info.pvid)) &&
  3496. vsi->info.pvid) {
  3497. ret = i40e_add_vlan_all_mac(vsi, I40E_VLAN_ANY);
  3498. if (ret) {
  3499. dev_info(&vsi->back->pdev->dev,
  3500. "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
  3501. vsi->back->hw.aq.asq_last_status);
  3502. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  3503. goto error_pvid;
  3504. }
  3505. }
  3506. if (vsi->info.pvid) {
  3507. /* remove all filters on the old VLAN */
  3508. i40e_rm_vlan_all_mac(vsi, (le16_to_cpu(vsi->info.pvid) &
  3509. VLAN_VID_MASK));
  3510. }
  3511. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  3512. if (vlan_id || qos)
  3513. ret = i40e_vsi_add_pvid(vsi, vlanprio);
  3514. else
  3515. i40e_vsi_remove_pvid(vsi);
  3516. spin_lock_bh(&vsi->mac_filter_hash_lock);
  3517. if (vlan_id) {
  3518. dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
  3519. vlan_id, qos, vf_id);
  3520. /* add new VLAN filter for each MAC */
  3521. ret = i40e_add_vlan_all_mac(vsi, vlan_id);
  3522. if (ret) {
  3523. dev_info(&vsi->back->pdev->dev,
  3524. "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
  3525. vsi->back->hw.aq.asq_last_status);
  3526. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  3527. goto error_pvid;
  3528. }
  3529. /* remove the previously added non-VLAN MAC filters */
  3530. i40e_rm_vlan_all_mac(vsi, I40E_VLAN_ANY);
  3531. }
  3532. spin_unlock_bh(&vsi->mac_filter_hash_lock);
  3533. /* Schedule the worker thread to take care of applying changes */
  3534. i40e_service_event_schedule(vsi->back);
  3535. if (ret) {
  3536. dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
  3537. goto error_pvid;
  3538. }
  3539. /* The Port VLAN needs to be saved across resets the same as the
  3540. * default LAN MAC address.
  3541. */
  3542. vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
  3543. ret = 0;
  3544. error_pvid:
  3545. return ret;
  3546. }
  3547. /**
  3548. * i40e_ndo_set_vf_bw
  3549. * @netdev: network interface device structure
  3550. * @vf_id: VF identifier
  3551. * @tx_rate: Tx rate
  3552. *
  3553. * configure VF Tx rate
  3554. **/
  3555. int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
  3556. int max_tx_rate)
  3557. {
  3558. struct i40e_netdev_priv *np = netdev_priv(netdev);
  3559. struct i40e_pf *pf = np->vsi->back;
  3560. struct i40e_vsi *vsi;
  3561. struct i40e_vf *vf;
  3562. int ret = 0;
  3563. /* validate the request */
  3564. if (vf_id >= pf->num_alloc_vfs) {
  3565. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
  3566. ret = -EINVAL;
  3567. goto error;
  3568. }
  3569. if (min_tx_rate) {
  3570. dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
  3571. min_tx_rate, vf_id);
  3572. return -EINVAL;
  3573. }
  3574. vf = &(pf->vf[vf_id]);
  3575. vsi = pf->vsi[vf->lan_vsi_idx];
  3576. if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
  3577. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  3578. vf_id);
  3579. ret = -EAGAIN;
  3580. goto error;
  3581. }
  3582. ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
  3583. if (ret)
  3584. goto error;
  3585. vf->tx_rate = max_tx_rate;
  3586. error:
  3587. return ret;
  3588. }
  3589. /**
  3590. * i40e_ndo_get_vf_config
  3591. * @netdev: network interface device structure
  3592. * @vf_id: VF identifier
  3593. * @ivi: VF configuration structure
  3594. *
  3595. * return VF configuration
  3596. **/
  3597. int i40e_ndo_get_vf_config(struct net_device *netdev,
  3598. int vf_id, struct ifla_vf_info *ivi)
  3599. {
  3600. struct i40e_netdev_priv *np = netdev_priv(netdev);
  3601. struct i40e_vsi *vsi = np->vsi;
  3602. struct i40e_pf *pf = vsi->back;
  3603. struct i40e_vf *vf;
  3604. int ret = 0;
  3605. /* validate the request */
  3606. if (vf_id >= pf->num_alloc_vfs) {
  3607. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  3608. ret = -EINVAL;
  3609. goto error_param;
  3610. }
  3611. vf = &(pf->vf[vf_id]);
  3612. /* first vsi is always the LAN vsi */
  3613. vsi = pf->vsi[vf->lan_vsi_idx];
  3614. if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
  3615. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  3616. vf_id);
  3617. ret = -EAGAIN;
  3618. goto error_param;
  3619. }
  3620. ivi->vf = vf_id;
  3621. ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
  3622. ivi->max_tx_rate = vf->tx_rate;
  3623. ivi->min_tx_rate = 0;
  3624. ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
  3625. ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
  3626. I40E_VLAN_PRIORITY_SHIFT;
  3627. if (vf->link_forced == false)
  3628. ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
  3629. else if (vf->link_up == true)
  3630. ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
  3631. else
  3632. ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
  3633. ivi->spoofchk = vf->spoofchk;
  3634. ivi->trusted = vf->trusted;
  3635. ret = 0;
  3636. error_param:
  3637. return ret;
  3638. }
  3639. /**
  3640. * i40e_ndo_set_vf_link_state
  3641. * @netdev: network interface device structure
  3642. * @vf_id: VF identifier
  3643. * @link: required link state
  3644. *
  3645. * Set the link state of a specified VF, regardless of physical link state
  3646. **/
  3647. int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
  3648. {
  3649. struct i40e_netdev_priv *np = netdev_priv(netdev);
  3650. struct i40e_pf *pf = np->vsi->back;
  3651. struct virtchnl_pf_event pfe;
  3652. struct i40e_hw *hw = &pf->hw;
  3653. struct i40e_vf *vf;
  3654. int abs_vf_id;
  3655. int ret = 0;
  3656. /* validate the request */
  3657. if (vf_id >= pf->num_alloc_vfs) {
  3658. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  3659. ret = -EINVAL;
  3660. goto error_out;
  3661. }
  3662. vf = &pf->vf[vf_id];
  3663. abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
  3664. pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;
  3665. pfe.severity = PF_EVENT_SEVERITY_INFO;
  3666. switch (link) {
  3667. case IFLA_VF_LINK_STATE_AUTO:
  3668. vf->link_forced = false;
  3669. pfe.event_data.link_event.link_status =
  3670. pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
  3671. pfe.event_data.link_event.link_speed =
  3672. (enum virtchnl_link_speed)
  3673. pf->hw.phy.link_info.link_speed;
  3674. break;
  3675. case IFLA_VF_LINK_STATE_ENABLE:
  3676. vf->link_forced = true;
  3677. vf->link_up = true;
  3678. pfe.event_data.link_event.link_status = true;
  3679. pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
  3680. break;
  3681. case IFLA_VF_LINK_STATE_DISABLE:
  3682. vf->link_forced = true;
  3683. vf->link_up = false;
  3684. pfe.event_data.link_event.link_status = false;
  3685. pfe.event_data.link_event.link_speed = 0;
  3686. break;
  3687. default:
  3688. ret = -EINVAL;
  3689. goto error_out;
  3690. }
  3691. /* Notify the VF of its new link state */
  3692. i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT,
  3693. 0, (u8 *)&pfe, sizeof(pfe), NULL);
  3694. error_out:
  3695. return ret;
  3696. }
  3697. /**
  3698. * i40e_ndo_set_vf_spoofchk
  3699. * @netdev: network interface device structure
  3700. * @vf_id: VF identifier
  3701. * @enable: flag to enable or disable feature
  3702. *
  3703. * Enable or disable VF spoof checking
  3704. **/
  3705. int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
  3706. {
  3707. struct i40e_netdev_priv *np = netdev_priv(netdev);
  3708. struct i40e_vsi *vsi = np->vsi;
  3709. struct i40e_pf *pf = vsi->back;
  3710. struct i40e_vsi_context ctxt;
  3711. struct i40e_hw *hw = &pf->hw;
  3712. struct i40e_vf *vf;
  3713. int ret = 0;
  3714. /* validate the request */
  3715. if (vf_id >= pf->num_alloc_vfs) {
  3716. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  3717. ret = -EINVAL;
  3718. goto out;
  3719. }
  3720. vf = &(pf->vf[vf_id]);
  3721. if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
  3722. dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
  3723. vf_id);
  3724. ret = -EAGAIN;
  3725. goto out;
  3726. }
  3727. if (enable == vf->spoofchk)
  3728. goto out;
  3729. vf->spoofchk = enable;
  3730. memset(&ctxt, 0, sizeof(ctxt));
  3731. ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
  3732. ctxt.pf_num = pf->hw.pf_id;
  3733. ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
  3734. if (enable)
  3735. ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
  3736. I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
  3737. ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
  3738. if (ret) {
  3739. dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
  3740. ret);
  3741. ret = -EIO;
  3742. }
  3743. out:
  3744. return ret;
  3745. }
  3746. /**
  3747. * i40e_ndo_set_vf_trust
  3748. * @netdev: network interface device structure of the pf
  3749. * @vf_id: VF identifier
  3750. * @setting: trust setting
  3751. *
  3752. * Enable or disable VF trust setting
  3753. **/
  3754. int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
  3755. {
  3756. struct i40e_netdev_priv *np = netdev_priv(netdev);
  3757. struct i40e_pf *pf = np->vsi->back;
  3758. struct i40e_vf *vf;
  3759. int ret = 0;
  3760. /* validate the request */
  3761. if (vf_id >= pf->num_alloc_vfs) {
  3762. dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
  3763. return -EINVAL;
  3764. }
  3765. if (pf->flags & I40E_FLAG_MFP_ENABLED) {
  3766. dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
  3767. return -EINVAL;
  3768. }
  3769. vf = &pf->vf[vf_id];
  3770. if (setting == vf->trusted)
  3771. goto out;
  3772. vf->trusted = setting;
  3773. i40e_vc_disable_vf(vf);
  3774. dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
  3775. vf_id, setting ? "" : "un");
  3776. if (vf->adq_enabled) {
  3777. if (!vf->trusted) {
  3778. dev_info(&pf->pdev->dev,
  3779. "VF %u no longer Trusted, deleting all cloud filters\n",
  3780. vf_id);
  3781. i40e_del_all_cloud_filters(vf);
  3782. }
  3783. }
  3784. out:
  3785. return ret;
  3786. }