bnxt_ethtool.c 74 KB

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  1. /* Broadcom NetXtreme-C/E network driver.
  2. *
  3. * Copyright (c) 2014-2016 Broadcom Corporation
  4. * Copyright (c) 2016-2017 Broadcom Limited
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation.
  9. */
  10. #include <linux/ctype.h>
  11. #include <linux/stringify.h>
  12. #include <linux/ethtool.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/pci.h>
  15. #include <linux/etherdevice.h>
  16. #include <linux/crc32.h>
  17. #include <linux/firmware.h>
  18. #include "bnxt_hsi.h"
  19. #include "bnxt.h"
  20. #include "bnxt_xdp.h"
  21. #include "bnxt_ethtool.h"
  22. #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
  23. #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
  24. #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
  25. #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  26. #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  27. static u32 bnxt_get_msglevel(struct net_device *dev)
  28. {
  29. struct bnxt *bp = netdev_priv(dev);
  30. return bp->msg_enable;
  31. }
  32. static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  33. {
  34. struct bnxt *bp = netdev_priv(dev);
  35. bp->msg_enable = value;
  36. }
  37. static int bnxt_get_coalesce(struct net_device *dev,
  38. struct ethtool_coalesce *coal)
  39. {
  40. struct bnxt *bp = netdev_priv(dev);
  41. struct bnxt_coal *hw_coal;
  42. u16 mult;
  43. memset(coal, 0, sizeof(*coal));
  44. coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
  45. hw_coal = &bp->rx_coal;
  46. mult = hw_coal->bufs_per_record;
  47. coal->rx_coalesce_usecs = hw_coal->coal_ticks;
  48. coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  49. coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  50. coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  51. hw_coal = &bp->tx_coal;
  52. mult = hw_coal->bufs_per_record;
  53. coal->tx_coalesce_usecs = hw_coal->coal_ticks;
  54. coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  55. coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  56. coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  57. coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  58. return 0;
  59. }
  60. static int bnxt_set_coalesce(struct net_device *dev,
  61. struct ethtool_coalesce *coal)
  62. {
  63. struct bnxt *bp = netdev_priv(dev);
  64. bool update_stats = false;
  65. struct bnxt_coal *hw_coal;
  66. int rc = 0;
  67. u16 mult;
  68. if (coal->use_adaptive_rx_coalesce) {
  69. bp->flags |= BNXT_FLAG_DIM;
  70. } else {
  71. if (bp->flags & BNXT_FLAG_DIM) {
  72. bp->flags &= ~(BNXT_FLAG_DIM);
  73. goto reset_coalesce;
  74. }
  75. }
  76. hw_coal = &bp->rx_coal;
  77. mult = hw_coal->bufs_per_record;
  78. hw_coal->coal_ticks = coal->rx_coalesce_usecs;
  79. hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
  80. hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  81. hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
  82. hw_coal = &bp->tx_coal;
  83. mult = hw_coal->bufs_per_record;
  84. hw_coal->coal_ticks = coal->tx_coalesce_usecs;
  85. hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
  86. hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
  87. hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
  88. if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
  89. u32 stats_ticks = coal->stats_block_coalesce_usecs;
  90. /* Allow 0, which means disable. */
  91. if (stats_ticks)
  92. stats_ticks = clamp_t(u32, stats_ticks,
  93. BNXT_MIN_STATS_COAL_TICKS,
  94. BNXT_MAX_STATS_COAL_TICKS);
  95. stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
  96. bp->stats_coal_ticks = stats_ticks;
  97. update_stats = true;
  98. }
  99. reset_coalesce:
  100. if (netif_running(dev)) {
  101. if (update_stats) {
  102. rc = bnxt_close_nic(bp, true, false);
  103. if (!rc)
  104. rc = bnxt_open_nic(bp, true, false);
  105. } else {
  106. rc = bnxt_hwrm_set_coal(bp);
  107. }
  108. }
  109. return rc;
  110. }
  111. #define BNXT_NUM_STATS 21
  112. #define BNXT_RX_STATS_ENTRY(counter) \
  113. { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
  114. #define BNXT_TX_STATS_ENTRY(counter) \
  115. { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
  116. #define BNXT_RX_STATS_EXT_ENTRY(counter) \
  117. { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
  118. static const struct {
  119. long offset;
  120. char string[ETH_GSTRING_LEN];
  121. } bnxt_port_stats_arr[] = {
  122. BNXT_RX_STATS_ENTRY(rx_64b_frames),
  123. BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
  124. BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
  125. BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
  126. BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
  127. BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
  128. BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
  129. BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
  130. BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
  131. BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
  132. BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
  133. BNXT_RX_STATS_ENTRY(rx_total_frames),
  134. BNXT_RX_STATS_ENTRY(rx_ucast_frames),
  135. BNXT_RX_STATS_ENTRY(rx_mcast_frames),
  136. BNXT_RX_STATS_ENTRY(rx_bcast_frames),
  137. BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
  138. BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
  139. BNXT_RX_STATS_ENTRY(rx_pause_frames),
  140. BNXT_RX_STATS_ENTRY(rx_pfc_frames),
  141. BNXT_RX_STATS_ENTRY(rx_align_err_frames),
  142. BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
  143. BNXT_RX_STATS_ENTRY(rx_jbr_frames),
  144. BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
  145. BNXT_RX_STATS_ENTRY(rx_tagged_frames),
  146. BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
  147. BNXT_RX_STATS_ENTRY(rx_good_frames),
  148. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
  149. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
  150. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
  151. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
  152. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
  153. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
  154. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
  155. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
  156. BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
  157. BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
  158. BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
  159. BNXT_RX_STATS_ENTRY(rx_bytes),
  160. BNXT_RX_STATS_ENTRY(rx_runt_bytes),
  161. BNXT_RX_STATS_ENTRY(rx_runt_frames),
  162. BNXT_RX_STATS_ENTRY(rx_stat_discard),
  163. BNXT_RX_STATS_ENTRY(rx_stat_err),
  164. BNXT_TX_STATS_ENTRY(tx_64b_frames),
  165. BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
  166. BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
  167. BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
  168. BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
  169. BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
  170. BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
  171. BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
  172. BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
  173. BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
  174. BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
  175. BNXT_TX_STATS_ENTRY(tx_good_frames),
  176. BNXT_TX_STATS_ENTRY(tx_total_frames),
  177. BNXT_TX_STATS_ENTRY(tx_ucast_frames),
  178. BNXT_TX_STATS_ENTRY(tx_mcast_frames),
  179. BNXT_TX_STATS_ENTRY(tx_bcast_frames),
  180. BNXT_TX_STATS_ENTRY(tx_pause_frames),
  181. BNXT_TX_STATS_ENTRY(tx_pfc_frames),
  182. BNXT_TX_STATS_ENTRY(tx_jabber_frames),
  183. BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
  184. BNXT_TX_STATS_ENTRY(tx_err),
  185. BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
  186. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
  187. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
  188. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
  189. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
  190. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
  191. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
  192. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
  193. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
  194. BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
  195. BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
  196. BNXT_TX_STATS_ENTRY(tx_total_collisions),
  197. BNXT_TX_STATS_ENTRY(tx_bytes),
  198. BNXT_TX_STATS_ENTRY(tx_xthol_frames),
  199. BNXT_TX_STATS_ENTRY(tx_stat_discard),
  200. BNXT_TX_STATS_ENTRY(tx_stat_error),
  201. };
  202. static const struct {
  203. long offset;
  204. char string[ETH_GSTRING_LEN];
  205. } bnxt_port_stats_ext_arr[] = {
  206. BNXT_RX_STATS_EXT_ENTRY(link_down_events),
  207. BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
  208. BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
  209. BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
  210. BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
  211. };
  212. #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
  213. #define BNXT_NUM_PORT_STATS_EXT ARRAY_SIZE(bnxt_port_stats_ext_arr)
  214. static int bnxt_get_num_stats(struct bnxt *bp)
  215. {
  216. int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  217. if (bp->flags & BNXT_FLAG_PORT_STATS)
  218. num_stats += BNXT_NUM_PORT_STATS;
  219. if (bp->flags & BNXT_FLAG_PORT_STATS_EXT)
  220. num_stats += BNXT_NUM_PORT_STATS_EXT;
  221. return num_stats;
  222. }
  223. static int bnxt_get_sset_count(struct net_device *dev, int sset)
  224. {
  225. struct bnxt *bp = netdev_priv(dev);
  226. switch (sset) {
  227. case ETH_SS_STATS:
  228. return bnxt_get_num_stats(bp);
  229. case ETH_SS_TEST:
  230. if (!bp->num_tests)
  231. return -EOPNOTSUPP;
  232. return bp->num_tests;
  233. default:
  234. return -EOPNOTSUPP;
  235. }
  236. }
  237. static void bnxt_get_ethtool_stats(struct net_device *dev,
  238. struct ethtool_stats *stats, u64 *buf)
  239. {
  240. u32 i, j = 0;
  241. struct bnxt *bp = netdev_priv(dev);
  242. u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
  243. if (!bp->bnapi)
  244. return;
  245. for (i = 0; i < bp->cp_nr_rings; i++) {
  246. struct bnxt_napi *bnapi = bp->bnapi[i];
  247. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  248. __le64 *hw_stats = (__le64 *)cpr->hw_stats;
  249. int k;
  250. for (k = 0; k < stat_fields; j++, k++)
  251. buf[j] = le64_to_cpu(hw_stats[k]);
  252. buf[j++] = cpr->rx_l4_csum_errors;
  253. }
  254. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  255. __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
  256. for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
  257. buf[j] = le64_to_cpu(*(port_stats +
  258. bnxt_port_stats_arr[i].offset));
  259. }
  260. }
  261. if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
  262. __le64 *port_stats_ext = (__le64 *)bp->hw_rx_port_stats_ext;
  263. for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++, j++) {
  264. buf[j] = le64_to_cpu(*(port_stats_ext +
  265. bnxt_port_stats_ext_arr[i].offset));
  266. }
  267. }
  268. }
  269. static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  270. {
  271. struct bnxt *bp = netdev_priv(dev);
  272. u32 i;
  273. switch (stringset) {
  274. /* The number of strings must match BNXT_NUM_STATS defined above. */
  275. case ETH_SS_STATS:
  276. for (i = 0; i < bp->cp_nr_rings; i++) {
  277. sprintf(buf, "[%d]: rx_ucast_packets", i);
  278. buf += ETH_GSTRING_LEN;
  279. sprintf(buf, "[%d]: rx_mcast_packets", i);
  280. buf += ETH_GSTRING_LEN;
  281. sprintf(buf, "[%d]: rx_bcast_packets", i);
  282. buf += ETH_GSTRING_LEN;
  283. sprintf(buf, "[%d]: rx_discards", i);
  284. buf += ETH_GSTRING_LEN;
  285. sprintf(buf, "[%d]: rx_drops", i);
  286. buf += ETH_GSTRING_LEN;
  287. sprintf(buf, "[%d]: rx_ucast_bytes", i);
  288. buf += ETH_GSTRING_LEN;
  289. sprintf(buf, "[%d]: rx_mcast_bytes", i);
  290. buf += ETH_GSTRING_LEN;
  291. sprintf(buf, "[%d]: rx_bcast_bytes", i);
  292. buf += ETH_GSTRING_LEN;
  293. sprintf(buf, "[%d]: tx_ucast_packets", i);
  294. buf += ETH_GSTRING_LEN;
  295. sprintf(buf, "[%d]: tx_mcast_packets", i);
  296. buf += ETH_GSTRING_LEN;
  297. sprintf(buf, "[%d]: tx_bcast_packets", i);
  298. buf += ETH_GSTRING_LEN;
  299. sprintf(buf, "[%d]: tx_discards", i);
  300. buf += ETH_GSTRING_LEN;
  301. sprintf(buf, "[%d]: tx_drops", i);
  302. buf += ETH_GSTRING_LEN;
  303. sprintf(buf, "[%d]: tx_ucast_bytes", i);
  304. buf += ETH_GSTRING_LEN;
  305. sprintf(buf, "[%d]: tx_mcast_bytes", i);
  306. buf += ETH_GSTRING_LEN;
  307. sprintf(buf, "[%d]: tx_bcast_bytes", i);
  308. buf += ETH_GSTRING_LEN;
  309. sprintf(buf, "[%d]: tpa_packets", i);
  310. buf += ETH_GSTRING_LEN;
  311. sprintf(buf, "[%d]: tpa_bytes", i);
  312. buf += ETH_GSTRING_LEN;
  313. sprintf(buf, "[%d]: tpa_events", i);
  314. buf += ETH_GSTRING_LEN;
  315. sprintf(buf, "[%d]: tpa_aborts", i);
  316. buf += ETH_GSTRING_LEN;
  317. sprintf(buf, "[%d]: rx_l4_csum_errors", i);
  318. buf += ETH_GSTRING_LEN;
  319. }
  320. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  321. for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
  322. strcpy(buf, bnxt_port_stats_arr[i].string);
  323. buf += ETH_GSTRING_LEN;
  324. }
  325. }
  326. if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
  327. for (i = 0; i < BNXT_NUM_PORT_STATS_EXT; i++) {
  328. strcpy(buf, bnxt_port_stats_ext_arr[i].string);
  329. buf += ETH_GSTRING_LEN;
  330. }
  331. }
  332. break;
  333. case ETH_SS_TEST:
  334. if (bp->num_tests)
  335. memcpy(buf, bp->test_info->string,
  336. bp->num_tests * ETH_GSTRING_LEN);
  337. break;
  338. default:
  339. netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
  340. stringset);
  341. break;
  342. }
  343. }
  344. static void bnxt_get_ringparam(struct net_device *dev,
  345. struct ethtool_ringparam *ering)
  346. {
  347. struct bnxt *bp = netdev_priv(dev);
  348. ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
  349. ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
  350. ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
  351. ering->rx_pending = bp->rx_ring_size;
  352. ering->rx_jumbo_pending = bp->rx_agg_ring_size;
  353. ering->tx_pending = bp->tx_ring_size;
  354. }
  355. static int bnxt_set_ringparam(struct net_device *dev,
  356. struct ethtool_ringparam *ering)
  357. {
  358. struct bnxt *bp = netdev_priv(dev);
  359. if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
  360. (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
  361. (ering->tx_pending <= MAX_SKB_FRAGS))
  362. return -EINVAL;
  363. if (netif_running(dev))
  364. bnxt_close_nic(bp, false, false);
  365. bp->rx_ring_size = ering->rx_pending;
  366. bp->tx_ring_size = ering->tx_pending;
  367. bnxt_set_ring_params(bp);
  368. if (netif_running(dev))
  369. return bnxt_open_nic(bp, false, false);
  370. return 0;
  371. }
  372. static void bnxt_get_channels(struct net_device *dev,
  373. struct ethtool_channels *channel)
  374. {
  375. struct bnxt *bp = netdev_priv(dev);
  376. struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
  377. int max_rx_rings, max_tx_rings, tcs;
  378. int max_tx_sch_inputs;
  379. /* Get the most up-to-date max_tx_sch_inputs. */
  380. if (bp->flags & BNXT_FLAG_NEW_RM)
  381. bnxt_hwrm_func_resc_qcaps(bp, false);
  382. max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
  383. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
  384. if (max_tx_sch_inputs)
  385. max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
  386. channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
  387. if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
  388. max_rx_rings = 0;
  389. max_tx_rings = 0;
  390. }
  391. if (max_tx_sch_inputs)
  392. max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
  393. tcs = netdev_get_num_tc(dev);
  394. if (tcs > 1)
  395. max_tx_rings /= tcs;
  396. channel->max_rx = max_rx_rings;
  397. channel->max_tx = max_tx_rings;
  398. channel->max_other = 0;
  399. if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
  400. channel->combined_count = bp->rx_nr_rings;
  401. if (BNXT_CHIP_TYPE_NITRO_A0(bp))
  402. channel->combined_count--;
  403. } else {
  404. if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
  405. channel->rx_count = bp->rx_nr_rings;
  406. channel->tx_count = bp->tx_nr_rings_per_tc;
  407. }
  408. }
  409. }
  410. static int bnxt_set_channels(struct net_device *dev,
  411. struct ethtool_channels *channel)
  412. {
  413. struct bnxt *bp = netdev_priv(dev);
  414. int req_tx_rings, req_rx_rings, tcs;
  415. bool sh = false;
  416. int tx_xdp = 0;
  417. int rc = 0;
  418. if (channel->other_count)
  419. return -EINVAL;
  420. if (!channel->combined_count &&
  421. (!channel->rx_count || !channel->tx_count))
  422. return -EINVAL;
  423. if (channel->combined_count &&
  424. (channel->rx_count || channel->tx_count))
  425. return -EINVAL;
  426. if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
  427. channel->tx_count))
  428. return -EINVAL;
  429. if (channel->combined_count)
  430. sh = true;
  431. tcs = netdev_get_num_tc(dev);
  432. req_tx_rings = sh ? channel->combined_count : channel->tx_count;
  433. req_rx_rings = sh ? channel->combined_count : channel->rx_count;
  434. if (bp->tx_nr_rings_xdp) {
  435. if (!sh) {
  436. netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
  437. return -EINVAL;
  438. }
  439. tx_xdp = req_rx_rings;
  440. }
  441. rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
  442. if (rc) {
  443. netdev_warn(dev, "Unable to allocate the requested rings\n");
  444. return rc;
  445. }
  446. if (netif_running(dev)) {
  447. if (BNXT_PF(bp)) {
  448. /* TODO CHIMP_FW: Send message to all VF's
  449. * before PF unload
  450. */
  451. }
  452. rc = bnxt_close_nic(bp, true, false);
  453. if (rc) {
  454. netdev_err(bp->dev, "Set channel failure rc :%x\n",
  455. rc);
  456. return rc;
  457. }
  458. }
  459. if (sh) {
  460. bp->flags |= BNXT_FLAG_SHARED_RINGS;
  461. bp->rx_nr_rings = channel->combined_count;
  462. bp->tx_nr_rings_per_tc = channel->combined_count;
  463. } else {
  464. bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
  465. bp->rx_nr_rings = channel->rx_count;
  466. bp->tx_nr_rings_per_tc = channel->tx_count;
  467. }
  468. bp->tx_nr_rings_xdp = tx_xdp;
  469. bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
  470. if (tcs > 1)
  471. bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
  472. bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
  473. bp->tx_nr_rings + bp->rx_nr_rings;
  474. bp->num_stat_ctxs = bp->cp_nr_rings;
  475. /* After changing number of rx channels, update NTUPLE feature. */
  476. netdev_update_features(dev);
  477. if (netif_running(dev)) {
  478. rc = bnxt_open_nic(bp, true, false);
  479. if ((!rc) && BNXT_PF(bp)) {
  480. /* TODO CHIMP_FW: Send message to all VF's
  481. * to renable
  482. */
  483. }
  484. }
  485. return rc;
  486. }
  487. #ifdef CONFIG_RFS_ACCEL
  488. static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
  489. u32 *rule_locs)
  490. {
  491. int i, j = 0;
  492. cmd->data = bp->ntp_fltr_count;
  493. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  494. struct hlist_head *head;
  495. struct bnxt_ntuple_filter *fltr;
  496. head = &bp->ntp_fltr_hash_tbl[i];
  497. rcu_read_lock();
  498. hlist_for_each_entry_rcu(fltr, head, hash) {
  499. if (j == cmd->rule_cnt)
  500. break;
  501. rule_locs[j++] = fltr->sw_id;
  502. }
  503. rcu_read_unlock();
  504. if (j == cmd->rule_cnt)
  505. break;
  506. }
  507. cmd->rule_cnt = j;
  508. return 0;
  509. }
  510. static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  511. {
  512. struct ethtool_rx_flow_spec *fs =
  513. (struct ethtool_rx_flow_spec *)&cmd->fs;
  514. struct bnxt_ntuple_filter *fltr;
  515. struct flow_keys *fkeys;
  516. int i, rc = -EINVAL;
  517. if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
  518. return rc;
  519. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  520. struct hlist_head *head;
  521. head = &bp->ntp_fltr_hash_tbl[i];
  522. rcu_read_lock();
  523. hlist_for_each_entry_rcu(fltr, head, hash) {
  524. if (fltr->sw_id == fs->location)
  525. goto fltr_found;
  526. }
  527. rcu_read_unlock();
  528. }
  529. return rc;
  530. fltr_found:
  531. fkeys = &fltr->fkeys;
  532. if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
  533. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  534. fs->flow_type = TCP_V4_FLOW;
  535. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  536. fs->flow_type = UDP_V4_FLOW;
  537. else
  538. goto fltr_err;
  539. fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
  540. fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
  541. fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
  542. fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
  543. fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
  544. fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
  545. fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
  546. fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
  547. } else {
  548. int i;
  549. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  550. fs->flow_type = TCP_V6_FLOW;
  551. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  552. fs->flow_type = UDP_V6_FLOW;
  553. else
  554. goto fltr_err;
  555. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
  556. fkeys->addrs.v6addrs.src;
  557. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
  558. fkeys->addrs.v6addrs.dst;
  559. for (i = 0; i < 4; i++) {
  560. fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
  561. fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
  562. }
  563. fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
  564. fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
  565. fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
  566. fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
  567. }
  568. fs->ring_cookie = fltr->rxq;
  569. rc = 0;
  570. fltr_err:
  571. rcu_read_unlock();
  572. return rc;
  573. }
  574. #endif
  575. static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
  576. {
  577. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
  578. return RXH_IP_SRC | RXH_IP_DST;
  579. return 0;
  580. }
  581. static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
  582. {
  583. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
  584. return RXH_IP_SRC | RXH_IP_DST;
  585. return 0;
  586. }
  587. static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  588. {
  589. cmd->data = 0;
  590. switch (cmd->flow_type) {
  591. case TCP_V4_FLOW:
  592. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
  593. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  594. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  595. cmd->data |= get_ethtool_ipv4_rss(bp);
  596. break;
  597. case UDP_V4_FLOW:
  598. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
  599. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  600. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  601. /* fall through */
  602. case SCTP_V4_FLOW:
  603. case AH_ESP_V4_FLOW:
  604. case AH_V4_FLOW:
  605. case ESP_V4_FLOW:
  606. case IPV4_FLOW:
  607. cmd->data |= get_ethtool_ipv4_rss(bp);
  608. break;
  609. case TCP_V6_FLOW:
  610. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
  611. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  612. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  613. cmd->data |= get_ethtool_ipv6_rss(bp);
  614. break;
  615. case UDP_V6_FLOW:
  616. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
  617. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  618. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  619. /* fall through */
  620. case SCTP_V6_FLOW:
  621. case AH_ESP_V6_FLOW:
  622. case AH_V6_FLOW:
  623. case ESP_V6_FLOW:
  624. case IPV6_FLOW:
  625. cmd->data |= get_ethtool_ipv6_rss(bp);
  626. break;
  627. }
  628. return 0;
  629. }
  630. #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
  631. #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
  632. static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  633. {
  634. u32 rss_hash_cfg = bp->rss_hash_cfg;
  635. int tuple, rc = 0;
  636. if (cmd->data == RXH_4TUPLE)
  637. tuple = 4;
  638. else if (cmd->data == RXH_2TUPLE)
  639. tuple = 2;
  640. else if (!cmd->data)
  641. tuple = 0;
  642. else
  643. return -EINVAL;
  644. if (cmd->flow_type == TCP_V4_FLOW) {
  645. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  646. if (tuple == 4)
  647. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  648. } else if (cmd->flow_type == UDP_V4_FLOW) {
  649. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  650. return -EINVAL;
  651. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  652. if (tuple == 4)
  653. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  654. } else if (cmd->flow_type == TCP_V6_FLOW) {
  655. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  656. if (tuple == 4)
  657. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  658. } else if (cmd->flow_type == UDP_V6_FLOW) {
  659. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  660. return -EINVAL;
  661. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  662. if (tuple == 4)
  663. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  664. } else if (tuple == 4) {
  665. return -EINVAL;
  666. }
  667. switch (cmd->flow_type) {
  668. case TCP_V4_FLOW:
  669. case UDP_V4_FLOW:
  670. case SCTP_V4_FLOW:
  671. case AH_ESP_V4_FLOW:
  672. case AH_V4_FLOW:
  673. case ESP_V4_FLOW:
  674. case IPV4_FLOW:
  675. if (tuple == 2)
  676. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  677. else if (!tuple)
  678. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  679. break;
  680. case TCP_V6_FLOW:
  681. case UDP_V6_FLOW:
  682. case SCTP_V6_FLOW:
  683. case AH_ESP_V6_FLOW:
  684. case AH_V6_FLOW:
  685. case ESP_V6_FLOW:
  686. case IPV6_FLOW:
  687. if (tuple == 2)
  688. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  689. else if (!tuple)
  690. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  691. break;
  692. }
  693. if (bp->rss_hash_cfg == rss_hash_cfg)
  694. return 0;
  695. bp->rss_hash_cfg = rss_hash_cfg;
  696. if (netif_running(bp->dev)) {
  697. bnxt_close_nic(bp, false, false);
  698. rc = bnxt_open_nic(bp, false, false);
  699. }
  700. return rc;
  701. }
  702. static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
  703. u32 *rule_locs)
  704. {
  705. struct bnxt *bp = netdev_priv(dev);
  706. int rc = 0;
  707. switch (cmd->cmd) {
  708. #ifdef CONFIG_RFS_ACCEL
  709. case ETHTOOL_GRXRINGS:
  710. cmd->data = bp->rx_nr_rings;
  711. break;
  712. case ETHTOOL_GRXCLSRLCNT:
  713. cmd->rule_cnt = bp->ntp_fltr_count;
  714. cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
  715. break;
  716. case ETHTOOL_GRXCLSRLALL:
  717. rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
  718. break;
  719. case ETHTOOL_GRXCLSRULE:
  720. rc = bnxt_grxclsrule(bp, cmd);
  721. break;
  722. #endif
  723. case ETHTOOL_GRXFH:
  724. rc = bnxt_grxfh(bp, cmd);
  725. break;
  726. default:
  727. rc = -EOPNOTSUPP;
  728. break;
  729. }
  730. return rc;
  731. }
  732. static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
  733. {
  734. struct bnxt *bp = netdev_priv(dev);
  735. int rc;
  736. switch (cmd->cmd) {
  737. case ETHTOOL_SRXFH:
  738. rc = bnxt_srxfh(bp, cmd);
  739. break;
  740. default:
  741. rc = -EOPNOTSUPP;
  742. break;
  743. }
  744. return rc;
  745. }
  746. static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
  747. {
  748. return HW_HASH_INDEX_SIZE;
  749. }
  750. static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
  751. {
  752. return HW_HASH_KEY_SIZE;
  753. }
  754. static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
  755. u8 *hfunc)
  756. {
  757. struct bnxt *bp = netdev_priv(dev);
  758. struct bnxt_vnic_info *vnic;
  759. int i = 0;
  760. if (hfunc)
  761. *hfunc = ETH_RSS_HASH_TOP;
  762. if (!bp->vnic_info)
  763. return 0;
  764. vnic = &bp->vnic_info[0];
  765. if (indir && vnic->rss_table) {
  766. for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
  767. indir[i] = le16_to_cpu(vnic->rss_table[i]);
  768. }
  769. if (key && vnic->rss_hash_key)
  770. memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
  771. return 0;
  772. }
  773. static void bnxt_get_drvinfo(struct net_device *dev,
  774. struct ethtool_drvinfo *info)
  775. {
  776. struct bnxt *bp = netdev_priv(dev);
  777. strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
  778. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  779. strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
  780. strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
  781. info->n_stats = bnxt_get_num_stats(bp);
  782. info->testinfo_len = bp->num_tests;
  783. /* TODO CHIMP_FW: eeprom dump details */
  784. info->eedump_len = 0;
  785. /* TODO CHIMP FW: reg dump details */
  786. info->regdump_len = 0;
  787. }
  788. static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  789. {
  790. struct bnxt *bp = netdev_priv(dev);
  791. wol->supported = 0;
  792. wol->wolopts = 0;
  793. memset(&wol->sopass, 0, sizeof(wol->sopass));
  794. if (bp->flags & BNXT_FLAG_WOL_CAP) {
  795. wol->supported = WAKE_MAGIC;
  796. if (bp->wol)
  797. wol->wolopts = WAKE_MAGIC;
  798. }
  799. }
  800. static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  801. {
  802. struct bnxt *bp = netdev_priv(dev);
  803. if (wol->wolopts & ~WAKE_MAGIC)
  804. return -EINVAL;
  805. if (wol->wolopts & WAKE_MAGIC) {
  806. if (!(bp->flags & BNXT_FLAG_WOL_CAP))
  807. return -EINVAL;
  808. if (!bp->wol) {
  809. if (bnxt_hwrm_alloc_wol_fltr(bp))
  810. return -EBUSY;
  811. bp->wol = 1;
  812. }
  813. } else {
  814. if (bp->wol) {
  815. if (bnxt_hwrm_free_wol_fltr(bp))
  816. return -EBUSY;
  817. bp->wol = 0;
  818. }
  819. }
  820. return 0;
  821. }
  822. u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
  823. {
  824. u32 speed_mask = 0;
  825. /* TODO: support 25GB, 40GB, 50GB with different cable type */
  826. /* set the advertised speeds */
  827. if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
  828. speed_mask |= ADVERTISED_100baseT_Full;
  829. if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
  830. speed_mask |= ADVERTISED_1000baseT_Full;
  831. if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
  832. speed_mask |= ADVERTISED_2500baseX_Full;
  833. if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
  834. speed_mask |= ADVERTISED_10000baseT_Full;
  835. if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
  836. speed_mask |= ADVERTISED_40000baseCR4_Full;
  837. if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
  838. speed_mask |= ADVERTISED_Pause;
  839. else if (fw_pause & BNXT_LINK_PAUSE_TX)
  840. speed_mask |= ADVERTISED_Asym_Pause;
  841. else if (fw_pause & BNXT_LINK_PAUSE_RX)
  842. speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
  843. return speed_mask;
  844. }
  845. #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
  846. { \
  847. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
  848. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  849. 100baseT_Full); \
  850. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
  851. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  852. 1000baseT_Full); \
  853. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
  854. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  855. 10000baseT_Full); \
  856. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
  857. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  858. 25000baseCR_Full); \
  859. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
  860. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  861. 40000baseCR4_Full);\
  862. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
  863. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  864. 50000baseCR2_Full);\
  865. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \
  866. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  867. 100000baseCR4_Full);\
  868. if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
  869. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  870. Pause); \
  871. if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
  872. ethtool_link_ksettings_add_link_mode( \
  873. lk_ksettings, name, Asym_Pause);\
  874. } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
  875. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  876. Asym_Pause); \
  877. } \
  878. }
  879. #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
  880. { \
  881. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  882. 100baseT_Full) || \
  883. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  884. 100baseT_Half)) \
  885. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
  886. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  887. 1000baseT_Full) || \
  888. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  889. 1000baseT_Half)) \
  890. (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
  891. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  892. 10000baseT_Full)) \
  893. (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
  894. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  895. 25000baseCR_Full)) \
  896. (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
  897. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  898. 40000baseCR4_Full)) \
  899. (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
  900. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  901. 50000baseCR2_Full)) \
  902. (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
  903. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  904. 100000baseCR4_Full)) \
  905. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \
  906. }
  907. static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
  908. struct ethtool_link_ksettings *lk_ksettings)
  909. {
  910. u16 fw_speeds = link_info->advertising;
  911. u8 fw_pause = 0;
  912. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  913. fw_pause = link_info->auto_pause_setting;
  914. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
  915. }
  916. static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
  917. struct ethtool_link_ksettings *lk_ksettings)
  918. {
  919. u16 fw_speeds = link_info->lp_auto_link_speeds;
  920. u8 fw_pause = 0;
  921. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  922. fw_pause = link_info->lp_pause;
  923. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
  924. lp_advertising);
  925. }
  926. static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
  927. struct ethtool_link_ksettings *lk_ksettings)
  928. {
  929. u16 fw_speeds = link_info->support_speeds;
  930. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
  931. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
  932. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  933. Asym_Pause);
  934. if (link_info->support_auto_speeds)
  935. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  936. Autoneg);
  937. }
  938. u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
  939. {
  940. switch (fw_link_speed) {
  941. case BNXT_LINK_SPEED_100MB:
  942. return SPEED_100;
  943. case BNXT_LINK_SPEED_1GB:
  944. return SPEED_1000;
  945. case BNXT_LINK_SPEED_2_5GB:
  946. return SPEED_2500;
  947. case BNXT_LINK_SPEED_10GB:
  948. return SPEED_10000;
  949. case BNXT_LINK_SPEED_20GB:
  950. return SPEED_20000;
  951. case BNXT_LINK_SPEED_25GB:
  952. return SPEED_25000;
  953. case BNXT_LINK_SPEED_40GB:
  954. return SPEED_40000;
  955. case BNXT_LINK_SPEED_50GB:
  956. return SPEED_50000;
  957. case BNXT_LINK_SPEED_100GB:
  958. return SPEED_100000;
  959. default:
  960. return SPEED_UNKNOWN;
  961. }
  962. }
  963. static int bnxt_get_link_ksettings(struct net_device *dev,
  964. struct ethtool_link_ksettings *lk_ksettings)
  965. {
  966. struct bnxt *bp = netdev_priv(dev);
  967. struct bnxt_link_info *link_info = &bp->link_info;
  968. struct ethtool_link_settings *base = &lk_ksettings->base;
  969. u32 ethtool_speed;
  970. ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
  971. mutex_lock(&bp->link_lock);
  972. bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
  973. ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
  974. if (link_info->autoneg) {
  975. bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
  976. ethtool_link_ksettings_add_link_mode(lk_ksettings,
  977. advertising, Autoneg);
  978. base->autoneg = AUTONEG_ENABLE;
  979. if (link_info->phy_link_status == BNXT_LINK_LINK)
  980. bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
  981. ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
  982. if (!netif_carrier_ok(dev))
  983. base->duplex = DUPLEX_UNKNOWN;
  984. else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
  985. base->duplex = DUPLEX_FULL;
  986. else
  987. base->duplex = DUPLEX_HALF;
  988. } else {
  989. base->autoneg = AUTONEG_DISABLE;
  990. ethtool_speed =
  991. bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
  992. base->duplex = DUPLEX_HALF;
  993. if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
  994. base->duplex = DUPLEX_FULL;
  995. }
  996. base->speed = ethtool_speed;
  997. base->port = PORT_NONE;
  998. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  999. base->port = PORT_TP;
  1000. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  1001. TP);
  1002. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  1003. TP);
  1004. } else {
  1005. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  1006. FIBRE);
  1007. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  1008. FIBRE);
  1009. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
  1010. base->port = PORT_DA;
  1011. else if (link_info->media_type ==
  1012. PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
  1013. base->port = PORT_FIBRE;
  1014. }
  1015. base->phy_address = link_info->phy_addr;
  1016. mutex_unlock(&bp->link_lock);
  1017. return 0;
  1018. }
  1019. static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
  1020. {
  1021. struct bnxt *bp = netdev_priv(dev);
  1022. struct bnxt_link_info *link_info = &bp->link_info;
  1023. u16 support_spds = link_info->support_speeds;
  1024. u32 fw_speed = 0;
  1025. switch (ethtool_speed) {
  1026. case SPEED_100:
  1027. if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
  1028. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
  1029. break;
  1030. case SPEED_1000:
  1031. if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
  1032. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
  1033. break;
  1034. case SPEED_2500:
  1035. if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
  1036. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
  1037. break;
  1038. case SPEED_10000:
  1039. if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
  1040. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
  1041. break;
  1042. case SPEED_20000:
  1043. if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
  1044. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
  1045. break;
  1046. case SPEED_25000:
  1047. if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
  1048. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
  1049. break;
  1050. case SPEED_40000:
  1051. if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
  1052. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
  1053. break;
  1054. case SPEED_50000:
  1055. if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
  1056. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
  1057. break;
  1058. case SPEED_100000:
  1059. if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
  1060. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
  1061. break;
  1062. default:
  1063. netdev_err(dev, "unsupported speed!\n");
  1064. break;
  1065. }
  1066. return fw_speed;
  1067. }
  1068. u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
  1069. {
  1070. u16 fw_speed_mask = 0;
  1071. /* only support autoneg at speed 100, 1000, and 10000 */
  1072. if (advertising & (ADVERTISED_100baseT_Full |
  1073. ADVERTISED_100baseT_Half)) {
  1074. fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
  1075. }
  1076. if (advertising & (ADVERTISED_1000baseT_Full |
  1077. ADVERTISED_1000baseT_Half)) {
  1078. fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
  1079. }
  1080. if (advertising & ADVERTISED_10000baseT_Full)
  1081. fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
  1082. if (advertising & ADVERTISED_40000baseCR4_Full)
  1083. fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
  1084. return fw_speed_mask;
  1085. }
  1086. static int bnxt_set_link_ksettings(struct net_device *dev,
  1087. const struct ethtool_link_ksettings *lk_ksettings)
  1088. {
  1089. struct bnxt *bp = netdev_priv(dev);
  1090. struct bnxt_link_info *link_info = &bp->link_info;
  1091. const struct ethtool_link_settings *base = &lk_ksettings->base;
  1092. bool set_pause = false;
  1093. u16 fw_advertising = 0;
  1094. u32 speed;
  1095. int rc = 0;
  1096. if (!BNXT_SINGLE_PF(bp))
  1097. return -EOPNOTSUPP;
  1098. mutex_lock(&bp->link_lock);
  1099. if (base->autoneg == AUTONEG_ENABLE) {
  1100. BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
  1101. advertising);
  1102. link_info->autoneg |= BNXT_AUTONEG_SPEED;
  1103. if (!fw_advertising)
  1104. link_info->advertising = link_info->support_auto_speeds;
  1105. else
  1106. link_info->advertising = fw_advertising;
  1107. /* any change to autoneg will cause link change, therefore the
  1108. * driver should put back the original pause setting in autoneg
  1109. */
  1110. set_pause = true;
  1111. } else {
  1112. u16 fw_speed;
  1113. u8 phy_type = link_info->phy_type;
  1114. if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
  1115. phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
  1116. link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  1117. netdev_err(dev, "10GBase-T devices must autoneg\n");
  1118. rc = -EINVAL;
  1119. goto set_setting_exit;
  1120. }
  1121. if (base->duplex == DUPLEX_HALF) {
  1122. netdev_err(dev, "HALF DUPLEX is not supported!\n");
  1123. rc = -EINVAL;
  1124. goto set_setting_exit;
  1125. }
  1126. speed = base->speed;
  1127. fw_speed = bnxt_get_fw_speed(dev, speed);
  1128. if (!fw_speed) {
  1129. rc = -EINVAL;
  1130. goto set_setting_exit;
  1131. }
  1132. link_info->req_link_speed = fw_speed;
  1133. link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
  1134. link_info->autoneg = 0;
  1135. link_info->advertising = 0;
  1136. }
  1137. if (netif_running(dev))
  1138. rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
  1139. set_setting_exit:
  1140. mutex_unlock(&bp->link_lock);
  1141. return rc;
  1142. }
  1143. static void bnxt_get_pauseparam(struct net_device *dev,
  1144. struct ethtool_pauseparam *epause)
  1145. {
  1146. struct bnxt *bp = netdev_priv(dev);
  1147. struct bnxt_link_info *link_info = &bp->link_info;
  1148. if (BNXT_VF(bp))
  1149. return;
  1150. epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
  1151. epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
  1152. epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
  1153. }
  1154. static int bnxt_set_pauseparam(struct net_device *dev,
  1155. struct ethtool_pauseparam *epause)
  1156. {
  1157. int rc = 0;
  1158. struct bnxt *bp = netdev_priv(dev);
  1159. struct bnxt_link_info *link_info = &bp->link_info;
  1160. if (!BNXT_SINGLE_PF(bp))
  1161. return -EOPNOTSUPP;
  1162. if (epause->autoneg) {
  1163. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1164. return -EINVAL;
  1165. link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
  1166. if (bp->hwrm_spec_code >= 0x10201)
  1167. link_info->req_flow_ctrl =
  1168. PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
  1169. } else {
  1170. /* when transition from auto pause to force pause,
  1171. * force a link change
  1172. */
  1173. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  1174. link_info->force_link_chng = true;
  1175. link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
  1176. link_info->req_flow_ctrl = 0;
  1177. }
  1178. if (epause->rx_pause)
  1179. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
  1180. if (epause->tx_pause)
  1181. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
  1182. if (netif_running(dev))
  1183. rc = bnxt_hwrm_set_pause(bp);
  1184. return rc;
  1185. }
  1186. static u32 bnxt_get_link(struct net_device *dev)
  1187. {
  1188. struct bnxt *bp = netdev_priv(dev);
  1189. /* TODO: handle MF, VF, driver close case */
  1190. return bp->link_info.link_up;
  1191. }
  1192. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1193. u16 ext, u16 *index, u32 *item_length,
  1194. u32 *data_length);
  1195. static int bnxt_flash_nvram(struct net_device *dev,
  1196. u16 dir_type,
  1197. u16 dir_ordinal,
  1198. u16 dir_ext,
  1199. u16 dir_attr,
  1200. const u8 *data,
  1201. size_t data_len)
  1202. {
  1203. struct bnxt *bp = netdev_priv(dev);
  1204. int rc;
  1205. struct hwrm_nvm_write_input req = {0};
  1206. dma_addr_t dma_handle;
  1207. u8 *kmem;
  1208. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
  1209. req.dir_type = cpu_to_le16(dir_type);
  1210. req.dir_ordinal = cpu_to_le16(dir_ordinal);
  1211. req.dir_ext = cpu_to_le16(dir_ext);
  1212. req.dir_attr = cpu_to_le16(dir_attr);
  1213. req.dir_data_length = cpu_to_le32(data_len);
  1214. kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
  1215. GFP_KERNEL);
  1216. if (!kmem) {
  1217. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1218. (unsigned)data_len);
  1219. return -ENOMEM;
  1220. }
  1221. memcpy(kmem, data, data_len);
  1222. req.host_src_addr = cpu_to_le64(dma_handle);
  1223. rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
  1224. dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
  1225. return rc;
  1226. }
  1227. static int bnxt_firmware_reset(struct net_device *dev,
  1228. u16 dir_type)
  1229. {
  1230. struct bnxt *bp = netdev_priv(dev);
  1231. struct hwrm_fw_reset_input req = {0};
  1232. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
  1233. /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
  1234. /* (e.g. when firmware isn't already running) */
  1235. switch (dir_type) {
  1236. case BNX_DIR_TYPE_CHIMP_PATCH:
  1237. case BNX_DIR_TYPE_BOOTCODE:
  1238. case BNX_DIR_TYPE_BOOTCODE_2:
  1239. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
  1240. /* Self-reset ChiMP upon next PCIe reset: */
  1241. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1242. break;
  1243. case BNX_DIR_TYPE_APE_FW:
  1244. case BNX_DIR_TYPE_APE_PATCH:
  1245. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
  1246. /* Self-reset APE upon next PCIe reset: */
  1247. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1248. break;
  1249. case BNX_DIR_TYPE_KONG_FW:
  1250. case BNX_DIR_TYPE_KONG_PATCH:
  1251. req.embedded_proc_type =
  1252. FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
  1253. break;
  1254. case BNX_DIR_TYPE_BONO_FW:
  1255. case BNX_DIR_TYPE_BONO_PATCH:
  1256. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
  1257. break;
  1258. case BNXT_FW_RESET_CHIP:
  1259. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;
  1260. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;
  1261. break;
  1262. case BNXT_FW_RESET_AP:
  1263. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP;
  1264. break;
  1265. default:
  1266. return -EINVAL;
  1267. }
  1268. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1269. }
  1270. static int bnxt_flash_firmware(struct net_device *dev,
  1271. u16 dir_type,
  1272. const u8 *fw_data,
  1273. size_t fw_size)
  1274. {
  1275. int rc = 0;
  1276. u16 code_type;
  1277. u32 stored_crc;
  1278. u32 calculated_crc;
  1279. struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
  1280. switch (dir_type) {
  1281. case BNX_DIR_TYPE_BOOTCODE:
  1282. case BNX_DIR_TYPE_BOOTCODE_2:
  1283. code_type = CODE_BOOT;
  1284. break;
  1285. case BNX_DIR_TYPE_CHIMP_PATCH:
  1286. code_type = CODE_CHIMP_PATCH;
  1287. break;
  1288. case BNX_DIR_TYPE_APE_FW:
  1289. code_type = CODE_MCTP_PASSTHRU;
  1290. break;
  1291. case BNX_DIR_TYPE_APE_PATCH:
  1292. code_type = CODE_APE_PATCH;
  1293. break;
  1294. case BNX_DIR_TYPE_KONG_FW:
  1295. code_type = CODE_KONG_FW;
  1296. break;
  1297. case BNX_DIR_TYPE_KONG_PATCH:
  1298. code_type = CODE_KONG_PATCH;
  1299. break;
  1300. case BNX_DIR_TYPE_BONO_FW:
  1301. code_type = CODE_BONO_FW;
  1302. break;
  1303. case BNX_DIR_TYPE_BONO_PATCH:
  1304. code_type = CODE_BONO_PATCH;
  1305. break;
  1306. default:
  1307. netdev_err(dev, "Unsupported directory entry type: %u\n",
  1308. dir_type);
  1309. return -EINVAL;
  1310. }
  1311. if (fw_size < sizeof(struct bnxt_fw_header)) {
  1312. netdev_err(dev, "Invalid firmware file size: %u\n",
  1313. (unsigned int)fw_size);
  1314. return -EINVAL;
  1315. }
  1316. if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
  1317. netdev_err(dev, "Invalid firmware signature: %08X\n",
  1318. le32_to_cpu(header->signature));
  1319. return -EINVAL;
  1320. }
  1321. if (header->code_type != code_type) {
  1322. netdev_err(dev, "Expected firmware type: %d, read: %d\n",
  1323. code_type, header->code_type);
  1324. return -EINVAL;
  1325. }
  1326. if (header->device != DEVICE_CUMULUS_FAMILY) {
  1327. netdev_err(dev, "Expected firmware device family %d, read: %d\n",
  1328. DEVICE_CUMULUS_FAMILY, header->device);
  1329. return -EINVAL;
  1330. }
  1331. /* Confirm the CRC32 checksum of the file: */
  1332. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1333. sizeof(stored_crc)));
  1334. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1335. if (calculated_crc != stored_crc) {
  1336. netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
  1337. (unsigned long)stored_crc,
  1338. (unsigned long)calculated_crc);
  1339. return -EINVAL;
  1340. }
  1341. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1342. 0, 0, fw_data, fw_size);
  1343. if (rc == 0) /* Firmware update successful */
  1344. rc = bnxt_firmware_reset(dev, dir_type);
  1345. return rc;
  1346. }
  1347. static int bnxt_flash_microcode(struct net_device *dev,
  1348. u16 dir_type,
  1349. const u8 *fw_data,
  1350. size_t fw_size)
  1351. {
  1352. struct bnxt_ucode_trailer *trailer;
  1353. u32 calculated_crc;
  1354. u32 stored_crc;
  1355. int rc = 0;
  1356. if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
  1357. netdev_err(dev, "Invalid microcode file size: %u\n",
  1358. (unsigned int)fw_size);
  1359. return -EINVAL;
  1360. }
  1361. trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
  1362. sizeof(*trailer)));
  1363. if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
  1364. netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
  1365. le32_to_cpu(trailer->sig));
  1366. return -EINVAL;
  1367. }
  1368. if (le16_to_cpu(trailer->dir_type) != dir_type) {
  1369. netdev_err(dev, "Expected microcode type: %d, read: %d\n",
  1370. dir_type, le16_to_cpu(trailer->dir_type));
  1371. return -EINVAL;
  1372. }
  1373. if (le16_to_cpu(trailer->trailer_length) <
  1374. sizeof(struct bnxt_ucode_trailer)) {
  1375. netdev_err(dev, "Invalid microcode trailer length: %d\n",
  1376. le16_to_cpu(trailer->trailer_length));
  1377. return -EINVAL;
  1378. }
  1379. /* Confirm the CRC32 checksum of the file: */
  1380. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1381. sizeof(stored_crc)));
  1382. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1383. if (calculated_crc != stored_crc) {
  1384. netdev_err(dev,
  1385. "CRC32 (%08lX) does not match calculated: %08lX\n",
  1386. (unsigned long)stored_crc,
  1387. (unsigned long)calculated_crc);
  1388. return -EINVAL;
  1389. }
  1390. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1391. 0, 0, fw_data, fw_size);
  1392. return rc;
  1393. }
  1394. static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
  1395. {
  1396. switch (dir_type) {
  1397. case BNX_DIR_TYPE_CHIMP_PATCH:
  1398. case BNX_DIR_TYPE_BOOTCODE:
  1399. case BNX_DIR_TYPE_BOOTCODE_2:
  1400. case BNX_DIR_TYPE_APE_FW:
  1401. case BNX_DIR_TYPE_APE_PATCH:
  1402. case BNX_DIR_TYPE_KONG_FW:
  1403. case BNX_DIR_TYPE_KONG_PATCH:
  1404. case BNX_DIR_TYPE_BONO_FW:
  1405. case BNX_DIR_TYPE_BONO_PATCH:
  1406. return true;
  1407. }
  1408. return false;
  1409. }
  1410. static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
  1411. {
  1412. switch (dir_type) {
  1413. case BNX_DIR_TYPE_AVS:
  1414. case BNX_DIR_TYPE_EXP_ROM_MBA:
  1415. case BNX_DIR_TYPE_PCIE:
  1416. case BNX_DIR_TYPE_TSCF_UCODE:
  1417. case BNX_DIR_TYPE_EXT_PHY:
  1418. case BNX_DIR_TYPE_CCM:
  1419. case BNX_DIR_TYPE_ISCSI_BOOT:
  1420. case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
  1421. case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
  1422. return true;
  1423. }
  1424. return false;
  1425. }
  1426. static bool bnxt_dir_type_is_executable(u16 dir_type)
  1427. {
  1428. return bnxt_dir_type_is_ape_bin_format(dir_type) ||
  1429. bnxt_dir_type_is_other_exec_format(dir_type);
  1430. }
  1431. static int bnxt_flash_firmware_from_file(struct net_device *dev,
  1432. u16 dir_type,
  1433. const char *filename)
  1434. {
  1435. const struct firmware *fw;
  1436. int rc;
  1437. rc = request_firmware(&fw, filename, &dev->dev);
  1438. if (rc != 0) {
  1439. netdev_err(dev, "Error %d requesting firmware file: %s\n",
  1440. rc, filename);
  1441. return rc;
  1442. }
  1443. if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
  1444. rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
  1445. else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
  1446. rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
  1447. else
  1448. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1449. 0, 0, fw->data, fw->size);
  1450. release_firmware(fw);
  1451. return rc;
  1452. }
  1453. static int bnxt_flash_package_from_file(struct net_device *dev,
  1454. char *filename, u32 install_type)
  1455. {
  1456. struct bnxt *bp = netdev_priv(dev);
  1457. struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
  1458. struct hwrm_nvm_install_update_input install = {0};
  1459. const struct firmware *fw;
  1460. u32 item_len;
  1461. u16 index;
  1462. int rc;
  1463. bnxt_hwrm_fw_set_time(bp);
  1464. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
  1465. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1466. &index, &item_len, NULL) != 0) {
  1467. netdev_err(dev, "PKG update area not created in nvram\n");
  1468. return -ENOBUFS;
  1469. }
  1470. rc = request_firmware(&fw, filename, &dev->dev);
  1471. if (rc != 0) {
  1472. netdev_err(dev, "PKG error %d requesting file: %s\n",
  1473. rc, filename);
  1474. return rc;
  1475. }
  1476. if (fw->size > item_len) {
  1477. netdev_err(dev, "PKG insufficient update area in nvram: %lu",
  1478. (unsigned long)fw->size);
  1479. rc = -EFBIG;
  1480. } else {
  1481. dma_addr_t dma_handle;
  1482. u8 *kmem;
  1483. struct hwrm_nvm_modify_input modify = {0};
  1484. bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
  1485. modify.dir_idx = cpu_to_le16(index);
  1486. modify.len = cpu_to_le32(fw->size);
  1487. kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
  1488. &dma_handle, GFP_KERNEL);
  1489. if (!kmem) {
  1490. netdev_err(dev,
  1491. "dma_alloc_coherent failure, length = %u\n",
  1492. (unsigned int)fw->size);
  1493. rc = -ENOMEM;
  1494. } else {
  1495. memcpy(kmem, fw->data, fw->size);
  1496. modify.host_src_addr = cpu_to_le64(dma_handle);
  1497. rc = hwrm_send_message(bp, &modify, sizeof(modify),
  1498. FLASH_PACKAGE_TIMEOUT);
  1499. dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
  1500. dma_handle);
  1501. }
  1502. }
  1503. release_firmware(fw);
  1504. if (rc)
  1505. return rc;
  1506. if ((install_type & 0xffff) == 0)
  1507. install_type >>= 16;
  1508. bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
  1509. install.install_type = cpu_to_le32(install_type);
  1510. mutex_lock(&bp->hwrm_cmd_lock);
  1511. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1512. INSTALL_PACKAGE_TIMEOUT);
  1513. if (rc) {
  1514. rc = -EOPNOTSUPP;
  1515. goto flash_pkg_exit;
  1516. }
  1517. if (resp->error_code) {
  1518. u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
  1519. if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
  1520. install.flags |= cpu_to_le16(
  1521. NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
  1522. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1523. INSTALL_PACKAGE_TIMEOUT);
  1524. if (rc) {
  1525. rc = -EOPNOTSUPP;
  1526. goto flash_pkg_exit;
  1527. }
  1528. }
  1529. }
  1530. if (resp->result) {
  1531. netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
  1532. (s8)resp->result, (int)resp->problem_item);
  1533. rc = -ENOPKG;
  1534. }
  1535. flash_pkg_exit:
  1536. mutex_unlock(&bp->hwrm_cmd_lock);
  1537. return rc;
  1538. }
  1539. static int bnxt_flash_device(struct net_device *dev,
  1540. struct ethtool_flash *flash)
  1541. {
  1542. if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
  1543. netdev_err(dev, "flashdev not supported from a virtual function\n");
  1544. return -EINVAL;
  1545. }
  1546. if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
  1547. flash->region > 0xffff)
  1548. return bnxt_flash_package_from_file(dev, flash->data,
  1549. flash->region);
  1550. return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
  1551. }
  1552. static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
  1553. {
  1554. struct bnxt *bp = netdev_priv(dev);
  1555. int rc;
  1556. struct hwrm_nvm_get_dir_info_input req = {0};
  1557. struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
  1558. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
  1559. mutex_lock(&bp->hwrm_cmd_lock);
  1560. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1561. if (!rc) {
  1562. *entries = le32_to_cpu(output->entries);
  1563. *length = le32_to_cpu(output->entry_length);
  1564. }
  1565. mutex_unlock(&bp->hwrm_cmd_lock);
  1566. return rc;
  1567. }
  1568. static int bnxt_get_eeprom_len(struct net_device *dev)
  1569. {
  1570. /* The -1 return value allows the entire 32-bit range of offsets to be
  1571. * passed via the ethtool command-line utility.
  1572. */
  1573. return -1;
  1574. }
  1575. static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
  1576. {
  1577. struct bnxt *bp = netdev_priv(dev);
  1578. int rc;
  1579. u32 dir_entries;
  1580. u32 entry_length;
  1581. u8 *buf;
  1582. size_t buflen;
  1583. dma_addr_t dma_handle;
  1584. struct hwrm_nvm_get_dir_entries_input req = {0};
  1585. rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
  1586. if (rc != 0)
  1587. return rc;
  1588. /* Insert 2 bytes of directory info (count and size of entries) */
  1589. if (len < 2)
  1590. return -EINVAL;
  1591. *data++ = dir_entries;
  1592. *data++ = entry_length;
  1593. len -= 2;
  1594. memset(data, 0xff, len);
  1595. buflen = dir_entries * entry_length;
  1596. buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
  1597. GFP_KERNEL);
  1598. if (!buf) {
  1599. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1600. (unsigned)buflen);
  1601. return -ENOMEM;
  1602. }
  1603. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
  1604. req.host_dest_addr = cpu_to_le64(dma_handle);
  1605. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1606. if (rc == 0)
  1607. memcpy(data, buf, len > buflen ? buflen : len);
  1608. dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
  1609. return rc;
  1610. }
  1611. static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
  1612. u32 length, u8 *data)
  1613. {
  1614. struct bnxt *bp = netdev_priv(dev);
  1615. int rc;
  1616. u8 *buf;
  1617. dma_addr_t dma_handle;
  1618. struct hwrm_nvm_read_input req = {0};
  1619. if (!length)
  1620. return -EINVAL;
  1621. buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
  1622. GFP_KERNEL);
  1623. if (!buf) {
  1624. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1625. (unsigned)length);
  1626. return -ENOMEM;
  1627. }
  1628. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
  1629. req.host_dest_addr = cpu_to_le64(dma_handle);
  1630. req.dir_idx = cpu_to_le16(index);
  1631. req.offset = cpu_to_le32(offset);
  1632. req.len = cpu_to_le32(length);
  1633. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1634. if (rc == 0)
  1635. memcpy(data, buf, length);
  1636. dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
  1637. return rc;
  1638. }
  1639. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1640. u16 ext, u16 *index, u32 *item_length,
  1641. u32 *data_length)
  1642. {
  1643. struct bnxt *bp = netdev_priv(dev);
  1644. int rc;
  1645. struct hwrm_nvm_find_dir_entry_input req = {0};
  1646. struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
  1647. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
  1648. req.enables = 0;
  1649. req.dir_idx = 0;
  1650. req.dir_type = cpu_to_le16(type);
  1651. req.dir_ordinal = cpu_to_le16(ordinal);
  1652. req.dir_ext = cpu_to_le16(ext);
  1653. req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
  1654. mutex_lock(&bp->hwrm_cmd_lock);
  1655. rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1656. if (rc == 0) {
  1657. if (index)
  1658. *index = le16_to_cpu(output->dir_idx);
  1659. if (item_length)
  1660. *item_length = le32_to_cpu(output->dir_item_length);
  1661. if (data_length)
  1662. *data_length = le32_to_cpu(output->dir_data_length);
  1663. }
  1664. mutex_unlock(&bp->hwrm_cmd_lock);
  1665. return rc;
  1666. }
  1667. static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
  1668. {
  1669. char *retval = NULL;
  1670. char *p;
  1671. char *value;
  1672. int field = 0;
  1673. if (datalen < 1)
  1674. return NULL;
  1675. /* null-terminate the log data (removing last '\n'): */
  1676. data[datalen - 1] = 0;
  1677. for (p = data; *p != 0; p++) {
  1678. field = 0;
  1679. retval = NULL;
  1680. while (*p != 0 && *p != '\n') {
  1681. value = p;
  1682. while (*p != 0 && *p != '\t' && *p != '\n')
  1683. p++;
  1684. if (field == desired_field)
  1685. retval = value;
  1686. if (*p != '\t')
  1687. break;
  1688. *p = 0;
  1689. field++;
  1690. p++;
  1691. }
  1692. if (*p == 0)
  1693. break;
  1694. *p = 0;
  1695. }
  1696. return retval;
  1697. }
  1698. static void bnxt_get_pkgver(struct net_device *dev)
  1699. {
  1700. struct bnxt *bp = netdev_priv(dev);
  1701. u16 index = 0;
  1702. char *pkgver;
  1703. u32 pkglen;
  1704. u8 *pkgbuf;
  1705. int len;
  1706. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
  1707. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1708. &index, NULL, &pkglen) != 0)
  1709. return;
  1710. pkgbuf = kzalloc(pkglen, GFP_KERNEL);
  1711. if (!pkgbuf) {
  1712. dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
  1713. pkglen);
  1714. return;
  1715. }
  1716. if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
  1717. goto err;
  1718. pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
  1719. pkglen);
  1720. if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
  1721. len = strlen(bp->fw_ver_str);
  1722. snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
  1723. "/pkg %s", pkgver);
  1724. }
  1725. err:
  1726. kfree(pkgbuf);
  1727. }
  1728. static int bnxt_get_eeprom(struct net_device *dev,
  1729. struct ethtool_eeprom *eeprom,
  1730. u8 *data)
  1731. {
  1732. u32 index;
  1733. u32 offset;
  1734. if (eeprom->offset == 0) /* special offset value to get directory */
  1735. return bnxt_get_nvram_directory(dev, eeprom->len, data);
  1736. index = eeprom->offset >> 24;
  1737. offset = eeprom->offset & 0xffffff;
  1738. if (index == 0) {
  1739. netdev_err(dev, "unsupported index value: %d\n", index);
  1740. return -EINVAL;
  1741. }
  1742. return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
  1743. }
  1744. static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
  1745. {
  1746. struct bnxt *bp = netdev_priv(dev);
  1747. struct hwrm_nvm_erase_dir_entry_input req = {0};
  1748. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
  1749. req.dir_idx = cpu_to_le16(index);
  1750. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1751. }
  1752. static int bnxt_set_eeprom(struct net_device *dev,
  1753. struct ethtool_eeprom *eeprom,
  1754. u8 *data)
  1755. {
  1756. struct bnxt *bp = netdev_priv(dev);
  1757. u8 index, dir_op;
  1758. u16 type, ext, ordinal, attr;
  1759. if (!BNXT_PF(bp)) {
  1760. netdev_err(dev, "NVM write not supported from a virtual function\n");
  1761. return -EINVAL;
  1762. }
  1763. type = eeprom->magic >> 16;
  1764. if (type == 0xffff) { /* special value for directory operations */
  1765. index = eeprom->magic & 0xff;
  1766. dir_op = eeprom->magic >> 8;
  1767. if (index == 0)
  1768. return -EINVAL;
  1769. switch (dir_op) {
  1770. case 0x0e: /* erase */
  1771. if (eeprom->offset != ~eeprom->magic)
  1772. return -EINVAL;
  1773. return bnxt_erase_nvram_directory(dev, index - 1);
  1774. default:
  1775. return -EINVAL;
  1776. }
  1777. }
  1778. /* Create or re-write an NVM item: */
  1779. if (bnxt_dir_type_is_executable(type) == true)
  1780. return -EOPNOTSUPP;
  1781. ext = eeprom->magic & 0xffff;
  1782. ordinal = eeprom->offset >> 16;
  1783. attr = eeprom->offset & 0xffff;
  1784. return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
  1785. eeprom->len);
  1786. }
  1787. static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1788. {
  1789. struct bnxt *bp = netdev_priv(dev);
  1790. struct ethtool_eee *eee = &bp->eee;
  1791. struct bnxt_link_info *link_info = &bp->link_info;
  1792. u32 advertising =
  1793. _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
  1794. int rc = 0;
  1795. if (!BNXT_SINGLE_PF(bp))
  1796. return -EOPNOTSUPP;
  1797. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1798. return -EOPNOTSUPP;
  1799. if (!edata->eee_enabled)
  1800. goto eee_ok;
  1801. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
  1802. netdev_warn(dev, "EEE requires autoneg\n");
  1803. return -EINVAL;
  1804. }
  1805. if (edata->tx_lpi_enabled) {
  1806. if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
  1807. edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
  1808. netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
  1809. bp->lpi_tmr_lo, bp->lpi_tmr_hi);
  1810. return -EINVAL;
  1811. } else if (!bp->lpi_tmr_hi) {
  1812. edata->tx_lpi_timer = eee->tx_lpi_timer;
  1813. }
  1814. }
  1815. if (!edata->advertised) {
  1816. edata->advertised = advertising & eee->supported;
  1817. } else if (edata->advertised & ~advertising) {
  1818. netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
  1819. edata->advertised, advertising);
  1820. return -EINVAL;
  1821. }
  1822. eee->advertised = edata->advertised;
  1823. eee->tx_lpi_enabled = edata->tx_lpi_enabled;
  1824. eee->tx_lpi_timer = edata->tx_lpi_timer;
  1825. eee_ok:
  1826. eee->eee_enabled = edata->eee_enabled;
  1827. if (netif_running(dev))
  1828. rc = bnxt_hwrm_set_link_setting(bp, false, true);
  1829. return rc;
  1830. }
  1831. static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1832. {
  1833. struct bnxt *bp = netdev_priv(dev);
  1834. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1835. return -EOPNOTSUPP;
  1836. *edata = bp->eee;
  1837. if (!bp->eee.eee_enabled) {
  1838. /* Preserve tx_lpi_timer so that the last value will be used
  1839. * by default when it is re-enabled.
  1840. */
  1841. edata->advertised = 0;
  1842. edata->tx_lpi_enabled = 0;
  1843. }
  1844. if (!bp->eee.eee_active)
  1845. edata->lp_advertised = 0;
  1846. return 0;
  1847. }
  1848. static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
  1849. u16 page_number, u16 start_addr,
  1850. u16 data_length, u8 *buf)
  1851. {
  1852. struct hwrm_port_phy_i2c_read_input req = {0};
  1853. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1854. int rc, byte_offset = 0;
  1855. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1856. req.i2c_slave_addr = i2c_addr;
  1857. req.page_number = cpu_to_le16(page_number);
  1858. req.port_id = cpu_to_le16(bp->pf.port_id);
  1859. do {
  1860. u16 xfer_size;
  1861. xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
  1862. data_length -= xfer_size;
  1863. req.page_offset = cpu_to_le16(start_addr + byte_offset);
  1864. req.data_length = xfer_size;
  1865. req.enables = cpu_to_le32(start_addr + byte_offset ?
  1866. PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
  1867. mutex_lock(&bp->hwrm_cmd_lock);
  1868. rc = _hwrm_send_message(bp, &req, sizeof(req),
  1869. HWRM_CMD_TIMEOUT);
  1870. if (!rc)
  1871. memcpy(buf + byte_offset, output->data, xfer_size);
  1872. mutex_unlock(&bp->hwrm_cmd_lock);
  1873. byte_offset += xfer_size;
  1874. } while (!rc && data_length > 0);
  1875. return rc;
  1876. }
  1877. static int bnxt_get_module_info(struct net_device *dev,
  1878. struct ethtool_modinfo *modinfo)
  1879. {
  1880. struct bnxt *bp = netdev_priv(dev);
  1881. struct hwrm_port_phy_i2c_read_input req = {0};
  1882. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1883. int rc;
  1884. /* No point in going further if phy status indicates
  1885. * module is not inserted or if it is powered down or
  1886. * if it is of type 10GBase-T
  1887. */
  1888. if (bp->link_info.module_status >
  1889. PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
  1890. return -EOPNOTSUPP;
  1891. /* This feature is not supported in older firmware versions */
  1892. if (bp->hwrm_spec_code < 0x10202)
  1893. return -EOPNOTSUPP;
  1894. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1895. req.i2c_slave_addr = I2C_DEV_ADDR_A0;
  1896. req.page_number = 0;
  1897. req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
  1898. req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
  1899. req.port_id = cpu_to_le16(bp->pf.port_id);
  1900. mutex_lock(&bp->hwrm_cmd_lock);
  1901. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1902. if (!rc) {
  1903. u32 module_id = le32_to_cpu(output->data[0]);
  1904. switch (module_id) {
  1905. case SFF_MODULE_ID_SFP:
  1906. modinfo->type = ETH_MODULE_SFF_8472;
  1907. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  1908. break;
  1909. case SFF_MODULE_ID_QSFP:
  1910. case SFF_MODULE_ID_QSFP_PLUS:
  1911. modinfo->type = ETH_MODULE_SFF_8436;
  1912. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1913. break;
  1914. case SFF_MODULE_ID_QSFP28:
  1915. modinfo->type = ETH_MODULE_SFF_8636;
  1916. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  1917. break;
  1918. default:
  1919. rc = -EOPNOTSUPP;
  1920. break;
  1921. }
  1922. }
  1923. mutex_unlock(&bp->hwrm_cmd_lock);
  1924. return rc;
  1925. }
  1926. static int bnxt_get_module_eeprom(struct net_device *dev,
  1927. struct ethtool_eeprom *eeprom,
  1928. u8 *data)
  1929. {
  1930. struct bnxt *bp = netdev_priv(dev);
  1931. u16 start = eeprom->offset, length = eeprom->len;
  1932. int rc = 0;
  1933. memset(data, 0, eeprom->len);
  1934. /* Read A0 portion of the EEPROM */
  1935. if (start < ETH_MODULE_SFF_8436_LEN) {
  1936. if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
  1937. length = ETH_MODULE_SFF_8436_LEN - start;
  1938. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
  1939. start, length, data);
  1940. if (rc)
  1941. return rc;
  1942. start += length;
  1943. data += length;
  1944. length = eeprom->len - length;
  1945. }
  1946. /* Read A2 portion of the EEPROM */
  1947. if (length) {
  1948. start -= ETH_MODULE_SFF_8436_LEN;
  1949. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
  1950. start, length, data);
  1951. }
  1952. return rc;
  1953. }
  1954. static int bnxt_nway_reset(struct net_device *dev)
  1955. {
  1956. int rc = 0;
  1957. struct bnxt *bp = netdev_priv(dev);
  1958. struct bnxt_link_info *link_info = &bp->link_info;
  1959. if (!BNXT_SINGLE_PF(bp))
  1960. return -EOPNOTSUPP;
  1961. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1962. return -EINVAL;
  1963. if (netif_running(dev))
  1964. rc = bnxt_hwrm_set_link_setting(bp, true, false);
  1965. return rc;
  1966. }
  1967. static int bnxt_set_phys_id(struct net_device *dev,
  1968. enum ethtool_phys_id_state state)
  1969. {
  1970. struct hwrm_port_led_cfg_input req = {0};
  1971. struct bnxt *bp = netdev_priv(dev);
  1972. struct bnxt_pf_info *pf = &bp->pf;
  1973. struct bnxt_led_cfg *led_cfg;
  1974. u8 led_state;
  1975. __le16 duration;
  1976. int i, rc;
  1977. if (!bp->num_leds || BNXT_VF(bp))
  1978. return -EOPNOTSUPP;
  1979. if (state == ETHTOOL_ID_ACTIVE) {
  1980. led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
  1981. duration = cpu_to_le16(500);
  1982. } else if (state == ETHTOOL_ID_INACTIVE) {
  1983. led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
  1984. duration = cpu_to_le16(0);
  1985. } else {
  1986. return -EINVAL;
  1987. }
  1988. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
  1989. req.port_id = cpu_to_le16(pf->port_id);
  1990. req.num_leds = bp->num_leds;
  1991. led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
  1992. for (i = 0; i < bp->num_leds; i++, led_cfg++) {
  1993. req.enables |= BNXT_LED_DFLT_ENABLES(i);
  1994. led_cfg->led_id = bp->leds[i].led_id;
  1995. led_cfg->led_state = led_state;
  1996. led_cfg->led_blink_on = duration;
  1997. led_cfg->led_blink_off = duration;
  1998. led_cfg->led_group_id = bp->leds[i].led_group_id;
  1999. }
  2000. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2001. if (rc)
  2002. rc = -EIO;
  2003. return rc;
  2004. }
  2005. static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
  2006. {
  2007. struct hwrm_selftest_irq_input req = {0};
  2008. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
  2009. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2010. }
  2011. static int bnxt_test_irq(struct bnxt *bp)
  2012. {
  2013. int i;
  2014. for (i = 0; i < bp->cp_nr_rings; i++) {
  2015. u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
  2016. int rc;
  2017. rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
  2018. if (rc)
  2019. return rc;
  2020. }
  2021. return 0;
  2022. }
  2023. static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
  2024. {
  2025. struct hwrm_port_mac_cfg_input req = {0};
  2026. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
  2027. req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
  2028. if (enable)
  2029. req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
  2030. else
  2031. req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
  2032. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2033. }
  2034. static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
  2035. struct hwrm_port_phy_cfg_input *req)
  2036. {
  2037. struct bnxt_link_info *link_info = &bp->link_info;
  2038. u16 fw_advertising = link_info->advertising;
  2039. u16 fw_speed;
  2040. int rc;
  2041. if (!link_info->autoneg)
  2042. return 0;
  2043. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
  2044. if (netif_carrier_ok(bp->dev))
  2045. fw_speed = bp->link_info.link_speed;
  2046. else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
  2047. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
  2048. else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
  2049. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
  2050. else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
  2051. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
  2052. else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
  2053. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
  2054. req->force_link_speed = cpu_to_le16(fw_speed);
  2055. req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
  2056. PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
  2057. rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
  2058. req->flags = 0;
  2059. req->force_link_speed = cpu_to_le16(0);
  2060. return rc;
  2061. }
  2062. static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable)
  2063. {
  2064. struct hwrm_port_phy_cfg_input req = {0};
  2065. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
  2066. if (enable) {
  2067. bnxt_disable_an_for_lpbk(bp, &req);
  2068. req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
  2069. } else {
  2070. req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
  2071. }
  2072. req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
  2073. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2074. }
  2075. static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
  2076. u32 raw_cons, int pkt_size)
  2077. {
  2078. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  2079. struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
  2080. struct bnxt_sw_rx_bd *rx_buf;
  2081. struct rx_cmp *rxcmp;
  2082. u16 cp_cons, cons;
  2083. u8 *data;
  2084. u32 len;
  2085. int i;
  2086. cp_cons = RING_CMP(raw_cons);
  2087. rxcmp = (struct rx_cmp *)
  2088. &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
  2089. cons = rxcmp->rx_cmp_opaque;
  2090. rx_buf = &rxr->rx_buf_ring[cons];
  2091. data = rx_buf->data_ptr;
  2092. len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
  2093. if (len != pkt_size)
  2094. return -EIO;
  2095. i = ETH_ALEN;
  2096. if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
  2097. return -EIO;
  2098. i += ETH_ALEN;
  2099. for ( ; i < pkt_size; i++) {
  2100. if (data[i] != (u8)(i & 0xff))
  2101. return -EIO;
  2102. }
  2103. return 0;
  2104. }
  2105. static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
  2106. {
  2107. struct bnxt_napi *bnapi = bp->bnapi[0];
  2108. struct bnxt_cp_ring_info *cpr;
  2109. struct tx_cmp *txcmp;
  2110. int rc = -EIO;
  2111. u32 raw_cons;
  2112. u32 cons;
  2113. int i;
  2114. cpr = &bnapi->cp_ring;
  2115. raw_cons = cpr->cp_raw_cons;
  2116. for (i = 0; i < 200; i++) {
  2117. cons = RING_CMP(raw_cons);
  2118. txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
  2119. if (!TX_CMP_VALID(txcmp, raw_cons)) {
  2120. udelay(5);
  2121. continue;
  2122. }
  2123. /* The valid test of the entry must be done first before
  2124. * reading any further.
  2125. */
  2126. dma_rmb();
  2127. if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
  2128. rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
  2129. raw_cons = NEXT_RAW_CMP(raw_cons);
  2130. raw_cons = NEXT_RAW_CMP(raw_cons);
  2131. break;
  2132. }
  2133. raw_cons = NEXT_RAW_CMP(raw_cons);
  2134. }
  2135. cpr->cp_raw_cons = raw_cons;
  2136. return rc;
  2137. }
  2138. static int bnxt_run_loopback(struct bnxt *bp)
  2139. {
  2140. struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
  2141. int pkt_size, i = 0;
  2142. struct sk_buff *skb;
  2143. dma_addr_t map;
  2144. u8 *data;
  2145. int rc;
  2146. pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
  2147. skb = netdev_alloc_skb(bp->dev, pkt_size);
  2148. if (!skb)
  2149. return -ENOMEM;
  2150. data = skb_put(skb, pkt_size);
  2151. eth_broadcast_addr(data);
  2152. i += ETH_ALEN;
  2153. ether_addr_copy(&data[i], bp->dev->dev_addr);
  2154. i += ETH_ALEN;
  2155. for ( ; i < pkt_size; i++)
  2156. data[i] = (u8)(i & 0xff);
  2157. map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
  2158. PCI_DMA_TODEVICE);
  2159. if (dma_mapping_error(&bp->pdev->dev, map)) {
  2160. dev_kfree_skb(skb);
  2161. return -EIO;
  2162. }
  2163. bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
  2164. /* Sync BD data before updating doorbell */
  2165. wmb();
  2166. bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod);
  2167. rc = bnxt_poll_loopback(bp, pkt_size);
  2168. dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
  2169. dev_kfree_skb(skb);
  2170. return rc;
  2171. }
  2172. static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
  2173. {
  2174. struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
  2175. struct hwrm_selftest_exec_input req = {0};
  2176. int rc;
  2177. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
  2178. mutex_lock(&bp->hwrm_cmd_lock);
  2179. resp->test_success = 0;
  2180. req.flags = test_mask;
  2181. rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
  2182. *test_results = resp->test_success;
  2183. mutex_unlock(&bp->hwrm_cmd_lock);
  2184. return rc;
  2185. }
  2186. #define BNXT_DRV_TESTS 3
  2187. #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
  2188. #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
  2189. #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
  2190. static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
  2191. u64 *buf)
  2192. {
  2193. struct bnxt *bp = netdev_priv(dev);
  2194. bool offline = false;
  2195. u8 test_results = 0;
  2196. u8 test_mask = 0;
  2197. int rc, i;
  2198. if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
  2199. return;
  2200. memset(buf, 0, sizeof(u64) * bp->num_tests);
  2201. if (!netif_running(dev)) {
  2202. etest->flags |= ETH_TEST_FL_FAILED;
  2203. return;
  2204. }
  2205. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  2206. if (bp->pf.active_vfs) {
  2207. etest->flags |= ETH_TEST_FL_FAILED;
  2208. netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
  2209. return;
  2210. }
  2211. offline = true;
  2212. }
  2213. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2214. u8 bit_val = 1 << i;
  2215. if (!(bp->test_info->offline_mask & bit_val))
  2216. test_mask |= bit_val;
  2217. else if (offline)
  2218. test_mask |= bit_val;
  2219. }
  2220. if (!offline) {
  2221. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2222. } else {
  2223. rc = bnxt_close_nic(bp, false, false);
  2224. if (rc)
  2225. return;
  2226. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2227. buf[BNXT_MACLPBK_TEST_IDX] = 1;
  2228. bnxt_hwrm_mac_loopback(bp, true);
  2229. msleep(250);
  2230. rc = bnxt_half_open_nic(bp);
  2231. if (rc) {
  2232. bnxt_hwrm_mac_loopback(bp, false);
  2233. etest->flags |= ETH_TEST_FL_FAILED;
  2234. return;
  2235. }
  2236. if (bnxt_run_loopback(bp))
  2237. etest->flags |= ETH_TEST_FL_FAILED;
  2238. else
  2239. buf[BNXT_MACLPBK_TEST_IDX] = 0;
  2240. bnxt_hwrm_mac_loopback(bp, false);
  2241. bnxt_hwrm_phy_loopback(bp, true);
  2242. msleep(1000);
  2243. if (bnxt_run_loopback(bp)) {
  2244. buf[BNXT_PHYLPBK_TEST_IDX] = 1;
  2245. etest->flags |= ETH_TEST_FL_FAILED;
  2246. }
  2247. bnxt_hwrm_phy_loopback(bp, false);
  2248. bnxt_half_close_nic(bp);
  2249. bnxt_open_nic(bp, false, true);
  2250. }
  2251. if (bnxt_test_irq(bp)) {
  2252. buf[BNXT_IRQ_TEST_IDX] = 1;
  2253. etest->flags |= ETH_TEST_FL_FAILED;
  2254. }
  2255. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2256. u8 bit_val = 1 << i;
  2257. if ((test_mask & bit_val) && !(test_results & bit_val)) {
  2258. buf[i] = 1;
  2259. etest->flags |= ETH_TEST_FL_FAILED;
  2260. }
  2261. }
  2262. }
  2263. static int bnxt_reset(struct net_device *dev, u32 *flags)
  2264. {
  2265. struct bnxt *bp = netdev_priv(dev);
  2266. int rc = 0;
  2267. if (!BNXT_PF(bp)) {
  2268. netdev_err(dev, "Reset is not supported from a VF\n");
  2269. return -EOPNOTSUPP;
  2270. }
  2271. if (pci_vfs_assigned(bp->pdev)) {
  2272. netdev_err(dev,
  2273. "Reset not allowed when VFs are assigned to VMs\n");
  2274. return -EBUSY;
  2275. }
  2276. if (*flags == ETH_RESET_ALL) {
  2277. /* This feature is not supported in older firmware versions */
  2278. if (bp->hwrm_spec_code < 0x10803)
  2279. return -EOPNOTSUPP;
  2280. rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP);
  2281. if (!rc) {
  2282. netdev_info(dev, "Reset request successful. Reload driver to complete reset\n");
  2283. *flags = 0;
  2284. }
  2285. } else if (*flags == ETH_RESET_AP) {
  2286. /* This feature is not supported in older firmware versions */
  2287. if (bp->hwrm_spec_code < 0x10803)
  2288. return -EOPNOTSUPP;
  2289. rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP);
  2290. if (!rc) {
  2291. netdev_info(dev, "Reset Application Processor request successful.\n");
  2292. *flags = 0;
  2293. }
  2294. } else {
  2295. rc = -EINVAL;
  2296. }
  2297. return rc;
  2298. }
  2299. void bnxt_ethtool_init(struct bnxt *bp)
  2300. {
  2301. struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
  2302. struct hwrm_selftest_qlist_input req = {0};
  2303. struct bnxt_test_info *test_info;
  2304. struct net_device *dev = bp->dev;
  2305. int i, rc;
  2306. bnxt_get_pkgver(dev);
  2307. if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
  2308. return;
  2309. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
  2310. mutex_lock(&bp->hwrm_cmd_lock);
  2311. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2312. if (rc)
  2313. goto ethtool_init_exit;
  2314. test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
  2315. if (!test_info)
  2316. goto ethtool_init_exit;
  2317. bp->test_info = test_info;
  2318. bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
  2319. if (bp->num_tests > BNXT_MAX_TEST)
  2320. bp->num_tests = BNXT_MAX_TEST;
  2321. test_info->offline_mask = resp->offline_tests;
  2322. test_info->timeout = le16_to_cpu(resp->test_timeout);
  2323. if (!test_info->timeout)
  2324. test_info->timeout = HWRM_CMD_TIMEOUT;
  2325. for (i = 0; i < bp->num_tests; i++) {
  2326. char *str = test_info->string[i];
  2327. char *fw_str = resp->test0_name + i * 32;
  2328. if (i == BNXT_MACLPBK_TEST_IDX) {
  2329. strcpy(str, "Mac loopback test (offline)");
  2330. } else if (i == BNXT_PHYLPBK_TEST_IDX) {
  2331. strcpy(str, "Phy loopback test (offline)");
  2332. } else if (i == BNXT_IRQ_TEST_IDX) {
  2333. strcpy(str, "Interrupt_test (offline)");
  2334. } else {
  2335. strlcpy(str, fw_str, ETH_GSTRING_LEN);
  2336. strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
  2337. if (test_info->offline_mask & (1 << i))
  2338. strncat(str, " (offline)",
  2339. ETH_GSTRING_LEN - strlen(str));
  2340. else
  2341. strncat(str, " (online)",
  2342. ETH_GSTRING_LEN - strlen(str));
  2343. }
  2344. }
  2345. ethtool_init_exit:
  2346. mutex_unlock(&bp->hwrm_cmd_lock);
  2347. }
  2348. void bnxt_ethtool_free(struct bnxt *bp)
  2349. {
  2350. kfree(bp->test_info);
  2351. bp->test_info = NULL;
  2352. }
  2353. const struct ethtool_ops bnxt_ethtool_ops = {
  2354. .get_link_ksettings = bnxt_get_link_ksettings,
  2355. .set_link_ksettings = bnxt_set_link_ksettings,
  2356. .get_pauseparam = bnxt_get_pauseparam,
  2357. .set_pauseparam = bnxt_set_pauseparam,
  2358. .get_drvinfo = bnxt_get_drvinfo,
  2359. .get_wol = bnxt_get_wol,
  2360. .set_wol = bnxt_set_wol,
  2361. .get_coalesce = bnxt_get_coalesce,
  2362. .set_coalesce = bnxt_set_coalesce,
  2363. .get_msglevel = bnxt_get_msglevel,
  2364. .set_msglevel = bnxt_set_msglevel,
  2365. .get_sset_count = bnxt_get_sset_count,
  2366. .get_strings = bnxt_get_strings,
  2367. .get_ethtool_stats = bnxt_get_ethtool_stats,
  2368. .set_ringparam = bnxt_set_ringparam,
  2369. .get_ringparam = bnxt_get_ringparam,
  2370. .get_channels = bnxt_get_channels,
  2371. .set_channels = bnxt_set_channels,
  2372. .get_rxnfc = bnxt_get_rxnfc,
  2373. .set_rxnfc = bnxt_set_rxnfc,
  2374. .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
  2375. .get_rxfh_key_size = bnxt_get_rxfh_key_size,
  2376. .get_rxfh = bnxt_get_rxfh,
  2377. .flash_device = bnxt_flash_device,
  2378. .get_eeprom_len = bnxt_get_eeprom_len,
  2379. .get_eeprom = bnxt_get_eeprom,
  2380. .set_eeprom = bnxt_set_eeprom,
  2381. .get_link = bnxt_get_link,
  2382. .get_eee = bnxt_get_eee,
  2383. .set_eee = bnxt_set_eee,
  2384. .get_module_info = bnxt_get_module_info,
  2385. .get_module_eeprom = bnxt_get_module_eeprom,
  2386. .nway_reset = bnxt_nway_reset,
  2387. .set_phys_id = bnxt_set_phys_id,
  2388. .self_test = bnxt_self_test,
  2389. .reset = bnxt_reset,
  2390. };