em28xx-i2c.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // em28xx-i2c.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
  4. //
  5. // Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
  6. // Markus Rechberger <mrechberger@gmail.com>
  7. // Mauro Carvalho Chehab <mchehab@kernel.org>
  8. // Sascha Sommer <saschasommer@freenet.de>
  9. // Copyright (C) 2013 Frank Schäfer <fschaefer.oss@googlemail.com>
  10. //
  11. // This program is free software; you can redistribute it and/or modify
  12. // it under the terms of the GNU General Public License as published by
  13. // the Free Software Foundation; either version 2 of the License, or
  14. // (at your option) any later version.
  15. //
  16. // This program is distributed in the hope that it will be useful,
  17. // but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. // GNU General Public License for more details.
  20. #include "em28xx.h"
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/usb.h>
  24. #include <linux/i2c.h>
  25. #include <linux/jiffies.h>
  26. #include "tuner-xc2028.h"
  27. #include <media/v4l2-common.h>
  28. #include <media/tuner.h>
  29. /* ----------------------------------------------------------- */
  30. static unsigned int i2c_scan;
  31. module_param(i2c_scan, int, 0444);
  32. MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time");
  33. static unsigned int i2c_debug;
  34. module_param(i2c_debug, int, 0644);
  35. MODULE_PARM_DESC(i2c_debug, "i2c debug message level (1: normal debug, 2: show I2C transfers)");
  36. #define dprintk(level, fmt, arg...) do { \
  37. if (i2c_debug > level) \
  38. dev_printk(KERN_DEBUG, &dev->intf->dev, \
  39. "i2c: %s: " fmt, __func__, ## arg); \
  40. } while (0)
  41. /*
  42. * Time in msecs to wait for i2c xfers to finish.
  43. * 35ms is the maximum time a SMBUS device could wait when
  44. * clock stretching is used. As the transfer itself will take
  45. * some time to happen, set it to 35 ms.
  46. *
  47. * Ok, I2C doesn't specify any limit. So, eventually, we may need
  48. * to increase this timeout.
  49. */
  50. #define EM28XX_I2C_XFER_TIMEOUT 35 /* ms */
  51. static int em28xx_i2c_timeout(struct em28xx *dev)
  52. {
  53. int time = EM28XX_I2C_XFER_TIMEOUT;
  54. switch (dev->i2c_speed & 0x03) {
  55. case EM28XX_I2C_FREQ_25_KHZ:
  56. time += 4; /* Assume 4 ms for transfers */
  57. break;
  58. case EM28XX_I2C_FREQ_100_KHZ:
  59. case EM28XX_I2C_FREQ_400_KHZ:
  60. time += 1; /* Assume 1 ms for transfers */
  61. break;
  62. default: /* EM28XX_I2C_FREQ_1_5_MHZ */
  63. break;
  64. }
  65. return msecs_to_jiffies(time);
  66. }
  67. /*
  68. * em2800_i2c_send_bytes()
  69. * send up to 4 bytes to the em2800 i2c device
  70. */
  71. static int em2800_i2c_send_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len)
  72. {
  73. unsigned long timeout = jiffies + em28xx_i2c_timeout(dev);
  74. int ret;
  75. u8 b2[6];
  76. if (len < 1 || len > 4)
  77. return -EOPNOTSUPP;
  78. b2[5] = 0x80 + len - 1;
  79. b2[4] = addr;
  80. b2[3] = buf[0];
  81. if (len > 1)
  82. b2[2] = buf[1];
  83. if (len > 2)
  84. b2[1] = buf[2];
  85. if (len > 3)
  86. b2[0] = buf[3];
  87. /* trigger write */
  88. ret = dev->em28xx_write_regs(dev, 4 - len, &b2[4 - len], 2 + len);
  89. if (ret != 2 + len) {
  90. dev_warn(&dev->intf->dev,
  91. "failed to trigger write to i2c address 0x%x (error=%i)\n",
  92. addr, ret);
  93. return (ret < 0) ? ret : -EIO;
  94. }
  95. /* wait for completion */
  96. while (time_is_after_jiffies(timeout)) {
  97. ret = dev->em28xx_read_reg(dev, 0x05);
  98. if (ret == 0x80 + len - 1)
  99. return len;
  100. if (ret == 0x94 + len - 1) {
  101. dprintk(1, "R05 returned 0x%02x: I2C ACK error\n", ret);
  102. return -ENXIO;
  103. }
  104. if (ret < 0) {
  105. dev_warn(&dev->intf->dev,
  106. "failed to get i2c transfer status from bridge register (error=%i)\n",
  107. ret);
  108. return ret;
  109. }
  110. usleep_range(5000, 6000);
  111. }
  112. dprintk(0, "write to i2c device at 0x%x timed out\n", addr);
  113. return -ETIMEDOUT;
  114. }
  115. /*
  116. * em2800_i2c_recv_bytes()
  117. * read up to 4 bytes from the em2800 i2c device
  118. */
  119. static int em2800_i2c_recv_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len)
  120. {
  121. unsigned long timeout = jiffies + em28xx_i2c_timeout(dev);
  122. u8 buf2[4];
  123. int ret;
  124. int i;
  125. if (len < 1 || len > 4)
  126. return -EOPNOTSUPP;
  127. /* trigger read */
  128. buf2[1] = 0x84 + len - 1;
  129. buf2[0] = addr;
  130. ret = dev->em28xx_write_regs(dev, 0x04, buf2, 2);
  131. if (ret != 2) {
  132. dev_warn(&dev->intf->dev,
  133. "failed to trigger read from i2c address 0x%x (error=%i)\n",
  134. addr, ret);
  135. return (ret < 0) ? ret : -EIO;
  136. }
  137. /* wait for completion */
  138. while (time_is_after_jiffies(timeout)) {
  139. ret = dev->em28xx_read_reg(dev, 0x05);
  140. if (ret == 0x84 + len - 1)
  141. break;
  142. if (ret == 0x94 + len - 1) {
  143. dprintk(1, "R05 returned 0x%02x: I2C ACK error\n",
  144. ret);
  145. return -ENXIO;
  146. }
  147. if (ret < 0) {
  148. dev_warn(&dev->intf->dev,
  149. "failed to get i2c transfer status from bridge register (error=%i)\n",
  150. ret);
  151. return ret;
  152. }
  153. usleep_range(5000, 6000);
  154. }
  155. if (ret != 0x84 + len - 1)
  156. dprintk(0, "read from i2c device at 0x%x timed out\n", addr);
  157. /* get the received message */
  158. ret = dev->em28xx_read_reg_req_len(dev, 0x00, 4 - len, buf2, len);
  159. if (ret != len) {
  160. dev_warn(&dev->intf->dev,
  161. "reading from i2c device at 0x%x failed: couldn't get the received message from the bridge (error=%i)\n",
  162. addr, ret);
  163. return (ret < 0) ? ret : -EIO;
  164. }
  165. for (i = 0; i < len; i++)
  166. buf[i] = buf2[len - 1 - i];
  167. return ret;
  168. }
  169. /*
  170. * em2800_i2c_check_for_device()
  171. * check if there is an i2c device at the supplied address
  172. */
  173. static int em2800_i2c_check_for_device(struct em28xx *dev, u8 addr)
  174. {
  175. u8 buf;
  176. int ret;
  177. ret = em2800_i2c_recv_bytes(dev, addr, &buf, 1);
  178. if (ret == 1)
  179. return 0;
  180. return (ret < 0) ? ret : -EIO;
  181. }
  182. /*
  183. * em28xx_i2c_send_bytes()
  184. */
  185. static int em28xx_i2c_send_bytes(struct em28xx *dev, u16 addr, u8 *buf,
  186. u16 len, int stop)
  187. {
  188. unsigned long timeout = jiffies + em28xx_i2c_timeout(dev);
  189. int ret;
  190. if (len < 1 || len > 64)
  191. return -EOPNOTSUPP;
  192. /*
  193. * NOTE: limited by the USB ctrl message constraints
  194. * Zero length reads always succeed, even if no device is connected
  195. */
  196. /* Write to i2c device */
  197. ret = dev->em28xx_write_regs_req(dev, stop ? 2 : 3, addr, buf, len);
  198. if (ret != len) {
  199. if (ret < 0) {
  200. dev_warn(&dev->intf->dev,
  201. "writing to i2c device at 0x%x failed (error=%i)\n",
  202. addr, ret);
  203. return ret;
  204. }
  205. dev_warn(&dev->intf->dev,
  206. "%i bytes write to i2c device at 0x%x requested, but %i bytes written\n",
  207. len, addr, ret);
  208. return -EIO;
  209. }
  210. /* wait for completion */
  211. while (time_is_after_jiffies(timeout)) {
  212. ret = dev->em28xx_read_reg(dev, 0x05);
  213. if (ret == 0) /* success */
  214. return len;
  215. if (ret == 0x10) {
  216. dprintk(1, "I2C ACK error on writing to addr 0x%02x\n",
  217. addr);
  218. return -ENXIO;
  219. }
  220. if (ret < 0) {
  221. dev_warn(&dev->intf->dev,
  222. "failed to get i2c transfer status from bridge register (error=%i)\n",
  223. ret);
  224. return ret;
  225. }
  226. usleep_range(5000, 6000);
  227. /*
  228. * NOTE: do we really have to wait for success ?
  229. * Never seen anything else than 0x00 or 0x10
  230. * (even with high payload) ...
  231. */
  232. }
  233. if (ret == 0x02 || ret == 0x04) {
  234. /* NOTE: these errors seem to be related to clock stretching */
  235. dprintk(0,
  236. "write to i2c device at 0x%x timed out (status=%i)\n",
  237. addr, ret);
  238. return -ETIMEDOUT;
  239. }
  240. dev_warn(&dev->intf->dev,
  241. "write to i2c device at 0x%x failed with unknown error (status=%i)\n",
  242. addr, ret);
  243. return -EIO;
  244. }
  245. /*
  246. * em28xx_i2c_recv_bytes()
  247. * read a byte from the i2c device
  248. */
  249. static int em28xx_i2c_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf, u16 len)
  250. {
  251. int ret;
  252. if (len < 1 || len > 64)
  253. return -EOPNOTSUPP;
  254. /*
  255. * NOTE: limited by the USB ctrl message constraints
  256. * Zero length reads always succeed, even if no device is connected
  257. */
  258. /* Read data from i2c device */
  259. ret = dev->em28xx_read_reg_req_len(dev, 2, addr, buf, len);
  260. if (ret < 0) {
  261. dev_warn(&dev->intf->dev,
  262. "reading from i2c device at 0x%x failed (error=%i)\n",
  263. addr, ret);
  264. return ret;
  265. }
  266. /*
  267. * NOTE: some devices with two i2c busses have the bad habit to return 0
  268. * bytes if we are on bus B AND there was no write attempt to the
  269. * specified slave address before AND no device is present at the
  270. * requested slave address.
  271. * Anyway, the next check will fail with -ENXIO in this case, so avoid
  272. * spamming the system log on device probing and do nothing here.
  273. */
  274. /* Check success of the i2c operation */
  275. ret = dev->em28xx_read_reg(dev, 0x05);
  276. if (ret == 0) /* success */
  277. return len;
  278. if (ret < 0) {
  279. dev_warn(&dev->intf->dev,
  280. "failed to get i2c transfer status from bridge register (error=%i)\n",
  281. ret);
  282. return ret;
  283. }
  284. if (ret == 0x10) {
  285. dprintk(1, "I2C ACK error on writing to addr 0x%02x\n",
  286. addr);
  287. return -ENXIO;
  288. }
  289. if (ret == 0x02 || ret == 0x04) {
  290. /* NOTE: these errors seem to be related to clock stretching */
  291. dprintk(0,
  292. "write to i2c device at 0x%x timed out (status=%i)\n",
  293. addr, ret);
  294. return -ETIMEDOUT;
  295. }
  296. dev_warn(&dev->intf->dev,
  297. "write to i2c device at 0x%x failed with unknown error (status=%i)\n",
  298. addr, ret);
  299. return -EIO;
  300. }
  301. /*
  302. * em28xx_i2c_check_for_device()
  303. * check if there is a i2c_device at the supplied address
  304. */
  305. static int em28xx_i2c_check_for_device(struct em28xx *dev, u16 addr)
  306. {
  307. int ret;
  308. u8 buf;
  309. ret = em28xx_i2c_recv_bytes(dev, addr, &buf, 1);
  310. if (ret == 1)
  311. return 0;
  312. return (ret < 0) ? ret : -EIO;
  313. }
  314. /*
  315. * em25xx_bus_B_send_bytes
  316. * write bytes to the i2c device
  317. */
  318. static int em25xx_bus_B_send_bytes(struct em28xx *dev, u16 addr, u8 *buf,
  319. u16 len)
  320. {
  321. int ret;
  322. if (len < 1 || len > 64)
  323. return -EOPNOTSUPP;
  324. /*
  325. * NOTE: limited by the USB ctrl message constraints
  326. * Zero length reads always succeed, even if no device is connected
  327. */
  328. /* Set register and write value */
  329. ret = dev->em28xx_write_regs_req(dev, 0x06, addr, buf, len);
  330. if (ret != len) {
  331. if (ret < 0) {
  332. dev_warn(&dev->intf->dev,
  333. "writing to i2c device at 0x%x failed (error=%i)\n",
  334. addr, ret);
  335. return ret;
  336. }
  337. dev_warn(&dev->intf->dev,
  338. "%i bytes write to i2c device at 0x%x requested, but %i bytes written\n",
  339. len, addr, ret);
  340. return -EIO;
  341. }
  342. /* Check success */
  343. ret = dev->em28xx_read_reg_req(dev, 0x08, 0x0000);
  344. /*
  345. * NOTE: the only error we've seen so far is
  346. * 0x01 when the slave device is not present
  347. */
  348. if (!ret)
  349. return len;
  350. if (ret > 0) {
  351. dprintk(1, "Bus B R08 returned 0x%02x: I2C ACK error\n", ret);
  352. return -ENXIO;
  353. }
  354. return ret;
  355. /*
  356. * NOTE: With chip types (other chip IDs) which actually don't support
  357. * this operation, it seems to succeed ALWAYS ! (even if there is no
  358. * slave device or even no second i2c bus provided)
  359. */
  360. }
  361. /*
  362. * em25xx_bus_B_recv_bytes
  363. * read bytes from the i2c device
  364. */
  365. static int em25xx_bus_B_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf,
  366. u16 len)
  367. {
  368. int ret;
  369. if (len < 1 || len > 64)
  370. return -EOPNOTSUPP;
  371. /*
  372. * NOTE: limited by the USB ctrl message constraints
  373. * Zero length reads always succeed, even if no device is connected
  374. */
  375. /* Read value */
  376. ret = dev->em28xx_read_reg_req_len(dev, 0x06, addr, buf, len);
  377. if (ret < 0) {
  378. dev_warn(&dev->intf->dev,
  379. "reading from i2c device at 0x%x failed (error=%i)\n",
  380. addr, ret);
  381. return ret;
  382. }
  383. /*
  384. * NOTE: some devices with two i2c busses have the bad habit to return 0
  385. * bytes if we are on bus B AND there was no write attempt to the
  386. * specified slave address before AND no device is present at the
  387. * requested slave address.
  388. * Anyway, the next check will fail with -ENXIO in this case, so avoid
  389. * spamming the system log on device probing and do nothing here.
  390. */
  391. /* Check success */
  392. ret = dev->em28xx_read_reg_req(dev, 0x08, 0x0000);
  393. /*
  394. * NOTE: the only error we've seen so far is
  395. * 0x01 when the slave device is not present
  396. */
  397. if (!ret)
  398. return len;
  399. if (ret > 0) {
  400. dprintk(1, "Bus B R08 returned 0x%02x: I2C ACK error\n", ret);
  401. return -ENXIO;
  402. }
  403. return ret;
  404. /*
  405. * NOTE: With chip types (other chip IDs) which actually don't support
  406. * this operation, it seems to succeed ALWAYS ! (even if there is no
  407. * slave device or even no second i2c bus provided)
  408. */
  409. }
  410. /*
  411. * em25xx_bus_B_check_for_device()
  412. * check if there is a i2c device at the supplied address
  413. */
  414. static int em25xx_bus_B_check_for_device(struct em28xx *dev, u16 addr)
  415. {
  416. u8 buf;
  417. int ret;
  418. ret = em25xx_bus_B_recv_bytes(dev, addr, &buf, 1);
  419. if (ret < 0)
  420. return ret;
  421. return 0;
  422. /*
  423. * NOTE: With chips which do not support this operation,
  424. * it seems to succeed ALWAYS ! (even if no device connected)
  425. */
  426. }
  427. static inline int i2c_check_for_device(struct em28xx_i2c_bus *i2c_bus, u16 addr)
  428. {
  429. struct em28xx *dev = i2c_bus->dev;
  430. int rc = -EOPNOTSUPP;
  431. if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX)
  432. rc = em28xx_i2c_check_for_device(dev, addr);
  433. else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)
  434. rc = em2800_i2c_check_for_device(dev, addr);
  435. else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)
  436. rc = em25xx_bus_B_check_for_device(dev, addr);
  437. return rc;
  438. }
  439. static inline int i2c_recv_bytes(struct em28xx_i2c_bus *i2c_bus,
  440. struct i2c_msg msg)
  441. {
  442. struct em28xx *dev = i2c_bus->dev;
  443. u16 addr = msg.addr << 1;
  444. int rc = -EOPNOTSUPP;
  445. if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX)
  446. rc = em28xx_i2c_recv_bytes(dev, addr, msg.buf, msg.len);
  447. else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)
  448. rc = em2800_i2c_recv_bytes(dev, addr, msg.buf, msg.len);
  449. else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)
  450. rc = em25xx_bus_B_recv_bytes(dev, addr, msg.buf, msg.len);
  451. return rc;
  452. }
  453. static inline int i2c_send_bytes(struct em28xx_i2c_bus *i2c_bus,
  454. struct i2c_msg msg, int stop)
  455. {
  456. struct em28xx *dev = i2c_bus->dev;
  457. u16 addr = msg.addr << 1;
  458. int rc = -EOPNOTSUPP;
  459. if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX)
  460. rc = em28xx_i2c_send_bytes(dev, addr, msg.buf, msg.len, stop);
  461. else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)
  462. rc = em2800_i2c_send_bytes(dev, addr, msg.buf, msg.len);
  463. else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)
  464. rc = em25xx_bus_B_send_bytes(dev, addr, msg.buf, msg.len);
  465. return rc;
  466. }
  467. /*
  468. * em28xx_i2c_xfer()
  469. * the main i2c transfer function
  470. */
  471. static int em28xx_i2c_xfer(struct i2c_adapter *i2c_adap,
  472. struct i2c_msg msgs[], int num)
  473. {
  474. struct em28xx_i2c_bus *i2c_bus = i2c_adap->algo_data;
  475. struct em28xx *dev = i2c_bus->dev;
  476. unsigned int bus = i2c_bus->bus;
  477. int addr, rc, i;
  478. u8 reg;
  479. /*
  480. * prevent i2c xfer attempts after device is disconnected
  481. * some fe's try to do i2c writes/reads from their release
  482. * interfaces when called in disconnect path
  483. */
  484. if (dev->disconnected)
  485. return -ENODEV;
  486. if (!rt_mutex_trylock(&dev->i2c_bus_lock))
  487. return -EAGAIN;
  488. /* Switch I2C bus if needed */
  489. if (bus != dev->cur_i2c_bus &&
  490. i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX) {
  491. if (bus == 1)
  492. reg = EM2874_I2C_SECONDARY_BUS_SELECT;
  493. else
  494. reg = 0;
  495. em28xx_write_reg_bits(dev, EM28XX_R06_I2C_CLK, reg,
  496. EM2874_I2C_SECONDARY_BUS_SELECT);
  497. dev->cur_i2c_bus = bus;
  498. }
  499. if (num <= 0) {
  500. rt_mutex_unlock(&dev->i2c_bus_lock);
  501. return 0;
  502. }
  503. for (i = 0; i < num; i++) {
  504. addr = msgs[i].addr << 1;
  505. if (!msgs[i].len) {
  506. /*
  507. * no len: check only for device presence
  508. * This code is only called during device probe.
  509. */
  510. rc = i2c_check_for_device(i2c_bus, addr);
  511. if (rc == -ENXIO)
  512. rc = -ENODEV;
  513. } else if (msgs[i].flags & I2C_M_RD) {
  514. /* read bytes */
  515. rc = i2c_recv_bytes(i2c_bus, msgs[i]);
  516. } else {
  517. /* write bytes */
  518. rc = i2c_send_bytes(i2c_bus, msgs[i], i == num - 1);
  519. }
  520. if (rc < 0)
  521. goto error;
  522. dprintk(2, "%s %s addr=%02x len=%d: %*ph\n",
  523. (msgs[i].flags & I2C_M_RD) ? "read" : "write",
  524. i == num - 1 ? "stop" : "nonstop",
  525. addr, msgs[i].len,
  526. msgs[i].len, msgs[i].buf);
  527. }
  528. rt_mutex_unlock(&dev->i2c_bus_lock);
  529. return num;
  530. error:
  531. dprintk(2, "%s %s addr=%02x len=%d: %sERROR: %i\n",
  532. (msgs[i].flags & I2C_M_RD) ? "read" : "write",
  533. i == num - 1 ? "stop" : "nonstop",
  534. addr, msgs[i].len,
  535. (rc == -ENODEV) ? "no device " : "",
  536. rc);
  537. rt_mutex_unlock(&dev->i2c_bus_lock);
  538. return rc;
  539. }
  540. /*
  541. * based on linux/sunrpc/svcauth.h and linux/hash.h
  542. * The original hash function returns a different value, if arch is x86_64
  543. * or i386.
  544. */
  545. static inline unsigned long em28xx_hash_mem(char *buf, int length, int bits)
  546. {
  547. unsigned long hash = 0;
  548. unsigned long l = 0;
  549. int len = 0;
  550. unsigned char c;
  551. do {
  552. if (len == length) {
  553. c = (char)len;
  554. len = -1;
  555. } else {
  556. c = *buf++;
  557. }
  558. l = (l << 8) | c;
  559. len++;
  560. if ((len & (32 / 8 - 1)) == 0)
  561. hash = ((hash ^ l) * 0x9e370001UL);
  562. } while (len);
  563. return (hash >> (32 - bits)) & 0xffffffffUL;
  564. }
  565. /*
  566. * Helper function to read data blocks from i2c clients with 8 or 16 bit
  567. * address width, 8 bit register width and auto incrementation been activated
  568. */
  569. static int em28xx_i2c_read_block(struct em28xx *dev, unsigned int bus, u16 addr,
  570. bool addr_w16, u16 len, u8 *data)
  571. {
  572. int remain = len, rsize, rsize_max, ret;
  573. u8 buf[2];
  574. /* Sanity check */
  575. if (addr + remain > (addr_w16 * 0xff00 + 0xff + 1))
  576. return -EINVAL;
  577. /* Select address */
  578. buf[0] = addr >> 8;
  579. buf[1] = addr & 0xff;
  580. ret = i2c_master_send(&dev->i2c_client[bus],
  581. buf + !addr_w16, 1 + addr_w16);
  582. if (ret < 0)
  583. return ret;
  584. /* Read data */
  585. if (dev->board.is_em2800)
  586. rsize_max = 4;
  587. else
  588. rsize_max = 64;
  589. while (remain > 0) {
  590. if (remain > rsize_max)
  591. rsize = rsize_max;
  592. else
  593. rsize = remain;
  594. ret = i2c_master_recv(&dev->i2c_client[bus], data, rsize);
  595. if (ret < 0)
  596. return ret;
  597. remain -= rsize;
  598. data += rsize;
  599. }
  600. return len;
  601. }
  602. static int em28xx_i2c_eeprom(struct em28xx *dev, unsigned int bus,
  603. u8 **eedata, u16 *eedata_len)
  604. {
  605. const u16 len = 256;
  606. /*
  607. * FIXME common length/size for bytes to read, to display, hash
  608. * calculation and returned device dataset. Simplifies the code a lot,
  609. * but we might have to deal with multiple sizes in the future !
  610. */
  611. int err;
  612. struct em28xx_eeprom *dev_config;
  613. u8 buf, *data;
  614. *eedata = NULL;
  615. *eedata_len = 0;
  616. /* EEPROM is always on i2c bus 0 on all known devices. */
  617. dev->i2c_client[bus].addr = 0xa0 >> 1;
  618. /* Check if board has eeprom */
  619. err = i2c_master_recv(&dev->i2c_client[bus], &buf, 0);
  620. if (err < 0) {
  621. dev_info(&dev->intf->dev, "board has no eeprom\n");
  622. return -ENODEV;
  623. }
  624. data = kzalloc(len, GFP_KERNEL);
  625. if (!data)
  626. return -ENOMEM;
  627. /* Read EEPROM content */
  628. err = em28xx_i2c_read_block(dev, bus, 0x0000,
  629. dev->eeprom_addrwidth_16bit,
  630. len, data);
  631. if (err != len) {
  632. dev_err(&dev->intf->dev,
  633. "failed to read eeprom (err=%d)\n", err);
  634. goto error;
  635. }
  636. if (i2c_debug) {
  637. /* Display eeprom content */
  638. print_hex_dump(KERN_DEBUG, "em28xx eeprom ", DUMP_PREFIX_OFFSET,
  639. 16, 1, data, len, true);
  640. if (dev->eeprom_addrwidth_16bit)
  641. dev_info(&dev->intf->dev,
  642. "eeprom %06x: ... (skipped)\n", 256);
  643. }
  644. if (dev->eeprom_addrwidth_16bit &&
  645. data[0] == 0x26 && data[3] == 0x00) {
  646. /* new eeprom format; size 4-64kb */
  647. u16 mc_start;
  648. u16 hwconf_offset;
  649. dev->hash = em28xx_hash_mem(data, len, 32);
  650. mc_start = (data[1] << 8) + 4; /* usually 0x0004 */
  651. dev_info(&dev->intf->dev,
  652. "EEPROM ID = %4ph, EEPROM hash = 0x%08lx\n",
  653. data, dev->hash);
  654. dev_info(&dev->intf->dev,
  655. "EEPROM info:\n");
  656. dev_info(&dev->intf->dev,
  657. "\tmicrocode start address = 0x%04x, boot configuration = 0x%02x\n",
  658. mc_start, data[2]);
  659. /*
  660. * boot configuration (address 0x0002):
  661. * [0] microcode download speed: 1 = 400 kHz; 0 = 100 kHz
  662. * [1] always selects 12 kb RAM
  663. * [2] USB device speed: 1 = force Full Speed; 0 = auto detect
  664. * [4] 1 = force fast mode and no suspend for device testing
  665. * [5:7] USB PHY tuning registers; determined by device
  666. * characterization
  667. */
  668. /*
  669. * Read hardware config dataset offset from address
  670. * (microcode start + 46)
  671. */
  672. err = em28xx_i2c_read_block(dev, bus, mc_start + 46, 1, 2,
  673. data);
  674. if (err != 2) {
  675. dev_err(&dev->intf->dev,
  676. "failed to read hardware configuration data from eeprom (err=%d)\n",
  677. err);
  678. goto error;
  679. }
  680. /* Calculate hardware config dataset start address */
  681. hwconf_offset = mc_start + data[0] + (data[1] << 8);
  682. /* Read hardware config dataset */
  683. /*
  684. * NOTE: the microcode copy can be multiple pages long, but
  685. * we assume the hardware config dataset is the same as in
  686. * the old eeprom and not longer than 256 bytes.
  687. * tveeprom is currently also limited to 256 bytes.
  688. */
  689. err = em28xx_i2c_read_block(dev, bus, hwconf_offset, 1, len,
  690. data);
  691. if (err != len) {
  692. dev_err(&dev->intf->dev,
  693. "failed to read hardware configuration data from eeprom (err=%d)\n",
  694. err);
  695. goto error;
  696. }
  697. /* Verify hardware config dataset */
  698. /* NOTE: not all devices provide this type of dataset */
  699. if (data[0] != 0x1a || data[1] != 0xeb ||
  700. data[2] != 0x67 || data[3] != 0x95) {
  701. dev_info(&dev->intf->dev,
  702. "\tno hardware configuration dataset found in eeprom\n");
  703. kfree(data);
  704. return 0;
  705. }
  706. /*
  707. * TODO: decrypt eeprom data for camera bridges
  708. * (em25xx, em276x+)
  709. */
  710. } else if (!dev->eeprom_addrwidth_16bit &&
  711. data[0] == 0x1a && data[1] == 0xeb &&
  712. data[2] == 0x67 && data[3] == 0x95) {
  713. dev->hash = em28xx_hash_mem(data, len, 32);
  714. dev_info(&dev->intf->dev,
  715. "EEPROM ID = %4ph, EEPROM hash = 0x%08lx\n",
  716. data, dev->hash);
  717. dev_info(&dev->intf->dev,
  718. "EEPROM info:\n");
  719. } else {
  720. dev_info(&dev->intf->dev,
  721. "unknown eeprom format or eeprom corrupted !\n");
  722. err = -ENODEV;
  723. goto error;
  724. }
  725. *eedata = data;
  726. *eedata_len = len;
  727. dev_config = (void *)*eedata;
  728. switch (le16_to_cpu(dev_config->chip_conf) >> 4 & 0x3) {
  729. case 0:
  730. dev_info(&dev->intf->dev, "\tNo audio on board.\n");
  731. break;
  732. case 1:
  733. dev_info(&dev->intf->dev, "\tAC97 audio (5 sample rates)\n");
  734. break;
  735. case 2:
  736. if (dev->chip_id < CHIP_ID_EM2860)
  737. dev_info(&dev->intf->dev,
  738. "\tI2S audio, sample rate=32k\n");
  739. else
  740. dev_info(&dev->intf->dev,
  741. "\tI2S audio, 3 sample rates\n");
  742. break;
  743. case 3:
  744. if (dev->chip_id < CHIP_ID_EM2860)
  745. dev_info(&dev->intf->dev,
  746. "\tI2S audio, 3 sample rates\n");
  747. else
  748. dev_info(&dev->intf->dev,
  749. "\tI2S audio, 5 sample rates\n");
  750. break;
  751. }
  752. if (le16_to_cpu(dev_config->chip_conf) & 1 << 3)
  753. dev_info(&dev->intf->dev, "\tUSB Remote wakeup capable\n");
  754. if (le16_to_cpu(dev_config->chip_conf) & 1 << 2)
  755. dev_info(&dev->intf->dev, "\tUSB Self power capable\n");
  756. switch (le16_to_cpu(dev_config->chip_conf) & 0x3) {
  757. case 0:
  758. dev_info(&dev->intf->dev, "\t500mA max power\n");
  759. break;
  760. case 1:
  761. dev_info(&dev->intf->dev, "\t400mA max power\n");
  762. break;
  763. case 2:
  764. dev_info(&dev->intf->dev, "\t300mA max power\n");
  765. break;
  766. case 3:
  767. dev_info(&dev->intf->dev, "\t200mA max power\n");
  768. break;
  769. }
  770. dev_info(&dev->intf->dev,
  771. "\tTable at offset 0x%02x, strings=0x%04x, 0x%04x, 0x%04x\n",
  772. dev_config->string_idx_table,
  773. le16_to_cpu(dev_config->string1),
  774. le16_to_cpu(dev_config->string2),
  775. le16_to_cpu(dev_config->string3));
  776. return 0;
  777. error:
  778. kfree(data);
  779. return err;
  780. }
  781. /* ----------------------------------------------------------- */
  782. /*
  783. * functionality()
  784. */
  785. static u32 functionality(struct i2c_adapter *i2c_adap)
  786. {
  787. struct em28xx_i2c_bus *i2c_bus = i2c_adap->algo_data;
  788. if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX ||
  789. i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B) {
  790. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  791. } else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800) {
  792. return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL) &
  793. ~I2C_FUNC_SMBUS_WRITE_BLOCK_DATA;
  794. }
  795. WARN(1, "Unknown i2c bus algorithm.\n");
  796. return 0;
  797. }
  798. static const struct i2c_algorithm em28xx_algo = {
  799. .master_xfer = em28xx_i2c_xfer,
  800. .functionality = functionality,
  801. };
  802. static const struct i2c_adapter em28xx_adap_template = {
  803. .owner = THIS_MODULE,
  804. .name = "em28xx",
  805. .algo = &em28xx_algo,
  806. };
  807. static const struct i2c_client em28xx_client_template = {
  808. .name = "em28xx internal",
  809. };
  810. /* ----------------------------------------------------------- */
  811. /*
  812. * i2c_devs
  813. * incomplete list of known devices
  814. */
  815. static char *i2c_devs[128] = {
  816. [0x1c >> 1] = "lgdt330x",
  817. [0x3e >> 1] = "remote IR sensor",
  818. [0x4a >> 1] = "saa7113h",
  819. [0x52 >> 1] = "drxk",
  820. [0x60 >> 1] = "remote IR sensor",
  821. [0x8e >> 1] = "remote IR sensor",
  822. [0x86 >> 1] = "tda9887",
  823. [0x80 >> 1] = "msp34xx",
  824. [0x88 >> 1] = "msp34xx",
  825. [0xa0 >> 1] = "eeprom",
  826. [0xb0 >> 1] = "tda9874",
  827. [0xb8 >> 1] = "tvp5150a",
  828. [0xba >> 1] = "webcam sensor or tvp5150a",
  829. [0xc0 >> 1] = "tuner (analog)",
  830. [0xc2 >> 1] = "tuner (analog)",
  831. [0xc4 >> 1] = "tuner (analog)",
  832. [0xc6 >> 1] = "tuner (analog)",
  833. };
  834. /*
  835. * do_i2c_scan()
  836. * check i2c address range for devices
  837. */
  838. void em28xx_do_i2c_scan(struct em28xx *dev, unsigned int bus)
  839. {
  840. u8 i2c_devicelist[128];
  841. unsigned char buf;
  842. int i, rc;
  843. memset(i2c_devicelist, 0, ARRAY_SIZE(i2c_devicelist));
  844. for (i = 0; i < ARRAY_SIZE(i2c_devs); i++) {
  845. dev->i2c_client[bus].addr = i;
  846. rc = i2c_master_recv(&dev->i2c_client[bus], &buf, 0);
  847. if (rc < 0)
  848. continue;
  849. i2c_devicelist[i] = i;
  850. dev_info(&dev->intf->dev,
  851. "found i2c device @ 0x%x on bus %d [%s]\n",
  852. i << 1, bus, i2c_devs[i] ? i2c_devs[i] : "???");
  853. }
  854. if (bus == dev->def_i2c_bus)
  855. dev->i2c_hash = em28xx_hash_mem(i2c_devicelist,
  856. ARRAY_SIZE(i2c_devicelist), 32);
  857. }
  858. /*
  859. * em28xx_i2c_register()
  860. * register i2c bus
  861. */
  862. int em28xx_i2c_register(struct em28xx *dev, unsigned int bus,
  863. enum em28xx_i2c_algo_type algo_type)
  864. {
  865. int retval;
  866. if (WARN_ON(!dev->em28xx_write_regs || !dev->em28xx_read_reg ||
  867. !dev->em28xx_write_regs_req || !dev->em28xx_read_reg_req))
  868. return -ENODEV;
  869. if (bus >= NUM_I2C_BUSES)
  870. return -ENODEV;
  871. dev->i2c_adap[bus] = em28xx_adap_template;
  872. dev->i2c_adap[bus].dev.parent = &dev->intf->dev;
  873. strcpy(dev->i2c_adap[bus].name, dev_name(&dev->intf->dev));
  874. dev->i2c_bus[bus].bus = bus;
  875. dev->i2c_bus[bus].algo_type = algo_type;
  876. dev->i2c_bus[bus].dev = dev;
  877. dev->i2c_adap[bus].algo_data = &dev->i2c_bus[bus];
  878. retval = i2c_add_adapter(&dev->i2c_adap[bus]);
  879. if (retval < 0) {
  880. dev_err(&dev->intf->dev,
  881. "%s: i2c_add_adapter failed! retval [%d]\n",
  882. __func__, retval);
  883. return retval;
  884. }
  885. dev->i2c_client[bus] = em28xx_client_template;
  886. dev->i2c_client[bus].adapter = &dev->i2c_adap[bus];
  887. /* Up to now, all eeproms are at bus 0 */
  888. if (!bus) {
  889. retval = em28xx_i2c_eeprom(dev, bus,
  890. &dev->eedata, &dev->eedata_len);
  891. if (retval < 0 && retval != -ENODEV) {
  892. dev_err(&dev->intf->dev,
  893. "%s: em28xx_i2_eeprom failed! retval [%d]\n",
  894. __func__, retval);
  895. }
  896. }
  897. if (i2c_scan)
  898. em28xx_do_i2c_scan(dev, bus);
  899. return 0;
  900. }
  901. /*
  902. * em28xx_i2c_unregister()
  903. * unregister i2c_bus
  904. */
  905. int em28xx_i2c_unregister(struct em28xx *dev, unsigned int bus)
  906. {
  907. if (bus >= NUM_I2C_BUSES)
  908. return -ENODEV;
  909. i2c_del_adapter(&dev->i2c_adap[bus]);
  910. return 0;
  911. }