ddbridge-mci.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * ddbridge-mci.c: Digital Devices microcode interface
  4. *
  5. * Copyright (C) 2017 Digital Devices GmbH
  6. * Ralph Metzler <rjkm@metzlerbros.de>
  7. * Marcus Metzler <mocm@metzlerbros.de>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 only, as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include "ddbridge.h"
  19. #include "ddbridge-io.h"
  20. #include "ddbridge-mci.h"
  21. static LIST_HEAD(mci_list);
  22. static const u32 MCLK = (1550000000 / 12);
  23. static const u32 MAX_DEMOD_LDPC_BITRATE = (1550000000 / 6);
  24. static const u32 MAX_LDPC_BITRATE = (720000000);
  25. struct mci_base {
  26. struct list_head mci_list;
  27. void *key;
  28. struct ddb_link *link;
  29. struct completion completion;
  30. struct device *dev;
  31. struct mutex tuner_lock; /* concurrent tuner access lock */
  32. u8 adr;
  33. struct mutex mci_lock; /* concurrent MCI access lock */
  34. int count;
  35. u8 tuner_use_count[4];
  36. u8 assigned_demod[8];
  37. u32 used_ldpc_bitrate[8];
  38. u8 demod_in_use[8];
  39. u32 iq_mode;
  40. };
  41. struct mci {
  42. struct mci_base *base;
  43. struct dvb_frontend fe;
  44. int nr;
  45. int demod;
  46. int tuner;
  47. int first_time_lock;
  48. int started;
  49. struct mci_result signal_info;
  50. u32 bb_mode;
  51. };
  52. static int mci_reset(struct mci *state)
  53. {
  54. struct ddb_link *link = state->base->link;
  55. u32 status = 0;
  56. u32 timeout = 40;
  57. ddblwritel(link, MCI_CONTROL_RESET, MCI_CONTROL);
  58. ddblwritel(link, 0, MCI_CONTROL + 4); /* 1= no internal init */
  59. msleep(300);
  60. ddblwritel(link, 0, MCI_CONTROL);
  61. while (1) {
  62. status = ddblreadl(link, MCI_CONTROL);
  63. if ((status & MCI_CONTROL_READY) == MCI_CONTROL_READY)
  64. break;
  65. if (--timeout == 0)
  66. break;
  67. msleep(50);
  68. }
  69. if ((status & MCI_CONTROL_READY) == 0)
  70. return -1;
  71. if (link->ids.device == 0x0009)
  72. ddblwritel(link, SX8_TSCONFIG_MODE_NORMAL, SX8_TSCONFIG);
  73. return 0;
  74. }
  75. static int mci_config(struct mci *state, u32 config)
  76. {
  77. struct ddb_link *link = state->base->link;
  78. if (link->ids.device != 0x0009)
  79. return -EINVAL;
  80. ddblwritel(link, config, SX8_TSCONFIG);
  81. return 0;
  82. }
  83. static int _mci_cmd_unlocked(struct mci *state,
  84. u32 *cmd, u32 cmd_len,
  85. u32 *res, u32 res_len)
  86. {
  87. struct ddb_link *link = state->base->link;
  88. u32 i, val;
  89. unsigned long stat;
  90. val = ddblreadl(link, MCI_CONTROL);
  91. if (val & (MCI_CONTROL_RESET | MCI_CONTROL_START_COMMAND))
  92. return -EIO;
  93. if (cmd && cmd_len)
  94. for (i = 0; i < cmd_len; i++)
  95. ddblwritel(link, cmd[i], MCI_COMMAND + i * 4);
  96. val |= (MCI_CONTROL_START_COMMAND | MCI_CONTROL_ENABLE_DONE_INTERRUPT);
  97. ddblwritel(link, val, MCI_CONTROL);
  98. stat = wait_for_completion_timeout(&state->base->completion, HZ);
  99. if (stat == 0) {
  100. dev_warn(state->base->dev, "MCI-%d: MCI timeout\n", state->nr);
  101. return -EIO;
  102. }
  103. if (res && res_len)
  104. for (i = 0; i < res_len; i++)
  105. res[i] = ddblreadl(link, MCI_RESULT + i * 4);
  106. return 0;
  107. }
  108. static int mci_cmd(struct mci *state,
  109. struct mci_command *command,
  110. struct mci_result *result)
  111. {
  112. int stat;
  113. mutex_lock(&state->base->mci_lock);
  114. stat = _mci_cmd_unlocked(state,
  115. (u32 *)command, sizeof(*command) / sizeof(u32),
  116. (u32 *)result, sizeof(*result) / sizeof(u32));
  117. mutex_unlock(&state->base->mci_lock);
  118. return stat;
  119. }
  120. static void mci_handler(void *priv)
  121. {
  122. struct mci_base *base = (struct mci_base *)priv;
  123. complete(&base->completion);
  124. }
  125. static void release(struct dvb_frontend *fe)
  126. {
  127. struct mci *state = fe->demodulator_priv;
  128. state->base->count--;
  129. if (state->base->count == 0) {
  130. list_del(&state->base->mci_list);
  131. kfree(state->base);
  132. }
  133. kfree(state);
  134. }
  135. static int read_status(struct dvb_frontend *fe, enum fe_status *status)
  136. {
  137. int stat;
  138. struct mci *state = fe->demodulator_priv;
  139. struct mci_command cmd;
  140. struct mci_result res;
  141. cmd.command = MCI_CMD_GETSTATUS;
  142. cmd.demod = state->demod;
  143. stat = mci_cmd(state, &cmd, &res);
  144. if (stat)
  145. return stat;
  146. *status = 0x00;
  147. if (res.status == SX8_DEMOD_WAIT_MATYPE)
  148. *status = 0x0f;
  149. if (res.status == SX8_DEMOD_LOCKED)
  150. *status = 0x1f;
  151. return stat;
  152. }
  153. static int mci_set_tuner(struct dvb_frontend *fe, u32 tuner, u32 on)
  154. {
  155. struct mci *state = fe->demodulator_priv;
  156. struct mci_command cmd;
  157. memset(&cmd, 0, sizeof(cmd));
  158. cmd.tuner = state->tuner;
  159. cmd.command = on ? SX8_CMD_INPUT_ENABLE : SX8_CMD_INPUT_DISABLE;
  160. return mci_cmd(state, &cmd, NULL);
  161. }
  162. static int stop(struct dvb_frontend *fe)
  163. {
  164. struct mci *state = fe->demodulator_priv;
  165. struct mci_command cmd;
  166. u32 input = state->tuner;
  167. memset(&cmd, 0, sizeof(cmd));
  168. if (state->demod != 0xff) {
  169. cmd.command = MCI_CMD_STOP;
  170. cmd.demod = state->demod;
  171. mci_cmd(state, &cmd, NULL);
  172. if (state->base->iq_mode) {
  173. cmd.command = MCI_CMD_STOP;
  174. cmd.demod = state->demod;
  175. cmd.output = 0;
  176. mci_cmd(state, &cmd, NULL);
  177. mci_config(state, SX8_TSCONFIG_MODE_NORMAL);
  178. }
  179. }
  180. mutex_lock(&state->base->tuner_lock);
  181. state->base->tuner_use_count[input]--;
  182. if (!state->base->tuner_use_count[input])
  183. mci_set_tuner(fe, input, 0);
  184. state->base->demod_in_use[state->demod] = 0;
  185. state->base->used_ldpc_bitrate[state->nr] = 0;
  186. state->demod = 0xff;
  187. state->base->assigned_demod[state->nr] = 0xff;
  188. state->base->iq_mode = 0;
  189. mutex_unlock(&state->base->tuner_lock);
  190. state->started = 0;
  191. return 0;
  192. }
  193. static int start(struct dvb_frontend *fe, u32 flags, u32 modmask, u32 ts_config)
  194. {
  195. struct mci *state = fe->demodulator_priv;
  196. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  197. u32 used_ldpc_bitrate = 0, free_ldpc_bitrate;
  198. u32 used_demods = 0;
  199. struct mci_command cmd;
  200. u32 input = state->tuner;
  201. u32 bits_per_symbol = 0;
  202. int i, stat = 0;
  203. if (p->symbol_rate >= (MCLK / 2))
  204. flags &= ~1;
  205. if ((flags & 3) == 0)
  206. return -EINVAL;
  207. if (flags & 2) {
  208. u32 tmp = modmask;
  209. bits_per_symbol = 1;
  210. while (tmp & 1) {
  211. tmp >>= 1;
  212. bits_per_symbol++;
  213. }
  214. }
  215. mutex_lock(&state->base->tuner_lock);
  216. if (state->base->iq_mode) {
  217. stat = -EBUSY;
  218. goto unlock;
  219. }
  220. for (i = 0; i < 8; i++) {
  221. used_ldpc_bitrate += state->base->used_ldpc_bitrate[i];
  222. if (state->base->demod_in_use[i])
  223. used_demods++;
  224. }
  225. if (used_ldpc_bitrate >= MAX_LDPC_BITRATE ||
  226. ((ts_config & SX8_TSCONFIG_MODE_MASK) >
  227. SX8_TSCONFIG_MODE_NORMAL && used_demods > 0)) {
  228. stat = -EBUSY;
  229. goto unlock;
  230. }
  231. free_ldpc_bitrate = MAX_LDPC_BITRATE - used_ldpc_bitrate;
  232. if (free_ldpc_bitrate > MAX_DEMOD_LDPC_BITRATE)
  233. free_ldpc_bitrate = MAX_DEMOD_LDPC_BITRATE;
  234. while (p->symbol_rate * bits_per_symbol > free_ldpc_bitrate)
  235. bits_per_symbol--;
  236. if (bits_per_symbol < 2) {
  237. stat = -EBUSY;
  238. goto unlock;
  239. }
  240. i = (p->symbol_rate > (MCLK / 2)) ? 3 : 7;
  241. while (i >= 0 && state->base->demod_in_use[i])
  242. i--;
  243. if (i < 0) {
  244. stat = -EBUSY;
  245. goto unlock;
  246. }
  247. state->base->demod_in_use[i] = 1;
  248. state->base->used_ldpc_bitrate[state->nr] = p->symbol_rate
  249. * bits_per_symbol;
  250. state->demod = i;
  251. state->base->assigned_demod[state->nr] = i;
  252. if (!state->base->tuner_use_count[input])
  253. mci_set_tuner(fe, input, 1);
  254. state->base->tuner_use_count[input]++;
  255. state->base->iq_mode = (ts_config > 1);
  256. unlock:
  257. mutex_unlock(&state->base->tuner_lock);
  258. if (stat)
  259. return stat;
  260. memset(&cmd, 0, sizeof(cmd));
  261. if (state->base->iq_mode) {
  262. cmd.command = SX8_CMD_SELECT_IQOUT;
  263. cmd.demod = state->demod;
  264. cmd.output = 0;
  265. mci_cmd(state, &cmd, NULL);
  266. mci_config(state, ts_config);
  267. }
  268. if (p->stream_id != NO_STREAM_ID_FILTER && p->stream_id != 0x80000000)
  269. flags |= 0x80;
  270. dev_dbg(state->base->dev, "MCI-%d: tuner=%d demod=%d\n",
  271. state->nr, state->tuner, state->demod);
  272. cmd.command = MCI_CMD_SEARCH_DVBS;
  273. cmd.dvbs2_search.flags = flags;
  274. cmd.dvbs2_search.s2_modulation_mask =
  275. modmask & ((1 << (bits_per_symbol - 1)) - 1);
  276. cmd.dvbs2_search.retry = 2;
  277. cmd.dvbs2_search.frequency = p->frequency * 1000;
  278. cmd.dvbs2_search.symbol_rate = p->symbol_rate;
  279. cmd.dvbs2_search.scrambling_sequence_index =
  280. p->scrambling_sequence_index;
  281. cmd.dvbs2_search.input_stream_id =
  282. (p->stream_id != NO_STREAM_ID_FILTER) ? p->stream_id : 0;
  283. cmd.tuner = state->tuner;
  284. cmd.demod = state->demod;
  285. cmd.output = state->nr;
  286. if (p->stream_id == 0x80000000)
  287. cmd.output |= 0x80;
  288. stat = mci_cmd(state, &cmd, NULL);
  289. if (stat)
  290. stop(fe);
  291. return stat;
  292. }
  293. static int start_iq(struct dvb_frontend *fe, u32 ts_config)
  294. {
  295. struct mci *state = fe->demodulator_priv;
  296. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  297. u32 used_demods = 0;
  298. struct mci_command cmd;
  299. u32 input = state->tuner;
  300. int i, stat = 0;
  301. mutex_lock(&state->base->tuner_lock);
  302. if (state->base->iq_mode) {
  303. stat = -EBUSY;
  304. goto unlock;
  305. }
  306. for (i = 0; i < 8; i++)
  307. if (state->base->demod_in_use[i])
  308. used_demods++;
  309. if (used_demods > 0) {
  310. stat = -EBUSY;
  311. goto unlock;
  312. }
  313. state->demod = 0;
  314. state->base->assigned_demod[state->nr] = 0;
  315. if (!state->base->tuner_use_count[input])
  316. mci_set_tuner(fe, input, 1);
  317. state->base->tuner_use_count[input]++;
  318. state->base->iq_mode = (ts_config > 1);
  319. unlock:
  320. mutex_unlock(&state->base->tuner_lock);
  321. if (stat)
  322. return stat;
  323. memset(&cmd, 0, sizeof(cmd));
  324. cmd.command = SX8_CMD_START_IQ;
  325. cmd.dvbs2_search.frequency = p->frequency * 1000;
  326. cmd.dvbs2_search.symbol_rate = p->symbol_rate;
  327. cmd.tuner = state->tuner;
  328. cmd.demod = state->demod;
  329. cmd.output = 7;
  330. mci_config(state, ts_config);
  331. stat = mci_cmd(state, &cmd, NULL);
  332. if (stat)
  333. stop(fe);
  334. return stat;
  335. }
  336. static int set_parameters(struct dvb_frontend *fe)
  337. {
  338. int stat = 0;
  339. struct mci *state = fe->demodulator_priv;
  340. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  341. u32 ts_config, iq_mode = 0, isi;
  342. if (state->started)
  343. stop(fe);
  344. isi = p->stream_id;
  345. if (isi != NO_STREAM_ID_FILTER)
  346. iq_mode = (isi & 0x30000000) >> 28;
  347. switch (iq_mode) {
  348. case 1:
  349. ts_config = (SX8_TSCONFIG_TSHEADER | SX8_TSCONFIG_MODE_IQ);
  350. break;
  351. case 2:
  352. ts_config = (SX8_TSCONFIG_TSHEADER | SX8_TSCONFIG_MODE_IQ);
  353. break;
  354. default:
  355. ts_config = SX8_TSCONFIG_MODE_NORMAL;
  356. break;
  357. }
  358. if (iq_mode != 2) {
  359. u32 flags = 3;
  360. u32 mask = 3;
  361. if (p->modulation == APSK_16 ||
  362. p->modulation == APSK_32) {
  363. flags = 2;
  364. mask = 15;
  365. }
  366. stat = start(fe, flags, mask, ts_config);
  367. } else {
  368. stat = start_iq(fe, ts_config);
  369. }
  370. if (!stat) {
  371. state->started = 1;
  372. state->first_time_lock = 1;
  373. state->signal_info.status = SX8_DEMOD_WAIT_SIGNAL;
  374. }
  375. return stat;
  376. }
  377. static int tune(struct dvb_frontend *fe, bool re_tune,
  378. unsigned int mode_flags,
  379. unsigned int *delay, enum fe_status *status)
  380. {
  381. int r;
  382. if (re_tune) {
  383. r = set_parameters(fe);
  384. if (r)
  385. return r;
  386. }
  387. r = read_status(fe, status);
  388. if (r)
  389. return r;
  390. if (*status & FE_HAS_LOCK)
  391. return 0;
  392. *delay = HZ / 10;
  393. return 0;
  394. }
  395. static enum dvbfe_algo get_algo(struct dvb_frontend *fe)
  396. {
  397. return DVBFE_ALGO_HW;
  398. }
  399. static int set_input(struct dvb_frontend *fe, int input)
  400. {
  401. struct mci *state = fe->demodulator_priv;
  402. state->tuner = input;
  403. dev_dbg(state->base->dev, "MCI-%d: input=%d\n", state->nr, input);
  404. return 0;
  405. }
  406. static struct dvb_frontend_ops mci_ops = {
  407. .delsys = { SYS_DVBS, SYS_DVBS2 },
  408. .info = {
  409. .name = "Digital Devices MaxSX8 MCI DVB-S/S2/S2X",
  410. .frequency_min = 950000,
  411. .frequency_max = 2150000,
  412. .frequency_stepsize = 0,
  413. .frequency_tolerance = 0,
  414. .symbol_rate_min = 100000,
  415. .symbol_rate_max = 100000000,
  416. .caps = FE_CAN_INVERSION_AUTO |
  417. FE_CAN_FEC_AUTO |
  418. FE_CAN_QPSK |
  419. FE_CAN_2G_MODULATION |
  420. FE_CAN_MULTISTREAM,
  421. },
  422. .get_frontend_algo = get_algo,
  423. .tune = tune,
  424. .release = release,
  425. .read_status = read_status,
  426. };
  427. static struct mci_base *match_base(void *key)
  428. {
  429. struct mci_base *p;
  430. list_for_each_entry(p, &mci_list, mci_list)
  431. if (p->key == key)
  432. return p;
  433. return NULL;
  434. }
  435. static int probe(struct mci *state)
  436. {
  437. mci_reset(state);
  438. return 0;
  439. }
  440. struct dvb_frontend
  441. *ddb_mci_attach(struct ddb_input *input,
  442. int mci_type, int nr,
  443. int (**fn_set_input)(struct dvb_frontend *, int))
  444. {
  445. struct ddb_port *port = input->port;
  446. struct ddb *dev = port->dev;
  447. struct ddb_link *link = &dev->link[port->lnr];
  448. struct mci_base *base;
  449. struct mci *state;
  450. void *key = mci_type ? (void *)port : (void *)link;
  451. state = kzalloc(sizeof(*state), GFP_KERNEL);
  452. if (!state)
  453. return NULL;
  454. base = match_base(key);
  455. if (base) {
  456. base->count++;
  457. state->base = base;
  458. } else {
  459. base = kzalloc(sizeof(*base), GFP_KERNEL);
  460. if (!base)
  461. goto fail;
  462. base->key = key;
  463. base->count = 1;
  464. base->link = link;
  465. base->dev = dev->dev;
  466. mutex_init(&base->mci_lock);
  467. mutex_init(&base->tuner_lock);
  468. ddb_irq_set(dev, link->nr, 0, mci_handler, base);
  469. init_completion(&base->completion);
  470. state->base = base;
  471. if (probe(state) < 0) {
  472. kfree(base);
  473. goto fail;
  474. }
  475. list_add(&base->mci_list, &mci_list);
  476. }
  477. state->fe.ops = mci_ops;
  478. state->fe.demodulator_priv = state;
  479. state->nr = nr;
  480. *fn_set_input = set_input;
  481. state->tuner = nr;
  482. state->demod = nr;
  483. return &state->fe;
  484. fail:
  485. kfree(state);
  486. return NULL;
  487. }