pvrdma_main.c 31 KB

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  1. /*
  2. * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of EITHER the GNU General Public License
  6. * version 2 as published by the Free Software Foundation or the BSD
  7. * 2-Clause License. This program is distributed in the hope that it
  8. * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
  9. * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
  10. * See the GNU General Public License version 2 for more details at
  11. * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program available in the file COPYING in the main
  15. * directory of this source tree.
  16. *
  17. * The BSD 2-Clause License
  18. *
  19. * Redistribution and use in source and binary forms, with or
  20. * without modification, are permitted provided that the following
  21. * conditions are met:
  22. *
  23. * - Redistributions of source code must retain the above
  24. * copyright notice, this list of conditions and the following
  25. * disclaimer.
  26. *
  27. * - Redistributions in binary form must reproduce the above
  28. * copyright notice, this list of conditions and the following
  29. * disclaimer in the documentation and/or other materials
  30. * provided with the distribution.
  31. *
  32. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  33. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  34. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  35. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  36. * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  37. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  38. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  39. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  40. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  41. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  43. * OF THE POSSIBILITY OF SUCH DAMAGE.
  44. */
  45. #include <linux/errno.h>
  46. #include <linux/inetdevice.h>
  47. #include <linux/init.h>
  48. #include <linux/module.h>
  49. #include <linux/slab.h>
  50. #include <rdma/ib_addr.h>
  51. #include <rdma/ib_smi.h>
  52. #include <rdma/ib_user_verbs.h>
  53. #include <net/addrconf.h>
  54. #include "pvrdma.h"
  55. #define DRV_NAME "vmw_pvrdma"
  56. #define DRV_VERSION "1.0.1.0-k"
  57. static DEFINE_MUTEX(pvrdma_device_list_lock);
  58. static LIST_HEAD(pvrdma_device_list);
  59. static struct workqueue_struct *event_wq;
  60. static int pvrdma_add_gid(const union ib_gid *gid,
  61. const struct ib_gid_attr *attr,
  62. void **context);
  63. static int pvrdma_del_gid(const struct ib_gid_attr *attr, void **context);
  64. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  65. char *buf)
  66. {
  67. return sprintf(buf, "VMW_PVRDMA-%s\n", DRV_VERSION);
  68. }
  69. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  70. char *buf)
  71. {
  72. return sprintf(buf, "%d\n", PVRDMA_REV_ID);
  73. }
  74. static ssize_t show_board(struct device *device, struct device_attribute *attr,
  75. char *buf)
  76. {
  77. return sprintf(buf, "%d\n", PVRDMA_BOARD_ID);
  78. }
  79. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  80. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  81. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  82. static struct device_attribute *pvrdma_class_attributes[] = {
  83. &dev_attr_hw_rev,
  84. &dev_attr_hca_type,
  85. &dev_attr_board_id
  86. };
  87. static void pvrdma_get_fw_ver_str(struct ib_device *device, char *str)
  88. {
  89. struct pvrdma_dev *dev =
  90. container_of(device, struct pvrdma_dev, ib_dev);
  91. snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d\n",
  92. (int) (dev->dsr->caps.fw_ver >> 32),
  93. (int) (dev->dsr->caps.fw_ver >> 16) & 0xffff,
  94. (int) dev->dsr->caps.fw_ver & 0xffff);
  95. }
  96. static int pvrdma_init_device(struct pvrdma_dev *dev)
  97. {
  98. /* Initialize some device related stuff */
  99. spin_lock_init(&dev->cmd_lock);
  100. sema_init(&dev->cmd_sema, 1);
  101. atomic_set(&dev->num_qps, 0);
  102. atomic_set(&dev->num_srqs, 0);
  103. atomic_set(&dev->num_cqs, 0);
  104. atomic_set(&dev->num_pds, 0);
  105. atomic_set(&dev->num_ahs, 0);
  106. return 0;
  107. }
  108. static int pvrdma_port_immutable(struct ib_device *ibdev, u8 port_num,
  109. struct ib_port_immutable *immutable)
  110. {
  111. struct pvrdma_dev *dev = to_vdev(ibdev);
  112. struct ib_port_attr attr;
  113. int err;
  114. if (dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1)
  115. immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE;
  116. else if (dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V2)
  117. immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
  118. err = ib_query_port(ibdev, port_num, &attr);
  119. if (err)
  120. return err;
  121. immutable->pkey_tbl_len = attr.pkey_tbl_len;
  122. immutable->gid_tbl_len = attr.gid_tbl_len;
  123. immutable->max_mad_size = IB_MGMT_MAD_SIZE;
  124. return 0;
  125. }
  126. static struct net_device *pvrdma_get_netdev(struct ib_device *ibdev,
  127. u8 port_num)
  128. {
  129. struct net_device *netdev;
  130. struct pvrdma_dev *dev = to_vdev(ibdev);
  131. if (port_num != 1)
  132. return NULL;
  133. rcu_read_lock();
  134. netdev = dev->netdev;
  135. if (netdev)
  136. dev_hold(netdev);
  137. rcu_read_unlock();
  138. return netdev;
  139. }
  140. static int pvrdma_register_device(struct pvrdma_dev *dev)
  141. {
  142. int ret = -1;
  143. int i = 0;
  144. strlcpy(dev->ib_dev.name, "vmw_pvrdma%d", IB_DEVICE_NAME_MAX);
  145. dev->ib_dev.node_guid = dev->dsr->caps.node_guid;
  146. dev->sys_image_guid = dev->dsr->caps.sys_image_guid;
  147. dev->flags = 0;
  148. dev->ib_dev.owner = THIS_MODULE;
  149. dev->ib_dev.num_comp_vectors = 1;
  150. dev->ib_dev.dev.parent = &dev->pdev->dev;
  151. dev->ib_dev.uverbs_abi_ver = PVRDMA_UVERBS_ABI_VERSION;
  152. dev->ib_dev.uverbs_cmd_mask =
  153. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  154. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  155. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  156. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  157. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  158. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  159. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  160. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  161. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  162. (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
  163. (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
  164. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  165. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  166. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  167. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  168. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  169. (1ull << IB_USER_VERBS_CMD_POST_SEND) |
  170. (1ull << IB_USER_VERBS_CMD_POST_RECV) |
  171. (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
  172. (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
  173. dev->ib_dev.node_type = RDMA_NODE_IB_CA;
  174. dev->ib_dev.phys_port_cnt = dev->dsr->caps.phys_port_cnt;
  175. dev->ib_dev.query_device = pvrdma_query_device;
  176. dev->ib_dev.query_port = pvrdma_query_port;
  177. dev->ib_dev.query_gid = pvrdma_query_gid;
  178. dev->ib_dev.query_pkey = pvrdma_query_pkey;
  179. dev->ib_dev.modify_port = pvrdma_modify_port;
  180. dev->ib_dev.alloc_ucontext = pvrdma_alloc_ucontext;
  181. dev->ib_dev.dealloc_ucontext = pvrdma_dealloc_ucontext;
  182. dev->ib_dev.mmap = pvrdma_mmap;
  183. dev->ib_dev.alloc_pd = pvrdma_alloc_pd;
  184. dev->ib_dev.dealloc_pd = pvrdma_dealloc_pd;
  185. dev->ib_dev.create_ah = pvrdma_create_ah;
  186. dev->ib_dev.destroy_ah = pvrdma_destroy_ah;
  187. dev->ib_dev.create_qp = pvrdma_create_qp;
  188. dev->ib_dev.modify_qp = pvrdma_modify_qp;
  189. dev->ib_dev.query_qp = pvrdma_query_qp;
  190. dev->ib_dev.destroy_qp = pvrdma_destroy_qp;
  191. dev->ib_dev.post_send = pvrdma_post_send;
  192. dev->ib_dev.post_recv = pvrdma_post_recv;
  193. dev->ib_dev.create_cq = pvrdma_create_cq;
  194. dev->ib_dev.modify_cq = pvrdma_modify_cq;
  195. dev->ib_dev.resize_cq = pvrdma_resize_cq;
  196. dev->ib_dev.destroy_cq = pvrdma_destroy_cq;
  197. dev->ib_dev.poll_cq = pvrdma_poll_cq;
  198. dev->ib_dev.req_notify_cq = pvrdma_req_notify_cq;
  199. dev->ib_dev.get_dma_mr = pvrdma_get_dma_mr;
  200. dev->ib_dev.reg_user_mr = pvrdma_reg_user_mr;
  201. dev->ib_dev.dereg_mr = pvrdma_dereg_mr;
  202. dev->ib_dev.alloc_mr = pvrdma_alloc_mr;
  203. dev->ib_dev.map_mr_sg = pvrdma_map_mr_sg;
  204. dev->ib_dev.add_gid = pvrdma_add_gid;
  205. dev->ib_dev.del_gid = pvrdma_del_gid;
  206. dev->ib_dev.get_netdev = pvrdma_get_netdev;
  207. dev->ib_dev.get_port_immutable = pvrdma_port_immutable;
  208. dev->ib_dev.get_link_layer = pvrdma_port_link_layer;
  209. dev->ib_dev.get_dev_fw_str = pvrdma_get_fw_ver_str;
  210. mutex_init(&dev->port_mutex);
  211. spin_lock_init(&dev->desc_lock);
  212. dev->cq_tbl = kcalloc(dev->dsr->caps.max_cq, sizeof(struct pvrdma_cq *),
  213. GFP_KERNEL);
  214. if (!dev->cq_tbl)
  215. return ret;
  216. spin_lock_init(&dev->cq_tbl_lock);
  217. dev->qp_tbl = kcalloc(dev->dsr->caps.max_qp, sizeof(struct pvrdma_qp *),
  218. GFP_KERNEL);
  219. if (!dev->qp_tbl)
  220. goto err_cq_free;
  221. spin_lock_init(&dev->qp_tbl_lock);
  222. /* Check if SRQ is supported by backend */
  223. if (dev->dsr->caps.max_srq) {
  224. dev->ib_dev.uverbs_cmd_mask |=
  225. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  226. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  227. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  228. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  229. (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
  230. dev->ib_dev.create_srq = pvrdma_create_srq;
  231. dev->ib_dev.modify_srq = pvrdma_modify_srq;
  232. dev->ib_dev.query_srq = pvrdma_query_srq;
  233. dev->ib_dev.destroy_srq = pvrdma_destroy_srq;
  234. dev->ib_dev.post_srq_recv = pvrdma_post_srq_recv;
  235. dev->srq_tbl = kcalloc(dev->dsr->caps.max_srq,
  236. sizeof(struct pvrdma_srq *),
  237. GFP_KERNEL);
  238. if (!dev->srq_tbl)
  239. goto err_qp_free;
  240. }
  241. dev->ib_dev.driver_id = RDMA_DRIVER_VMW_PVRDMA;
  242. spin_lock_init(&dev->srq_tbl_lock);
  243. ret = ib_register_device(&dev->ib_dev, NULL);
  244. if (ret)
  245. goto err_srq_free;
  246. for (i = 0; i < ARRAY_SIZE(pvrdma_class_attributes); ++i) {
  247. ret = device_create_file(&dev->ib_dev.dev,
  248. pvrdma_class_attributes[i]);
  249. if (ret)
  250. goto err_class;
  251. }
  252. dev->ib_active = true;
  253. return 0;
  254. err_class:
  255. ib_unregister_device(&dev->ib_dev);
  256. err_srq_free:
  257. kfree(dev->srq_tbl);
  258. err_qp_free:
  259. kfree(dev->qp_tbl);
  260. err_cq_free:
  261. kfree(dev->cq_tbl);
  262. return ret;
  263. }
  264. static irqreturn_t pvrdma_intr0_handler(int irq, void *dev_id)
  265. {
  266. u32 icr = PVRDMA_INTR_CAUSE_RESPONSE;
  267. struct pvrdma_dev *dev = dev_id;
  268. dev_dbg(&dev->pdev->dev, "interrupt 0 (response) handler\n");
  269. if (!dev->pdev->msix_enabled) {
  270. /* Legacy intr */
  271. icr = pvrdma_read_reg(dev, PVRDMA_REG_ICR);
  272. if (icr == 0)
  273. return IRQ_NONE;
  274. }
  275. if (icr == PVRDMA_INTR_CAUSE_RESPONSE)
  276. complete(&dev->cmd_done);
  277. return IRQ_HANDLED;
  278. }
  279. static void pvrdma_qp_event(struct pvrdma_dev *dev, u32 qpn, int type)
  280. {
  281. struct pvrdma_qp *qp;
  282. unsigned long flags;
  283. spin_lock_irqsave(&dev->qp_tbl_lock, flags);
  284. qp = dev->qp_tbl[qpn % dev->dsr->caps.max_qp];
  285. if (qp)
  286. refcount_inc(&qp->refcnt);
  287. spin_unlock_irqrestore(&dev->qp_tbl_lock, flags);
  288. if (qp && qp->ibqp.event_handler) {
  289. struct ib_qp *ibqp = &qp->ibqp;
  290. struct ib_event e;
  291. e.device = ibqp->device;
  292. e.element.qp = ibqp;
  293. e.event = type; /* 1:1 mapping for now. */
  294. ibqp->event_handler(&e, ibqp->qp_context);
  295. }
  296. if (qp) {
  297. if (refcount_dec_and_test(&qp->refcnt))
  298. complete(&qp->free);
  299. }
  300. }
  301. static void pvrdma_cq_event(struct pvrdma_dev *dev, u32 cqn, int type)
  302. {
  303. struct pvrdma_cq *cq;
  304. unsigned long flags;
  305. spin_lock_irqsave(&dev->cq_tbl_lock, flags);
  306. cq = dev->cq_tbl[cqn % dev->dsr->caps.max_cq];
  307. if (cq)
  308. refcount_inc(&cq->refcnt);
  309. spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
  310. if (cq && cq->ibcq.event_handler) {
  311. struct ib_cq *ibcq = &cq->ibcq;
  312. struct ib_event e;
  313. e.device = ibcq->device;
  314. e.element.cq = ibcq;
  315. e.event = type; /* 1:1 mapping for now. */
  316. ibcq->event_handler(&e, ibcq->cq_context);
  317. }
  318. if (cq) {
  319. if (refcount_dec_and_test(&cq->refcnt))
  320. complete(&cq->free);
  321. }
  322. }
  323. static void pvrdma_srq_event(struct pvrdma_dev *dev, u32 srqn, int type)
  324. {
  325. struct pvrdma_srq *srq;
  326. unsigned long flags;
  327. spin_lock_irqsave(&dev->srq_tbl_lock, flags);
  328. if (dev->srq_tbl)
  329. srq = dev->srq_tbl[srqn % dev->dsr->caps.max_srq];
  330. else
  331. srq = NULL;
  332. if (srq)
  333. refcount_inc(&srq->refcnt);
  334. spin_unlock_irqrestore(&dev->srq_tbl_lock, flags);
  335. if (srq && srq->ibsrq.event_handler) {
  336. struct ib_srq *ibsrq = &srq->ibsrq;
  337. struct ib_event e;
  338. e.device = ibsrq->device;
  339. e.element.srq = ibsrq;
  340. e.event = type; /* 1:1 mapping for now. */
  341. ibsrq->event_handler(&e, ibsrq->srq_context);
  342. }
  343. if (srq) {
  344. if (refcount_dec_and_test(&srq->refcnt))
  345. complete(&srq->free);
  346. }
  347. }
  348. static void pvrdma_dispatch_event(struct pvrdma_dev *dev, int port,
  349. enum ib_event_type event)
  350. {
  351. struct ib_event ib_event;
  352. memset(&ib_event, 0, sizeof(ib_event));
  353. ib_event.device = &dev->ib_dev;
  354. ib_event.element.port_num = port;
  355. ib_event.event = event;
  356. ib_dispatch_event(&ib_event);
  357. }
  358. static void pvrdma_dev_event(struct pvrdma_dev *dev, u8 port, int type)
  359. {
  360. if (port < 1 || port > dev->dsr->caps.phys_port_cnt) {
  361. dev_warn(&dev->pdev->dev, "event on port %d\n", port);
  362. return;
  363. }
  364. pvrdma_dispatch_event(dev, port, type);
  365. }
  366. static inline struct pvrdma_eqe *get_eqe(struct pvrdma_dev *dev, unsigned int i)
  367. {
  368. return (struct pvrdma_eqe *)pvrdma_page_dir_get_ptr(
  369. &dev->async_pdir,
  370. PAGE_SIZE +
  371. sizeof(struct pvrdma_eqe) * i);
  372. }
  373. static irqreturn_t pvrdma_intr1_handler(int irq, void *dev_id)
  374. {
  375. struct pvrdma_dev *dev = dev_id;
  376. struct pvrdma_ring *ring = &dev->async_ring_state->rx;
  377. int ring_slots = (dev->dsr->async_ring_pages.num_pages - 1) *
  378. PAGE_SIZE / sizeof(struct pvrdma_eqe);
  379. unsigned int head;
  380. dev_dbg(&dev->pdev->dev, "interrupt 1 (async event) handler\n");
  381. /*
  382. * Don't process events until the IB device is registered. Otherwise
  383. * we'll try to ib_dispatch_event() on an invalid device.
  384. */
  385. if (!dev->ib_active)
  386. return IRQ_HANDLED;
  387. while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
  388. struct pvrdma_eqe *eqe;
  389. eqe = get_eqe(dev, head);
  390. switch (eqe->type) {
  391. case PVRDMA_EVENT_QP_FATAL:
  392. case PVRDMA_EVENT_QP_REQ_ERR:
  393. case PVRDMA_EVENT_QP_ACCESS_ERR:
  394. case PVRDMA_EVENT_COMM_EST:
  395. case PVRDMA_EVENT_SQ_DRAINED:
  396. case PVRDMA_EVENT_PATH_MIG:
  397. case PVRDMA_EVENT_PATH_MIG_ERR:
  398. case PVRDMA_EVENT_QP_LAST_WQE_REACHED:
  399. pvrdma_qp_event(dev, eqe->info, eqe->type);
  400. break;
  401. case PVRDMA_EVENT_CQ_ERR:
  402. pvrdma_cq_event(dev, eqe->info, eqe->type);
  403. break;
  404. case PVRDMA_EVENT_SRQ_ERR:
  405. case PVRDMA_EVENT_SRQ_LIMIT_REACHED:
  406. pvrdma_srq_event(dev, eqe->info, eqe->type);
  407. break;
  408. case PVRDMA_EVENT_PORT_ACTIVE:
  409. case PVRDMA_EVENT_PORT_ERR:
  410. case PVRDMA_EVENT_LID_CHANGE:
  411. case PVRDMA_EVENT_PKEY_CHANGE:
  412. case PVRDMA_EVENT_SM_CHANGE:
  413. case PVRDMA_EVENT_CLIENT_REREGISTER:
  414. case PVRDMA_EVENT_GID_CHANGE:
  415. pvrdma_dev_event(dev, eqe->info, eqe->type);
  416. break;
  417. case PVRDMA_EVENT_DEVICE_FATAL:
  418. pvrdma_dev_event(dev, 1, eqe->type);
  419. break;
  420. default:
  421. break;
  422. }
  423. pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
  424. }
  425. return IRQ_HANDLED;
  426. }
  427. static inline struct pvrdma_cqne *get_cqne(struct pvrdma_dev *dev,
  428. unsigned int i)
  429. {
  430. return (struct pvrdma_cqne *)pvrdma_page_dir_get_ptr(
  431. &dev->cq_pdir,
  432. PAGE_SIZE +
  433. sizeof(struct pvrdma_cqne) * i);
  434. }
  435. static irqreturn_t pvrdma_intrx_handler(int irq, void *dev_id)
  436. {
  437. struct pvrdma_dev *dev = dev_id;
  438. struct pvrdma_ring *ring = &dev->cq_ring_state->rx;
  439. int ring_slots = (dev->dsr->cq_ring_pages.num_pages - 1) * PAGE_SIZE /
  440. sizeof(struct pvrdma_cqne);
  441. unsigned int head;
  442. unsigned long flags;
  443. dev_dbg(&dev->pdev->dev, "interrupt x (completion) handler\n");
  444. while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
  445. struct pvrdma_cqne *cqne;
  446. struct pvrdma_cq *cq;
  447. cqne = get_cqne(dev, head);
  448. spin_lock_irqsave(&dev->cq_tbl_lock, flags);
  449. cq = dev->cq_tbl[cqne->info % dev->dsr->caps.max_cq];
  450. if (cq)
  451. refcount_inc(&cq->refcnt);
  452. spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
  453. if (cq && cq->ibcq.comp_handler)
  454. cq->ibcq.comp_handler(&cq->ibcq, cq->ibcq.cq_context);
  455. if (cq) {
  456. if (refcount_dec_and_test(&cq->refcnt))
  457. complete(&cq->free);
  458. }
  459. pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
  460. }
  461. return IRQ_HANDLED;
  462. }
  463. static void pvrdma_free_irq(struct pvrdma_dev *dev)
  464. {
  465. int i;
  466. dev_dbg(&dev->pdev->dev, "freeing interrupts\n");
  467. for (i = 0; i < dev->nr_vectors; i++)
  468. free_irq(pci_irq_vector(dev->pdev, i), dev);
  469. }
  470. static void pvrdma_enable_intrs(struct pvrdma_dev *dev)
  471. {
  472. dev_dbg(&dev->pdev->dev, "enable interrupts\n");
  473. pvrdma_write_reg(dev, PVRDMA_REG_IMR, 0);
  474. }
  475. static void pvrdma_disable_intrs(struct pvrdma_dev *dev)
  476. {
  477. dev_dbg(&dev->pdev->dev, "disable interrupts\n");
  478. pvrdma_write_reg(dev, PVRDMA_REG_IMR, ~0);
  479. }
  480. static int pvrdma_alloc_intrs(struct pvrdma_dev *dev)
  481. {
  482. struct pci_dev *pdev = dev->pdev;
  483. int ret = 0, i;
  484. ret = pci_alloc_irq_vectors(pdev, 1, PVRDMA_MAX_INTERRUPTS,
  485. PCI_IRQ_MSIX);
  486. if (ret < 0) {
  487. ret = pci_alloc_irq_vectors(pdev, 1, 1,
  488. PCI_IRQ_MSI | PCI_IRQ_LEGACY);
  489. if (ret < 0)
  490. return ret;
  491. }
  492. dev->nr_vectors = ret;
  493. ret = request_irq(pci_irq_vector(dev->pdev, 0), pvrdma_intr0_handler,
  494. pdev->msix_enabled ? 0 : IRQF_SHARED, DRV_NAME, dev);
  495. if (ret) {
  496. dev_err(&dev->pdev->dev,
  497. "failed to request interrupt 0\n");
  498. goto out_free_vectors;
  499. }
  500. for (i = 1; i < dev->nr_vectors; i++) {
  501. ret = request_irq(pci_irq_vector(dev->pdev, i),
  502. i == 1 ? pvrdma_intr1_handler :
  503. pvrdma_intrx_handler,
  504. 0, DRV_NAME, dev);
  505. if (ret) {
  506. dev_err(&dev->pdev->dev,
  507. "failed to request interrupt %d\n", i);
  508. goto free_irqs;
  509. }
  510. }
  511. return 0;
  512. free_irqs:
  513. while (--i >= 0)
  514. free_irq(pci_irq_vector(dev->pdev, i), dev);
  515. out_free_vectors:
  516. pci_free_irq_vectors(pdev);
  517. return ret;
  518. }
  519. static void pvrdma_free_slots(struct pvrdma_dev *dev)
  520. {
  521. struct pci_dev *pdev = dev->pdev;
  522. if (dev->resp_slot)
  523. dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->resp_slot,
  524. dev->dsr->resp_slot_dma);
  525. if (dev->cmd_slot)
  526. dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->cmd_slot,
  527. dev->dsr->cmd_slot_dma);
  528. }
  529. static int pvrdma_add_gid_at_index(struct pvrdma_dev *dev,
  530. const union ib_gid *gid,
  531. u8 gid_type,
  532. int index)
  533. {
  534. int ret;
  535. union pvrdma_cmd_req req;
  536. struct pvrdma_cmd_create_bind *cmd_bind = &req.create_bind;
  537. if (!dev->sgid_tbl) {
  538. dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
  539. return -EINVAL;
  540. }
  541. memset(cmd_bind, 0, sizeof(*cmd_bind));
  542. cmd_bind->hdr.cmd = PVRDMA_CMD_CREATE_BIND;
  543. memcpy(cmd_bind->new_gid, gid->raw, 16);
  544. cmd_bind->mtu = ib_mtu_enum_to_int(IB_MTU_1024);
  545. cmd_bind->vlan = 0xfff;
  546. cmd_bind->index = index;
  547. cmd_bind->gid_type = gid_type;
  548. ret = pvrdma_cmd_post(dev, &req, NULL, 0);
  549. if (ret < 0) {
  550. dev_warn(&dev->pdev->dev,
  551. "could not create binding, error: %d\n", ret);
  552. return -EFAULT;
  553. }
  554. memcpy(&dev->sgid_tbl[index], gid, sizeof(*gid));
  555. return 0;
  556. }
  557. static int pvrdma_add_gid(const union ib_gid *gid,
  558. const struct ib_gid_attr *attr,
  559. void **context)
  560. {
  561. struct pvrdma_dev *dev = to_vdev(attr->device);
  562. return pvrdma_add_gid_at_index(dev, gid,
  563. ib_gid_type_to_pvrdma(attr->gid_type),
  564. attr->index);
  565. }
  566. static int pvrdma_del_gid_at_index(struct pvrdma_dev *dev, int index)
  567. {
  568. int ret;
  569. union pvrdma_cmd_req req;
  570. struct pvrdma_cmd_destroy_bind *cmd_dest = &req.destroy_bind;
  571. /* Update sgid table. */
  572. if (!dev->sgid_tbl) {
  573. dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
  574. return -EINVAL;
  575. }
  576. memset(cmd_dest, 0, sizeof(*cmd_dest));
  577. cmd_dest->hdr.cmd = PVRDMA_CMD_DESTROY_BIND;
  578. memcpy(cmd_dest->dest_gid, &dev->sgid_tbl[index], 16);
  579. cmd_dest->index = index;
  580. ret = pvrdma_cmd_post(dev, &req, NULL, 0);
  581. if (ret < 0) {
  582. dev_warn(&dev->pdev->dev,
  583. "could not destroy binding, error: %d\n", ret);
  584. return ret;
  585. }
  586. memset(&dev->sgid_tbl[index], 0, 16);
  587. return 0;
  588. }
  589. static int pvrdma_del_gid(const struct ib_gid_attr *attr, void **context)
  590. {
  591. struct pvrdma_dev *dev = to_vdev(attr->device);
  592. dev_dbg(&dev->pdev->dev, "removing gid at index %u from %s",
  593. attr->index, dev->netdev->name);
  594. return pvrdma_del_gid_at_index(dev, attr->index);
  595. }
  596. static void pvrdma_netdevice_event_handle(struct pvrdma_dev *dev,
  597. unsigned long event)
  598. {
  599. switch (event) {
  600. case NETDEV_REBOOT:
  601. case NETDEV_DOWN:
  602. pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ERR);
  603. break;
  604. case NETDEV_UP:
  605. pvrdma_write_reg(dev, PVRDMA_REG_CTL,
  606. PVRDMA_DEVICE_CTL_UNQUIESCE);
  607. mb();
  608. if (pvrdma_read_reg(dev, PVRDMA_REG_ERR))
  609. dev_err(&dev->pdev->dev,
  610. "failed to activate device during link up\n");
  611. else
  612. pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ACTIVE);
  613. break;
  614. default:
  615. dev_dbg(&dev->pdev->dev, "ignore netdevice event %ld on %s\n",
  616. event, dev->ib_dev.name);
  617. break;
  618. }
  619. }
  620. static void pvrdma_netdevice_event_work(struct work_struct *work)
  621. {
  622. struct pvrdma_netdevice_work *netdev_work;
  623. struct pvrdma_dev *dev;
  624. netdev_work = container_of(work, struct pvrdma_netdevice_work, work);
  625. mutex_lock(&pvrdma_device_list_lock);
  626. list_for_each_entry(dev, &pvrdma_device_list, device_link) {
  627. if (dev->netdev == netdev_work->event_netdev) {
  628. pvrdma_netdevice_event_handle(dev, netdev_work->event);
  629. break;
  630. }
  631. }
  632. mutex_unlock(&pvrdma_device_list_lock);
  633. kfree(netdev_work);
  634. }
  635. static int pvrdma_netdevice_event(struct notifier_block *this,
  636. unsigned long event, void *ptr)
  637. {
  638. struct net_device *event_netdev = netdev_notifier_info_to_dev(ptr);
  639. struct pvrdma_netdevice_work *netdev_work;
  640. netdev_work = kmalloc(sizeof(*netdev_work), GFP_ATOMIC);
  641. if (!netdev_work)
  642. return NOTIFY_BAD;
  643. INIT_WORK(&netdev_work->work, pvrdma_netdevice_event_work);
  644. netdev_work->event_netdev = event_netdev;
  645. netdev_work->event = event;
  646. queue_work(event_wq, &netdev_work->work);
  647. return NOTIFY_DONE;
  648. }
  649. static int pvrdma_pci_probe(struct pci_dev *pdev,
  650. const struct pci_device_id *id)
  651. {
  652. struct pci_dev *pdev_net;
  653. struct pvrdma_dev *dev;
  654. int ret;
  655. unsigned long start;
  656. unsigned long len;
  657. dma_addr_t slot_dma = 0;
  658. dev_dbg(&pdev->dev, "initializing driver %s\n", pci_name(pdev));
  659. /* Allocate zero-out device */
  660. dev = (struct pvrdma_dev *)ib_alloc_device(sizeof(*dev));
  661. if (!dev) {
  662. dev_err(&pdev->dev, "failed to allocate IB device\n");
  663. return -ENOMEM;
  664. }
  665. mutex_lock(&pvrdma_device_list_lock);
  666. list_add(&dev->device_link, &pvrdma_device_list);
  667. mutex_unlock(&pvrdma_device_list_lock);
  668. ret = pvrdma_init_device(dev);
  669. if (ret)
  670. goto err_free_device;
  671. dev->pdev = pdev;
  672. pci_set_drvdata(pdev, dev);
  673. ret = pci_enable_device(pdev);
  674. if (ret) {
  675. dev_err(&pdev->dev, "cannot enable PCI device\n");
  676. goto err_free_device;
  677. }
  678. dev_dbg(&pdev->dev, "PCI resource flags BAR0 %#lx\n",
  679. pci_resource_flags(pdev, 0));
  680. dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
  681. (unsigned long long)pci_resource_len(pdev, 0));
  682. dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
  683. (unsigned long long)pci_resource_start(pdev, 0));
  684. dev_dbg(&pdev->dev, "PCI resource flags BAR1 %#lx\n",
  685. pci_resource_flags(pdev, 1));
  686. dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
  687. (unsigned long long)pci_resource_len(pdev, 1));
  688. dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
  689. (unsigned long long)pci_resource_start(pdev, 1));
  690. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
  691. !(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  692. dev_err(&pdev->dev, "PCI BAR region not MMIO\n");
  693. ret = -ENOMEM;
  694. goto err_free_device;
  695. }
  696. ret = pci_request_regions(pdev, DRV_NAME);
  697. if (ret) {
  698. dev_err(&pdev->dev, "cannot request PCI resources\n");
  699. goto err_disable_pdev;
  700. }
  701. /* Enable 64-Bit DMA */
  702. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
  703. ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
  704. if (ret != 0) {
  705. dev_err(&pdev->dev,
  706. "pci_set_consistent_dma_mask failed\n");
  707. goto err_free_resource;
  708. }
  709. } else {
  710. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  711. if (ret != 0) {
  712. dev_err(&pdev->dev,
  713. "pci_set_dma_mask failed\n");
  714. goto err_free_resource;
  715. }
  716. }
  717. pci_set_master(pdev);
  718. /* Map register space */
  719. start = pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
  720. len = pci_resource_len(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
  721. dev->regs = ioremap(start, len);
  722. if (!dev->regs) {
  723. dev_err(&pdev->dev, "register mapping failed\n");
  724. ret = -ENOMEM;
  725. goto err_free_resource;
  726. }
  727. /* Setup per-device UAR. */
  728. dev->driver_uar.index = 0;
  729. dev->driver_uar.pfn =
  730. pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_UAR) >>
  731. PAGE_SHIFT;
  732. dev->driver_uar.map =
  733. ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
  734. if (!dev->driver_uar.map) {
  735. dev_err(&pdev->dev, "failed to remap UAR pages\n");
  736. ret = -ENOMEM;
  737. goto err_unmap_regs;
  738. }
  739. dev->dsr_version = pvrdma_read_reg(dev, PVRDMA_REG_VERSION);
  740. dev_info(&pdev->dev, "device version %d, driver version %d\n",
  741. dev->dsr_version, PVRDMA_VERSION);
  742. dev->dsr = dma_zalloc_coherent(&pdev->dev, sizeof(*dev->dsr),
  743. &dev->dsrbase, GFP_KERNEL);
  744. if (!dev->dsr) {
  745. dev_err(&pdev->dev, "failed to allocate shared region\n");
  746. ret = -ENOMEM;
  747. goto err_uar_unmap;
  748. }
  749. /* Setup the shared region */
  750. dev->dsr->driver_version = PVRDMA_VERSION;
  751. dev->dsr->gos_info.gos_bits = sizeof(void *) == 4 ?
  752. PVRDMA_GOS_BITS_32 :
  753. PVRDMA_GOS_BITS_64;
  754. dev->dsr->gos_info.gos_type = PVRDMA_GOS_TYPE_LINUX;
  755. dev->dsr->gos_info.gos_ver = 1;
  756. dev->dsr->uar_pfn = dev->driver_uar.pfn;
  757. /* Command slot. */
  758. dev->cmd_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
  759. &slot_dma, GFP_KERNEL);
  760. if (!dev->cmd_slot) {
  761. ret = -ENOMEM;
  762. goto err_free_dsr;
  763. }
  764. dev->dsr->cmd_slot_dma = (u64)slot_dma;
  765. /* Response slot. */
  766. dev->resp_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
  767. &slot_dma, GFP_KERNEL);
  768. if (!dev->resp_slot) {
  769. ret = -ENOMEM;
  770. goto err_free_slots;
  771. }
  772. dev->dsr->resp_slot_dma = (u64)slot_dma;
  773. /* Async event ring */
  774. dev->dsr->async_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES;
  775. ret = pvrdma_page_dir_init(dev, &dev->async_pdir,
  776. dev->dsr->async_ring_pages.num_pages, true);
  777. if (ret)
  778. goto err_free_slots;
  779. dev->async_ring_state = dev->async_pdir.pages[0];
  780. dev->dsr->async_ring_pages.pdir_dma = dev->async_pdir.dir_dma;
  781. /* CQ notification ring */
  782. dev->dsr->cq_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES;
  783. ret = pvrdma_page_dir_init(dev, &dev->cq_pdir,
  784. dev->dsr->cq_ring_pages.num_pages, true);
  785. if (ret)
  786. goto err_free_async_ring;
  787. dev->cq_ring_state = dev->cq_pdir.pages[0];
  788. dev->dsr->cq_ring_pages.pdir_dma = dev->cq_pdir.dir_dma;
  789. /*
  790. * Write the PA of the shared region to the device. The writes must be
  791. * ordered such that the high bits are written last. When the writes
  792. * complete, the device will have filled out the capabilities.
  793. */
  794. pvrdma_write_reg(dev, PVRDMA_REG_DSRLOW, (u32)dev->dsrbase);
  795. pvrdma_write_reg(dev, PVRDMA_REG_DSRHIGH,
  796. (u32)((u64)(dev->dsrbase) >> 32));
  797. /* Make sure the write is complete before reading status. */
  798. mb();
  799. /* The driver supports RoCE V1 and V2. */
  800. if (!PVRDMA_SUPPORTED(dev)) {
  801. dev_err(&pdev->dev, "driver needs RoCE v1 or v2 support\n");
  802. ret = -EFAULT;
  803. goto err_free_cq_ring;
  804. }
  805. /* Paired vmxnet3 will have same bus, slot. But func will be 0 */
  806. pdev_net = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
  807. if (!pdev_net) {
  808. dev_err(&pdev->dev, "failed to find paired net device\n");
  809. ret = -ENODEV;
  810. goto err_free_cq_ring;
  811. }
  812. if (pdev_net->vendor != PCI_VENDOR_ID_VMWARE ||
  813. pdev_net->device != PCI_DEVICE_ID_VMWARE_VMXNET3) {
  814. dev_err(&pdev->dev, "failed to find paired vmxnet3 device\n");
  815. pci_dev_put(pdev_net);
  816. ret = -ENODEV;
  817. goto err_free_cq_ring;
  818. }
  819. dev->netdev = pci_get_drvdata(pdev_net);
  820. pci_dev_put(pdev_net);
  821. if (!dev->netdev) {
  822. dev_err(&pdev->dev, "failed to get vmxnet3 device\n");
  823. ret = -ENODEV;
  824. goto err_free_cq_ring;
  825. }
  826. dev_info(&pdev->dev, "paired device to %s\n", dev->netdev->name);
  827. /* Interrupt setup */
  828. ret = pvrdma_alloc_intrs(dev);
  829. if (ret) {
  830. dev_err(&pdev->dev, "failed to allocate interrupts\n");
  831. ret = -ENOMEM;
  832. goto err_free_cq_ring;
  833. }
  834. /* Allocate UAR table. */
  835. ret = pvrdma_uar_table_init(dev);
  836. if (ret) {
  837. dev_err(&pdev->dev, "failed to allocate UAR table\n");
  838. ret = -ENOMEM;
  839. goto err_free_intrs;
  840. }
  841. /* Allocate GID table */
  842. dev->sgid_tbl = kcalloc(dev->dsr->caps.gid_tbl_len,
  843. sizeof(union ib_gid), GFP_KERNEL);
  844. if (!dev->sgid_tbl) {
  845. ret = -ENOMEM;
  846. goto err_free_uar_table;
  847. }
  848. dev_dbg(&pdev->dev, "gid table len %d\n", dev->dsr->caps.gid_tbl_len);
  849. pvrdma_enable_intrs(dev);
  850. /* Activate pvrdma device */
  851. pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_ACTIVATE);
  852. /* Make sure the write is complete before reading status. */
  853. mb();
  854. /* Check if device was successfully activated */
  855. ret = pvrdma_read_reg(dev, PVRDMA_REG_ERR);
  856. if (ret != 0) {
  857. dev_err(&pdev->dev, "failed to activate device\n");
  858. ret = -EFAULT;
  859. goto err_disable_intr;
  860. }
  861. /* Register IB device */
  862. ret = pvrdma_register_device(dev);
  863. if (ret) {
  864. dev_err(&pdev->dev, "failed to register IB device\n");
  865. goto err_disable_intr;
  866. }
  867. dev->nb_netdev.notifier_call = pvrdma_netdevice_event;
  868. ret = register_netdevice_notifier(&dev->nb_netdev);
  869. if (ret) {
  870. dev_err(&pdev->dev, "failed to register netdevice events\n");
  871. goto err_unreg_ibdev;
  872. }
  873. dev_info(&pdev->dev, "attached to device\n");
  874. return 0;
  875. err_unreg_ibdev:
  876. ib_unregister_device(&dev->ib_dev);
  877. err_disable_intr:
  878. pvrdma_disable_intrs(dev);
  879. kfree(dev->sgid_tbl);
  880. err_free_uar_table:
  881. pvrdma_uar_table_cleanup(dev);
  882. err_free_intrs:
  883. pvrdma_free_irq(dev);
  884. pci_free_irq_vectors(pdev);
  885. err_free_cq_ring:
  886. pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
  887. err_free_async_ring:
  888. pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
  889. err_free_slots:
  890. pvrdma_free_slots(dev);
  891. err_free_dsr:
  892. dma_free_coherent(&pdev->dev, sizeof(*dev->dsr), dev->dsr,
  893. dev->dsrbase);
  894. err_uar_unmap:
  895. iounmap(dev->driver_uar.map);
  896. err_unmap_regs:
  897. iounmap(dev->regs);
  898. err_free_resource:
  899. pci_release_regions(pdev);
  900. err_disable_pdev:
  901. pci_disable_device(pdev);
  902. pci_set_drvdata(pdev, NULL);
  903. err_free_device:
  904. mutex_lock(&pvrdma_device_list_lock);
  905. list_del(&dev->device_link);
  906. mutex_unlock(&pvrdma_device_list_lock);
  907. ib_dealloc_device(&dev->ib_dev);
  908. return ret;
  909. }
  910. static void pvrdma_pci_remove(struct pci_dev *pdev)
  911. {
  912. struct pvrdma_dev *dev = pci_get_drvdata(pdev);
  913. if (!dev)
  914. return;
  915. dev_info(&pdev->dev, "detaching from device\n");
  916. unregister_netdevice_notifier(&dev->nb_netdev);
  917. dev->nb_netdev.notifier_call = NULL;
  918. flush_workqueue(event_wq);
  919. /* Unregister ib device */
  920. ib_unregister_device(&dev->ib_dev);
  921. mutex_lock(&pvrdma_device_list_lock);
  922. list_del(&dev->device_link);
  923. mutex_unlock(&pvrdma_device_list_lock);
  924. pvrdma_disable_intrs(dev);
  925. pvrdma_free_irq(dev);
  926. pci_free_irq_vectors(pdev);
  927. /* Deactivate pvrdma device */
  928. pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_RESET);
  929. pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
  930. pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
  931. pvrdma_free_slots(dev);
  932. iounmap(dev->regs);
  933. kfree(dev->sgid_tbl);
  934. kfree(dev->cq_tbl);
  935. kfree(dev->srq_tbl);
  936. kfree(dev->qp_tbl);
  937. pvrdma_uar_table_cleanup(dev);
  938. iounmap(dev->driver_uar.map);
  939. ib_dealloc_device(&dev->ib_dev);
  940. /* Free pci resources */
  941. pci_release_regions(pdev);
  942. pci_disable_device(pdev);
  943. pci_set_drvdata(pdev, NULL);
  944. }
  945. static const struct pci_device_id pvrdma_pci_table[] = {
  946. { PCI_DEVICE(PCI_VENDOR_ID_VMWARE, PCI_DEVICE_ID_VMWARE_PVRDMA), },
  947. { 0 },
  948. };
  949. MODULE_DEVICE_TABLE(pci, pvrdma_pci_table);
  950. static struct pci_driver pvrdma_driver = {
  951. .name = DRV_NAME,
  952. .id_table = pvrdma_pci_table,
  953. .probe = pvrdma_pci_probe,
  954. .remove = pvrdma_pci_remove,
  955. };
  956. static int __init pvrdma_init(void)
  957. {
  958. int err;
  959. event_wq = alloc_ordered_workqueue("pvrdma_event_wq", WQ_MEM_RECLAIM);
  960. if (!event_wq)
  961. return -ENOMEM;
  962. err = pci_register_driver(&pvrdma_driver);
  963. if (err)
  964. destroy_workqueue(event_wq);
  965. return err;
  966. }
  967. static void __exit pvrdma_cleanup(void)
  968. {
  969. pci_unregister_driver(&pvrdma_driver);
  970. destroy_workqueue(event_wq);
  971. }
  972. module_init(pvrdma_init);
  973. module_exit(pvrdma_cleanup);
  974. MODULE_AUTHOR("VMware, Inc");
  975. MODULE_DESCRIPTION("VMware Paravirtual RDMA driver");
  976. MODULE_LICENSE("Dual BSD/GPL");