qplib_fp.c 77 KB

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  1. /*
  2. * Broadcom NetXtreme-E RoCE driver.
  3. *
  4. * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
  5. * Broadcom refers to Broadcom Limited and/or its subsidiaries.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or without
  14. * modification, are permitted provided that the following conditions
  15. * are met:
  16. *
  17. * 1. Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * 2. Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
  28. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  31. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  32. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  33. * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  34. * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. *
  36. * Description: Fast Path Operators
  37. */
  38. #include <linux/interrupt.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/sched.h>
  41. #include <linux/slab.h>
  42. #include <linux/pci.h>
  43. #include <linux/prefetch.h>
  44. #include "roce_hsi.h"
  45. #include "qplib_res.h"
  46. #include "qplib_rcfw.h"
  47. #include "qplib_sp.h"
  48. #include "qplib_fp.h"
  49. static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq);
  50. static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp);
  51. static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type);
  52. static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp)
  53. {
  54. qp->sq.condition = false;
  55. qp->sq.send_phantom = false;
  56. qp->sq.single = false;
  57. }
  58. /* Flush list */
  59. static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
  60. {
  61. struct bnxt_qplib_cq *scq, *rcq;
  62. scq = qp->scq;
  63. rcq = qp->rcq;
  64. if (!qp->sq.flushed) {
  65. dev_dbg(&scq->hwq.pdev->dev,
  66. "QPLIB: FP: Adding to SQ Flush list = %p",
  67. qp);
  68. bnxt_qplib_cancel_phantom_processing(qp);
  69. list_add_tail(&qp->sq_flush, &scq->sqf_head);
  70. qp->sq.flushed = true;
  71. }
  72. if (!qp->srq) {
  73. if (!qp->rq.flushed) {
  74. dev_dbg(&rcq->hwq.pdev->dev,
  75. "QPLIB: FP: Adding to RQ Flush list = %p",
  76. qp);
  77. list_add_tail(&qp->rq_flush, &rcq->rqf_head);
  78. qp->rq.flushed = true;
  79. }
  80. }
  81. }
  82. static void bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp *qp,
  83. unsigned long *flags)
  84. __acquires(&qp->scq->flush_lock) __acquires(&qp->rcq->flush_lock)
  85. {
  86. spin_lock_irqsave(&qp->scq->flush_lock, *flags);
  87. if (qp->scq == qp->rcq)
  88. __acquire(&qp->rcq->flush_lock);
  89. else
  90. spin_lock(&qp->rcq->flush_lock);
  91. }
  92. static void bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp *qp,
  93. unsigned long *flags)
  94. __releases(&qp->scq->flush_lock) __releases(&qp->rcq->flush_lock)
  95. {
  96. if (qp->scq == qp->rcq)
  97. __release(&qp->rcq->flush_lock);
  98. else
  99. spin_unlock(&qp->rcq->flush_lock);
  100. spin_unlock_irqrestore(&qp->scq->flush_lock, *flags);
  101. }
  102. void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
  103. {
  104. unsigned long flags;
  105. bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
  106. __bnxt_qplib_add_flush_qp(qp);
  107. bnxt_qplib_release_cq_flush_locks(qp, &flags);
  108. }
  109. static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp)
  110. {
  111. if (qp->sq.flushed) {
  112. qp->sq.flushed = false;
  113. list_del(&qp->sq_flush);
  114. }
  115. if (!qp->srq) {
  116. if (qp->rq.flushed) {
  117. qp->rq.flushed = false;
  118. list_del(&qp->rq_flush);
  119. }
  120. }
  121. }
  122. void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp)
  123. {
  124. unsigned long flags;
  125. bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
  126. __clean_cq(qp->scq, (u64)(unsigned long)qp);
  127. qp->sq.hwq.prod = 0;
  128. qp->sq.hwq.cons = 0;
  129. __clean_cq(qp->rcq, (u64)(unsigned long)qp);
  130. qp->rq.hwq.prod = 0;
  131. qp->rq.hwq.cons = 0;
  132. __bnxt_qplib_del_flush_qp(qp);
  133. bnxt_qplib_release_cq_flush_locks(qp, &flags);
  134. }
  135. static void bnxt_qpn_cqn_sched_task(struct work_struct *work)
  136. {
  137. struct bnxt_qplib_nq_work *nq_work =
  138. container_of(work, struct bnxt_qplib_nq_work, work);
  139. struct bnxt_qplib_cq *cq = nq_work->cq;
  140. struct bnxt_qplib_nq *nq = nq_work->nq;
  141. if (cq && nq) {
  142. spin_lock_bh(&cq->compl_lock);
  143. if (atomic_read(&cq->arm_state) && nq->cqn_handler) {
  144. dev_dbg(&nq->pdev->dev,
  145. "%s:Trigger cq = %p event nq = %p\n",
  146. __func__, cq, nq);
  147. nq->cqn_handler(nq, cq);
  148. }
  149. spin_unlock_bh(&cq->compl_lock);
  150. }
  151. kfree(nq_work);
  152. }
  153. static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res,
  154. struct bnxt_qplib_qp *qp)
  155. {
  156. struct bnxt_qplib_q *rq = &qp->rq;
  157. struct bnxt_qplib_q *sq = &qp->sq;
  158. if (qp->rq_hdr_buf)
  159. dma_free_coherent(&res->pdev->dev,
  160. rq->hwq.max_elements * qp->rq_hdr_buf_size,
  161. qp->rq_hdr_buf, qp->rq_hdr_buf_map);
  162. if (qp->sq_hdr_buf)
  163. dma_free_coherent(&res->pdev->dev,
  164. sq->hwq.max_elements * qp->sq_hdr_buf_size,
  165. qp->sq_hdr_buf, qp->sq_hdr_buf_map);
  166. qp->rq_hdr_buf = NULL;
  167. qp->sq_hdr_buf = NULL;
  168. qp->rq_hdr_buf_map = 0;
  169. qp->sq_hdr_buf_map = 0;
  170. qp->sq_hdr_buf_size = 0;
  171. qp->rq_hdr_buf_size = 0;
  172. }
  173. static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res,
  174. struct bnxt_qplib_qp *qp)
  175. {
  176. struct bnxt_qplib_q *rq = &qp->rq;
  177. struct bnxt_qplib_q *sq = &qp->rq;
  178. int rc = 0;
  179. if (qp->sq_hdr_buf_size && sq->hwq.max_elements) {
  180. qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
  181. sq->hwq.max_elements *
  182. qp->sq_hdr_buf_size,
  183. &qp->sq_hdr_buf_map, GFP_KERNEL);
  184. if (!qp->sq_hdr_buf) {
  185. rc = -ENOMEM;
  186. dev_err(&res->pdev->dev,
  187. "QPLIB: Failed to create sq_hdr_buf");
  188. goto fail;
  189. }
  190. }
  191. if (qp->rq_hdr_buf_size && rq->hwq.max_elements) {
  192. qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
  193. rq->hwq.max_elements *
  194. qp->rq_hdr_buf_size,
  195. &qp->rq_hdr_buf_map,
  196. GFP_KERNEL);
  197. if (!qp->rq_hdr_buf) {
  198. rc = -ENOMEM;
  199. dev_err(&res->pdev->dev,
  200. "QPLIB: Failed to create rq_hdr_buf");
  201. goto fail;
  202. }
  203. }
  204. return 0;
  205. fail:
  206. bnxt_qplib_free_qp_hdr_buf(res, qp);
  207. return rc;
  208. }
  209. static void bnxt_qplib_service_nq(unsigned long data)
  210. {
  211. struct bnxt_qplib_nq *nq = (struct bnxt_qplib_nq *)data;
  212. struct bnxt_qplib_hwq *hwq = &nq->hwq;
  213. struct nq_base *nqe, **nq_ptr;
  214. struct bnxt_qplib_cq *cq;
  215. int num_cqne_processed = 0;
  216. int num_srqne_processed = 0;
  217. u32 sw_cons, raw_cons;
  218. u16 type;
  219. int budget = nq->budget;
  220. uintptr_t q_handle;
  221. /* Service the NQ until empty */
  222. raw_cons = hwq->cons;
  223. while (budget--) {
  224. sw_cons = HWQ_CMP(raw_cons, hwq);
  225. nq_ptr = (struct nq_base **)hwq->pbl_ptr;
  226. nqe = &nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)];
  227. if (!NQE_CMP_VALID(nqe, raw_cons, hwq->max_elements))
  228. break;
  229. /*
  230. * The valid test of the entry must be done first before
  231. * reading any further.
  232. */
  233. dma_rmb();
  234. type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
  235. switch (type) {
  236. case NQ_BASE_TYPE_CQ_NOTIFICATION:
  237. {
  238. struct nq_cn *nqcne = (struct nq_cn *)nqe;
  239. q_handle = le32_to_cpu(nqcne->cq_handle_low);
  240. q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high)
  241. << 32;
  242. cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle;
  243. bnxt_qplib_arm_cq_enable(cq);
  244. spin_lock_bh(&cq->compl_lock);
  245. atomic_set(&cq->arm_state, 0);
  246. if (!nq->cqn_handler(nq, (cq)))
  247. num_cqne_processed++;
  248. else
  249. dev_warn(&nq->pdev->dev,
  250. "QPLIB: cqn - type 0x%x not handled",
  251. type);
  252. spin_unlock_bh(&cq->compl_lock);
  253. break;
  254. }
  255. case NQ_BASE_TYPE_SRQ_EVENT:
  256. {
  257. struct nq_srq_event *nqsrqe =
  258. (struct nq_srq_event *)nqe;
  259. q_handle = le32_to_cpu(nqsrqe->srq_handle_low);
  260. q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high)
  261. << 32;
  262. bnxt_qplib_arm_srq((struct bnxt_qplib_srq *)q_handle,
  263. DBR_DBR_TYPE_SRQ_ARMENA);
  264. if (!nq->srqn_handler(nq,
  265. (struct bnxt_qplib_srq *)q_handle,
  266. nqsrqe->event))
  267. num_srqne_processed++;
  268. else
  269. dev_warn(&nq->pdev->dev,
  270. "QPLIB: SRQ event 0x%x not handled",
  271. nqsrqe->event);
  272. break;
  273. }
  274. case NQ_BASE_TYPE_DBQ_EVENT:
  275. break;
  276. default:
  277. dev_warn(&nq->pdev->dev,
  278. "QPLIB: nqe with type = 0x%x not handled",
  279. type);
  280. break;
  281. }
  282. raw_cons++;
  283. }
  284. if (hwq->cons != raw_cons) {
  285. hwq->cons = raw_cons;
  286. NQ_DB_REARM(nq->bar_reg_iomem, hwq->cons, hwq->max_elements);
  287. }
  288. }
  289. static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance)
  290. {
  291. struct bnxt_qplib_nq *nq = dev_instance;
  292. struct bnxt_qplib_hwq *hwq = &nq->hwq;
  293. struct nq_base **nq_ptr;
  294. u32 sw_cons;
  295. /* Prefetch the NQ element */
  296. sw_cons = HWQ_CMP(hwq->cons, hwq);
  297. nq_ptr = (struct nq_base **)nq->hwq.pbl_ptr;
  298. prefetch(&nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)]);
  299. /* Fan out to CPU affinitized kthreads? */
  300. tasklet_schedule(&nq->worker);
  301. return IRQ_HANDLED;
  302. }
  303. void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq)
  304. {
  305. if (nq->cqn_wq) {
  306. destroy_workqueue(nq->cqn_wq);
  307. nq->cqn_wq = NULL;
  308. }
  309. /* Make sure the HW is stopped! */
  310. synchronize_irq(nq->vector);
  311. tasklet_disable(&nq->worker);
  312. tasklet_kill(&nq->worker);
  313. if (nq->requested) {
  314. irq_set_affinity_hint(nq->vector, NULL);
  315. free_irq(nq->vector, nq);
  316. nq->requested = false;
  317. }
  318. if (nq->bar_reg_iomem)
  319. iounmap(nq->bar_reg_iomem);
  320. nq->bar_reg_iomem = NULL;
  321. nq->cqn_handler = NULL;
  322. nq->srqn_handler = NULL;
  323. nq->vector = 0;
  324. }
  325. int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq,
  326. int nq_idx, int msix_vector, int bar_reg_offset,
  327. int (*cqn_handler)(struct bnxt_qplib_nq *nq,
  328. struct bnxt_qplib_cq *),
  329. int (*srqn_handler)(struct bnxt_qplib_nq *nq,
  330. struct bnxt_qplib_srq *,
  331. u8 event))
  332. {
  333. resource_size_t nq_base;
  334. int rc = -1;
  335. nq->pdev = pdev;
  336. nq->vector = msix_vector;
  337. if (cqn_handler)
  338. nq->cqn_handler = cqn_handler;
  339. if (srqn_handler)
  340. nq->srqn_handler = srqn_handler;
  341. tasklet_init(&nq->worker, bnxt_qplib_service_nq, (unsigned long)nq);
  342. /* Have a task to schedule CQ notifiers in post send case */
  343. nq->cqn_wq = create_singlethread_workqueue("bnxt_qplib_nq");
  344. if (!nq->cqn_wq)
  345. goto fail;
  346. nq->requested = false;
  347. memset(nq->name, 0, 32);
  348. sprintf(nq->name, "bnxt_qplib_nq-%d", nq_idx);
  349. rc = request_irq(nq->vector, bnxt_qplib_nq_irq, 0, nq->name, nq);
  350. if (rc) {
  351. dev_err(&nq->pdev->dev,
  352. "Failed to request IRQ for NQ: %#x", rc);
  353. goto fail;
  354. }
  355. cpumask_clear(&nq->mask);
  356. cpumask_set_cpu(nq_idx, &nq->mask);
  357. rc = irq_set_affinity_hint(nq->vector, &nq->mask);
  358. if (rc) {
  359. dev_warn(&nq->pdev->dev,
  360. "QPLIB: set affinity failed; vector: %d nq_idx: %d\n",
  361. nq->vector, nq_idx);
  362. }
  363. nq->requested = true;
  364. nq->bar_reg = NQ_CONS_PCI_BAR_REGION;
  365. nq->bar_reg_off = bar_reg_offset;
  366. nq_base = pci_resource_start(pdev, nq->bar_reg);
  367. if (!nq_base) {
  368. rc = -ENOMEM;
  369. goto fail;
  370. }
  371. nq->bar_reg_iomem = ioremap_nocache(nq_base + nq->bar_reg_off, 4);
  372. if (!nq->bar_reg_iomem) {
  373. rc = -ENOMEM;
  374. goto fail;
  375. }
  376. NQ_DB_REARM(nq->bar_reg_iomem, nq->hwq.cons, nq->hwq.max_elements);
  377. return 0;
  378. fail:
  379. bnxt_qplib_disable_nq(nq);
  380. return rc;
  381. }
  382. void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq)
  383. {
  384. if (nq->hwq.max_elements) {
  385. bnxt_qplib_free_hwq(nq->pdev, &nq->hwq);
  386. nq->hwq.max_elements = 0;
  387. }
  388. }
  389. int bnxt_qplib_alloc_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq)
  390. {
  391. nq->pdev = pdev;
  392. if (!nq->hwq.max_elements ||
  393. nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT)
  394. nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
  395. if (bnxt_qplib_alloc_init_hwq(nq->pdev, &nq->hwq, NULL, 0,
  396. &nq->hwq.max_elements,
  397. BNXT_QPLIB_MAX_NQE_ENTRY_SIZE, 0,
  398. PAGE_SIZE, HWQ_TYPE_L2_CMPL))
  399. return -ENOMEM;
  400. nq->budget = 8;
  401. return 0;
  402. }
  403. /* SRQ */
  404. static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type)
  405. {
  406. struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
  407. struct dbr_dbr db_msg = { 0 };
  408. void __iomem *db;
  409. u32 sw_prod = 0;
  410. /* Ring DB */
  411. sw_prod = (arm_type == DBR_DBR_TYPE_SRQ_ARM) ? srq->threshold :
  412. HWQ_CMP(srq_hwq->prod, srq_hwq);
  413. db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) &
  414. DBR_DBR_INDEX_MASK);
  415. db_msg.type_xid = cpu_to_le32(((srq->id << DBR_DBR_XID_SFT) &
  416. DBR_DBR_XID_MASK) | arm_type);
  417. db = (arm_type == DBR_DBR_TYPE_SRQ_ARMENA) ?
  418. srq->dbr_base : srq->dpi->dbr;
  419. wmb(); /* barrier before db ring */
  420. __iowrite64_copy(db, &db_msg, sizeof(db_msg) / sizeof(u64));
  421. }
  422. int bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res,
  423. struct bnxt_qplib_srq *srq)
  424. {
  425. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  426. struct cmdq_destroy_srq req;
  427. struct creq_destroy_srq_resp resp;
  428. u16 cmd_flags = 0;
  429. int rc;
  430. RCFW_CMD_PREP(req, DESTROY_SRQ, cmd_flags);
  431. /* Configure the request */
  432. req.srq_cid = cpu_to_le32(srq->id);
  433. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  434. (void *)&resp, NULL, 0);
  435. if (rc)
  436. return rc;
  437. bnxt_qplib_free_hwq(res->pdev, &srq->hwq);
  438. kfree(srq->swq);
  439. return 0;
  440. }
  441. int bnxt_qplib_create_srq(struct bnxt_qplib_res *res,
  442. struct bnxt_qplib_srq *srq)
  443. {
  444. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  445. struct cmdq_create_srq req;
  446. struct creq_create_srq_resp resp;
  447. struct bnxt_qplib_pbl *pbl;
  448. u16 cmd_flags = 0;
  449. int rc, idx;
  450. srq->hwq.max_elements = srq->max_wqe;
  451. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &srq->hwq, srq->sglist,
  452. srq->nmap, &srq->hwq.max_elements,
  453. BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0,
  454. PAGE_SIZE, HWQ_TYPE_QUEUE);
  455. if (rc)
  456. goto exit;
  457. srq->swq = kcalloc(srq->hwq.max_elements, sizeof(*srq->swq),
  458. GFP_KERNEL);
  459. if (!srq->swq) {
  460. rc = -ENOMEM;
  461. goto fail;
  462. }
  463. RCFW_CMD_PREP(req, CREATE_SRQ, cmd_flags);
  464. /* Configure the request */
  465. req.dpi = cpu_to_le32(srq->dpi->dpi);
  466. req.srq_handle = cpu_to_le64((uintptr_t)srq);
  467. req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements);
  468. pbl = &srq->hwq.pbl[PBL_LVL_0];
  469. req.pg_size_lvl = cpu_to_le16((((u16)srq->hwq.level &
  470. CMDQ_CREATE_SRQ_LVL_MASK) <<
  471. CMDQ_CREATE_SRQ_LVL_SFT) |
  472. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  473. CMDQ_CREATE_SRQ_PG_SIZE_PG_4K :
  474. pbl->pg_size == ROCE_PG_SIZE_8K ?
  475. CMDQ_CREATE_SRQ_PG_SIZE_PG_8K :
  476. pbl->pg_size == ROCE_PG_SIZE_64K ?
  477. CMDQ_CREATE_SRQ_PG_SIZE_PG_64K :
  478. pbl->pg_size == ROCE_PG_SIZE_2M ?
  479. CMDQ_CREATE_SRQ_PG_SIZE_PG_2M :
  480. pbl->pg_size == ROCE_PG_SIZE_8M ?
  481. CMDQ_CREATE_SRQ_PG_SIZE_PG_8M :
  482. pbl->pg_size == ROCE_PG_SIZE_1G ?
  483. CMDQ_CREATE_SRQ_PG_SIZE_PG_1G :
  484. CMDQ_CREATE_SRQ_PG_SIZE_PG_4K));
  485. req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  486. req.pd_id = cpu_to_le32(srq->pd->id);
  487. req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id);
  488. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  489. (void *)&resp, NULL, 0);
  490. if (rc)
  491. goto fail;
  492. spin_lock_init(&srq->lock);
  493. srq->start_idx = 0;
  494. srq->last_idx = srq->hwq.max_elements - 1;
  495. for (idx = 0; idx < srq->hwq.max_elements; idx++)
  496. srq->swq[idx].next_idx = idx + 1;
  497. srq->swq[srq->last_idx].next_idx = -1;
  498. srq->id = le32_to_cpu(resp.xid);
  499. srq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem;
  500. if (srq->threshold)
  501. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARMENA);
  502. srq->arm_req = false;
  503. return 0;
  504. fail:
  505. bnxt_qplib_free_hwq(res->pdev, &srq->hwq);
  506. kfree(srq->swq);
  507. exit:
  508. return rc;
  509. }
  510. int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res,
  511. struct bnxt_qplib_srq *srq)
  512. {
  513. struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
  514. u32 sw_prod, sw_cons, count = 0;
  515. sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq);
  516. sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq);
  517. count = sw_prod > sw_cons ? sw_prod - sw_cons :
  518. srq_hwq->max_elements - sw_cons + sw_prod;
  519. if (count > srq->threshold) {
  520. srq->arm_req = false;
  521. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM);
  522. } else {
  523. /* Deferred arming */
  524. srq->arm_req = true;
  525. }
  526. return 0;
  527. }
  528. int bnxt_qplib_query_srq(struct bnxt_qplib_res *res,
  529. struct bnxt_qplib_srq *srq)
  530. {
  531. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  532. struct cmdq_query_srq req;
  533. struct creq_query_srq_resp resp;
  534. struct bnxt_qplib_rcfw_sbuf *sbuf;
  535. struct creq_query_srq_resp_sb *sb;
  536. u16 cmd_flags = 0;
  537. int rc = 0;
  538. RCFW_CMD_PREP(req, QUERY_SRQ, cmd_flags);
  539. req.srq_cid = cpu_to_le32(srq->id);
  540. /* Configure the request */
  541. sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
  542. if (!sbuf)
  543. return -ENOMEM;
  544. sb = sbuf->sb;
  545. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
  546. (void *)sbuf, 0);
  547. srq->threshold = le16_to_cpu(sb->srq_limit);
  548. bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
  549. return rc;
  550. }
  551. int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq,
  552. struct bnxt_qplib_swqe *wqe)
  553. {
  554. struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
  555. struct rq_wqe *srqe, **srqe_ptr;
  556. struct sq_sge *hw_sge;
  557. u32 sw_prod, sw_cons, count = 0;
  558. int i, rc = 0, next;
  559. spin_lock(&srq_hwq->lock);
  560. if (srq->start_idx == srq->last_idx) {
  561. dev_err(&srq_hwq->pdev->dev, "QPLIB: FP: SRQ (0x%x) is full!",
  562. srq->id);
  563. rc = -EINVAL;
  564. spin_unlock(&srq_hwq->lock);
  565. goto done;
  566. }
  567. next = srq->start_idx;
  568. srq->start_idx = srq->swq[next].next_idx;
  569. spin_unlock(&srq_hwq->lock);
  570. sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq);
  571. srqe_ptr = (struct rq_wqe **)srq_hwq->pbl_ptr;
  572. srqe = &srqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)];
  573. memset(srqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE);
  574. /* Calculate wqe_size16 and data_len */
  575. for (i = 0, hw_sge = (struct sq_sge *)srqe->data;
  576. i < wqe->num_sge; i++, hw_sge++) {
  577. hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
  578. hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
  579. hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
  580. }
  581. srqe->wqe_type = wqe->type;
  582. srqe->flags = wqe->flags;
  583. srqe->wqe_size = wqe->num_sge +
  584. ((offsetof(typeof(*srqe), data) + 15) >> 4);
  585. srqe->wr_id[0] = cpu_to_le32((u32)next);
  586. srq->swq[next].wr_id = wqe->wr_id;
  587. srq_hwq->prod++;
  588. spin_lock(&srq_hwq->lock);
  589. sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq);
  590. /* retaining srq_hwq->cons for this logic
  591. * actually the lock is only required to
  592. * read srq_hwq->cons.
  593. */
  594. sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq);
  595. count = sw_prod > sw_cons ? sw_prod - sw_cons :
  596. srq_hwq->max_elements - sw_cons + sw_prod;
  597. spin_unlock(&srq_hwq->lock);
  598. /* Ring DB */
  599. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ);
  600. if (srq->arm_req == true && count > srq->threshold) {
  601. srq->arm_req = false;
  602. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM);
  603. }
  604. done:
  605. return rc;
  606. }
  607. /* QP */
  608. int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  609. {
  610. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  611. struct cmdq_create_qp1 req;
  612. struct creq_create_qp1_resp resp;
  613. struct bnxt_qplib_pbl *pbl;
  614. struct bnxt_qplib_q *sq = &qp->sq;
  615. struct bnxt_qplib_q *rq = &qp->rq;
  616. int rc;
  617. u16 cmd_flags = 0;
  618. u32 qp_flags = 0;
  619. RCFW_CMD_PREP(req, CREATE_QP1, cmd_flags);
  620. /* General */
  621. req.type = qp->type;
  622. req.dpi = cpu_to_le32(qp->dpi->dpi);
  623. req.qp_handle = cpu_to_le64(qp->qp_handle);
  624. /* SQ */
  625. sq->hwq.max_elements = sq->max_wqe;
  626. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, NULL, 0,
  627. &sq->hwq.max_elements,
  628. BNXT_QPLIB_MAX_SQE_ENTRY_SIZE, 0,
  629. PAGE_SIZE, HWQ_TYPE_QUEUE);
  630. if (rc)
  631. goto exit;
  632. sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL);
  633. if (!sq->swq) {
  634. rc = -ENOMEM;
  635. goto fail_sq;
  636. }
  637. pbl = &sq->hwq.pbl[PBL_LVL_0];
  638. req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  639. req.sq_pg_size_sq_lvl =
  640. ((sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK)
  641. << CMDQ_CREATE_QP1_SQ_LVL_SFT) |
  642. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  643. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K :
  644. pbl->pg_size == ROCE_PG_SIZE_8K ?
  645. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8K :
  646. pbl->pg_size == ROCE_PG_SIZE_64K ?
  647. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_64K :
  648. pbl->pg_size == ROCE_PG_SIZE_2M ?
  649. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_2M :
  650. pbl->pg_size == ROCE_PG_SIZE_8M ?
  651. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8M :
  652. pbl->pg_size == ROCE_PG_SIZE_1G ?
  653. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_1G :
  654. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K);
  655. if (qp->scq)
  656. req.scq_cid = cpu_to_le32(qp->scq->id);
  657. qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE;
  658. /* RQ */
  659. if (rq->max_wqe) {
  660. rq->hwq.max_elements = qp->rq.max_wqe;
  661. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, NULL, 0,
  662. &rq->hwq.max_elements,
  663. BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0,
  664. PAGE_SIZE, HWQ_TYPE_QUEUE);
  665. if (rc)
  666. goto fail_sq;
  667. rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq),
  668. GFP_KERNEL);
  669. if (!rq->swq) {
  670. rc = -ENOMEM;
  671. goto fail_rq;
  672. }
  673. pbl = &rq->hwq.pbl[PBL_LVL_0];
  674. req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  675. req.rq_pg_size_rq_lvl =
  676. ((rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK) <<
  677. CMDQ_CREATE_QP1_RQ_LVL_SFT) |
  678. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  679. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K :
  680. pbl->pg_size == ROCE_PG_SIZE_8K ?
  681. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8K :
  682. pbl->pg_size == ROCE_PG_SIZE_64K ?
  683. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_64K :
  684. pbl->pg_size == ROCE_PG_SIZE_2M ?
  685. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_2M :
  686. pbl->pg_size == ROCE_PG_SIZE_8M ?
  687. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8M :
  688. pbl->pg_size == ROCE_PG_SIZE_1G ?
  689. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_1G :
  690. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K);
  691. if (qp->rcq)
  692. req.rcq_cid = cpu_to_le32(qp->rcq->id);
  693. }
  694. /* Header buffer - allow hdr_buf pass in */
  695. rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp);
  696. if (rc) {
  697. rc = -ENOMEM;
  698. goto fail;
  699. }
  700. req.qp_flags = cpu_to_le32(qp_flags);
  701. req.sq_size = cpu_to_le32(sq->hwq.max_elements);
  702. req.rq_size = cpu_to_le32(rq->hwq.max_elements);
  703. req.sq_fwo_sq_sge =
  704. cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) <<
  705. CMDQ_CREATE_QP1_SQ_SGE_SFT);
  706. req.rq_fwo_rq_sge =
  707. cpu_to_le16((rq->max_sge & CMDQ_CREATE_QP1_RQ_SGE_MASK) <<
  708. CMDQ_CREATE_QP1_RQ_SGE_SFT);
  709. req.pd_id = cpu_to_le32(qp->pd->id);
  710. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  711. (void *)&resp, NULL, 0);
  712. if (rc)
  713. goto fail;
  714. qp->id = le32_to_cpu(resp.xid);
  715. qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
  716. rcfw->qp_tbl[qp->id].qp_id = qp->id;
  717. rcfw->qp_tbl[qp->id].qp_handle = (void *)qp;
  718. return 0;
  719. fail:
  720. bnxt_qplib_free_qp_hdr_buf(res, qp);
  721. fail_rq:
  722. bnxt_qplib_free_hwq(res->pdev, &rq->hwq);
  723. kfree(rq->swq);
  724. fail_sq:
  725. bnxt_qplib_free_hwq(res->pdev, &sq->hwq);
  726. kfree(sq->swq);
  727. exit:
  728. return rc;
  729. }
  730. int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  731. {
  732. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  733. struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr;
  734. struct cmdq_create_qp req;
  735. struct creq_create_qp_resp resp;
  736. struct bnxt_qplib_pbl *pbl;
  737. struct sq_psn_search **psn_search_ptr;
  738. unsigned long int psn_search, poff = 0;
  739. struct bnxt_qplib_q *sq = &qp->sq;
  740. struct bnxt_qplib_q *rq = &qp->rq;
  741. struct bnxt_qplib_hwq *xrrq;
  742. int i, rc, req_size, psn_sz;
  743. u16 cmd_flags = 0, max_ssge;
  744. u32 sw_prod, qp_flags = 0;
  745. RCFW_CMD_PREP(req, CREATE_QP, cmd_flags);
  746. /* General */
  747. req.type = qp->type;
  748. req.dpi = cpu_to_le32(qp->dpi->dpi);
  749. req.qp_handle = cpu_to_le64(qp->qp_handle);
  750. /* SQ */
  751. psn_sz = (qp->type == CMDQ_CREATE_QP_TYPE_RC) ?
  752. sizeof(struct sq_psn_search) : 0;
  753. sq->hwq.max_elements = sq->max_wqe;
  754. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, sq->sglist,
  755. sq->nmap, &sq->hwq.max_elements,
  756. BNXT_QPLIB_MAX_SQE_ENTRY_SIZE,
  757. psn_sz,
  758. PAGE_SIZE, HWQ_TYPE_QUEUE);
  759. if (rc)
  760. goto exit;
  761. sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL);
  762. if (!sq->swq) {
  763. rc = -ENOMEM;
  764. goto fail_sq;
  765. }
  766. hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr;
  767. if (psn_sz) {
  768. psn_search_ptr = (struct sq_psn_search **)
  769. &hw_sq_send_ptr[get_sqe_pg
  770. (sq->hwq.max_elements)];
  771. psn_search = (unsigned long int)
  772. &hw_sq_send_ptr[get_sqe_pg(sq->hwq.max_elements)]
  773. [get_sqe_idx(sq->hwq.max_elements)];
  774. if (psn_search & ~PAGE_MASK) {
  775. /* If the psn_search does not start on a page boundary,
  776. * then calculate the offset
  777. */
  778. poff = (psn_search & ~PAGE_MASK) /
  779. BNXT_QPLIB_MAX_PSNE_ENTRY_SIZE;
  780. }
  781. for (i = 0; i < sq->hwq.max_elements; i++)
  782. sq->swq[i].psn_search =
  783. &psn_search_ptr[get_psne_pg(i + poff)]
  784. [get_psne_idx(i + poff)];
  785. }
  786. pbl = &sq->hwq.pbl[PBL_LVL_0];
  787. req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  788. req.sq_pg_size_sq_lvl =
  789. ((sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK)
  790. << CMDQ_CREATE_QP_SQ_LVL_SFT) |
  791. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  792. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K :
  793. pbl->pg_size == ROCE_PG_SIZE_8K ?
  794. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8K :
  795. pbl->pg_size == ROCE_PG_SIZE_64K ?
  796. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_64K :
  797. pbl->pg_size == ROCE_PG_SIZE_2M ?
  798. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_2M :
  799. pbl->pg_size == ROCE_PG_SIZE_8M ?
  800. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8M :
  801. pbl->pg_size == ROCE_PG_SIZE_1G ?
  802. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_1G :
  803. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K);
  804. /* initialize all SQ WQEs to LOCAL_INVALID (sq prep for hw fetch) */
  805. hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr;
  806. for (sw_prod = 0; sw_prod < sq->hwq.max_elements; sw_prod++) {
  807. hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)]
  808. [get_sqe_idx(sw_prod)];
  809. hw_sq_send_hdr->wqe_type = SQ_BASE_WQE_TYPE_LOCAL_INVALID;
  810. }
  811. if (qp->scq)
  812. req.scq_cid = cpu_to_le32(qp->scq->id);
  813. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE;
  814. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED;
  815. if (qp->sig_type)
  816. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION;
  817. /* RQ */
  818. if (rq->max_wqe) {
  819. rq->hwq.max_elements = rq->max_wqe;
  820. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, rq->sglist,
  821. rq->nmap, &rq->hwq.max_elements,
  822. BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0,
  823. PAGE_SIZE, HWQ_TYPE_QUEUE);
  824. if (rc)
  825. goto fail_sq;
  826. rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq),
  827. GFP_KERNEL);
  828. if (!rq->swq) {
  829. rc = -ENOMEM;
  830. goto fail_rq;
  831. }
  832. pbl = &rq->hwq.pbl[PBL_LVL_0];
  833. req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  834. req.rq_pg_size_rq_lvl =
  835. ((rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK) <<
  836. CMDQ_CREATE_QP_RQ_LVL_SFT) |
  837. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  838. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K :
  839. pbl->pg_size == ROCE_PG_SIZE_8K ?
  840. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8K :
  841. pbl->pg_size == ROCE_PG_SIZE_64K ?
  842. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_64K :
  843. pbl->pg_size == ROCE_PG_SIZE_2M ?
  844. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_2M :
  845. pbl->pg_size == ROCE_PG_SIZE_8M ?
  846. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8M :
  847. pbl->pg_size == ROCE_PG_SIZE_1G ?
  848. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_1G :
  849. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K);
  850. } else {
  851. /* SRQ */
  852. if (qp->srq) {
  853. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED;
  854. req.srq_cid = cpu_to_le32(qp->srq->id);
  855. }
  856. }
  857. if (qp->rcq)
  858. req.rcq_cid = cpu_to_le32(qp->rcq->id);
  859. req.qp_flags = cpu_to_le32(qp_flags);
  860. req.sq_size = cpu_to_le32(sq->hwq.max_elements);
  861. req.rq_size = cpu_to_le32(rq->hwq.max_elements);
  862. qp->sq_hdr_buf = NULL;
  863. qp->rq_hdr_buf = NULL;
  864. rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp);
  865. if (rc)
  866. goto fail_rq;
  867. /* CTRL-22434: Irrespective of the requested SGE count on the SQ
  868. * always create the QP with max send sges possible if the requested
  869. * inline size is greater than 0.
  870. */
  871. max_ssge = qp->max_inline_data ? 6 : sq->max_sge;
  872. req.sq_fwo_sq_sge = cpu_to_le16(
  873. ((max_ssge & CMDQ_CREATE_QP_SQ_SGE_MASK)
  874. << CMDQ_CREATE_QP_SQ_SGE_SFT) | 0);
  875. req.rq_fwo_rq_sge = cpu_to_le16(
  876. ((rq->max_sge & CMDQ_CREATE_QP_RQ_SGE_MASK)
  877. << CMDQ_CREATE_QP_RQ_SGE_SFT) | 0);
  878. /* ORRQ and IRRQ */
  879. if (psn_sz) {
  880. xrrq = &qp->orrq;
  881. xrrq->max_elements =
  882. ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
  883. req_size = xrrq->max_elements *
  884. BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1;
  885. req_size &= ~(PAGE_SIZE - 1);
  886. rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0,
  887. &xrrq->max_elements,
  888. BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE,
  889. 0, req_size, HWQ_TYPE_CTX);
  890. if (rc)
  891. goto fail_buf_free;
  892. pbl = &xrrq->pbl[PBL_LVL_0];
  893. req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
  894. xrrq = &qp->irrq;
  895. xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS(
  896. qp->max_dest_rd_atomic);
  897. req_size = xrrq->max_elements *
  898. BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1;
  899. req_size &= ~(PAGE_SIZE - 1);
  900. rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0,
  901. &xrrq->max_elements,
  902. BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE,
  903. 0, req_size, HWQ_TYPE_CTX);
  904. if (rc)
  905. goto fail_orrq;
  906. pbl = &xrrq->pbl[PBL_LVL_0];
  907. req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
  908. }
  909. req.pd_id = cpu_to_le32(qp->pd->id);
  910. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  911. (void *)&resp, NULL, 0);
  912. if (rc)
  913. goto fail;
  914. qp->id = le32_to_cpu(resp.xid);
  915. qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
  916. INIT_LIST_HEAD(&qp->sq_flush);
  917. INIT_LIST_HEAD(&qp->rq_flush);
  918. rcfw->qp_tbl[qp->id].qp_id = qp->id;
  919. rcfw->qp_tbl[qp->id].qp_handle = (void *)qp;
  920. return 0;
  921. fail:
  922. if (qp->irrq.max_elements)
  923. bnxt_qplib_free_hwq(res->pdev, &qp->irrq);
  924. fail_orrq:
  925. if (qp->orrq.max_elements)
  926. bnxt_qplib_free_hwq(res->pdev, &qp->orrq);
  927. fail_buf_free:
  928. bnxt_qplib_free_qp_hdr_buf(res, qp);
  929. fail_rq:
  930. bnxt_qplib_free_hwq(res->pdev, &rq->hwq);
  931. kfree(rq->swq);
  932. fail_sq:
  933. bnxt_qplib_free_hwq(res->pdev, &sq->hwq);
  934. kfree(sq->swq);
  935. exit:
  936. return rc;
  937. }
  938. static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp)
  939. {
  940. switch (qp->state) {
  941. case CMDQ_MODIFY_QP_NEW_STATE_RTR:
  942. /* INIT->RTR, configure the path_mtu to the default
  943. * 2048 if not being requested
  944. */
  945. if (!(qp->modify_flags &
  946. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) {
  947. qp->modify_flags |=
  948. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU;
  949. qp->path_mtu =
  950. CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
  951. }
  952. qp->modify_flags &=
  953. ~CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID;
  954. /* Bono FW require the max_dest_rd_atomic to be >= 1 */
  955. if (qp->max_dest_rd_atomic < 1)
  956. qp->max_dest_rd_atomic = 1;
  957. qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC;
  958. /* Bono FW 20.6.5 requires SGID_INDEX configuration */
  959. if (!(qp->modify_flags &
  960. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) {
  961. qp->modify_flags |=
  962. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX;
  963. qp->ah.sgid_index = 0;
  964. }
  965. break;
  966. default:
  967. break;
  968. }
  969. }
  970. static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp)
  971. {
  972. switch (qp->state) {
  973. case CMDQ_MODIFY_QP_NEW_STATE_RTS:
  974. /* Bono FW requires the max_rd_atomic to be >= 1 */
  975. if (qp->max_rd_atomic < 1)
  976. qp->max_rd_atomic = 1;
  977. /* Bono FW does not allow PKEY_INDEX,
  978. * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT,
  979. * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN,
  980. * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID
  981. * modification
  982. */
  983. qp->modify_flags &=
  984. ~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY |
  985. CMDQ_MODIFY_QP_MODIFY_MASK_DGID |
  986. CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL |
  987. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX |
  988. CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT |
  989. CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS |
  990. CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC |
  991. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU |
  992. CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN |
  993. CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER |
  994. CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC |
  995. CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID);
  996. break;
  997. default:
  998. break;
  999. }
  1000. }
  1001. static void __filter_modify_flags(struct bnxt_qplib_qp *qp)
  1002. {
  1003. switch (qp->cur_qp_state) {
  1004. case CMDQ_MODIFY_QP_NEW_STATE_RESET:
  1005. break;
  1006. case CMDQ_MODIFY_QP_NEW_STATE_INIT:
  1007. __modify_flags_from_init_state(qp);
  1008. break;
  1009. case CMDQ_MODIFY_QP_NEW_STATE_RTR:
  1010. __modify_flags_from_rtr_state(qp);
  1011. break;
  1012. case CMDQ_MODIFY_QP_NEW_STATE_RTS:
  1013. break;
  1014. case CMDQ_MODIFY_QP_NEW_STATE_SQD:
  1015. break;
  1016. case CMDQ_MODIFY_QP_NEW_STATE_SQE:
  1017. break;
  1018. case CMDQ_MODIFY_QP_NEW_STATE_ERR:
  1019. break;
  1020. default:
  1021. break;
  1022. }
  1023. }
  1024. int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  1025. {
  1026. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1027. struct cmdq_modify_qp req;
  1028. struct creq_modify_qp_resp resp;
  1029. u16 cmd_flags = 0, pkey;
  1030. u32 temp32[4];
  1031. u32 bmask;
  1032. int rc;
  1033. RCFW_CMD_PREP(req, MODIFY_QP, cmd_flags);
  1034. /* Filter out the qp_attr_mask based on the state->new transition */
  1035. __filter_modify_flags(qp);
  1036. bmask = qp->modify_flags;
  1037. req.modify_mask = cpu_to_le32(qp->modify_flags);
  1038. req.qp_cid = cpu_to_le32(qp->id);
  1039. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
  1040. req.network_type_en_sqd_async_notify_new_state =
  1041. (qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) |
  1042. (qp->en_sqd_async_notify ?
  1043. CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0);
  1044. }
  1045. req.network_type_en_sqd_async_notify_new_state |= qp->nw_type;
  1046. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS)
  1047. req.access = qp->access;
  1048. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY) {
  1049. if (!bnxt_qplib_get_pkey(res, &res->pkey_tbl,
  1050. qp->pkey_index, &pkey))
  1051. req.pkey = cpu_to_le16(pkey);
  1052. }
  1053. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY)
  1054. req.qkey = cpu_to_le32(qp->qkey);
  1055. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) {
  1056. memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid));
  1057. req.dgid[0] = cpu_to_le32(temp32[0]);
  1058. req.dgid[1] = cpu_to_le32(temp32[1]);
  1059. req.dgid[2] = cpu_to_le32(temp32[2]);
  1060. req.dgid[3] = cpu_to_le32(temp32[3]);
  1061. }
  1062. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL)
  1063. req.flow_label = cpu_to_le32(qp->ah.flow_label);
  1064. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)
  1065. req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id
  1066. [qp->ah.sgid_index]);
  1067. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT)
  1068. req.hop_limit = qp->ah.hop_limit;
  1069. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS)
  1070. req.traffic_class = qp->ah.traffic_class;
  1071. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC)
  1072. memcpy(req.dest_mac, qp->ah.dmac, 6);
  1073. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)
  1074. req.path_mtu = qp->path_mtu;
  1075. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT)
  1076. req.timeout = qp->timeout;
  1077. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT)
  1078. req.retry_cnt = qp->retry_cnt;
  1079. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY)
  1080. req.rnr_retry = qp->rnr_retry;
  1081. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER)
  1082. req.min_rnr_timer = qp->min_rnr_timer;
  1083. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN)
  1084. req.rq_psn = cpu_to_le32(qp->rq.psn);
  1085. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN)
  1086. req.sq_psn = cpu_to_le32(qp->sq.psn);
  1087. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC)
  1088. req.max_rd_atomic =
  1089. ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
  1090. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC)
  1091. req.max_dest_rd_atomic =
  1092. IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic);
  1093. req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements);
  1094. req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements);
  1095. req.sq_sge = cpu_to_le16(qp->sq.max_sge);
  1096. req.rq_sge = cpu_to_le16(qp->rq.max_sge);
  1097. req.max_inline_data = cpu_to_le32(qp->max_inline_data);
  1098. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID)
  1099. req.dest_qp_id = cpu_to_le32(qp->dest_qpn);
  1100. req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(qp->vlan_id);
  1101. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1102. (void *)&resp, NULL, 0);
  1103. if (rc)
  1104. return rc;
  1105. qp->cur_qp_state = qp->state;
  1106. return 0;
  1107. }
  1108. int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  1109. {
  1110. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1111. struct cmdq_query_qp req;
  1112. struct creq_query_qp_resp resp;
  1113. struct bnxt_qplib_rcfw_sbuf *sbuf;
  1114. struct creq_query_qp_resp_sb *sb;
  1115. u16 cmd_flags = 0;
  1116. u32 temp32[4];
  1117. int i, rc = 0;
  1118. RCFW_CMD_PREP(req, QUERY_QP, cmd_flags);
  1119. sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
  1120. if (!sbuf)
  1121. return -ENOMEM;
  1122. sb = sbuf->sb;
  1123. req.qp_cid = cpu_to_le32(qp->id);
  1124. req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS;
  1125. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
  1126. (void *)sbuf, 0);
  1127. if (rc)
  1128. goto bail;
  1129. /* Extract the context from the side buffer */
  1130. qp->state = sb->en_sqd_async_notify_state &
  1131. CREQ_QUERY_QP_RESP_SB_STATE_MASK;
  1132. qp->en_sqd_async_notify = sb->en_sqd_async_notify_state &
  1133. CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY ?
  1134. true : false;
  1135. qp->access = sb->access;
  1136. qp->pkey_index = le16_to_cpu(sb->pkey);
  1137. qp->qkey = le32_to_cpu(sb->qkey);
  1138. temp32[0] = le32_to_cpu(sb->dgid[0]);
  1139. temp32[1] = le32_to_cpu(sb->dgid[1]);
  1140. temp32[2] = le32_to_cpu(sb->dgid[2]);
  1141. temp32[3] = le32_to_cpu(sb->dgid[3]);
  1142. memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data));
  1143. qp->ah.flow_label = le32_to_cpu(sb->flow_label);
  1144. qp->ah.sgid_index = 0;
  1145. for (i = 0; i < res->sgid_tbl.max; i++) {
  1146. if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) {
  1147. qp->ah.sgid_index = i;
  1148. break;
  1149. }
  1150. }
  1151. if (i == res->sgid_tbl.max)
  1152. dev_warn(&res->pdev->dev, "QPLIB: SGID not found??");
  1153. qp->ah.hop_limit = sb->hop_limit;
  1154. qp->ah.traffic_class = sb->traffic_class;
  1155. memcpy(qp->ah.dmac, sb->dest_mac, 6);
  1156. qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
  1157. CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >>
  1158. CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT;
  1159. qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
  1160. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >>
  1161. CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT;
  1162. qp->timeout = sb->timeout;
  1163. qp->retry_cnt = sb->retry_cnt;
  1164. qp->rnr_retry = sb->rnr_retry;
  1165. qp->min_rnr_timer = sb->min_rnr_timer;
  1166. qp->rq.psn = le32_to_cpu(sb->rq_psn);
  1167. qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic);
  1168. qp->sq.psn = le32_to_cpu(sb->sq_psn);
  1169. qp->max_dest_rd_atomic =
  1170. IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic);
  1171. qp->sq.max_wqe = qp->sq.hwq.max_elements;
  1172. qp->rq.max_wqe = qp->rq.hwq.max_elements;
  1173. qp->sq.max_sge = le16_to_cpu(sb->sq_sge);
  1174. qp->rq.max_sge = le16_to_cpu(sb->rq_sge);
  1175. qp->max_inline_data = le32_to_cpu(sb->max_inline_data);
  1176. qp->dest_qpn = le32_to_cpu(sb->dest_qp_id);
  1177. memcpy(qp->smac, sb->src_mac, 6);
  1178. qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id);
  1179. bail:
  1180. bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
  1181. return rc;
  1182. }
  1183. static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp)
  1184. {
  1185. struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
  1186. struct cq_base *hw_cqe, **hw_cqe_ptr;
  1187. int i;
  1188. for (i = 0; i < cq_hwq->max_elements; i++) {
  1189. hw_cqe_ptr = (struct cq_base **)cq_hwq->pbl_ptr;
  1190. hw_cqe = &hw_cqe_ptr[CQE_PG(i)][CQE_IDX(i)];
  1191. if (!CQE_CMP_VALID(hw_cqe, i, cq_hwq->max_elements))
  1192. continue;
  1193. /*
  1194. * The valid test of the entry must be done first before
  1195. * reading any further.
  1196. */
  1197. dma_rmb();
  1198. switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
  1199. case CQ_BASE_CQE_TYPE_REQ:
  1200. case CQ_BASE_CQE_TYPE_TERMINAL:
  1201. {
  1202. struct cq_req *cqe = (struct cq_req *)hw_cqe;
  1203. if (qp == le64_to_cpu(cqe->qp_handle))
  1204. cqe->qp_handle = 0;
  1205. break;
  1206. }
  1207. case CQ_BASE_CQE_TYPE_RES_RC:
  1208. case CQ_BASE_CQE_TYPE_RES_UD:
  1209. case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
  1210. {
  1211. struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe;
  1212. if (qp == le64_to_cpu(cqe->qp_handle))
  1213. cqe->qp_handle = 0;
  1214. break;
  1215. }
  1216. default:
  1217. break;
  1218. }
  1219. }
  1220. }
  1221. int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res,
  1222. struct bnxt_qplib_qp *qp)
  1223. {
  1224. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1225. struct cmdq_destroy_qp req;
  1226. struct creq_destroy_qp_resp resp;
  1227. u16 cmd_flags = 0;
  1228. int rc;
  1229. rcfw->qp_tbl[qp->id].qp_id = BNXT_QPLIB_QP_ID_INVALID;
  1230. rcfw->qp_tbl[qp->id].qp_handle = NULL;
  1231. RCFW_CMD_PREP(req, DESTROY_QP, cmd_flags);
  1232. req.qp_cid = cpu_to_le32(qp->id);
  1233. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1234. (void *)&resp, NULL, 0);
  1235. if (rc) {
  1236. rcfw->qp_tbl[qp->id].qp_id = qp->id;
  1237. rcfw->qp_tbl[qp->id].qp_handle = qp;
  1238. return rc;
  1239. }
  1240. return 0;
  1241. }
  1242. void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res,
  1243. struct bnxt_qplib_qp *qp)
  1244. {
  1245. bnxt_qplib_free_qp_hdr_buf(res, qp);
  1246. bnxt_qplib_free_hwq(res->pdev, &qp->sq.hwq);
  1247. kfree(qp->sq.swq);
  1248. bnxt_qplib_free_hwq(res->pdev, &qp->rq.hwq);
  1249. kfree(qp->rq.swq);
  1250. if (qp->irrq.max_elements)
  1251. bnxt_qplib_free_hwq(res->pdev, &qp->irrq);
  1252. if (qp->orrq.max_elements)
  1253. bnxt_qplib_free_hwq(res->pdev, &qp->orrq);
  1254. }
  1255. void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp,
  1256. struct bnxt_qplib_sge *sge)
  1257. {
  1258. struct bnxt_qplib_q *sq = &qp->sq;
  1259. u32 sw_prod;
  1260. memset(sge, 0, sizeof(*sge));
  1261. if (qp->sq_hdr_buf) {
  1262. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1263. sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map +
  1264. sw_prod * qp->sq_hdr_buf_size);
  1265. sge->lkey = 0xFFFFFFFF;
  1266. sge->size = qp->sq_hdr_buf_size;
  1267. return qp->sq_hdr_buf + sw_prod * sge->size;
  1268. }
  1269. return NULL;
  1270. }
  1271. u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp)
  1272. {
  1273. struct bnxt_qplib_q *rq = &qp->rq;
  1274. return HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1275. }
  1276. dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index)
  1277. {
  1278. return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size);
  1279. }
  1280. void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp,
  1281. struct bnxt_qplib_sge *sge)
  1282. {
  1283. struct bnxt_qplib_q *rq = &qp->rq;
  1284. u32 sw_prod;
  1285. memset(sge, 0, sizeof(*sge));
  1286. if (qp->rq_hdr_buf) {
  1287. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1288. sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map +
  1289. sw_prod * qp->rq_hdr_buf_size);
  1290. sge->lkey = 0xFFFFFFFF;
  1291. sge->size = qp->rq_hdr_buf_size;
  1292. return qp->rq_hdr_buf + sw_prod * sge->size;
  1293. }
  1294. return NULL;
  1295. }
  1296. void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp)
  1297. {
  1298. struct bnxt_qplib_q *sq = &qp->sq;
  1299. struct dbr_dbr db_msg = { 0 };
  1300. u32 sw_prod;
  1301. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1302. db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) &
  1303. DBR_DBR_INDEX_MASK);
  1304. db_msg.type_xid =
  1305. cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1306. DBR_DBR_TYPE_SQ);
  1307. /* Flush all the WQE writes to HW */
  1308. wmb();
  1309. __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64));
  1310. }
  1311. int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp,
  1312. struct bnxt_qplib_swqe *wqe)
  1313. {
  1314. struct bnxt_qplib_q *sq = &qp->sq;
  1315. struct bnxt_qplib_swq *swq;
  1316. struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr;
  1317. struct sq_sge *hw_sge;
  1318. struct bnxt_qplib_nq_work *nq_work = NULL;
  1319. bool sch_handler = false;
  1320. u32 sw_prod;
  1321. u8 wqe_size16;
  1322. int i, rc = 0, data_len = 0, pkt_num = 0;
  1323. __le32 temp32;
  1324. if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS) {
  1325. if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  1326. sch_handler = true;
  1327. dev_dbg(&sq->hwq.pdev->dev,
  1328. "%s Error QP. Scheduling for poll_cq\n",
  1329. __func__);
  1330. goto queue_err;
  1331. }
  1332. }
  1333. if (bnxt_qplib_queue_full(sq)) {
  1334. dev_err(&sq->hwq.pdev->dev,
  1335. "QPLIB: prod = %#x cons = %#x qdepth = %#x delta = %#x",
  1336. sq->hwq.prod, sq->hwq.cons, sq->hwq.max_elements,
  1337. sq->q_full_delta);
  1338. rc = -ENOMEM;
  1339. goto done;
  1340. }
  1341. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1342. swq = &sq->swq[sw_prod];
  1343. swq->wr_id = wqe->wr_id;
  1344. swq->type = wqe->type;
  1345. swq->flags = wqe->flags;
  1346. if (qp->sig_type)
  1347. swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
  1348. swq->start_psn = sq->psn & BTH_PSN_MASK;
  1349. hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr;
  1350. hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)]
  1351. [get_sqe_idx(sw_prod)];
  1352. memset(hw_sq_send_hdr, 0, BNXT_QPLIB_MAX_SQE_ENTRY_SIZE);
  1353. if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) {
  1354. /* Copy the inline data */
  1355. if (wqe->inline_len > BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH) {
  1356. dev_warn(&sq->hwq.pdev->dev,
  1357. "QPLIB: Inline data length > 96 detected");
  1358. data_len = BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH;
  1359. } else {
  1360. data_len = wqe->inline_len;
  1361. }
  1362. memcpy(hw_sq_send_hdr->data, wqe->inline_data, data_len);
  1363. wqe_size16 = (data_len + 15) >> 4;
  1364. } else {
  1365. for (i = 0, hw_sge = (struct sq_sge *)hw_sq_send_hdr->data;
  1366. i < wqe->num_sge; i++, hw_sge++) {
  1367. hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
  1368. hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
  1369. hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
  1370. data_len += wqe->sg_list[i].size;
  1371. }
  1372. /* Each SGE entry = 1 WQE size16 */
  1373. wqe_size16 = wqe->num_sge;
  1374. /* HW requires wqe size has room for atleast one SGE even if
  1375. * none was supplied by ULP
  1376. */
  1377. if (!wqe->num_sge)
  1378. wqe_size16++;
  1379. }
  1380. /* Specifics */
  1381. switch (wqe->type) {
  1382. case BNXT_QPLIB_SWQE_TYPE_SEND:
  1383. if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) {
  1384. /* Assemble info for Raw Ethertype QPs */
  1385. struct sq_send_raweth_qp1 *sqe =
  1386. (struct sq_send_raweth_qp1 *)hw_sq_send_hdr;
  1387. sqe->wqe_type = wqe->type;
  1388. sqe->flags = wqe->flags;
  1389. sqe->wqe_size = wqe_size16 +
  1390. ((offsetof(typeof(*sqe), data) + 15) >> 4);
  1391. sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action);
  1392. sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags);
  1393. sqe->length = cpu_to_le32(data_len);
  1394. sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta &
  1395. SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) <<
  1396. SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT);
  1397. break;
  1398. }
  1399. /* fall thru */
  1400. case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
  1401. case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
  1402. {
  1403. struct sq_send *sqe = (struct sq_send *)hw_sq_send_hdr;
  1404. sqe->wqe_type = wqe->type;
  1405. sqe->flags = wqe->flags;
  1406. sqe->wqe_size = wqe_size16 +
  1407. ((offsetof(typeof(*sqe), data) + 15) >> 4);
  1408. sqe->inv_key_or_imm_data = cpu_to_le32(
  1409. wqe->send.inv_key);
  1410. if (qp->type == CMDQ_CREATE_QP_TYPE_UD) {
  1411. sqe->q_key = cpu_to_le32(wqe->send.q_key);
  1412. sqe->dst_qp = cpu_to_le32(
  1413. wqe->send.dst_qp & SQ_SEND_DST_QP_MASK);
  1414. sqe->length = cpu_to_le32(data_len);
  1415. sqe->avid = cpu_to_le32(wqe->send.avid &
  1416. SQ_SEND_AVID_MASK);
  1417. sq->psn = (sq->psn + 1) & BTH_PSN_MASK;
  1418. } else {
  1419. sqe->length = cpu_to_le32(data_len);
  1420. sqe->dst_qp = 0;
  1421. sqe->avid = 0;
  1422. if (qp->mtu)
  1423. pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
  1424. if (!pkt_num)
  1425. pkt_num = 1;
  1426. sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
  1427. }
  1428. break;
  1429. }
  1430. case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE:
  1431. case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM:
  1432. case BNXT_QPLIB_SWQE_TYPE_RDMA_READ:
  1433. {
  1434. struct sq_rdma *sqe = (struct sq_rdma *)hw_sq_send_hdr;
  1435. sqe->wqe_type = wqe->type;
  1436. sqe->flags = wqe->flags;
  1437. sqe->wqe_size = wqe_size16 +
  1438. ((offsetof(typeof(*sqe), data) + 15) >> 4);
  1439. sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key);
  1440. sqe->length = cpu_to_le32((u32)data_len);
  1441. sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va);
  1442. sqe->remote_key = cpu_to_le32(wqe->rdma.r_key);
  1443. if (qp->mtu)
  1444. pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
  1445. if (!pkt_num)
  1446. pkt_num = 1;
  1447. sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
  1448. break;
  1449. }
  1450. case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP:
  1451. case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD:
  1452. {
  1453. struct sq_atomic *sqe = (struct sq_atomic *)hw_sq_send_hdr;
  1454. sqe->wqe_type = wqe->type;
  1455. sqe->flags = wqe->flags;
  1456. sqe->remote_key = cpu_to_le32(wqe->atomic.r_key);
  1457. sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va);
  1458. sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data);
  1459. sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data);
  1460. if (qp->mtu)
  1461. pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
  1462. if (!pkt_num)
  1463. pkt_num = 1;
  1464. sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
  1465. break;
  1466. }
  1467. case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV:
  1468. {
  1469. struct sq_localinvalidate *sqe =
  1470. (struct sq_localinvalidate *)hw_sq_send_hdr;
  1471. sqe->wqe_type = wqe->type;
  1472. sqe->flags = wqe->flags;
  1473. sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key);
  1474. break;
  1475. }
  1476. case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR:
  1477. {
  1478. struct sq_fr_pmr *sqe = (struct sq_fr_pmr *)hw_sq_send_hdr;
  1479. sqe->wqe_type = wqe->type;
  1480. sqe->flags = wqe->flags;
  1481. sqe->access_cntl = wqe->frmr.access_cntl |
  1482. SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE;
  1483. sqe->zero_based_page_size_log =
  1484. (wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) <<
  1485. SQ_FR_PMR_PAGE_SIZE_LOG_SFT |
  1486. (wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0);
  1487. sqe->l_key = cpu_to_le32(wqe->frmr.l_key);
  1488. temp32 = cpu_to_le32(wqe->frmr.length);
  1489. memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length));
  1490. sqe->numlevels_pbl_page_size_log =
  1491. ((wqe->frmr.pbl_pg_sz_log <<
  1492. SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) &
  1493. SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) |
  1494. ((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) &
  1495. SQ_FR_PMR_NUMLEVELS_MASK);
  1496. for (i = 0; i < wqe->frmr.page_list_len; i++)
  1497. wqe->frmr.pbl_ptr[i] = cpu_to_le64(
  1498. wqe->frmr.page_list[i] |
  1499. PTU_PTE_VALID);
  1500. sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr);
  1501. sqe->va = cpu_to_le64(wqe->frmr.va);
  1502. break;
  1503. }
  1504. case BNXT_QPLIB_SWQE_TYPE_BIND_MW:
  1505. {
  1506. struct sq_bind *sqe = (struct sq_bind *)hw_sq_send_hdr;
  1507. sqe->wqe_type = wqe->type;
  1508. sqe->flags = wqe->flags;
  1509. sqe->access_cntl = wqe->bind.access_cntl;
  1510. sqe->mw_type_zero_based = wqe->bind.mw_type |
  1511. (wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0);
  1512. sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key);
  1513. sqe->l_key = cpu_to_le32(wqe->bind.r_key);
  1514. sqe->va = cpu_to_le64(wqe->bind.va);
  1515. temp32 = cpu_to_le32(wqe->bind.length);
  1516. memcpy(&sqe->length, &temp32, sizeof(wqe->bind.length));
  1517. break;
  1518. }
  1519. default:
  1520. /* Bad wqe, return error */
  1521. rc = -EINVAL;
  1522. goto done;
  1523. }
  1524. swq->next_psn = sq->psn & BTH_PSN_MASK;
  1525. if (swq->psn_search) {
  1526. swq->psn_search->opcode_start_psn = cpu_to_le32(
  1527. ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) &
  1528. SQ_PSN_SEARCH_START_PSN_MASK) |
  1529. ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) &
  1530. SQ_PSN_SEARCH_OPCODE_MASK));
  1531. swq->psn_search->flags_next_psn = cpu_to_le32(
  1532. ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) &
  1533. SQ_PSN_SEARCH_NEXT_PSN_MASK));
  1534. }
  1535. queue_err:
  1536. if (sch_handler) {
  1537. /* Store the ULP info in the software structures */
  1538. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1539. swq = &sq->swq[sw_prod];
  1540. swq->wr_id = wqe->wr_id;
  1541. swq->type = wqe->type;
  1542. swq->flags = wqe->flags;
  1543. if (qp->sig_type)
  1544. swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
  1545. swq->start_psn = sq->psn & BTH_PSN_MASK;
  1546. }
  1547. sq->hwq.prod++;
  1548. qp->wqe_cnt++;
  1549. done:
  1550. if (sch_handler) {
  1551. nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
  1552. if (nq_work) {
  1553. nq_work->cq = qp->scq;
  1554. nq_work->nq = qp->scq->nq;
  1555. INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
  1556. queue_work(qp->scq->nq->cqn_wq, &nq_work->work);
  1557. } else {
  1558. dev_err(&sq->hwq.pdev->dev,
  1559. "QPLIB: FP: Failed to allocate SQ nq_work!");
  1560. rc = -ENOMEM;
  1561. }
  1562. }
  1563. return rc;
  1564. }
  1565. void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp)
  1566. {
  1567. struct bnxt_qplib_q *rq = &qp->rq;
  1568. struct dbr_dbr db_msg = { 0 };
  1569. u32 sw_prod;
  1570. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1571. db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) &
  1572. DBR_DBR_INDEX_MASK);
  1573. db_msg.type_xid =
  1574. cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1575. DBR_DBR_TYPE_RQ);
  1576. /* Flush the writes to HW Rx WQE before the ringing Rx DB */
  1577. wmb();
  1578. __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64));
  1579. }
  1580. int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp,
  1581. struct bnxt_qplib_swqe *wqe)
  1582. {
  1583. struct bnxt_qplib_q *rq = &qp->rq;
  1584. struct rq_wqe *rqe, **rqe_ptr;
  1585. struct sq_sge *hw_sge;
  1586. struct bnxt_qplib_nq_work *nq_work = NULL;
  1587. bool sch_handler = false;
  1588. u32 sw_prod;
  1589. int i, rc = 0;
  1590. if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  1591. sch_handler = true;
  1592. dev_dbg(&rq->hwq.pdev->dev,
  1593. "%s Error QP. Scheduling for poll_cq\n",
  1594. __func__);
  1595. goto queue_err;
  1596. }
  1597. if (bnxt_qplib_queue_full(rq)) {
  1598. dev_err(&rq->hwq.pdev->dev,
  1599. "QPLIB: FP: QP (0x%x) RQ is full!", qp->id);
  1600. rc = -EINVAL;
  1601. goto done;
  1602. }
  1603. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1604. rq->swq[sw_prod].wr_id = wqe->wr_id;
  1605. rqe_ptr = (struct rq_wqe **)rq->hwq.pbl_ptr;
  1606. rqe = &rqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)];
  1607. memset(rqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE);
  1608. /* Calculate wqe_size16 and data_len */
  1609. for (i = 0, hw_sge = (struct sq_sge *)rqe->data;
  1610. i < wqe->num_sge; i++, hw_sge++) {
  1611. hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
  1612. hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
  1613. hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
  1614. }
  1615. rqe->wqe_type = wqe->type;
  1616. rqe->flags = wqe->flags;
  1617. rqe->wqe_size = wqe->num_sge +
  1618. ((offsetof(typeof(*rqe), data) + 15) >> 4);
  1619. /* HW requires wqe size has room for atleast one SGE even if none
  1620. * was supplied by ULP
  1621. */
  1622. if (!wqe->num_sge)
  1623. rqe->wqe_size++;
  1624. /* Supply the rqe->wr_id index to the wr_id_tbl for now */
  1625. rqe->wr_id[0] = cpu_to_le32(sw_prod);
  1626. queue_err:
  1627. if (sch_handler) {
  1628. /* Store the ULP info in the software structures */
  1629. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1630. rq->swq[sw_prod].wr_id = wqe->wr_id;
  1631. }
  1632. rq->hwq.prod++;
  1633. if (sch_handler) {
  1634. nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
  1635. if (nq_work) {
  1636. nq_work->cq = qp->rcq;
  1637. nq_work->nq = qp->rcq->nq;
  1638. INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
  1639. queue_work(qp->rcq->nq->cqn_wq, &nq_work->work);
  1640. } else {
  1641. dev_err(&rq->hwq.pdev->dev,
  1642. "QPLIB: FP: Failed to allocate RQ nq_work!");
  1643. rc = -ENOMEM;
  1644. }
  1645. }
  1646. done:
  1647. return rc;
  1648. }
  1649. /* CQ */
  1650. /* Spinlock must be held */
  1651. static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq)
  1652. {
  1653. struct dbr_dbr db_msg = { 0 };
  1654. db_msg.type_xid =
  1655. cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1656. DBR_DBR_TYPE_CQ_ARMENA);
  1657. /* Flush memory writes before enabling the CQ */
  1658. wmb();
  1659. __iowrite64_copy(cq->dbr_base, &db_msg, sizeof(db_msg) / sizeof(u64));
  1660. }
  1661. static void bnxt_qplib_arm_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
  1662. {
  1663. struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
  1664. struct dbr_dbr db_msg = { 0 };
  1665. u32 sw_cons;
  1666. /* Ring DB */
  1667. sw_cons = HWQ_CMP(cq_hwq->cons, cq_hwq);
  1668. db_msg.index = cpu_to_le32((sw_cons << DBR_DBR_INDEX_SFT) &
  1669. DBR_DBR_INDEX_MASK);
  1670. db_msg.type_xid =
  1671. cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1672. arm_type);
  1673. /* flush memory writes before arming the CQ */
  1674. wmb();
  1675. __iowrite64_copy(cq->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64));
  1676. }
  1677. int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
  1678. {
  1679. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1680. struct cmdq_create_cq req;
  1681. struct creq_create_cq_resp resp;
  1682. struct bnxt_qplib_pbl *pbl;
  1683. u16 cmd_flags = 0;
  1684. int rc;
  1685. cq->hwq.max_elements = cq->max_wqe;
  1686. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &cq->hwq, cq->sghead,
  1687. cq->nmap, &cq->hwq.max_elements,
  1688. BNXT_QPLIB_MAX_CQE_ENTRY_SIZE, 0,
  1689. PAGE_SIZE, HWQ_TYPE_QUEUE);
  1690. if (rc)
  1691. goto exit;
  1692. RCFW_CMD_PREP(req, CREATE_CQ, cmd_flags);
  1693. if (!cq->dpi) {
  1694. dev_err(&rcfw->pdev->dev,
  1695. "QPLIB: FP: CREATE_CQ failed due to NULL DPI");
  1696. return -EINVAL;
  1697. }
  1698. req.dpi = cpu_to_le32(cq->dpi->dpi);
  1699. req.cq_handle = cpu_to_le64(cq->cq_handle);
  1700. req.cq_size = cpu_to_le32(cq->hwq.max_elements);
  1701. pbl = &cq->hwq.pbl[PBL_LVL_0];
  1702. req.pg_size_lvl = cpu_to_le32(
  1703. ((cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK) <<
  1704. CMDQ_CREATE_CQ_LVL_SFT) |
  1705. (pbl->pg_size == ROCE_PG_SIZE_4K ? CMDQ_CREATE_CQ_PG_SIZE_PG_4K :
  1706. pbl->pg_size == ROCE_PG_SIZE_8K ? CMDQ_CREATE_CQ_PG_SIZE_PG_8K :
  1707. pbl->pg_size == ROCE_PG_SIZE_64K ? CMDQ_CREATE_CQ_PG_SIZE_PG_64K :
  1708. pbl->pg_size == ROCE_PG_SIZE_2M ? CMDQ_CREATE_CQ_PG_SIZE_PG_2M :
  1709. pbl->pg_size == ROCE_PG_SIZE_8M ? CMDQ_CREATE_CQ_PG_SIZE_PG_8M :
  1710. pbl->pg_size == ROCE_PG_SIZE_1G ? CMDQ_CREATE_CQ_PG_SIZE_PG_1G :
  1711. CMDQ_CREATE_CQ_PG_SIZE_PG_4K));
  1712. req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  1713. req.cq_fco_cnq_id = cpu_to_le32(
  1714. (cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) <<
  1715. CMDQ_CREATE_CQ_CNQ_ID_SFT);
  1716. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1717. (void *)&resp, NULL, 0);
  1718. if (rc)
  1719. goto fail;
  1720. cq->id = le32_to_cpu(resp.xid);
  1721. cq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem;
  1722. cq->period = BNXT_QPLIB_QUEUE_START_PERIOD;
  1723. init_waitqueue_head(&cq->waitq);
  1724. INIT_LIST_HEAD(&cq->sqf_head);
  1725. INIT_LIST_HEAD(&cq->rqf_head);
  1726. spin_lock_init(&cq->compl_lock);
  1727. bnxt_qplib_arm_cq_enable(cq);
  1728. return 0;
  1729. fail:
  1730. bnxt_qplib_free_hwq(res->pdev, &cq->hwq);
  1731. exit:
  1732. return rc;
  1733. }
  1734. int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
  1735. {
  1736. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1737. struct cmdq_destroy_cq req;
  1738. struct creq_destroy_cq_resp resp;
  1739. u16 cmd_flags = 0;
  1740. int rc;
  1741. RCFW_CMD_PREP(req, DESTROY_CQ, cmd_flags);
  1742. req.cq_cid = cpu_to_le32(cq->id);
  1743. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1744. (void *)&resp, NULL, 0);
  1745. if (rc)
  1746. return rc;
  1747. bnxt_qplib_free_hwq(res->pdev, &cq->hwq);
  1748. return 0;
  1749. }
  1750. static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp,
  1751. struct bnxt_qplib_cqe **pcqe, int *budget)
  1752. {
  1753. u32 sw_prod, sw_cons;
  1754. struct bnxt_qplib_cqe *cqe;
  1755. int rc = 0;
  1756. /* Now complete all outstanding SQEs with FLUSHED_ERR */
  1757. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1758. cqe = *pcqe;
  1759. while (*budget) {
  1760. sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);
  1761. if (sw_cons == sw_prod) {
  1762. break;
  1763. }
  1764. /* Skip the FENCE WQE completions */
  1765. if (sq->swq[sw_cons].wr_id == BNXT_QPLIB_FENCE_WRID) {
  1766. bnxt_qplib_cancel_phantom_processing(qp);
  1767. goto skip_compl;
  1768. }
  1769. memset(cqe, 0, sizeof(*cqe));
  1770. cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR;
  1771. cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
  1772. cqe->qp_handle = (u64)(unsigned long)qp;
  1773. cqe->wr_id = sq->swq[sw_cons].wr_id;
  1774. cqe->src_qp = qp->id;
  1775. cqe->type = sq->swq[sw_cons].type;
  1776. cqe++;
  1777. (*budget)--;
  1778. skip_compl:
  1779. sq->hwq.cons++;
  1780. }
  1781. *pcqe = cqe;
  1782. if (!(*budget) && HWQ_CMP(sq->hwq.cons, &sq->hwq) != sw_prod)
  1783. /* Out of budget */
  1784. rc = -EAGAIN;
  1785. return rc;
  1786. }
  1787. static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp,
  1788. struct bnxt_qplib_cqe **pcqe, int *budget)
  1789. {
  1790. struct bnxt_qplib_cqe *cqe;
  1791. u32 sw_prod, sw_cons;
  1792. int rc = 0;
  1793. int opcode = 0;
  1794. switch (qp->type) {
  1795. case CMDQ_CREATE_QP1_TYPE_GSI:
  1796. opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1;
  1797. break;
  1798. case CMDQ_CREATE_QP_TYPE_RC:
  1799. opcode = CQ_BASE_CQE_TYPE_RES_RC;
  1800. break;
  1801. case CMDQ_CREATE_QP_TYPE_UD:
  1802. opcode = CQ_BASE_CQE_TYPE_RES_UD;
  1803. break;
  1804. }
  1805. /* Flush the rest of the RQ */
  1806. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1807. cqe = *pcqe;
  1808. while (*budget) {
  1809. sw_cons = HWQ_CMP(rq->hwq.cons, &rq->hwq);
  1810. if (sw_cons == sw_prod)
  1811. break;
  1812. memset(cqe, 0, sizeof(*cqe));
  1813. cqe->status =
  1814. CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR;
  1815. cqe->opcode = opcode;
  1816. cqe->qp_handle = (unsigned long)qp;
  1817. cqe->wr_id = rq->swq[sw_cons].wr_id;
  1818. cqe++;
  1819. (*budget)--;
  1820. rq->hwq.cons++;
  1821. }
  1822. *pcqe = cqe;
  1823. if (!*budget && HWQ_CMP(rq->hwq.cons, &rq->hwq) != sw_prod)
  1824. /* Out of budget */
  1825. rc = -EAGAIN;
  1826. return rc;
  1827. }
  1828. void bnxt_qplib_mark_qp_error(void *qp_handle)
  1829. {
  1830. struct bnxt_qplib_qp *qp = qp_handle;
  1831. if (!qp)
  1832. return;
  1833. /* Must block new posting of SQ and RQ */
  1834. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  1835. bnxt_qplib_cancel_phantom_processing(qp);
  1836. }
  1837. /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive)
  1838. * CQE is track from sw_cq_cons to max_element but valid only if VALID=1
  1839. */
  1840. static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq,
  1841. u32 cq_cons, u32 sw_sq_cons, u32 cqe_sq_cons)
  1842. {
  1843. struct bnxt_qplib_q *sq = &qp->sq;
  1844. struct bnxt_qplib_swq *swq;
  1845. u32 peek_sw_cq_cons, peek_raw_cq_cons, peek_sq_cons_idx;
  1846. struct cq_base *peek_hwcqe, **peek_hw_cqe_ptr;
  1847. struct cq_req *peek_req_hwcqe;
  1848. struct bnxt_qplib_qp *peek_qp;
  1849. struct bnxt_qplib_q *peek_sq;
  1850. int i, rc = 0;
  1851. /* Normal mode */
  1852. /* Check for the psn_search marking before completing */
  1853. swq = &sq->swq[sw_sq_cons];
  1854. if (swq->psn_search &&
  1855. le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) {
  1856. /* Unmark */
  1857. swq->psn_search->flags_next_psn = cpu_to_le32
  1858. (le32_to_cpu(swq->psn_search->flags_next_psn)
  1859. & ~0x80000000);
  1860. dev_dbg(&cq->hwq.pdev->dev,
  1861. "FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n",
  1862. cq_cons, qp->id, sw_sq_cons, cqe_sq_cons);
  1863. sq->condition = true;
  1864. sq->send_phantom = true;
  1865. /* TODO: Only ARM if the previous SQE is ARMALL */
  1866. bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ_ARMALL);
  1867. rc = -EAGAIN;
  1868. goto out;
  1869. }
  1870. if (sq->condition) {
  1871. /* Peek at the completions */
  1872. peek_raw_cq_cons = cq->hwq.cons;
  1873. peek_sw_cq_cons = cq_cons;
  1874. i = cq->hwq.max_elements;
  1875. while (i--) {
  1876. peek_sw_cq_cons = HWQ_CMP((peek_sw_cq_cons), &cq->hwq);
  1877. peek_hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr;
  1878. peek_hwcqe = &peek_hw_cqe_ptr[CQE_PG(peek_sw_cq_cons)]
  1879. [CQE_IDX(peek_sw_cq_cons)];
  1880. /* If the next hwcqe is VALID */
  1881. if (CQE_CMP_VALID(peek_hwcqe, peek_raw_cq_cons,
  1882. cq->hwq.max_elements)) {
  1883. /*
  1884. * The valid test of the entry must be done first before
  1885. * reading any further.
  1886. */
  1887. dma_rmb();
  1888. /* If the next hwcqe is a REQ */
  1889. if ((peek_hwcqe->cqe_type_toggle &
  1890. CQ_BASE_CQE_TYPE_MASK) ==
  1891. CQ_BASE_CQE_TYPE_REQ) {
  1892. peek_req_hwcqe = (struct cq_req *)
  1893. peek_hwcqe;
  1894. peek_qp = (struct bnxt_qplib_qp *)
  1895. ((unsigned long)
  1896. le64_to_cpu
  1897. (peek_req_hwcqe->qp_handle));
  1898. peek_sq = &peek_qp->sq;
  1899. peek_sq_cons_idx = HWQ_CMP(le16_to_cpu(
  1900. peek_req_hwcqe->sq_cons_idx) - 1
  1901. , &sq->hwq);
  1902. /* If the hwcqe's sq's wr_id matches */
  1903. if (peek_sq == sq &&
  1904. sq->swq[peek_sq_cons_idx].wr_id ==
  1905. BNXT_QPLIB_FENCE_WRID) {
  1906. /*
  1907. * Unbreak only if the phantom
  1908. * comes back
  1909. */
  1910. dev_dbg(&cq->hwq.pdev->dev,
  1911. "FP:Got Phantom CQE");
  1912. sq->condition = false;
  1913. sq->single = true;
  1914. rc = 0;
  1915. goto out;
  1916. }
  1917. }
  1918. /* Valid but not the phantom, so keep looping */
  1919. } else {
  1920. /* Not valid yet, just exit and wait */
  1921. rc = -EINVAL;
  1922. goto out;
  1923. }
  1924. peek_sw_cq_cons++;
  1925. peek_raw_cq_cons++;
  1926. }
  1927. dev_err(&cq->hwq.pdev->dev,
  1928. "Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x",
  1929. cq_cons, qp->id, sw_sq_cons, cqe_sq_cons);
  1930. rc = -EINVAL;
  1931. }
  1932. out:
  1933. return rc;
  1934. }
  1935. static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq,
  1936. struct cq_req *hwcqe,
  1937. struct bnxt_qplib_cqe **pcqe, int *budget,
  1938. u32 cq_cons, struct bnxt_qplib_qp **lib_qp)
  1939. {
  1940. struct bnxt_qplib_qp *qp;
  1941. struct bnxt_qplib_q *sq;
  1942. struct bnxt_qplib_cqe *cqe;
  1943. u32 sw_sq_cons, cqe_sq_cons;
  1944. struct bnxt_qplib_swq *swq;
  1945. int rc = 0;
  1946. qp = (struct bnxt_qplib_qp *)((unsigned long)
  1947. le64_to_cpu(hwcqe->qp_handle));
  1948. if (!qp) {
  1949. dev_err(&cq->hwq.pdev->dev,
  1950. "QPLIB: FP: Process Req qp is NULL");
  1951. return -EINVAL;
  1952. }
  1953. sq = &qp->sq;
  1954. cqe_sq_cons = HWQ_CMP(le16_to_cpu(hwcqe->sq_cons_idx), &sq->hwq);
  1955. if (cqe_sq_cons > sq->hwq.max_elements) {
  1956. dev_err(&cq->hwq.pdev->dev,
  1957. "QPLIB: FP: CQ Process req reported ");
  1958. dev_err(&cq->hwq.pdev->dev,
  1959. "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x",
  1960. cqe_sq_cons, sq->hwq.max_elements);
  1961. return -EINVAL;
  1962. }
  1963. if (qp->sq.flushed) {
  1964. dev_dbg(&cq->hwq.pdev->dev,
  1965. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  1966. goto done;
  1967. }
  1968. /* Require to walk the sq's swq to fabricate CQEs for all previously
  1969. * signaled SWQEs due to CQE aggregation from the current sq cons
  1970. * to the cqe_sq_cons
  1971. */
  1972. cqe = *pcqe;
  1973. while (*budget) {
  1974. sw_sq_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);
  1975. if (sw_sq_cons == cqe_sq_cons)
  1976. /* Done */
  1977. break;
  1978. swq = &sq->swq[sw_sq_cons];
  1979. memset(cqe, 0, sizeof(*cqe));
  1980. cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
  1981. cqe->qp_handle = (u64)(unsigned long)qp;
  1982. cqe->src_qp = qp->id;
  1983. cqe->wr_id = swq->wr_id;
  1984. if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID)
  1985. goto skip;
  1986. cqe->type = swq->type;
  1987. /* For the last CQE, check for status. For errors, regardless
  1988. * of the request being signaled or not, it must complete with
  1989. * the hwcqe error status
  1990. */
  1991. if (HWQ_CMP((sw_sq_cons + 1), &sq->hwq) == cqe_sq_cons &&
  1992. hwcqe->status != CQ_REQ_STATUS_OK) {
  1993. cqe->status = hwcqe->status;
  1994. dev_err(&cq->hwq.pdev->dev,
  1995. "QPLIB: FP: CQ Processed Req ");
  1996. dev_err(&cq->hwq.pdev->dev,
  1997. "QPLIB: wr_id[%d] = 0x%llx with status 0x%x",
  1998. sw_sq_cons, cqe->wr_id, cqe->status);
  1999. cqe++;
  2000. (*budget)--;
  2001. bnxt_qplib_mark_qp_error(qp);
  2002. /* Add qp to flush list of the CQ */
  2003. bnxt_qplib_add_flush_qp(qp);
  2004. } else {
  2005. if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
  2006. /* Before we complete, do WA 9060 */
  2007. if (do_wa9060(qp, cq, cq_cons, sw_sq_cons,
  2008. cqe_sq_cons)) {
  2009. *lib_qp = qp;
  2010. goto out;
  2011. }
  2012. cqe->status = CQ_REQ_STATUS_OK;
  2013. cqe++;
  2014. (*budget)--;
  2015. }
  2016. }
  2017. skip:
  2018. sq->hwq.cons++;
  2019. if (sq->single)
  2020. break;
  2021. }
  2022. out:
  2023. *pcqe = cqe;
  2024. if (HWQ_CMP(sq->hwq.cons, &sq->hwq) != cqe_sq_cons) {
  2025. /* Out of budget */
  2026. rc = -EAGAIN;
  2027. goto done;
  2028. }
  2029. /*
  2030. * Back to normal completion mode only after it has completed all of
  2031. * the WC for this CQE
  2032. */
  2033. sq->single = false;
  2034. done:
  2035. return rc;
  2036. }
  2037. static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag)
  2038. {
  2039. spin_lock(&srq->hwq.lock);
  2040. srq->swq[srq->last_idx].next_idx = (int)tag;
  2041. srq->last_idx = (int)tag;
  2042. srq->swq[srq->last_idx].next_idx = -1;
  2043. srq->hwq.cons++; /* Support for SRQE counter */
  2044. spin_unlock(&srq->hwq.lock);
  2045. }
  2046. static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq,
  2047. struct cq_res_rc *hwcqe,
  2048. struct bnxt_qplib_cqe **pcqe,
  2049. int *budget)
  2050. {
  2051. struct bnxt_qplib_qp *qp;
  2052. struct bnxt_qplib_q *rq;
  2053. struct bnxt_qplib_srq *srq;
  2054. struct bnxt_qplib_cqe *cqe;
  2055. u32 wr_id_idx;
  2056. int rc = 0;
  2057. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2058. le64_to_cpu(hwcqe->qp_handle));
  2059. if (!qp) {
  2060. dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq RC qp is NULL");
  2061. return -EINVAL;
  2062. }
  2063. if (qp->rq.flushed) {
  2064. dev_dbg(&cq->hwq.pdev->dev,
  2065. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2066. goto done;
  2067. }
  2068. cqe = *pcqe;
  2069. cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
  2070. cqe->length = le32_to_cpu(hwcqe->length);
  2071. cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key);
  2072. cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle);
  2073. cqe->flags = le16_to_cpu(hwcqe->flags);
  2074. cqe->status = hwcqe->status;
  2075. cqe->qp_handle = (u64)(unsigned long)qp;
  2076. wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) &
  2077. CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK;
  2078. if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
  2079. srq = qp->srq;
  2080. if (!srq)
  2081. return -EINVAL;
  2082. if (wr_id_idx > srq->hwq.max_elements) {
  2083. dev_err(&cq->hwq.pdev->dev,
  2084. "QPLIB: FP: CQ Process RC ");
  2085. dev_err(&cq->hwq.pdev->dev,
  2086. "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x",
  2087. wr_id_idx, srq->hwq.max_elements);
  2088. return -EINVAL;
  2089. }
  2090. cqe->wr_id = srq->swq[wr_id_idx].wr_id;
  2091. bnxt_qplib_release_srqe(srq, wr_id_idx);
  2092. cqe++;
  2093. (*budget)--;
  2094. *pcqe = cqe;
  2095. } else {
  2096. rq = &qp->rq;
  2097. if (wr_id_idx > rq->hwq.max_elements) {
  2098. dev_err(&cq->hwq.pdev->dev,
  2099. "QPLIB: FP: CQ Process RC ");
  2100. dev_err(&cq->hwq.pdev->dev,
  2101. "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x",
  2102. wr_id_idx, rq->hwq.max_elements);
  2103. return -EINVAL;
  2104. }
  2105. cqe->wr_id = rq->swq[wr_id_idx].wr_id;
  2106. cqe++;
  2107. (*budget)--;
  2108. rq->hwq.cons++;
  2109. *pcqe = cqe;
  2110. if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
  2111. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2112. /* Add qp to flush list of the CQ */
  2113. bnxt_qplib_add_flush_qp(qp);
  2114. }
  2115. }
  2116. done:
  2117. return rc;
  2118. }
  2119. static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq,
  2120. struct cq_res_ud *hwcqe,
  2121. struct bnxt_qplib_cqe **pcqe,
  2122. int *budget)
  2123. {
  2124. struct bnxt_qplib_qp *qp;
  2125. struct bnxt_qplib_q *rq;
  2126. struct bnxt_qplib_srq *srq;
  2127. struct bnxt_qplib_cqe *cqe;
  2128. u32 wr_id_idx;
  2129. int rc = 0;
  2130. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2131. le64_to_cpu(hwcqe->qp_handle));
  2132. if (!qp) {
  2133. dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq UD qp is NULL");
  2134. return -EINVAL;
  2135. }
  2136. if (qp->rq.flushed) {
  2137. dev_dbg(&cq->hwq.pdev->dev,
  2138. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2139. goto done;
  2140. }
  2141. cqe = *pcqe;
  2142. cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
  2143. cqe->length = le32_to_cpu(hwcqe->length);
  2144. cqe->invrkey = le32_to_cpu(hwcqe->imm_data);
  2145. cqe->flags = le16_to_cpu(hwcqe->flags);
  2146. cqe->status = hwcqe->status;
  2147. cqe->qp_handle = (u64)(unsigned long)qp;
  2148. memcpy(cqe->smac, hwcqe->src_mac, 6);
  2149. wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id)
  2150. & CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK;
  2151. cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) |
  2152. ((le32_to_cpu(
  2153. hwcqe->src_qp_high_srq_or_rq_wr_id) &
  2154. CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8);
  2155. if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
  2156. srq = qp->srq;
  2157. if (!srq)
  2158. return -EINVAL;
  2159. if (wr_id_idx > srq->hwq.max_elements) {
  2160. dev_err(&cq->hwq.pdev->dev,
  2161. "QPLIB: FP: CQ Process UD ");
  2162. dev_err(&cq->hwq.pdev->dev,
  2163. "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x",
  2164. wr_id_idx, srq->hwq.max_elements);
  2165. return -EINVAL;
  2166. }
  2167. cqe->wr_id = srq->swq[wr_id_idx].wr_id;
  2168. bnxt_qplib_release_srqe(srq, wr_id_idx);
  2169. cqe++;
  2170. (*budget)--;
  2171. *pcqe = cqe;
  2172. } else {
  2173. rq = &qp->rq;
  2174. if (wr_id_idx > rq->hwq.max_elements) {
  2175. dev_err(&cq->hwq.pdev->dev,
  2176. "QPLIB: FP: CQ Process UD ");
  2177. dev_err(&cq->hwq.pdev->dev,
  2178. "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x",
  2179. wr_id_idx, rq->hwq.max_elements);
  2180. return -EINVAL;
  2181. }
  2182. cqe->wr_id = rq->swq[wr_id_idx].wr_id;
  2183. cqe++;
  2184. (*budget)--;
  2185. rq->hwq.cons++;
  2186. *pcqe = cqe;
  2187. if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
  2188. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2189. /* Add qp to flush list of the CQ */
  2190. bnxt_qplib_add_flush_qp(qp);
  2191. }
  2192. }
  2193. done:
  2194. return rc;
  2195. }
  2196. bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq)
  2197. {
  2198. struct cq_base *hw_cqe, **hw_cqe_ptr;
  2199. u32 sw_cons, raw_cons;
  2200. bool rc = true;
  2201. raw_cons = cq->hwq.cons;
  2202. sw_cons = HWQ_CMP(raw_cons, &cq->hwq);
  2203. hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr;
  2204. hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)];
  2205. /* Check for Valid bit. If the CQE is valid, return false */
  2206. rc = !CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements);
  2207. return rc;
  2208. }
  2209. static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq,
  2210. struct cq_res_raweth_qp1 *hwcqe,
  2211. struct bnxt_qplib_cqe **pcqe,
  2212. int *budget)
  2213. {
  2214. struct bnxt_qplib_qp *qp;
  2215. struct bnxt_qplib_q *rq;
  2216. struct bnxt_qplib_srq *srq;
  2217. struct bnxt_qplib_cqe *cqe;
  2218. u32 wr_id_idx;
  2219. int rc = 0;
  2220. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2221. le64_to_cpu(hwcqe->qp_handle));
  2222. if (!qp) {
  2223. dev_err(&cq->hwq.pdev->dev,
  2224. "QPLIB: process_cq Raw/QP1 qp is NULL");
  2225. return -EINVAL;
  2226. }
  2227. if (qp->rq.flushed) {
  2228. dev_dbg(&cq->hwq.pdev->dev,
  2229. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2230. goto done;
  2231. }
  2232. cqe = *pcqe;
  2233. cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
  2234. cqe->flags = le16_to_cpu(hwcqe->flags);
  2235. cqe->qp_handle = (u64)(unsigned long)qp;
  2236. wr_id_idx =
  2237. le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id)
  2238. & CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK;
  2239. cqe->src_qp = qp->id;
  2240. if (qp->id == 1 && !cqe->length) {
  2241. /* Add workaround for the length misdetection */
  2242. cqe->length = 296;
  2243. } else {
  2244. cqe->length = le16_to_cpu(hwcqe->length);
  2245. }
  2246. cqe->pkey_index = qp->pkey_index;
  2247. memcpy(cqe->smac, qp->smac, 6);
  2248. cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags);
  2249. cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2);
  2250. cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata);
  2251. if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) {
  2252. srq = qp->srq;
  2253. if (!srq) {
  2254. dev_err(&cq->hwq.pdev->dev,
  2255. "QPLIB: FP: SRQ used but not defined??");
  2256. return -EINVAL;
  2257. }
  2258. if (wr_id_idx > srq->hwq.max_elements) {
  2259. dev_err(&cq->hwq.pdev->dev,
  2260. "QPLIB: FP: CQ Process Raw/QP1 ");
  2261. dev_err(&cq->hwq.pdev->dev,
  2262. "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x",
  2263. wr_id_idx, srq->hwq.max_elements);
  2264. return -EINVAL;
  2265. }
  2266. cqe->wr_id = srq->swq[wr_id_idx].wr_id;
  2267. bnxt_qplib_release_srqe(srq, wr_id_idx);
  2268. cqe++;
  2269. (*budget)--;
  2270. *pcqe = cqe;
  2271. } else {
  2272. rq = &qp->rq;
  2273. if (wr_id_idx > rq->hwq.max_elements) {
  2274. dev_err(&cq->hwq.pdev->dev,
  2275. "QPLIB: FP: CQ Process Raw/QP1 RQ wr_id ");
  2276. dev_err(&cq->hwq.pdev->dev,
  2277. "QPLIB: ix 0x%x exceeded RQ max 0x%x",
  2278. wr_id_idx, rq->hwq.max_elements);
  2279. return -EINVAL;
  2280. }
  2281. cqe->wr_id = rq->swq[wr_id_idx].wr_id;
  2282. cqe++;
  2283. (*budget)--;
  2284. rq->hwq.cons++;
  2285. *pcqe = cqe;
  2286. if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
  2287. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2288. /* Add qp to flush list of the CQ */
  2289. bnxt_qplib_add_flush_qp(qp);
  2290. }
  2291. }
  2292. done:
  2293. return rc;
  2294. }
  2295. static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq,
  2296. struct cq_terminal *hwcqe,
  2297. struct bnxt_qplib_cqe **pcqe,
  2298. int *budget)
  2299. {
  2300. struct bnxt_qplib_qp *qp;
  2301. struct bnxt_qplib_q *sq, *rq;
  2302. struct bnxt_qplib_cqe *cqe;
  2303. u32 sw_cons = 0, cqe_cons;
  2304. int rc = 0;
  2305. /* Check the Status */
  2306. if (hwcqe->status != CQ_TERMINAL_STATUS_OK)
  2307. dev_warn(&cq->hwq.pdev->dev,
  2308. "QPLIB: FP: CQ Process Terminal Error status = 0x%x",
  2309. hwcqe->status);
  2310. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2311. le64_to_cpu(hwcqe->qp_handle));
  2312. if (!qp) {
  2313. dev_err(&cq->hwq.pdev->dev,
  2314. "QPLIB: FP: CQ Process terminal qp is NULL");
  2315. return -EINVAL;
  2316. }
  2317. /* Must block new posting of SQ and RQ */
  2318. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2319. sq = &qp->sq;
  2320. rq = &qp->rq;
  2321. cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx);
  2322. if (cqe_cons == 0xFFFF)
  2323. goto do_rq;
  2324. if (cqe_cons > sq->hwq.max_elements) {
  2325. dev_err(&cq->hwq.pdev->dev,
  2326. "QPLIB: FP: CQ Process terminal reported ");
  2327. dev_err(&cq->hwq.pdev->dev,
  2328. "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x",
  2329. cqe_cons, sq->hwq.max_elements);
  2330. goto do_rq;
  2331. }
  2332. if (qp->sq.flushed) {
  2333. dev_dbg(&cq->hwq.pdev->dev,
  2334. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2335. goto sq_done;
  2336. }
  2337. /* Terminal CQE can also include aggregated successful CQEs prior.
  2338. * So we must complete all CQEs from the current sq's cons to the
  2339. * cq_cons with status OK
  2340. */
  2341. cqe = *pcqe;
  2342. while (*budget) {
  2343. sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);
  2344. if (sw_cons == cqe_cons)
  2345. break;
  2346. if (sq->swq[sw_cons].flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
  2347. memset(cqe, 0, sizeof(*cqe));
  2348. cqe->status = CQ_REQ_STATUS_OK;
  2349. cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
  2350. cqe->qp_handle = (u64)(unsigned long)qp;
  2351. cqe->src_qp = qp->id;
  2352. cqe->wr_id = sq->swq[sw_cons].wr_id;
  2353. cqe->type = sq->swq[sw_cons].type;
  2354. cqe++;
  2355. (*budget)--;
  2356. }
  2357. sq->hwq.cons++;
  2358. }
  2359. *pcqe = cqe;
  2360. if (!(*budget) && sw_cons != cqe_cons) {
  2361. /* Out of budget */
  2362. rc = -EAGAIN;
  2363. goto sq_done;
  2364. }
  2365. sq_done:
  2366. if (rc)
  2367. return rc;
  2368. do_rq:
  2369. cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx);
  2370. if (cqe_cons == 0xFFFF) {
  2371. goto done;
  2372. } else if (cqe_cons > rq->hwq.max_elements) {
  2373. dev_err(&cq->hwq.pdev->dev,
  2374. "QPLIB: FP: CQ Processed terminal ");
  2375. dev_err(&cq->hwq.pdev->dev,
  2376. "QPLIB: reported rq_cons_idx 0x%x exceeds max 0x%x",
  2377. cqe_cons, rq->hwq.max_elements);
  2378. goto done;
  2379. }
  2380. if (qp->rq.flushed) {
  2381. dev_dbg(&cq->hwq.pdev->dev,
  2382. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2383. rc = 0;
  2384. goto done;
  2385. }
  2386. /* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR
  2387. * from the current rq->cons to the rq->prod regardless what the
  2388. * rq->cons the terminal CQE indicates
  2389. */
  2390. /* Add qp to flush list of the CQ */
  2391. bnxt_qplib_add_flush_qp(qp);
  2392. done:
  2393. return rc;
  2394. }
  2395. static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq,
  2396. struct cq_cutoff *hwcqe)
  2397. {
  2398. /* Check the Status */
  2399. if (hwcqe->status != CQ_CUTOFF_STATUS_OK) {
  2400. dev_err(&cq->hwq.pdev->dev,
  2401. "QPLIB: FP: CQ Process Cutoff Error status = 0x%x",
  2402. hwcqe->status);
  2403. return -EINVAL;
  2404. }
  2405. clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags);
  2406. wake_up_interruptible(&cq->waitq);
  2407. return 0;
  2408. }
  2409. int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq,
  2410. struct bnxt_qplib_cqe *cqe,
  2411. int num_cqes)
  2412. {
  2413. struct bnxt_qplib_qp *qp = NULL;
  2414. u32 budget = num_cqes;
  2415. unsigned long flags;
  2416. spin_lock_irqsave(&cq->flush_lock, flags);
  2417. list_for_each_entry(qp, &cq->sqf_head, sq_flush) {
  2418. dev_dbg(&cq->hwq.pdev->dev,
  2419. "QPLIB: FP: Flushing SQ QP= %p",
  2420. qp);
  2421. __flush_sq(&qp->sq, qp, &cqe, &budget);
  2422. }
  2423. list_for_each_entry(qp, &cq->rqf_head, rq_flush) {
  2424. dev_dbg(&cq->hwq.pdev->dev,
  2425. "QPLIB: FP: Flushing RQ QP= %p",
  2426. qp);
  2427. __flush_rq(&qp->rq, qp, &cqe, &budget);
  2428. }
  2429. spin_unlock_irqrestore(&cq->flush_lock, flags);
  2430. return num_cqes - budget;
  2431. }
  2432. int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe,
  2433. int num_cqes, struct bnxt_qplib_qp **lib_qp)
  2434. {
  2435. struct cq_base *hw_cqe, **hw_cqe_ptr;
  2436. u32 sw_cons, raw_cons;
  2437. int budget, rc = 0;
  2438. raw_cons = cq->hwq.cons;
  2439. budget = num_cqes;
  2440. while (budget) {
  2441. sw_cons = HWQ_CMP(raw_cons, &cq->hwq);
  2442. hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr;
  2443. hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)];
  2444. /* Check for Valid bit */
  2445. if (!CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements))
  2446. break;
  2447. /*
  2448. * The valid test of the entry must be done first before
  2449. * reading any further.
  2450. */
  2451. dma_rmb();
  2452. /* From the device's respective CQE format to qplib_wc*/
  2453. switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
  2454. case CQ_BASE_CQE_TYPE_REQ:
  2455. rc = bnxt_qplib_cq_process_req(cq,
  2456. (struct cq_req *)hw_cqe,
  2457. &cqe, &budget,
  2458. sw_cons, lib_qp);
  2459. break;
  2460. case CQ_BASE_CQE_TYPE_RES_RC:
  2461. rc = bnxt_qplib_cq_process_res_rc(cq,
  2462. (struct cq_res_rc *)
  2463. hw_cqe, &cqe,
  2464. &budget);
  2465. break;
  2466. case CQ_BASE_CQE_TYPE_RES_UD:
  2467. rc = bnxt_qplib_cq_process_res_ud
  2468. (cq, (struct cq_res_ud *)hw_cqe, &cqe,
  2469. &budget);
  2470. break;
  2471. case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
  2472. rc = bnxt_qplib_cq_process_res_raweth_qp1
  2473. (cq, (struct cq_res_raweth_qp1 *)
  2474. hw_cqe, &cqe, &budget);
  2475. break;
  2476. case CQ_BASE_CQE_TYPE_TERMINAL:
  2477. rc = bnxt_qplib_cq_process_terminal
  2478. (cq, (struct cq_terminal *)hw_cqe,
  2479. &cqe, &budget);
  2480. break;
  2481. case CQ_BASE_CQE_TYPE_CUT_OFF:
  2482. bnxt_qplib_cq_process_cutoff
  2483. (cq, (struct cq_cutoff *)hw_cqe);
  2484. /* Done processing this CQ */
  2485. goto exit;
  2486. default:
  2487. dev_err(&cq->hwq.pdev->dev,
  2488. "QPLIB: process_cq unknown type 0x%lx",
  2489. hw_cqe->cqe_type_toggle &
  2490. CQ_BASE_CQE_TYPE_MASK);
  2491. rc = -EINVAL;
  2492. break;
  2493. }
  2494. if (rc < 0) {
  2495. if (rc == -EAGAIN)
  2496. break;
  2497. /* Error while processing the CQE, just skip to the
  2498. * next one
  2499. */
  2500. dev_err(&cq->hwq.pdev->dev,
  2501. "QPLIB: process_cqe error rc = 0x%x", rc);
  2502. }
  2503. raw_cons++;
  2504. }
  2505. if (cq->hwq.cons != raw_cons) {
  2506. cq->hwq.cons = raw_cons;
  2507. bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ);
  2508. }
  2509. exit:
  2510. return num_cqes - budget;
  2511. }
  2512. void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
  2513. {
  2514. if (arm_type)
  2515. bnxt_qplib_arm_cq(cq, arm_type);
  2516. /* Using cq->arm_state variable to track whether to issue cq handler */
  2517. atomic_set(&cq->arm_state, 1);
  2518. }
  2519. void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp)
  2520. {
  2521. flush_workqueue(qp->scq->nq->cqn_wq);
  2522. if (qp->scq != qp->rcq)
  2523. flush_workqueue(qp->rcq->nq->cqn_wq);
  2524. }