i2c-mux-pca954x.c 13 KB

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  1. /*
  2. * I2C multiplexer
  3. *
  4. * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
  5. * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
  6. *
  7. * This module supports the PCA954x and PCA954x series of I2C multiplexer/switch
  8. * chips made by NXP Semiconductors.
  9. * This includes the:
  10. * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547,
  11. * PCA9548, PCA9846, PCA9847, PCA9848 and PCA9849.
  12. *
  13. * These chips are all controlled via the I2C bus itself, and all have a
  14. * single 8-bit register. The upstream "parent" bus fans out to two,
  15. * four, or eight downstream busses or channels; which of these
  16. * are selected is determined by the chip type and register contents. A
  17. * mux can select only one sub-bus at a time; a switch can select any
  18. * combination simultaneously.
  19. *
  20. * Based on:
  21. * pca954x.c from Kumar Gala <galak@kernel.crashing.org>
  22. * Copyright (C) 2006
  23. *
  24. * Based on:
  25. * pca954x.c from Ken Harrenstien
  26. * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
  27. *
  28. * Based on:
  29. * i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
  30. * and
  31. * pca9540.c from Jean Delvare <jdelvare@suse.de>.
  32. *
  33. * This file is licensed under the terms of the GNU General Public
  34. * License version 2. This program is licensed "as is" without any
  35. * warranty of any kind, whether express or implied.
  36. */
  37. #include <linux/device.h>
  38. #include <linux/gpio/consumer.h>
  39. #include <linux/i2c.h>
  40. #include <linux/i2c-mux.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/irq.h>
  43. #include <linux/module.h>
  44. #include <linux/of.h>
  45. #include <linux/of_device.h>
  46. #include <linux/of_irq.h>
  47. #include <linux/platform_data/pca954x.h>
  48. #include <linux/pm.h>
  49. #include <linux/slab.h>
  50. #include <linux/spinlock.h>
  51. #define PCA954X_MAX_NCHANS 8
  52. #define PCA954X_IRQ_OFFSET 4
  53. enum pca_type {
  54. pca_9540,
  55. pca_9542,
  56. pca_9543,
  57. pca_9544,
  58. pca_9545,
  59. pca_9546,
  60. pca_9547,
  61. pca_9548,
  62. pca_9846,
  63. pca_9847,
  64. pca_9848,
  65. pca_9849,
  66. };
  67. struct chip_desc {
  68. u8 nchans;
  69. u8 enable; /* used for muxes only */
  70. u8 has_irq;
  71. enum muxtype {
  72. pca954x_ismux = 0,
  73. pca954x_isswi
  74. } muxtype;
  75. struct i2c_device_identity id;
  76. };
  77. struct pca954x {
  78. const struct chip_desc *chip;
  79. u8 last_chan; /* last register value */
  80. u8 deselect;
  81. struct i2c_client *client;
  82. struct irq_domain *irq;
  83. unsigned int irq_mask;
  84. raw_spinlock_t lock;
  85. };
  86. /* Provide specs for the PCA954x types we know about */
  87. static const struct chip_desc chips[] = {
  88. [pca_9540] = {
  89. .nchans = 2,
  90. .enable = 0x4,
  91. .muxtype = pca954x_ismux,
  92. .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
  93. },
  94. [pca_9542] = {
  95. .nchans = 2,
  96. .enable = 0x4,
  97. .has_irq = 1,
  98. .muxtype = pca954x_ismux,
  99. .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
  100. },
  101. [pca_9543] = {
  102. .nchans = 2,
  103. .has_irq = 1,
  104. .muxtype = pca954x_isswi,
  105. .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
  106. },
  107. [pca_9544] = {
  108. .nchans = 4,
  109. .enable = 0x4,
  110. .has_irq = 1,
  111. .muxtype = pca954x_ismux,
  112. .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
  113. },
  114. [pca_9545] = {
  115. .nchans = 4,
  116. .has_irq = 1,
  117. .muxtype = pca954x_isswi,
  118. .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
  119. },
  120. [pca_9546] = {
  121. .nchans = 4,
  122. .muxtype = pca954x_isswi,
  123. .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
  124. },
  125. [pca_9547] = {
  126. .nchans = 8,
  127. .enable = 0x8,
  128. .muxtype = pca954x_ismux,
  129. .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
  130. },
  131. [pca_9548] = {
  132. .nchans = 8,
  133. .muxtype = pca954x_isswi,
  134. .id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
  135. },
  136. [pca_9846] = {
  137. .nchans = 4,
  138. .muxtype = pca954x_isswi,
  139. .id = {
  140. .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
  141. .part_id = 0x10b,
  142. },
  143. },
  144. [pca_9847] = {
  145. .nchans = 8,
  146. .enable = 0x8,
  147. .muxtype = pca954x_ismux,
  148. .id = {
  149. .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
  150. .part_id = 0x108,
  151. },
  152. },
  153. [pca_9848] = {
  154. .nchans = 8,
  155. .muxtype = pca954x_isswi,
  156. .id = {
  157. .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
  158. .part_id = 0x10a,
  159. },
  160. },
  161. [pca_9849] = {
  162. .nchans = 4,
  163. .enable = 0x4,
  164. .muxtype = pca954x_ismux,
  165. .id = {
  166. .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
  167. .part_id = 0x109,
  168. },
  169. },
  170. };
  171. static const struct i2c_device_id pca954x_id[] = {
  172. { "pca9540", pca_9540 },
  173. { "pca9542", pca_9542 },
  174. { "pca9543", pca_9543 },
  175. { "pca9544", pca_9544 },
  176. { "pca9545", pca_9545 },
  177. { "pca9546", pca_9546 },
  178. { "pca9547", pca_9547 },
  179. { "pca9548", pca_9548 },
  180. { "pca9846", pca_9846 },
  181. { "pca9847", pca_9847 },
  182. { "pca9848", pca_9848 },
  183. { "pca9849", pca_9849 },
  184. { }
  185. };
  186. MODULE_DEVICE_TABLE(i2c, pca954x_id);
  187. #ifdef CONFIG_OF
  188. static const struct of_device_id pca954x_of_match[] = {
  189. { .compatible = "nxp,pca9540", .data = &chips[pca_9540] },
  190. { .compatible = "nxp,pca9542", .data = &chips[pca_9542] },
  191. { .compatible = "nxp,pca9543", .data = &chips[pca_9543] },
  192. { .compatible = "nxp,pca9544", .data = &chips[pca_9544] },
  193. { .compatible = "nxp,pca9545", .data = &chips[pca_9545] },
  194. { .compatible = "nxp,pca9546", .data = &chips[pca_9546] },
  195. { .compatible = "nxp,pca9547", .data = &chips[pca_9547] },
  196. { .compatible = "nxp,pca9548", .data = &chips[pca_9548] },
  197. { .compatible = "nxp,pca9846", .data = &chips[pca_9846] },
  198. { .compatible = "nxp,pca9847", .data = &chips[pca_9847] },
  199. { .compatible = "nxp,pca9848", .data = &chips[pca_9848] },
  200. { .compatible = "nxp,pca9849", .data = &chips[pca_9849] },
  201. {}
  202. };
  203. MODULE_DEVICE_TABLE(of, pca954x_of_match);
  204. #endif
  205. /* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
  206. for this as they will try to lock adapter a second time */
  207. static int pca954x_reg_write(struct i2c_adapter *adap,
  208. struct i2c_client *client, u8 val)
  209. {
  210. int ret = -ENODEV;
  211. if (adap->algo->master_xfer) {
  212. struct i2c_msg msg;
  213. char buf[1];
  214. msg.addr = client->addr;
  215. msg.flags = 0;
  216. msg.len = 1;
  217. buf[0] = val;
  218. msg.buf = buf;
  219. ret = __i2c_transfer(adap, &msg, 1);
  220. if (ret >= 0 && ret != 1)
  221. ret = -EREMOTEIO;
  222. } else {
  223. union i2c_smbus_data data;
  224. ret = adap->algo->smbus_xfer(adap, client->addr,
  225. client->flags,
  226. I2C_SMBUS_WRITE,
  227. val, I2C_SMBUS_BYTE, &data);
  228. }
  229. return ret;
  230. }
  231. static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
  232. {
  233. struct pca954x *data = i2c_mux_priv(muxc);
  234. struct i2c_client *client = data->client;
  235. const struct chip_desc *chip = data->chip;
  236. u8 regval;
  237. int ret = 0;
  238. /* we make switches look like muxes, not sure how to be smarter */
  239. if (chip->muxtype == pca954x_ismux)
  240. regval = chan | chip->enable;
  241. else
  242. regval = 1 << chan;
  243. /* Only select the channel if its different from the last channel */
  244. if (data->last_chan != regval) {
  245. ret = pca954x_reg_write(muxc->parent, client, regval);
  246. data->last_chan = ret < 0 ? 0 : regval;
  247. }
  248. return ret;
  249. }
  250. static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
  251. {
  252. struct pca954x *data = i2c_mux_priv(muxc);
  253. struct i2c_client *client = data->client;
  254. if (!(data->deselect & (1 << chan)))
  255. return 0;
  256. /* Deselect active channel */
  257. data->last_chan = 0;
  258. return pca954x_reg_write(muxc->parent, client, data->last_chan);
  259. }
  260. static irqreturn_t pca954x_irq_handler(int irq, void *dev_id)
  261. {
  262. struct pca954x *data = dev_id;
  263. unsigned int child_irq;
  264. int ret, i, handled = 0;
  265. ret = i2c_smbus_read_byte(data->client);
  266. if (ret < 0)
  267. return IRQ_NONE;
  268. for (i = 0; i < data->chip->nchans; i++) {
  269. if (ret & BIT(PCA954X_IRQ_OFFSET + i)) {
  270. child_irq = irq_linear_revmap(data->irq, i);
  271. handle_nested_irq(child_irq);
  272. handled++;
  273. }
  274. }
  275. return handled ? IRQ_HANDLED : IRQ_NONE;
  276. }
  277. static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type)
  278. {
  279. if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW)
  280. return -EINVAL;
  281. return 0;
  282. }
  283. static struct irq_chip pca954x_irq_chip = {
  284. .name = "i2c-mux-pca954x",
  285. .irq_set_type = pca954x_irq_set_type,
  286. };
  287. static int pca954x_irq_setup(struct i2c_mux_core *muxc)
  288. {
  289. struct pca954x *data = i2c_mux_priv(muxc);
  290. struct i2c_client *client = data->client;
  291. int c, irq;
  292. if (!data->chip->has_irq || client->irq <= 0)
  293. return 0;
  294. raw_spin_lock_init(&data->lock);
  295. data->irq = irq_domain_add_linear(client->dev.of_node,
  296. data->chip->nchans,
  297. &irq_domain_simple_ops, data);
  298. if (!data->irq)
  299. return -ENODEV;
  300. for (c = 0; c < data->chip->nchans; c++) {
  301. irq = irq_create_mapping(data->irq, c);
  302. if (!irq) {
  303. dev_err(&client->dev, "failed irq create map\n");
  304. return -EINVAL;
  305. }
  306. irq_set_chip_data(irq, data);
  307. irq_set_chip_and_handler(irq, &pca954x_irq_chip,
  308. handle_simple_irq);
  309. }
  310. return 0;
  311. }
  312. static void pca954x_cleanup(struct i2c_mux_core *muxc)
  313. {
  314. struct pca954x *data = i2c_mux_priv(muxc);
  315. int c, irq;
  316. if (data->irq) {
  317. for (c = 0; c < data->chip->nchans; c++) {
  318. irq = irq_find_mapping(data->irq, c);
  319. irq_dispose_mapping(irq);
  320. }
  321. irq_domain_remove(data->irq);
  322. }
  323. i2c_mux_del_adapters(muxc);
  324. }
  325. /*
  326. * I2C init/probing/exit functions
  327. */
  328. static int pca954x_probe(struct i2c_client *client,
  329. const struct i2c_device_id *id)
  330. {
  331. struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
  332. struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
  333. struct device_node *of_node = client->dev.of_node;
  334. bool idle_disconnect_dt;
  335. struct gpio_desc *gpio;
  336. int num, force, class;
  337. struct i2c_mux_core *muxc;
  338. struct pca954x *data;
  339. const struct of_device_id *match;
  340. int ret;
  341. if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
  342. return -ENODEV;
  343. muxc = i2c_mux_alloc(adap, &client->dev,
  344. PCA954X_MAX_NCHANS, sizeof(*data), 0,
  345. pca954x_select_chan, pca954x_deselect_mux);
  346. if (!muxc)
  347. return -ENOMEM;
  348. data = i2c_mux_priv(muxc);
  349. i2c_set_clientdata(client, muxc);
  350. data->client = client;
  351. /* Get the mux out of reset if a reset GPIO is specified. */
  352. gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_LOW);
  353. if (IS_ERR(gpio))
  354. return PTR_ERR(gpio);
  355. match = of_match_device(of_match_ptr(pca954x_of_match), &client->dev);
  356. if (match)
  357. data->chip = of_device_get_match_data(&client->dev);
  358. else
  359. data->chip = &chips[id->driver_data];
  360. if (data->chip->id.manufacturer_id != I2C_DEVICE_ID_NONE) {
  361. struct i2c_device_identity id;
  362. ret = i2c_get_device_id(client, &id);
  363. if (ret && ret != -EOPNOTSUPP)
  364. return ret;
  365. if (!ret &&
  366. (id.manufacturer_id != data->chip->id.manufacturer_id ||
  367. id.part_id != data->chip->id.part_id)) {
  368. dev_warn(&client->dev,
  369. "unexpected device id %03x-%03x-%x\n",
  370. id.manufacturer_id, id.part_id,
  371. id.die_revision);
  372. return -ENODEV;
  373. }
  374. }
  375. /* Write the mux register at addr to verify
  376. * that the mux is in fact present. This also
  377. * initializes the mux to disconnected state.
  378. */
  379. if (i2c_smbus_write_byte(client, 0) < 0) {
  380. dev_warn(&client->dev, "probe failed\n");
  381. return -ENODEV;
  382. }
  383. data->last_chan = 0; /* force the first selection */
  384. idle_disconnect_dt = of_node &&
  385. of_property_read_bool(of_node, "i2c-mux-idle-disconnect");
  386. ret = pca954x_irq_setup(muxc);
  387. if (ret)
  388. goto fail_cleanup;
  389. /* Now create an adapter for each channel */
  390. for (num = 0; num < data->chip->nchans; num++) {
  391. bool idle_disconnect_pd = false;
  392. force = 0; /* dynamic adap number */
  393. class = 0; /* no class by default */
  394. if (pdata) {
  395. if (num < pdata->num_modes) {
  396. /* force static number */
  397. force = pdata->modes[num].adap_id;
  398. class = pdata->modes[num].class;
  399. } else
  400. /* discard unconfigured channels */
  401. break;
  402. idle_disconnect_pd = pdata->modes[num].deselect_on_exit;
  403. }
  404. data->deselect |= (idle_disconnect_pd ||
  405. idle_disconnect_dt) << num;
  406. ret = i2c_mux_add_adapter(muxc, force, num, class);
  407. if (ret)
  408. goto fail_cleanup;
  409. }
  410. if (data->irq) {
  411. ret = devm_request_threaded_irq(&client->dev, data->client->irq,
  412. NULL, pca954x_irq_handler,
  413. IRQF_ONESHOT | IRQF_SHARED,
  414. "pca954x", data);
  415. if (ret)
  416. goto fail_cleanup;
  417. }
  418. dev_info(&client->dev,
  419. "registered %d multiplexed busses for I2C %s %s\n",
  420. num, data->chip->muxtype == pca954x_ismux
  421. ? "mux" : "switch", client->name);
  422. return 0;
  423. fail_cleanup:
  424. pca954x_cleanup(muxc);
  425. return ret;
  426. }
  427. static int pca954x_remove(struct i2c_client *client)
  428. {
  429. struct i2c_mux_core *muxc = i2c_get_clientdata(client);
  430. pca954x_cleanup(muxc);
  431. return 0;
  432. }
  433. #ifdef CONFIG_PM_SLEEP
  434. static int pca954x_resume(struct device *dev)
  435. {
  436. struct i2c_client *client = to_i2c_client(dev);
  437. struct i2c_mux_core *muxc = i2c_get_clientdata(client);
  438. struct pca954x *data = i2c_mux_priv(muxc);
  439. data->last_chan = 0;
  440. return i2c_smbus_write_byte(client, 0);
  441. }
  442. #endif
  443. static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume);
  444. static struct i2c_driver pca954x_driver = {
  445. .driver = {
  446. .name = "pca954x",
  447. .pm = &pca954x_pm,
  448. .of_match_table = of_match_ptr(pca954x_of_match),
  449. },
  450. .probe = pca954x_probe,
  451. .remove = pca954x_remove,
  452. .id_table = pca954x_id,
  453. };
  454. module_i2c_driver(pca954x_driver);
  455. MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
  456. MODULE_DESCRIPTION("PCA954x I2C mux/switch driver");
  457. MODULE_LICENSE("GPL v2");