i2c-designware-platdrv.c 13 KB

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  1. /*
  2. * Synopsys DesignWare I2C adapter driver.
  3. *
  4. * Based on the TI DAVINCI I2C adapter driver.
  5. *
  6. * Copyright (C) 2006 Texas Instruments.
  7. * Copyright (C) 2007 MontaVista Software Inc.
  8. * Copyright (C) 2009 Provigent Ltd.
  9. *
  10. * ----------------------------------------------------------------------------
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. * ----------------------------------------------------------------------------
  22. *
  23. */
  24. #include <linux/acpi.h>
  25. #include <linux/clk-provider.h>
  26. #include <linux/clk.h>
  27. #include <linux/delay.h>
  28. #include <linux/dmi.h>
  29. #include <linux/err.h>
  30. #include <linux/errno.h>
  31. #include <linux/i2c.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/io.h>
  34. #include <linux/kernel.h>
  35. #include <linux/module.h>
  36. #include <linux/of.h>
  37. #include <linux/platform_data/i2c-designware.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/pm.h>
  40. #include <linux/pm_runtime.h>
  41. #include <linux/property.h>
  42. #include <linux/reset.h>
  43. #include <linux/sched.h>
  44. #include <linux/slab.h>
  45. #include <linux/suspend.h>
  46. #include "i2c-designware-core.h"
  47. static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
  48. {
  49. return clk_get_rate(dev->clk)/1000;
  50. }
  51. #ifdef CONFIG_ACPI
  52. /*
  53. * The HCNT/LCNT information coming from ACPI should be the most accurate
  54. * for given platform. However, some systems get it wrong. On such systems
  55. * we get better results by calculating those based on the input clock.
  56. */
  57. static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
  58. {
  59. .ident = "Dell Inspiron 7348",
  60. .matches = {
  61. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  62. DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
  63. },
  64. },
  65. { }
  66. };
  67. static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
  68. u16 *hcnt, u16 *lcnt, u32 *sda_hold)
  69. {
  70. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
  71. acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  72. union acpi_object *obj;
  73. if (dmi_check_system(dw_i2c_no_acpi_params))
  74. return;
  75. if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
  76. return;
  77. obj = (union acpi_object *)buf.pointer;
  78. if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
  79. const union acpi_object *objs = obj->package.elements;
  80. *hcnt = (u16)objs[0].integer.value;
  81. *lcnt = (u16)objs[1].integer.value;
  82. *sda_hold = (u32)objs[2].integer.value;
  83. }
  84. kfree(buf.pointer);
  85. }
  86. static int dw_i2c_acpi_configure(struct platform_device *pdev)
  87. {
  88. struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  89. u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
  90. acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  91. const struct acpi_device_id *id;
  92. struct acpi_device *adev;
  93. const char *uid;
  94. dev->adapter.nr = -1;
  95. dev->tx_fifo_depth = 32;
  96. dev->rx_fifo_depth = 32;
  97. /*
  98. * Try to get SDA hold time and *CNT values from an ACPI method for
  99. * selected speed modes.
  100. */
  101. dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
  102. dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
  103. dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
  104. dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
  105. switch (dev->clk_freq) {
  106. case 100000:
  107. dev->sda_hold_time = ss_ht;
  108. break;
  109. case 1000000:
  110. dev->sda_hold_time = fp_ht;
  111. break;
  112. case 3400000:
  113. dev->sda_hold_time = hs_ht;
  114. break;
  115. case 400000:
  116. default:
  117. dev->sda_hold_time = fs_ht;
  118. break;
  119. }
  120. id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
  121. if (id && id->driver_data)
  122. dev->flags |= (u32)id->driver_data;
  123. if (acpi_bus_get_device(handle, &adev))
  124. return -ENODEV;
  125. /*
  126. * Cherrytrail I2C7 gets used for the PMIC which gets accessed
  127. * through ACPI opregions during late suspend / early resume
  128. * disable pm for it.
  129. */
  130. uid = adev->pnp.unique_id;
  131. if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
  132. dev->pm_disabled = true;
  133. return 0;
  134. }
  135. static const struct acpi_device_id dw_i2c_acpi_match[] = {
  136. { "INT33C2", 0 },
  137. { "INT33C3", 0 },
  138. { "INT3432", 0 },
  139. { "INT3433", 0 },
  140. { "80860F41", 0 },
  141. { "808622C1", MODEL_CHERRYTRAIL },
  142. { "AMD0010", ACCESS_INTR_MASK },
  143. { "AMDI0010", ACCESS_INTR_MASK },
  144. { "AMDI0510", 0 },
  145. { "APMC0D0F", 0 },
  146. { "HISI02A1", 0 },
  147. { "HISI02A2", 0 },
  148. { }
  149. };
  150. MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
  151. #else
  152. static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
  153. {
  154. return -ENODEV;
  155. }
  156. #endif
  157. static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
  158. {
  159. dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
  160. dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
  161. DW_IC_CON_RESTART_EN;
  162. dev->mode = DW_IC_MASTER;
  163. switch (dev->clk_freq) {
  164. case 100000:
  165. dev->master_cfg |= DW_IC_CON_SPEED_STD;
  166. break;
  167. case 3400000:
  168. dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
  169. break;
  170. default:
  171. dev->master_cfg |= DW_IC_CON_SPEED_FAST;
  172. }
  173. }
  174. static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
  175. {
  176. dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
  177. dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
  178. DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
  179. dev->mode = DW_IC_SLAVE;
  180. }
  181. static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
  182. {
  183. u32 param, tx_fifo_depth, rx_fifo_depth;
  184. /*
  185. * Try to detect the FIFO depth if not set by interface driver,
  186. * the depth could be from 2 to 256 from HW spec.
  187. */
  188. param = i2c_dw_read_comp_param(dev);
  189. tx_fifo_depth = ((param >> 16) & 0xff) + 1;
  190. rx_fifo_depth = ((param >> 8) & 0xff) + 1;
  191. if (!dev->tx_fifo_depth) {
  192. dev->tx_fifo_depth = tx_fifo_depth;
  193. dev->rx_fifo_depth = rx_fifo_depth;
  194. dev->adapter.nr = id;
  195. } else if (tx_fifo_depth >= 2) {
  196. dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
  197. tx_fifo_depth);
  198. dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
  199. rx_fifo_depth);
  200. }
  201. }
  202. static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
  203. {
  204. pm_runtime_disable(dev->dev);
  205. if (dev->pm_disabled)
  206. pm_runtime_put_noidle(dev->dev);
  207. }
  208. static int dw_i2c_plat_probe(struct platform_device *pdev)
  209. {
  210. struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
  211. struct i2c_adapter *adap;
  212. struct dw_i2c_dev *dev;
  213. u32 acpi_speed, ht = 0;
  214. struct resource *mem;
  215. int i, irq, ret;
  216. static const int supported_speeds[] = {
  217. 0, 100000, 400000, 1000000, 3400000
  218. };
  219. irq = platform_get_irq(pdev, 0);
  220. if (irq < 0)
  221. return irq;
  222. dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
  223. if (!dev)
  224. return -ENOMEM;
  225. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  226. dev->base = devm_ioremap_resource(&pdev->dev, mem);
  227. if (IS_ERR(dev->base))
  228. return PTR_ERR(dev->base);
  229. dev->dev = &pdev->dev;
  230. dev->irq = irq;
  231. platform_set_drvdata(pdev, dev);
  232. dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
  233. if (IS_ERR(dev->rst)) {
  234. if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
  235. return -EPROBE_DEFER;
  236. } else {
  237. reset_control_deassert(dev->rst);
  238. }
  239. if (pdata) {
  240. dev->clk_freq = pdata->i2c_scl_freq;
  241. } else {
  242. device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
  243. &ht);
  244. device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
  245. &dev->sda_falling_time);
  246. device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
  247. &dev->scl_falling_time);
  248. device_property_read_u32(&pdev->dev, "clock-frequency",
  249. &dev->clk_freq);
  250. }
  251. acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
  252. /*
  253. * Some DSTDs use a non standard speed, round down to the lowest
  254. * standard speed.
  255. */
  256. for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
  257. if (acpi_speed < supported_speeds[i])
  258. break;
  259. }
  260. acpi_speed = supported_speeds[i - 1];
  261. /*
  262. * Find bus speed from the "clock-frequency" device property, ACPI
  263. * or by using fast mode if neither is set.
  264. */
  265. if (acpi_speed && dev->clk_freq)
  266. dev->clk_freq = min(dev->clk_freq, acpi_speed);
  267. else if (acpi_speed || dev->clk_freq)
  268. dev->clk_freq = max(dev->clk_freq, acpi_speed);
  269. else
  270. dev->clk_freq = 400000;
  271. if (has_acpi_companion(&pdev->dev))
  272. dw_i2c_acpi_configure(pdev);
  273. /*
  274. * Only standard mode at 100kHz, fast mode at 400kHz,
  275. * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
  276. */
  277. if (dev->clk_freq != 100000 && dev->clk_freq != 400000
  278. && dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
  279. dev_err(&pdev->dev,
  280. "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
  281. dev->clk_freq);
  282. ret = -EINVAL;
  283. goto exit_reset;
  284. }
  285. ret = i2c_dw_probe_lock_support(dev);
  286. if (ret)
  287. goto exit_reset;
  288. if (i2c_detect_slave_mode(&pdev->dev))
  289. i2c_dw_configure_slave(dev);
  290. else
  291. i2c_dw_configure_master(dev);
  292. dev->clk = devm_clk_get(&pdev->dev, NULL);
  293. if (!i2c_dw_prepare_clk(dev, true)) {
  294. dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
  295. if (!dev->sda_hold_time && ht)
  296. dev->sda_hold_time = div_u64(
  297. (u64)dev->get_clk_rate_khz(dev) * ht + 500000,
  298. 1000000);
  299. }
  300. dw_i2c_set_fifo_size(dev, pdev->id);
  301. adap = &dev->adapter;
  302. adap->owner = THIS_MODULE;
  303. adap->class = I2C_CLASS_DEPRECATED;
  304. ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
  305. adap->dev.of_node = pdev->dev.of_node;
  306. dev_pm_set_driver_flags(&pdev->dev,
  307. DPM_FLAG_SMART_PREPARE |
  308. DPM_FLAG_SMART_SUSPEND |
  309. DPM_FLAG_LEAVE_SUSPENDED);
  310. /* The code below assumes runtime PM to be disabled. */
  311. WARN_ON(pm_runtime_enabled(&pdev->dev));
  312. pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
  313. pm_runtime_use_autosuspend(&pdev->dev);
  314. pm_runtime_set_active(&pdev->dev);
  315. if (dev->pm_disabled)
  316. pm_runtime_get_noresume(&pdev->dev);
  317. pm_runtime_enable(&pdev->dev);
  318. if (dev->mode == DW_IC_SLAVE)
  319. ret = i2c_dw_probe_slave(dev);
  320. else
  321. ret = i2c_dw_probe(dev);
  322. if (ret)
  323. goto exit_probe;
  324. return ret;
  325. exit_probe:
  326. dw_i2c_plat_pm_cleanup(dev);
  327. exit_reset:
  328. if (!IS_ERR_OR_NULL(dev->rst))
  329. reset_control_assert(dev->rst);
  330. return ret;
  331. }
  332. static int dw_i2c_plat_remove(struct platform_device *pdev)
  333. {
  334. struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  335. pm_runtime_get_sync(&pdev->dev);
  336. i2c_del_adapter(&dev->adapter);
  337. dev->disable(dev);
  338. pm_runtime_dont_use_autosuspend(&pdev->dev);
  339. pm_runtime_put_sync(&pdev->dev);
  340. dw_i2c_plat_pm_cleanup(dev);
  341. if (!IS_ERR_OR_NULL(dev->rst))
  342. reset_control_assert(dev->rst);
  343. i2c_dw_remove_lock_support(dev);
  344. return 0;
  345. }
  346. #ifdef CONFIG_OF
  347. static const struct of_device_id dw_i2c_of_match[] = {
  348. { .compatible = "snps,designware-i2c", },
  349. {},
  350. };
  351. MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
  352. #endif
  353. #ifdef CONFIG_PM_SLEEP
  354. static int dw_i2c_plat_prepare(struct device *dev)
  355. {
  356. /*
  357. * If the ACPI companion device object is present for this device, it
  358. * may be accessed during suspend and resume of other devices via I2C
  359. * operation regions, so tell the PM core and middle layers to avoid
  360. * skipping system suspend/resume callbacks for it in that case.
  361. */
  362. return !has_acpi_companion(dev);
  363. }
  364. static void dw_i2c_plat_complete(struct device *dev)
  365. {
  366. /*
  367. * The device can only be in runtime suspend at this point if it has not
  368. * been resumed throughout the ending system suspend/resume cycle, so if
  369. * the platform firmware might mess up with it, request the runtime PM
  370. * framework to resume it.
  371. */
  372. if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
  373. pm_request_resume(dev);
  374. }
  375. #else
  376. #define dw_i2c_plat_prepare NULL
  377. #define dw_i2c_plat_complete NULL
  378. #endif
  379. #ifdef CONFIG_PM
  380. static int dw_i2c_plat_suspend(struct device *dev)
  381. {
  382. struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
  383. i_dev->disable(i_dev);
  384. i2c_dw_prepare_clk(i_dev, false);
  385. return 0;
  386. }
  387. static int dw_i2c_plat_resume(struct device *dev)
  388. {
  389. struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
  390. i2c_dw_prepare_clk(i_dev, true);
  391. i_dev->init(i_dev);
  392. return 0;
  393. }
  394. static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
  395. .prepare = dw_i2c_plat_prepare,
  396. .complete = dw_i2c_plat_complete,
  397. SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
  398. SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
  399. };
  400. #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
  401. #else
  402. #define DW_I2C_DEV_PMOPS NULL
  403. #endif
  404. /* Work with hotplug and coldplug */
  405. MODULE_ALIAS("platform:i2c_designware");
  406. static struct platform_driver dw_i2c_driver = {
  407. .probe = dw_i2c_plat_probe,
  408. .remove = dw_i2c_plat_remove,
  409. .driver = {
  410. .name = "i2c_designware",
  411. .of_match_table = of_match_ptr(dw_i2c_of_match),
  412. .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
  413. .pm = DW_I2C_DEV_PMOPS,
  414. },
  415. };
  416. static int __init dw_i2c_init_driver(void)
  417. {
  418. return platform_driver_register(&dw_i2c_driver);
  419. }
  420. subsys_initcall(dw_i2c_init_driver);
  421. static void __exit dw_i2c_exit_driver(void)
  422. {
  423. platform_driver_unregister(&dw_i2c_driver);
  424. }
  425. module_exit(dw_i2c_exit_driver);
  426. MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
  427. MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
  428. MODULE_LICENSE("GPL");