i915_gem_context.c 24 KB

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  1. /*
  2. * Copyright © 2011-2012 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Ben Widawsky <ben@bwidawsk.net>
  25. *
  26. */
  27. /*
  28. * This file implements HW context support. On gen5+ a HW context consists of an
  29. * opaque GPU object which is referenced at times of context saves and restores.
  30. * With RC6 enabled, the context is also referenced as the GPU enters and exists
  31. * from RC6 (GPU has it's own internal power context, except on gen5). Though
  32. * something like a context does exist for the media ring, the code only
  33. * supports contexts for the render ring.
  34. *
  35. * In software, there is a distinction between contexts created by the user,
  36. * and the default HW context. The default HW context is used by GPU clients
  37. * that do not request setup of their own hardware context. The default
  38. * context's state is never restored to help prevent programming errors. This
  39. * would happen if a client ran and piggy-backed off another clients GPU state.
  40. * The default context only exists to give the GPU some offset to load as the
  41. * current to invoke a save of the context we actually care about. In fact, the
  42. * code could likely be constructed, albeit in a more complicated fashion, to
  43. * never use the default context, though that limits the driver's ability to
  44. * swap out, and/or destroy other contexts.
  45. *
  46. * All other contexts are created as a request by the GPU client. These contexts
  47. * store GPU state, and thus allow GPU clients to not re-emit state (and
  48. * potentially query certain state) at any time. The kernel driver makes
  49. * certain that the appropriate commands are inserted.
  50. *
  51. * The context life cycle is semi-complicated in that context BOs may live
  52. * longer than the context itself because of the way the hardware, and object
  53. * tracking works. Below is a very crude representation of the state machine
  54. * describing the context life.
  55. * refcount pincount active
  56. * S0: initial state 0 0 0
  57. * S1: context created 1 0 0
  58. * S2: context is currently running 2 1 X
  59. * S3: GPU referenced, but not current 2 0 1
  60. * S4: context is current, but destroyed 1 1 0
  61. * S5: like S3, but destroyed 1 0 1
  62. *
  63. * The most common (but not all) transitions:
  64. * S0->S1: client creates a context
  65. * S1->S2: client submits execbuf with context
  66. * S2->S3: other clients submits execbuf with context
  67. * S3->S1: context object was retired
  68. * S3->S2: clients submits another execbuf
  69. * S2->S4: context destroy called with current context
  70. * S3->S5->S0: destroy path
  71. * S4->S5->S0: destroy path on current context
  72. *
  73. * There are two confusing terms used above:
  74. * The "current context" means the context which is currently running on the
  75. * GPU. The GPU has loaded its state already and has stored away the gtt
  76. * offset of the BO. The GPU is not actively referencing the data at this
  77. * offset, but it will on the next context switch. The only way to avoid this
  78. * is to do a GPU reset.
  79. *
  80. * An "active context' is one which was previously the "current context" and is
  81. * on the active list waiting for the next context switch to occur. Until this
  82. * happens, the object must remain at the same gtt offset. It is therefore
  83. * possible to destroy a context, but it is still active.
  84. *
  85. */
  86. #include <linux/log2.h>
  87. #include <drm/drmP.h>
  88. #include <drm/i915_drm.h>
  89. #include "i915_drv.h"
  90. #include "i915_trace.h"
  91. #define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1
  92. static void lut_close(struct i915_gem_context *ctx)
  93. {
  94. struct i915_lut_handle *lut, *ln;
  95. struct radix_tree_iter iter;
  96. void __rcu **slot;
  97. list_for_each_entry_safe(lut, ln, &ctx->handles_list, ctx_link) {
  98. list_del(&lut->obj_link);
  99. kmem_cache_free(ctx->i915->luts, lut);
  100. }
  101. rcu_read_lock();
  102. radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {
  103. struct i915_vma *vma = rcu_dereference_raw(*slot);
  104. radix_tree_iter_delete(&ctx->handles_vma, &iter, slot);
  105. __i915_gem_object_release_unless_active(vma->obj);
  106. }
  107. rcu_read_unlock();
  108. }
  109. static void i915_gem_context_free(struct i915_gem_context *ctx)
  110. {
  111. int i;
  112. lockdep_assert_held(&ctx->i915->drm.struct_mutex);
  113. GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
  114. i915_ppgtt_put(ctx->ppgtt);
  115. for (i = 0; i < I915_NUM_ENGINES; i++) {
  116. struct intel_context *ce = &ctx->engine[i];
  117. if (!ce->state)
  118. continue;
  119. WARN_ON(ce->pin_count);
  120. if (ce->ring)
  121. intel_ring_free(ce->ring);
  122. __i915_gem_object_release_unless_active(ce->state->obj);
  123. }
  124. kfree(ctx->name);
  125. put_pid(ctx->pid);
  126. list_del(&ctx->link);
  127. ida_simple_remove(&ctx->i915->contexts.hw_ida, ctx->hw_id);
  128. kfree_rcu(ctx, rcu);
  129. }
  130. static void contexts_free(struct drm_i915_private *i915)
  131. {
  132. struct llist_node *freed = llist_del_all(&i915->contexts.free_list);
  133. struct i915_gem_context *ctx, *cn;
  134. lockdep_assert_held(&i915->drm.struct_mutex);
  135. llist_for_each_entry_safe(ctx, cn, freed, free_link)
  136. i915_gem_context_free(ctx);
  137. }
  138. static void contexts_free_first(struct drm_i915_private *i915)
  139. {
  140. struct i915_gem_context *ctx;
  141. struct llist_node *freed;
  142. lockdep_assert_held(&i915->drm.struct_mutex);
  143. freed = llist_del_first(&i915->contexts.free_list);
  144. if (!freed)
  145. return;
  146. ctx = container_of(freed, typeof(*ctx), free_link);
  147. i915_gem_context_free(ctx);
  148. }
  149. static void contexts_free_worker(struct work_struct *work)
  150. {
  151. struct drm_i915_private *i915 =
  152. container_of(work, typeof(*i915), contexts.free_work);
  153. mutex_lock(&i915->drm.struct_mutex);
  154. contexts_free(i915);
  155. mutex_unlock(&i915->drm.struct_mutex);
  156. }
  157. void i915_gem_context_release(struct kref *ref)
  158. {
  159. struct i915_gem_context *ctx = container_of(ref, typeof(*ctx), ref);
  160. struct drm_i915_private *i915 = ctx->i915;
  161. trace_i915_context_free(ctx);
  162. if (llist_add(&ctx->free_link, &i915->contexts.free_list))
  163. queue_work(i915->wq, &i915->contexts.free_work);
  164. }
  165. static void context_close(struct i915_gem_context *ctx)
  166. {
  167. i915_gem_context_set_closed(ctx);
  168. /*
  169. * The LUT uses the VMA as a backpointer to unref the object,
  170. * so we need to clear the LUT before we close all the VMA (inside
  171. * the ppgtt).
  172. */
  173. lut_close(ctx);
  174. if (ctx->ppgtt)
  175. i915_ppgtt_close(&ctx->ppgtt->base);
  176. ctx->file_priv = ERR_PTR(-EBADF);
  177. i915_gem_context_put(ctx);
  178. }
  179. static int assign_hw_id(struct drm_i915_private *dev_priv, unsigned *out)
  180. {
  181. int ret;
  182. unsigned int max;
  183. if (INTEL_GEN(dev_priv) >= 11)
  184. max = GEN11_MAX_CONTEXT_HW_ID;
  185. else
  186. max = MAX_CONTEXT_HW_ID;
  187. ret = ida_simple_get(&dev_priv->contexts.hw_ida,
  188. 0, max, GFP_KERNEL);
  189. if (ret < 0) {
  190. /* Contexts are only released when no longer active.
  191. * Flush any pending retires to hopefully release some
  192. * stale contexts and try again.
  193. */
  194. i915_retire_requests(dev_priv);
  195. ret = ida_simple_get(&dev_priv->contexts.hw_ida,
  196. 0, max, GFP_KERNEL);
  197. if (ret < 0)
  198. return ret;
  199. }
  200. *out = ret;
  201. return 0;
  202. }
  203. static u32 default_desc_template(const struct drm_i915_private *i915,
  204. const struct i915_hw_ppgtt *ppgtt)
  205. {
  206. u32 address_mode;
  207. u32 desc;
  208. desc = GEN8_CTX_VALID | GEN8_CTX_PRIVILEGE;
  209. address_mode = INTEL_LEGACY_32B_CONTEXT;
  210. if (ppgtt && i915_vm_is_48bit(&ppgtt->base))
  211. address_mode = INTEL_LEGACY_64B_CONTEXT;
  212. desc |= address_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT;
  213. if (IS_GEN8(i915))
  214. desc |= GEN8_CTX_L3LLC_COHERENT;
  215. /* TODO: WaDisableLiteRestore when we start using semaphore
  216. * signalling between Command Streamers
  217. * ring->ctx_desc_template |= GEN8_CTX_FORCE_RESTORE;
  218. */
  219. return desc;
  220. }
  221. static struct i915_gem_context *
  222. __create_hw_context(struct drm_i915_private *dev_priv,
  223. struct drm_i915_file_private *file_priv)
  224. {
  225. struct i915_gem_context *ctx;
  226. int ret;
  227. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  228. if (ctx == NULL)
  229. return ERR_PTR(-ENOMEM);
  230. ret = assign_hw_id(dev_priv, &ctx->hw_id);
  231. if (ret) {
  232. kfree(ctx);
  233. return ERR_PTR(ret);
  234. }
  235. kref_init(&ctx->ref);
  236. list_add_tail(&ctx->link, &dev_priv->contexts.list);
  237. ctx->i915 = dev_priv;
  238. ctx->priority = I915_PRIORITY_NORMAL;
  239. INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
  240. INIT_LIST_HEAD(&ctx->handles_list);
  241. /* Default context will never have a file_priv */
  242. ret = DEFAULT_CONTEXT_HANDLE;
  243. if (file_priv) {
  244. ret = idr_alloc(&file_priv->context_idr, ctx,
  245. DEFAULT_CONTEXT_HANDLE, 0, GFP_KERNEL);
  246. if (ret < 0)
  247. goto err_lut;
  248. }
  249. ctx->user_handle = ret;
  250. ctx->file_priv = file_priv;
  251. if (file_priv) {
  252. ctx->pid = get_task_pid(current, PIDTYPE_PID);
  253. ctx->name = kasprintf(GFP_KERNEL, "%s[%d]/%x",
  254. current->comm,
  255. pid_nr(ctx->pid),
  256. ctx->user_handle);
  257. if (!ctx->name) {
  258. ret = -ENOMEM;
  259. goto err_pid;
  260. }
  261. }
  262. /* NB: Mark all slices as needing a remap so that when the context first
  263. * loads it will restore whatever remap state already exists. If there
  264. * is no remap info, it will be a NOP. */
  265. ctx->remap_slice = ALL_L3_SLICES(dev_priv);
  266. i915_gem_context_set_bannable(ctx);
  267. ctx->ring_size = 4 * PAGE_SIZE;
  268. ctx->desc_template =
  269. default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt);
  270. /* GuC requires the ring to be placed above GUC_WOPCM_TOP. If GuC is not
  271. * present or not in use we still need a small bias as ring wraparound
  272. * at offset 0 sometimes hangs. No idea why.
  273. */
  274. if (USES_GUC(dev_priv))
  275. ctx->ggtt_offset_bias = GUC_WOPCM_TOP;
  276. else
  277. ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE;
  278. return ctx;
  279. err_pid:
  280. put_pid(ctx->pid);
  281. idr_remove(&file_priv->context_idr, ctx->user_handle);
  282. err_lut:
  283. context_close(ctx);
  284. return ERR_PTR(ret);
  285. }
  286. static void __destroy_hw_context(struct i915_gem_context *ctx,
  287. struct drm_i915_file_private *file_priv)
  288. {
  289. idr_remove(&file_priv->context_idr, ctx->user_handle);
  290. context_close(ctx);
  291. }
  292. static struct i915_gem_context *
  293. i915_gem_create_context(struct drm_i915_private *dev_priv,
  294. struct drm_i915_file_private *file_priv)
  295. {
  296. struct i915_gem_context *ctx;
  297. lockdep_assert_held(&dev_priv->drm.struct_mutex);
  298. /* Reap the most stale context */
  299. contexts_free_first(dev_priv);
  300. ctx = __create_hw_context(dev_priv, file_priv);
  301. if (IS_ERR(ctx))
  302. return ctx;
  303. if (USES_FULL_PPGTT(dev_priv)) {
  304. struct i915_hw_ppgtt *ppgtt;
  305. ppgtt = i915_ppgtt_create(dev_priv, file_priv, ctx->name);
  306. if (IS_ERR(ppgtt)) {
  307. DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n",
  308. PTR_ERR(ppgtt));
  309. __destroy_hw_context(ctx, file_priv);
  310. return ERR_CAST(ppgtt);
  311. }
  312. ctx->ppgtt = ppgtt;
  313. ctx->desc_template = default_desc_template(dev_priv, ppgtt);
  314. }
  315. trace_i915_context_create(ctx);
  316. return ctx;
  317. }
  318. /**
  319. * i915_gem_context_create_gvt - create a GVT GEM context
  320. * @dev: drm device *
  321. *
  322. * This function is used to create a GVT specific GEM context.
  323. *
  324. * Returns:
  325. * pointer to i915_gem_context on success, error pointer if failed
  326. *
  327. */
  328. struct i915_gem_context *
  329. i915_gem_context_create_gvt(struct drm_device *dev)
  330. {
  331. struct i915_gem_context *ctx;
  332. int ret;
  333. if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
  334. return ERR_PTR(-ENODEV);
  335. ret = i915_mutex_lock_interruptible(dev);
  336. if (ret)
  337. return ERR_PTR(ret);
  338. ctx = __create_hw_context(to_i915(dev), NULL);
  339. if (IS_ERR(ctx))
  340. goto out;
  341. ctx->file_priv = ERR_PTR(-EBADF);
  342. i915_gem_context_set_closed(ctx); /* not user accessible */
  343. i915_gem_context_clear_bannable(ctx);
  344. i915_gem_context_set_force_single_submission(ctx);
  345. if (!USES_GUC_SUBMISSION(to_i915(dev)))
  346. ctx->ring_size = 512 * PAGE_SIZE; /* Max ring buffer size */
  347. GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
  348. out:
  349. mutex_unlock(&dev->struct_mutex);
  350. return ctx;
  351. }
  352. struct i915_gem_context *
  353. i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
  354. {
  355. struct i915_gem_context *ctx;
  356. ctx = i915_gem_create_context(i915, NULL);
  357. if (IS_ERR(ctx))
  358. return ctx;
  359. i915_gem_context_clear_bannable(ctx);
  360. ctx->priority = prio;
  361. ctx->ring_size = PAGE_SIZE;
  362. GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
  363. return ctx;
  364. }
  365. static void
  366. destroy_kernel_context(struct i915_gem_context **ctxp)
  367. {
  368. struct i915_gem_context *ctx;
  369. /* Keep the context ref so that we can free it immediately ourselves */
  370. ctx = i915_gem_context_get(fetch_and_zero(ctxp));
  371. GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
  372. context_close(ctx);
  373. i915_gem_context_free(ctx);
  374. }
  375. static bool needs_preempt_context(struct drm_i915_private *i915)
  376. {
  377. return HAS_LOGICAL_RING_PREEMPTION(i915);
  378. }
  379. int i915_gem_contexts_init(struct drm_i915_private *dev_priv)
  380. {
  381. struct i915_gem_context *ctx;
  382. /* Reassure ourselves we are only called once */
  383. GEM_BUG_ON(dev_priv->kernel_context);
  384. GEM_BUG_ON(dev_priv->preempt_context);
  385. INIT_LIST_HEAD(&dev_priv->contexts.list);
  386. INIT_WORK(&dev_priv->contexts.free_work, contexts_free_worker);
  387. init_llist_head(&dev_priv->contexts.free_list);
  388. /* Using the simple ida interface, the max is limited by sizeof(int) */
  389. BUILD_BUG_ON(MAX_CONTEXT_HW_ID > INT_MAX);
  390. BUILD_BUG_ON(GEN11_MAX_CONTEXT_HW_ID > INT_MAX);
  391. ida_init(&dev_priv->contexts.hw_ida);
  392. /* lowest priority; idle task */
  393. ctx = i915_gem_context_create_kernel(dev_priv, I915_PRIORITY_MIN);
  394. if (IS_ERR(ctx)) {
  395. DRM_ERROR("Failed to create default global context\n");
  396. return PTR_ERR(ctx);
  397. }
  398. /*
  399. * For easy recognisablity, we want the kernel context to be 0 and then
  400. * all user contexts will have non-zero hw_id.
  401. */
  402. GEM_BUG_ON(ctx->hw_id);
  403. dev_priv->kernel_context = ctx;
  404. /* highest priority; preempting task */
  405. if (needs_preempt_context(dev_priv)) {
  406. ctx = i915_gem_context_create_kernel(dev_priv, INT_MAX);
  407. if (!IS_ERR(ctx))
  408. dev_priv->preempt_context = ctx;
  409. else
  410. DRM_ERROR("Failed to create preempt context; disabling preemption\n");
  411. }
  412. DRM_DEBUG_DRIVER("%s context support initialized\n",
  413. dev_priv->engine[RCS]->context_size ? "logical" :
  414. "fake");
  415. return 0;
  416. }
  417. void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
  418. {
  419. struct intel_engine_cs *engine;
  420. enum intel_engine_id id;
  421. lockdep_assert_held(&dev_priv->drm.struct_mutex);
  422. for_each_engine(engine, dev_priv, id) {
  423. engine->legacy_active_context = NULL;
  424. engine->legacy_active_ppgtt = NULL;
  425. if (!engine->last_retired_context)
  426. continue;
  427. engine->context_unpin(engine, engine->last_retired_context);
  428. engine->last_retired_context = NULL;
  429. }
  430. }
  431. void i915_gem_contexts_fini(struct drm_i915_private *i915)
  432. {
  433. lockdep_assert_held(&i915->drm.struct_mutex);
  434. if (i915->preempt_context)
  435. destroy_kernel_context(&i915->preempt_context);
  436. destroy_kernel_context(&i915->kernel_context);
  437. /* Must free all deferred contexts (via flush_workqueue) first */
  438. ida_destroy(&i915->contexts.hw_ida);
  439. }
  440. static int context_idr_cleanup(int id, void *p, void *data)
  441. {
  442. struct i915_gem_context *ctx = p;
  443. context_close(ctx);
  444. return 0;
  445. }
  446. int i915_gem_context_open(struct drm_i915_private *i915,
  447. struct drm_file *file)
  448. {
  449. struct drm_i915_file_private *file_priv = file->driver_priv;
  450. struct i915_gem_context *ctx;
  451. idr_init(&file_priv->context_idr);
  452. mutex_lock(&i915->drm.struct_mutex);
  453. ctx = i915_gem_create_context(i915, file_priv);
  454. mutex_unlock(&i915->drm.struct_mutex);
  455. if (IS_ERR(ctx)) {
  456. idr_destroy(&file_priv->context_idr);
  457. return PTR_ERR(ctx);
  458. }
  459. GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
  460. return 0;
  461. }
  462. void i915_gem_context_close(struct drm_file *file)
  463. {
  464. struct drm_i915_file_private *file_priv = file->driver_priv;
  465. lockdep_assert_held(&file_priv->dev_priv->drm.struct_mutex);
  466. idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
  467. idr_destroy(&file_priv->context_idr);
  468. }
  469. static bool engine_has_idle_kernel_context(struct intel_engine_cs *engine)
  470. {
  471. struct i915_gem_timeline *timeline;
  472. list_for_each_entry(timeline, &engine->i915->gt.timelines, link) {
  473. struct intel_timeline *tl;
  474. if (timeline == &engine->i915->gt.global_timeline)
  475. continue;
  476. tl = &timeline->engine[engine->id];
  477. if (i915_gem_active_peek(&tl->last_request,
  478. &engine->i915->drm.struct_mutex))
  479. return false;
  480. }
  481. return intel_engine_has_kernel_context(engine);
  482. }
  483. int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv)
  484. {
  485. struct intel_engine_cs *engine;
  486. struct i915_gem_timeline *timeline;
  487. enum intel_engine_id id;
  488. lockdep_assert_held(&dev_priv->drm.struct_mutex);
  489. i915_retire_requests(dev_priv);
  490. for_each_engine(engine, dev_priv, id) {
  491. struct i915_request *rq;
  492. if (engine_has_idle_kernel_context(engine))
  493. continue;
  494. rq = i915_request_alloc(engine, dev_priv->kernel_context);
  495. if (IS_ERR(rq))
  496. return PTR_ERR(rq);
  497. /* Queue this switch after all other activity */
  498. list_for_each_entry(timeline, &dev_priv->gt.timelines, link) {
  499. struct i915_request *prev;
  500. struct intel_timeline *tl;
  501. tl = &timeline->engine[engine->id];
  502. prev = i915_gem_active_raw(&tl->last_request,
  503. &dev_priv->drm.struct_mutex);
  504. if (prev)
  505. i915_sw_fence_await_sw_fence_gfp(&rq->submit,
  506. &prev->submit,
  507. I915_FENCE_GFP);
  508. }
  509. /*
  510. * Force a flush after the switch to ensure that all rendering
  511. * and operations prior to switching to the kernel context hits
  512. * memory. This should be guaranteed by the previous request,
  513. * but an extra layer of paranoia before we declare the system
  514. * idle (on suspend etc) is advisable!
  515. */
  516. __i915_request_add(rq, true);
  517. }
  518. return 0;
  519. }
  520. static bool client_is_banned(struct drm_i915_file_private *file_priv)
  521. {
  522. return atomic_read(&file_priv->context_bans) > I915_MAX_CLIENT_CONTEXT_BANS;
  523. }
  524. int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
  525. struct drm_file *file)
  526. {
  527. struct drm_i915_private *dev_priv = to_i915(dev);
  528. struct drm_i915_gem_context_create *args = data;
  529. struct drm_i915_file_private *file_priv = file->driver_priv;
  530. struct i915_gem_context *ctx;
  531. int ret;
  532. if (!dev_priv->engine[RCS]->context_size)
  533. return -ENODEV;
  534. if (args->pad != 0)
  535. return -EINVAL;
  536. if (client_is_banned(file_priv)) {
  537. DRM_DEBUG("client %s[%d] banned from creating ctx\n",
  538. current->comm,
  539. pid_nr(get_task_pid(current, PIDTYPE_PID)));
  540. return -EIO;
  541. }
  542. ret = i915_mutex_lock_interruptible(dev);
  543. if (ret)
  544. return ret;
  545. ctx = i915_gem_create_context(dev_priv, file_priv);
  546. mutex_unlock(&dev->struct_mutex);
  547. if (IS_ERR(ctx))
  548. return PTR_ERR(ctx);
  549. GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
  550. args->ctx_id = ctx->user_handle;
  551. DRM_DEBUG("HW context %d created\n", args->ctx_id);
  552. return 0;
  553. }
  554. int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
  555. struct drm_file *file)
  556. {
  557. struct drm_i915_gem_context_destroy *args = data;
  558. struct drm_i915_file_private *file_priv = file->driver_priv;
  559. struct i915_gem_context *ctx;
  560. int ret;
  561. if (args->pad != 0)
  562. return -EINVAL;
  563. if (args->ctx_id == DEFAULT_CONTEXT_HANDLE)
  564. return -ENOENT;
  565. ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
  566. if (!ctx)
  567. return -ENOENT;
  568. ret = mutex_lock_interruptible(&dev->struct_mutex);
  569. if (ret)
  570. goto out;
  571. __destroy_hw_context(ctx, file_priv);
  572. mutex_unlock(&dev->struct_mutex);
  573. out:
  574. i915_gem_context_put(ctx);
  575. return 0;
  576. }
  577. int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
  578. struct drm_file *file)
  579. {
  580. struct drm_i915_file_private *file_priv = file->driver_priv;
  581. struct drm_i915_gem_context_param *args = data;
  582. struct i915_gem_context *ctx;
  583. int ret = 0;
  584. ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
  585. if (!ctx)
  586. return -ENOENT;
  587. args->size = 0;
  588. switch (args->param) {
  589. case I915_CONTEXT_PARAM_BAN_PERIOD:
  590. ret = -EINVAL;
  591. break;
  592. case I915_CONTEXT_PARAM_NO_ZEROMAP:
  593. args->value = ctx->flags & CONTEXT_NO_ZEROMAP;
  594. break;
  595. case I915_CONTEXT_PARAM_GTT_SIZE:
  596. if (ctx->ppgtt)
  597. args->value = ctx->ppgtt->base.total;
  598. else if (to_i915(dev)->mm.aliasing_ppgtt)
  599. args->value = to_i915(dev)->mm.aliasing_ppgtt->base.total;
  600. else
  601. args->value = to_i915(dev)->ggtt.base.total;
  602. break;
  603. case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
  604. args->value = i915_gem_context_no_error_capture(ctx);
  605. break;
  606. case I915_CONTEXT_PARAM_BANNABLE:
  607. args->value = i915_gem_context_is_bannable(ctx);
  608. break;
  609. case I915_CONTEXT_PARAM_PRIORITY:
  610. args->value = ctx->priority;
  611. break;
  612. default:
  613. ret = -EINVAL;
  614. break;
  615. }
  616. i915_gem_context_put(ctx);
  617. return ret;
  618. }
  619. int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
  620. struct drm_file *file)
  621. {
  622. struct drm_i915_file_private *file_priv = file->driver_priv;
  623. struct drm_i915_gem_context_param *args = data;
  624. struct i915_gem_context *ctx;
  625. int ret;
  626. ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
  627. if (!ctx)
  628. return -ENOENT;
  629. ret = i915_mutex_lock_interruptible(dev);
  630. if (ret)
  631. goto out;
  632. switch (args->param) {
  633. case I915_CONTEXT_PARAM_BAN_PERIOD:
  634. ret = -EINVAL;
  635. break;
  636. case I915_CONTEXT_PARAM_NO_ZEROMAP:
  637. if (args->size) {
  638. ret = -EINVAL;
  639. } else {
  640. ctx->flags &= ~CONTEXT_NO_ZEROMAP;
  641. ctx->flags |= args->value ? CONTEXT_NO_ZEROMAP : 0;
  642. }
  643. break;
  644. case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
  645. if (args->size)
  646. ret = -EINVAL;
  647. else if (args->value)
  648. i915_gem_context_set_no_error_capture(ctx);
  649. else
  650. i915_gem_context_clear_no_error_capture(ctx);
  651. break;
  652. case I915_CONTEXT_PARAM_BANNABLE:
  653. if (args->size)
  654. ret = -EINVAL;
  655. else if (!capable(CAP_SYS_ADMIN) && !args->value)
  656. ret = -EPERM;
  657. else if (args->value)
  658. i915_gem_context_set_bannable(ctx);
  659. else
  660. i915_gem_context_clear_bannable(ctx);
  661. break;
  662. case I915_CONTEXT_PARAM_PRIORITY:
  663. {
  664. s64 priority = args->value;
  665. if (args->size)
  666. ret = -EINVAL;
  667. else if (!(to_i915(dev)->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
  668. ret = -ENODEV;
  669. else if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
  670. priority < I915_CONTEXT_MIN_USER_PRIORITY)
  671. ret = -EINVAL;
  672. else if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
  673. !capable(CAP_SYS_NICE))
  674. ret = -EPERM;
  675. else
  676. ctx->priority = priority;
  677. }
  678. break;
  679. default:
  680. ret = -EINVAL;
  681. break;
  682. }
  683. mutex_unlock(&dev->struct_mutex);
  684. out:
  685. i915_gem_context_put(ctx);
  686. return ret;
  687. }
  688. int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
  689. void *data, struct drm_file *file)
  690. {
  691. struct drm_i915_private *dev_priv = to_i915(dev);
  692. struct drm_i915_reset_stats *args = data;
  693. struct i915_gem_context *ctx;
  694. int ret;
  695. if (args->flags || args->pad)
  696. return -EINVAL;
  697. ret = -ENOENT;
  698. rcu_read_lock();
  699. ctx = __i915_gem_context_lookup_rcu(file->driver_priv, args->ctx_id);
  700. if (!ctx)
  701. goto out;
  702. /*
  703. * We opt for unserialised reads here. This may result in tearing
  704. * in the extremely unlikely event of a GPU hang on this context
  705. * as we are querying them. If we need that extra layer of protection,
  706. * we should wrap the hangstats with a seqlock.
  707. */
  708. if (capable(CAP_SYS_ADMIN))
  709. args->reset_count = i915_reset_count(&dev_priv->gpu_error);
  710. else
  711. args->reset_count = 0;
  712. args->batch_active = atomic_read(&ctx->guilty_count);
  713. args->batch_pending = atomic_read(&ctx->active_count);
  714. ret = 0;
  715. out:
  716. rcu_read_unlock();
  717. return ret;
  718. }
  719. #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
  720. #include "selftests/mock_context.c"
  721. #include "selftests/i915_gem_context.c"
  722. #endif