smumgr.h 3.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118
  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #ifndef _SMUMGR_H_
  24. #define _SMUMGR_H_
  25. #include <linux/types.h>
  26. #include "amd_powerplay.h"
  27. #include "hwmgr.h"
  28. enum SMU_TABLE {
  29. SMU_UVD_TABLE = 0,
  30. SMU_VCE_TABLE,
  31. SMU_SAMU_TABLE,
  32. SMU_BIF_TABLE,
  33. };
  34. enum SMU_TYPE {
  35. SMU_SoftRegisters = 0,
  36. SMU_Discrete_DpmTable,
  37. };
  38. enum SMU_MEMBER {
  39. HandshakeDisables = 0,
  40. VoltageChangeTimeout,
  41. AverageGraphicsActivity,
  42. PreVBlankGap,
  43. VBlankTimeout,
  44. UcodeLoadStatus,
  45. UvdBootLevel,
  46. VceBootLevel,
  47. SamuBootLevel,
  48. LowSclkInterruptThreshold,
  49. DRAM_LOG_ADDR_H,
  50. DRAM_LOG_ADDR_L,
  51. DRAM_LOG_PHY_ADDR_H,
  52. DRAM_LOG_PHY_ADDR_L,
  53. DRAM_LOG_BUFF_SIZE,
  54. };
  55. enum SMU_MAC_DEFINITION {
  56. SMU_MAX_LEVELS_GRAPHICS = 0,
  57. SMU_MAX_LEVELS_MEMORY,
  58. SMU_MAX_LEVELS_LINK,
  59. SMU_MAX_ENTRIES_SMIO,
  60. SMU_MAX_LEVELS_VDDC,
  61. SMU_MAX_LEVELS_VDDGFX,
  62. SMU_MAX_LEVELS_VDDCI,
  63. SMU_MAX_LEVELS_MVDD,
  64. SMU_UVD_MCLK_HANDSHAKE_DISABLE,
  65. };
  66. enum SMU9_TABLE_ID {
  67. PPTABLE = 0,
  68. WMTABLE,
  69. AVFSTABLE,
  70. TOOLSTABLE,
  71. AVFSFUSETABLE
  72. };
  73. enum SMU10_TABLE_ID {
  74. SMU10_WMTABLE = 0,
  75. SMU10_CLOCKTABLE,
  76. };
  77. extern int smum_get_argument(struct pp_hwmgr *hwmgr);
  78. extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table);
  79. extern int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr);
  80. extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
  81. extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
  82. uint16_t msg, uint32_t parameter);
  83. extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);
  84. extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);
  85. extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr);
  86. extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr);
  87. extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);
  88. extern int smum_init_smc_table(struct pp_hwmgr *hwmgr);
  89. extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);
  90. extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr);
  91. extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);
  92. extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr,
  93. uint32_t type, uint32_t member);
  94. extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value);
  95. extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr);
  96. extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
  97. extern int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting);
  98. extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw);
  99. #endif