kfd_packet_manager.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653
  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/mutex.h>
  25. #include "kfd_device_queue_manager.h"
  26. #include "kfd_kernel_queue.h"
  27. #include "kfd_priv.h"
  28. #include "kfd_pm4_headers_vi.h"
  29. #include "kfd_pm4_opcodes.h"
  30. static inline void inc_wptr(unsigned int *wptr, unsigned int increment_bytes,
  31. unsigned int buffer_size_bytes)
  32. {
  33. unsigned int temp = *wptr + increment_bytes / sizeof(uint32_t);
  34. WARN((temp * sizeof(uint32_t)) > buffer_size_bytes,
  35. "Runlist IB overflow");
  36. *wptr = temp;
  37. }
  38. static unsigned int build_pm4_header(unsigned int opcode, size_t packet_size)
  39. {
  40. union PM4_MES_TYPE_3_HEADER header;
  41. header.u32All = 0;
  42. header.opcode = opcode;
  43. header.count = packet_size / 4 - 2;
  44. header.type = PM4_TYPE_3;
  45. return header.u32All;
  46. }
  47. static void pm_calc_rlib_size(struct packet_manager *pm,
  48. unsigned int *rlib_size,
  49. bool *over_subscription)
  50. {
  51. unsigned int process_count, queue_count, compute_queue_count;
  52. unsigned int map_queue_size;
  53. unsigned int max_proc_per_quantum = 1;
  54. struct kfd_dev *dev = pm->dqm->dev;
  55. process_count = pm->dqm->processes_count;
  56. queue_count = pm->dqm->queue_count;
  57. compute_queue_count = queue_count - pm->dqm->sdma_queue_count;
  58. /* check if there is over subscription
  59. * Note: the arbitration between the number of VMIDs and
  60. * hws_max_conc_proc has been done in
  61. * kgd2kfd_device_init().
  62. */
  63. *over_subscription = false;
  64. if (dev->max_proc_per_quantum > 1)
  65. max_proc_per_quantum = dev->max_proc_per_quantum;
  66. if ((process_count > max_proc_per_quantum) ||
  67. compute_queue_count > get_queues_num(pm->dqm)) {
  68. *over_subscription = true;
  69. pr_debug("Over subscribed runlist\n");
  70. }
  71. map_queue_size = sizeof(struct pm4_mes_map_queues);
  72. /* calculate run list ib allocation size */
  73. *rlib_size = process_count * sizeof(struct pm4_mes_map_process) +
  74. queue_count * map_queue_size;
  75. /*
  76. * Increase the allocation size in case we need a chained run list
  77. * when over subscription
  78. */
  79. if (*over_subscription)
  80. *rlib_size += sizeof(struct pm4_mes_runlist);
  81. pr_debug("runlist ib size %d\n", *rlib_size);
  82. }
  83. static int pm_allocate_runlist_ib(struct packet_manager *pm,
  84. unsigned int **rl_buffer,
  85. uint64_t *rl_gpu_buffer,
  86. unsigned int *rl_buffer_size,
  87. bool *is_over_subscription)
  88. {
  89. int retval;
  90. if (WARN_ON(pm->allocated))
  91. return -EINVAL;
  92. pm_calc_rlib_size(pm, rl_buffer_size, is_over_subscription);
  93. retval = kfd_gtt_sa_allocate(pm->dqm->dev, *rl_buffer_size,
  94. &pm->ib_buffer_obj);
  95. if (retval) {
  96. pr_err("Failed to allocate runlist IB\n");
  97. return retval;
  98. }
  99. *(void **)rl_buffer = pm->ib_buffer_obj->cpu_ptr;
  100. *rl_gpu_buffer = pm->ib_buffer_obj->gpu_addr;
  101. memset(*rl_buffer, 0, *rl_buffer_size);
  102. pm->allocated = true;
  103. return retval;
  104. }
  105. static int pm_create_runlist(struct packet_manager *pm, uint32_t *buffer,
  106. uint64_t ib, size_t ib_size_in_dwords, bool chain)
  107. {
  108. struct pm4_mes_runlist *packet;
  109. int concurrent_proc_cnt = 0;
  110. struct kfd_dev *kfd = pm->dqm->dev;
  111. if (WARN_ON(!ib))
  112. return -EFAULT;
  113. /* Determine the number of processes to map together to HW:
  114. * it can not exceed the number of VMIDs available to the
  115. * scheduler, and it is determined by the smaller of the number
  116. * of processes in the runlist and kfd module parameter
  117. * hws_max_conc_proc.
  118. * Note: the arbitration between the number of VMIDs and
  119. * hws_max_conc_proc has been done in
  120. * kgd2kfd_device_init().
  121. */
  122. concurrent_proc_cnt = min(pm->dqm->processes_count,
  123. kfd->max_proc_per_quantum);
  124. packet = (struct pm4_mes_runlist *)buffer;
  125. memset(buffer, 0, sizeof(struct pm4_mes_runlist));
  126. packet->header.u32All = build_pm4_header(IT_RUN_LIST,
  127. sizeof(struct pm4_mes_runlist));
  128. packet->bitfields4.ib_size = ib_size_in_dwords;
  129. packet->bitfields4.chain = chain ? 1 : 0;
  130. packet->bitfields4.offload_polling = 0;
  131. packet->bitfields4.valid = 1;
  132. packet->bitfields4.process_cnt = concurrent_proc_cnt;
  133. packet->ordinal2 = lower_32_bits(ib);
  134. packet->bitfields3.ib_base_hi = upper_32_bits(ib);
  135. return 0;
  136. }
  137. static int pm_create_map_process(struct packet_manager *pm, uint32_t *buffer,
  138. struct qcm_process_device *qpd)
  139. {
  140. struct pm4_mes_map_process *packet;
  141. packet = (struct pm4_mes_map_process *)buffer;
  142. memset(buffer, 0, sizeof(struct pm4_mes_map_process));
  143. packet->header.u32All = build_pm4_header(IT_MAP_PROCESS,
  144. sizeof(struct pm4_mes_map_process));
  145. packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0;
  146. packet->bitfields2.process_quantum = 1;
  147. packet->bitfields2.pasid = qpd->pqm->process->pasid;
  148. packet->bitfields3.page_table_base = qpd->page_table_base;
  149. packet->bitfields10.gds_size = qpd->gds_size;
  150. packet->bitfields10.num_gws = qpd->num_gws;
  151. packet->bitfields10.num_oac = qpd->num_oac;
  152. packet->bitfields10.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count;
  153. packet->sh_mem_config = qpd->sh_mem_config;
  154. packet->sh_mem_bases = qpd->sh_mem_bases;
  155. packet->sh_mem_ape1_base = qpd->sh_mem_ape1_base;
  156. packet->sh_mem_ape1_limit = qpd->sh_mem_ape1_limit;
  157. packet->sh_hidden_private_base_vmid = qpd->sh_hidden_private_base;
  158. packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area);
  159. packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area);
  160. return 0;
  161. }
  162. static int pm_create_map_queue(struct packet_manager *pm, uint32_t *buffer,
  163. struct queue *q, bool is_static)
  164. {
  165. struct pm4_mes_map_queues *packet;
  166. bool use_static = is_static;
  167. packet = (struct pm4_mes_map_queues *)buffer;
  168. memset(buffer, 0, sizeof(struct pm4_mes_map_queues));
  169. packet->header.u32All = build_pm4_header(IT_MAP_QUEUES,
  170. sizeof(struct pm4_mes_map_queues));
  171. packet->bitfields2.alloc_format =
  172. alloc_format__mes_map_queues__one_per_pipe_vi;
  173. packet->bitfields2.num_queues = 1;
  174. packet->bitfields2.queue_sel =
  175. queue_sel__mes_map_queues__map_to_hws_determined_queue_slots_vi;
  176. packet->bitfields2.engine_sel =
  177. engine_sel__mes_map_queues__compute_vi;
  178. packet->bitfields2.queue_type =
  179. queue_type__mes_map_queues__normal_compute_vi;
  180. switch (q->properties.type) {
  181. case KFD_QUEUE_TYPE_COMPUTE:
  182. if (use_static)
  183. packet->bitfields2.queue_type =
  184. queue_type__mes_map_queues__normal_latency_static_queue_vi;
  185. break;
  186. case KFD_QUEUE_TYPE_DIQ:
  187. packet->bitfields2.queue_type =
  188. queue_type__mes_map_queues__debug_interface_queue_vi;
  189. break;
  190. case KFD_QUEUE_TYPE_SDMA:
  191. packet->bitfields2.engine_sel = q->properties.sdma_engine_id +
  192. engine_sel__mes_map_queues__sdma0_vi;
  193. use_static = false; /* no static queues under SDMA */
  194. break;
  195. default:
  196. WARN(1, "queue type %d", q->properties.type);
  197. return -EINVAL;
  198. }
  199. packet->bitfields3.doorbell_offset =
  200. q->properties.doorbell_off;
  201. packet->mqd_addr_lo =
  202. lower_32_bits(q->gart_mqd_addr);
  203. packet->mqd_addr_hi =
  204. upper_32_bits(q->gart_mqd_addr);
  205. packet->wptr_addr_lo =
  206. lower_32_bits((uint64_t)q->properties.write_ptr);
  207. packet->wptr_addr_hi =
  208. upper_32_bits((uint64_t)q->properties.write_ptr);
  209. return 0;
  210. }
  211. static int pm_create_runlist_ib(struct packet_manager *pm,
  212. struct list_head *queues,
  213. uint64_t *rl_gpu_addr,
  214. size_t *rl_size_bytes)
  215. {
  216. unsigned int alloc_size_bytes;
  217. unsigned int *rl_buffer, rl_wptr, i;
  218. int retval, proccesses_mapped;
  219. struct device_process_node *cur;
  220. struct qcm_process_device *qpd;
  221. struct queue *q;
  222. struct kernel_queue *kq;
  223. bool is_over_subscription;
  224. rl_wptr = retval = proccesses_mapped = 0;
  225. retval = pm_allocate_runlist_ib(pm, &rl_buffer, rl_gpu_addr,
  226. &alloc_size_bytes, &is_over_subscription);
  227. if (retval)
  228. return retval;
  229. *rl_size_bytes = alloc_size_bytes;
  230. pm->ib_size_bytes = alloc_size_bytes;
  231. pr_debug("Building runlist ib process count: %d queues count %d\n",
  232. pm->dqm->processes_count, pm->dqm->queue_count);
  233. /* build the run list ib packet */
  234. list_for_each_entry(cur, queues, list) {
  235. qpd = cur->qpd;
  236. /* build map process packet */
  237. if (proccesses_mapped >= pm->dqm->processes_count) {
  238. pr_debug("Not enough space left in runlist IB\n");
  239. pm_release_ib(pm);
  240. return -ENOMEM;
  241. }
  242. retval = pm_create_map_process(pm, &rl_buffer[rl_wptr], qpd);
  243. if (retval)
  244. return retval;
  245. proccesses_mapped++;
  246. inc_wptr(&rl_wptr, sizeof(struct pm4_mes_map_process),
  247. alloc_size_bytes);
  248. list_for_each_entry(kq, &qpd->priv_queue_list, list) {
  249. if (!kq->queue->properties.is_active)
  250. continue;
  251. pr_debug("static_queue, mapping kernel q %d, is debug status %d\n",
  252. kq->queue->queue, qpd->is_debug);
  253. retval = pm_create_map_queue(pm,
  254. &rl_buffer[rl_wptr],
  255. kq->queue,
  256. qpd->is_debug);
  257. if (retval)
  258. return retval;
  259. inc_wptr(&rl_wptr,
  260. sizeof(struct pm4_mes_map_queues),
  261. alloc_size_bytes);
  262. }
  263. list_for_each_entry(q, &qpd->queues_list, list) {
  264. if (!q->properties.is_active)
  265. continue;
  266. pr_debug("static_queue, mapping user queue %d, is debug status %d\n",
  267. q->queue, qpd->is_debug);
  268. retval = pm_create_map_queue(pm,
  269. &rl_buffer[rl_wptr],
  270. q,
  271. qpd->is_debug);
  272. if (retval)
  273. return retval;
  274. inc_wptr(&rl_wptr,
  275. sizeof(struct pm4_mes_map_queues),
  276. alloc_size_bytes);
  277. }
  278. }
  279. pr_debug("Finished map process and queues to runlist\n");
  280. if (is_over_subscription)
  281. retval = pm_create_runlist(pm, &rl_buffer[rl_wptr],
  282. *rl_gpu_addr,
  283. alloc_size_bytes / sizeof(uint32_t),
  284. true);
  285. for (i = 0; i < alloc_size_bytes / sizeof(uint32_t); i++)
  286. pr_debug("0x%2X ", rl_buffer[i]);
  287. pr_debug("\n");
  288. return retval;
  289. }
  290. /* pm_create_release_mem - Create a RELEASE_MEM packet and return the size
  291. * of this packet
  292. * @gpu_addr - GPU address of the packet. It's a virtual address.
  293. * @buffer - buffer to fill up with the packet. It's a CPU kernel pointer
  294. * Return - length of the packet
  295. */
  296. uint32_t pm_create_release_mem(uint64_t gpu_addr, uint32_t *buffer)
  297. {
  298. struct pm4_mec_release_mem *packet;
  299. WARN_ON(!buffer);
  300. packet = (struct pm4_mec_release_mem *)buffer;
  301. memset(buffer, 0, sizeof(*packet));
  302. packet->header.u32All = build_pm4_header(IT_RELEASE_MEM,
  303. sizeof(*packet));
  304. packet->bitfields2.event_type = CACHE_FLUSH_AND_INV_TS_EVENT;
  305. packet->bitfields2.event_index = event_index___release_mem__end_of_pipe;
  306. packet->bitfields2.tcl1_action_ena = 1;
  307. packet->bitfields2.tc_action_ena = 1;
  308. packet->bitfields2.cache_policy = cache_policy___release_mem__lru;
  309. packet->bitfields2.atc = 0;
  310. packet->bitfields3.data_sel = data_sel___release_mem__send_32_bit_low;
  311. packet->bitfields3.int_sel =
  312. int_sel___release_mem__send_interrupt_after_write_confirm;
  313. packet->bitfields4.address_lo_32b = (gpu_addr & 0xffffffff) >> 2;
  314. packet->address_hi = upper_32_bits(gpu_addr);
  315. packet->data_lo = 0;
  316. return sizeof(*packet) / sizeof(unsigned int);
  317. }
  318. int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
  319. {
  320. pm->dqm = dqm;
  321. mutex_init(&pm->lock);
  322. pm->priv_queue = kernel_queue_init(dqm->dev, KFD_QUEUE_TYPE_HIQ);
  323. if (!pm->priv_queue) {
  324. mutex_destroy(&pm->lock);
  325. return -ENOMEM;
  326. }
  327. pm->allocated = false;
  328. return 0;
  329. }
  330. void pm_uninit(struct packet_manager *pm)
  331. {
  332. mutex_destroy(&pm->lock);
  333. kernel_queue_uninit(pm->priv_queue);
  334. }
  335. int pm_send_set_resources(struct packet_manager *pm,
  336. struct scheduling_resources *res)
  337. {
  338. struct pm4_mes_set_resources *packet;
  339. int retval = 0;
  340. mutex_lock(&pm->lock);
  341. pm->priv_queue->ops.acquire_packet_buffer(pm->priv_queue,
  342. sizeof(*packet) / sizeof(uint32_t),
  343. (unsigned int **)&packet);
  344. if (!packet) {
  345. pr_err("Failed to allocate buffer on kernel queue\n");
  346. retval = -ENOMEM;
  347. goto out;
  348. }
  349. memset(packet, 0, sizeof(struct pm4_mes_set_resources));
  350. packet->header.u32All = build_pm4_header(IT_SET_RESOURCES,
  351. sizeof(struct pm4_mes_set_resources));
  352. packet->bitfields2.queue_type =
  353. queue_type__mes_set_resources__hsa_interface_queue_hiq;
  354. packet->bitfields2.vmid_mask = res->vmid_mask;
  355. packet->bitfields2.unmap_latency = KFD_UNMAP_LATENCY_MS / 100;
  356. packet->bitfields7.oac_mask = res->oac_mask;
  357. packet->bitfields8.gds_heap_base = res->gds_heap_base;
  358. packet->bitfields8.gds_heap_size = res->gds_heap_size;
  359. packet->gws_mask_lo = lower_32_bits(res->gws_mask);
  360. packet->gws_mask_hi = upper_32_bits(res->gws_mask);
  361. packet->queue_mask_lo = lower_32_bits(res->queue_mask);
  362. packet->queue_mask_hi = upper_32_bits(res->queue_mask);
  363. pm->priv_queue->ops.submit_packet(pm->priv_queue);
  364. out:
  365. mutex_unlock(&pm->lock);
  366. return retval;
  367. }
  368. int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues)
  369. {
  370. uint64_t rl_gpu_ib_addr;
  371. uint32_t *rl_buffer;
  372. size_t rl_ib_size, packet_size_dwords;
  373. int retval;
  374. retval = pm_create_runlist_ib(pm, dqm_queues, &rl_gpu_ib_addr,
  375. &rl_ib_size);
  376. if (retval)
  377. goto fail_create_runlist_ib;
  378. pr_debug("runlist IB address: 0x%llX\n", rl_gpu_ib_addr);
  379. packet_size_dwords = sizeof(struct pm4_mes_runlist) / sizeof(uint32_t);
  380. mutex_lock(&pm->lock);
  381. retval = pm->priv_queue->ops.acquire_packet_buffer(pm->priv_queue,
  382. packet_size_dwords, &rl_buffer);
  383. if (retval)
  384. goto fail_acquire_packet_buffer;
  385. retval = pm_create_runlist(pm, rl_buffer, rl_gpu_ib_addr,
  386. rl_ib_size / sizeof(uint32_t), false);
  387. if (retval)
  388. goto fail_create_runlist;
  389. pm->priv_queue->ops.submit_packet(pm->priv_queue);
  390. mutex_unlock(&pm->lock);
  391. return retval;
  392. fail_create_runlist:
  393. pm->priv_queue->ops.rollback_packet(pm->priv_queue);
  394. fail_acquire_packet_buffer:
  395. mutex_unlock(&pm->lock);
  396. fail_create_runlist_ib:
  397. pm_release_ib(pm);
  398. return retval;
  399. }
  400. int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
  401. uint32_t fence_value)
  402. {
  403. int retval;
  404. struct pm4_mes_query_status *packet;
  405. if (WARN_ON(!fence_address))
  406. return -EFAULT;
  407. mutex_lock(&pm->lock);
  408. retval = pm->priv_queue->ops.acquire_packet_buffer(
  409. pm->priv_queue,
  410. sizeof(struct pm4_mes_query_status) / sizeof(uint32_t),
  411. (unsigned int **)&packet);
  412. if (retval)
  413. goto fail_acquire_packet_buffer;
  414. packet->header.u32All = build_pm4_header(IT_QUERY_STATUS,
  415. sizeof(struct pm4_mes_query_status));
  416. packet->bitfields2.context_id = 0;
  417. packet->bitfields2.interrupt_sel =
  418. interrupt_sel__mes_query_status__completion_status;
  419. packet->bitfields2.command =
  420. command__mes_query_status__fence_only_after_write_ack;
  421. packet->addr_hi = upper_32_bits((uint64_t)fence_address);
  422. packet->addr_lo = lower_32_bits((uint64_t)fence_address);
  423. packet->data_hi = upper_32_bits((uint64_t)fence_value);
  424. packet->data_lo = lower_32_bits((uint64_t)fence_value);
  425. pm->priv_queue->ops.submit_packet(pm->priv_queue);
  426. fail_acquire_packet_buffer:
  427. mutex_unlock(&pm->lock);
  428. return retval;
  429. }
  430. int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type,
  431. enum kfd_unmap_queues_filter filter,
  432. uint32_t filter_param, bool reset,
  433. unsigned int sdma_engine)
  434. {
  435. int retval;
  436. uint32_t *buffer;
  437. struct pm4_mes_unmap_queues *packet;
  438. mutex_lock(&pm->lock);
  439. retval = pm->priv_queue->ops.acquire_packet_buffer(
  440. pm->priv_queue,
  441. sizeof(struct pm4_mes_unmap_queues) / sizeof(uint32_t),
  442. &buffer);
  443. if (retval)
  444. goto err_acquire_packet_buffer;
  445. packet = (struct pm4_mes_unmap_queues *)buffer;
  446. memset(buffer, 0, sizeof(struct pm4_mes_unmap_queues));
  447. pr_debug("static_queue: unmapping queues: filter is %d , reset is %d , type is %d\n",
  448. filter, reset, type);
  449. packet->header.u32All = build_pm4_header(IT_UNMAP_QUEUES,
  450. sizeof(struct pm4_mes_unmap_queues));
  451. switch (type) {
  452. case KFD_QUEUE_TYPE_COMPUTE:
  453. case KFD_QUEUE_TYPE_DIQ:
  454. packet->bitfields2.engine_sel =
  455. engine_sel__mes_unmap_queues__compute;
  456. break;
  457. case KFD_QUEUE_TYPE_SDMA:
  458. packet->bitfields2.engine_sel =
  459. engine_sel__mes_unmap_queues__sdma0 + sdma_engine;
  460. break;
  461. default:
  462. WARN(1, "queue type %d", type);
  463. retval = -EINVAL;
  464. goto err_invalid;
  465. }
  466. if (reset)
  467. packet->bitfields2.action =
  468. action__mes_unmap_queues__reset_queues;
  469. else
  470. packet->bitfields2.action =
  471. action__mes_unmap_queues__preempt_queues;
  472. switch (filter) {
  473. case KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE:
  474. packet->bitfields2.queue_sel =
  475. queue_sel__mes_unmap_queues__perform_request_on_specified_queues;
  476. packet->bitfields2.num_queues = 1;
  477. packet->bitfields3b.doorbell_offset0 = filter_param;
  478. break;
  479. case KFD_UNMAP_QUEUES_FILTER_BY_PASID:
  480. packet->bitfields2.queue_sel =
  481. queue_sel__mes_unmap_queues__perform_request_on_pasid_queues;
  482. packet->bitfields3a.pasid = filter_param;
  483. break;
  484. case KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES:
  485. packet->bitfields2.queue_sel =
  486. queue_sel__mes_unmap_queues__unmap_all_queues;
  487. break;
  488. case KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES:
  489. /* in this case, we do not preempt static queues */
  490. packet->bitfields2.queue_sel =
  491. queue_sel__mes_unmap_queues__unmap_all_non_static_queues;
  492. break;
  493. default:
  494. WARN(1, "filter %d", filter);
  495. retval = -EINVAL;
  496. goto err_invalid;
  497. }
  498. pm->priv_queue->ops.submit_packet(pm->priv_queue);
  499. mutex_unlock(&pm->lock);
  500. return 0;
  501. err_invalid:
  502. pm->priv_queue->ops.rollback_packet(pm->priv_queue);
  503. err_acquire_packet_buffer:
  504. mutex_unlock(&pm->lock);
  505. return retval;
  506. }
  507. void pm_release_ib(struct packet_manager *pm)
  508. {
  509. mutex_lock(&pm->lock);
  510. if (pm->allocated) {
  511. kfd_gtt_sa_free(pm->dqm->dev, pm->ib_buffer_obj);
  512. pm->allocated = false;
  513. }
  514. mutex_unlock(&pm->lock);
  515. }
  516. #if defined(CONFIG_DEBUG_FS)
  517. int pm_debugfs_runlist(struct seq_file *m, void *data)
  518. {
  519. struct packet_manager *pm = data;
  520. mutex_lock(&pm->lock);
  521. if (!pm->allocated) {
  522. seq_puts(m, " No active runlist\n");
  523. goto out;
  524. }
  525. seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4,
  526. pm->ib_buffer_obj->cpu_ptr, pm->ib_size_bytes, false);
  527. out:
  528. mutex_unlock(&pm->lock);
  529. return 0;
  530. }
  531. #endif