jr.c 15 KB

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  1. /*
  2. * CAAM/SEC 4.x transport/backend driver
  3. * JobR backend functionality
  4. *
  5. * Copyright 2008-2012 Freescale Semiconductor, Inc.
  6. */
  7. #include <linux/of_irq.h>
  8. #include <linux/of_address.h>
  9. #include "compat.h"
  10. #include "ctrl.h"
  11. #include "regs.h"
  12. #include "jr.h"
  13. #include "desc.h"
  14. #include "intern.h"
  15. struct jr_driver_data {
  16. /* List of Physical JobR's with the Driver */
  17. struct list_head jr_list;
  18. spinlock_t jr_alloc_lock; /* jr_list lock */
  19. } ____cacheline_aligned;
  20. static struct jr_driver_data driver_data;
  21. static int caam_reset_hw_jr(struct device *dev)
  22. {
  23. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  24. unsigned int timeout = 100000;
  25. /*
  26. * mask interrupts since we are going to poll
  27. * for reset completion status
  28. */
  29. clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
  30. /* initiate flush (required prior to reset) */
  31. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  32. while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==
  33. JRINT_ERR_HALT_INPROGRESS) && --timeout)
  34. cpu_relax();
  35. if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
  36. JRINT_ERR_HALT_COMPLETE || timeout == 0) {
  37. dev_err(dev, "failed to flush job ring %d\n", jrp->ridx);
  38. return -EIO;
  39. }
  40. /* initiate reset */
  41. timeout = 100000;
  42. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  43. while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
  44. cpu_relax();
  45. if (timeout == 0) {
  46. dev_err(dev, "failed to reset job ring %d\n", jrp->ridx);
  47. return -EIO;
  48. }
  49. /* unmask interrupts */
  50. clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
  51. return 0;
  52. }
  53. /*
  54. * Shutdown JobR independent of platform property code
  55. */
  56. static int caam_jr_shutdown(struct device *dev)
  57. {
  58. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  59. dma_addr_t inpbusaddr, outbusaddr;
  60. int ret;
  61. ret = caam_reset_hw_jr(dev);
  62. tasklet_kill(&jrp->irqtask);
  63. /* Release interrupt */
  64. free_irq(jrp->irq, dev);
  65. /* Free rings */
  66. inpbusaddr = rd_reg64(&jrp->rregs->inpring_base);
  67. outbusaddr = rd_reg64(&jrp->rregs->outring_base);
  68. dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  69. jrp->inpring, inpbusaddr);
  70. dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
  71. jrp->outring, outbusaddr);
  72. kfree(jrp->entinfo);
  73. return ret;
  74. }
  75. static int caam_jr_remove(struct platform_device *pdev)
  76. {
  77. int ret;
  78. struct device *jrdev;
  79. struct caam_drv_private_jr *jrpriv;
  80. jrdev = &pdev->dev;
  81. jrpriv = dev_get_drvdata(jrdev);
  82. /*
  83. * Return EBUSY if job ring already allocated.
  84. */
  85. if (atomic_read(&jrpriv->tfm_count)) {
  86. dev_err(jrdev, "Device is busy\n");
  87. return -EBUSY;
  88. }
  89. /* Remove the node from Physical JobR list maintained by driver */
  90. spin_lock(&driver_data.jr_alloc_lock);
  91. list_del(&jrpriv->list_node);
  92. spin_unlock(&driver_data.jr_alloc_lock);
  93. /* Release ring */
  94. ret = caam_jr_shutdown(jrdev);
  95. if (ret)
  96. dev_err(jrdev, "Failed to shut down job ring\n");
  97. irq_dispose_mapping(jrpriv->irq);
  98. return ret;
  99. }
  100. /* Main per-ring interrupt handler */
  101. static irqreturn_t caam_jr_interrupt(int irq, void *st_dev)
  102. {
  103. struct device *dev = st_dev;
  104. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  105. u32 irqstate;
  106. /*
  107. * Check the output ring for ready responses, kick
  108. * tasklet if jobs done.
  109. */
  110. irqstate = rd_reg32(&jrp->rregs->jrintstatus);
  111. if (!irqstate)
  112. return IRQ_NONE;
  113. /*
  114. * If JobR error, we got more development work to do
  115. * Flag a bug now, but we really need to shut down and
  116. * restart the queue (and fix code).
  117. */
  118. if (irqstate & JRINT_JR_ERROR) {
  119. dev_err(dev, "job ring error: irqstate: %08x\n", irqstate);
  120. BUG();
  121. }
  122. /* mask valid interrupts */
  123. clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
  124. /* Have valid interrupt at this point, just ACK and trigger */
  125. wr_reg32(&jrp->rregs->jrintstatus, irqstate);
  126. preempt_disable();
  127. tasklet_schedule(&jrp->irqtask);
  128. preempt_enable();
  129. return IRQ_HANDLED;
  130. }
  131. /* Deferred service handler, run as interrupt-fired tasklet */
  132. static void caam_jr_dequeue(unsigned long devarg)
  133. {
  134. int hw_idx, sw_idx, i, head, tail;
  135. struct device *dev = (struct device *)devarg;
  136. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  137. void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
  138. u32 *userdesc, userstatus;
  139. void *userarg;
  140. while (rd_reg32(&jrp->rregs->outring_used)) {
  141. head = READ_ONCE(jrp->head);
  142. spin_lock(&jrp->outlock);
  143. sw_idx = tail = jrp->tail;
  144. hw_idx = jrp->out_ring_read_index;
  145. for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) {
  146. sw_idx = (tail + i) & (JOBR_DEPTH - 1);
  147. if (jrp->outring[hw_idx].desc ==
  148. caam_dma_to_cpu(jrp->entinfo[sw_idx].desc_addr_dma))
  149. break; /* found */
  150. }
  151. /* we should never fail to find a matching descriptor */
  152. BUG_ON(CIRC_CNT(head, tail + i, JOBR_DEPTH) <= 0);
  153. /* Unmap just-run descriptor so we can post-process */
  154. dma_unmap_single(dev, jrp->outring[hw_idx].desc,
  155. jrp->entinfo[sw_idx].desc_size,
  156. DMA_TO_DEVICE);
  157. /* mark completed, avoid matching on a recycled desc addr */
  158. jrp->entinfo[sw_idx].desc_addr_dma = 0;
  159. /* Stash callback params for use outside of lock */
  160. usercall = jrp->entinfo[sw_idx].callbk;
  161. userarg = jrp->entinfo[sw_idx].cbkarg;
  162. userdesc = jrp->entinfo[sw_idx].desc_addr_virt;
  163. userstatus = caam32_to_cpu(jrp->outring[hw_idx].jrstatus);
  164. /*
  165. * Make sure all information from the job has been obtained
  166. * before telling CAAM that the job has been removed from the
  167. * output ring.
  168. */
  169. mb();
  170. /* set done */
  171. wr_reg32(&jrp->rregs->outring_rmvd, 1);
  172. jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
  173. (JOBR_DEPTH - 1);
  174. /*
  175. * if this job completed out-of-order, do not increment
  176. * the tail. Otherwise, increment tail by 1 plus the
  177. * number of subsequent jobs already completed out-of-order
  178. */
  179. if (sw_idx == tail) {
  180. do {
  181. tail = (tail + 1) & (JOBR_DEPTH - 1);
  182. } while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 &&
  183. jrp->entinfo[tail].desc_addr_dma == 0);
  184. jrp->tail = tail;
  185. }
  186. spin_unlock(&jrp->outlock);
  187. /* Finally, execute user's callback */
  188. usercall(dev, userdesc, userstatus, userarg);
  189. }
  190. /* reenable / unmask IRQs */
  191. clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
  192. }
  193. /**
  194. * caam_jr_alloc() - Alloc a job ring for someone to use as needed.
  195. *
  196. * returns : pointer to the newly allocated physical
  197. * JobR dev can be written to if successful.
  198. **/
  199. struct device *caam_jr_alloc(void)
  200. {
  201. struct caam_drv_private_jr *jrpriv, *min_jrpriv = NULL;
  202. struct device *dev = ERR_PTR(-ENODEV);
  203. int min_tfm_cnt = INT_MAX;
  204. int tfm_cnt;
  205. spin_lock(&driver_data.jr_alloc_lock);
  206. if (list_empty(&driver_data.jr_list)) {
  207. spin_unlock(&driver_data.jr_alloc_lock);
  208. return ERR_PTR(-ENODEV);
  209. }
  210. list_for_each_entry(jrpriv, &driver_data.jr_list, list_node) {
  211. tfm_cnt = atomic_read(&jrpriv->tfm_count);
  212. if (tfm_cnt < min_tfm_cnt) {
  213. min_tfm_cnt = tfm_cnt;
  214. min_jrpriv = jrpriv;
  215. }
  216. if (!min_tfm_cnt)
  217. break;
  218. }
  219. if (min_jrpriv) {
  220. atomic_inc(&min_jrpriv->tfm_count);
  221. dev = min_jrpriv->dev;
  222. }
  223. spin_unlock(&driver_data.jr_alloc_lock);
  224. return dev;
  225. }
  226. EXPORT_SYMBOL(caam_jr_alloc);
  227. /**
  228. * caam_jr_free() - Free the Job Ring
  229. * @rdev - points to the dev that identifies the Job ring to
  230. * be released.
  231. **/
  232. void caam_jr_free(struct device *rdev)
  233. {
  234. struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev);
  235. atomic_dec(&jrpriv->tfm_count);
  236. }
  237. EXPORT_SYMBOL(caam_jr_free);
  238. /**
  239. * caam_jr_enqueue() - Enqueue a job descriptor head. Returns 0 if OK,
  240. * -EBUSY if the queue is full, -EIO if it cannot map the caller's
  241. * descriptor.
  242. * @dev: device of the job ring to be used. This device should have
  243. * been assigned prior by caam_jr_register().
  244. * @desc: points to a job descriptor that execute our request. All
  245. * descriptors (and all referenced data) must be in a DMAable
  246. * region, and all data references must be physical addresses
  247. * accessible to CAAM (i.e. within a PAMU window granted
  248. * to it).
  249. * @cbk: pointer to a callback function to be invoked upon completion
  250. * of this request. This has the form:
  251. * callback(struct device *dev, u32 *desc, u32 stat, void *arg)
  252. * where:
  253. * @dev: contains the job ring device that processed this
  254. * response.
  255. * @desc: descriptor that initiated the request, same as
  256. * "desc" being argued to caam_jr_enqueue().
  257. * @status: untranslated status received from CAAM. See the
  258. * reference manual for a detailed description of
  259. * error meaning, or see the JRSTA definitions in the
  260. * register header file
  261. * @areq: optional pointer to an argument passed with the
  262. * original request
  263. * @areq: optional pointer to a user argument for use at callback
  264. * time.
  265. **/
  266. int caam_jr_enqueue(struct device *dev, u32 *desc,
  267. void (*cbk)(struct device *dev, u32 *desc,
  268. u32 status, void *areq),
  269. void *areq)
  270. {
  271. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  272. struct caam_jrentry_info *head_entry;
  273. int head, tail, desc_size;
  274. dma_addr_t desc_dma;
  275. desc_size = (caam32_to_cpu(*desc) & HDR_JD_LENGTH_MASK) * sizeof(u32);
  276. desc_dma = dma_map_single(dev, desc, desc_size, DMA_TO_DEVICE);
  277. if (dma_mapping_error(dev, desc_dma)) {
  278. dev_err(dev, "caam_jr_enqueue(): can't map jobdesc\n");
  279. return -EIO;
  280. }
  281. spin_lock_bh(&jrp->inplock);
  282. head = jrp->head;
  283. tail = READ_ONCE(jrp->tail);
  284. if (!rd_reg32(&jrp->rregs->inpring_avail) ||
  285. CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
  286. spin_unlock_bh(&jrp->inplock);
  287. dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
  288. return -EBUSY;
  289. }
  290. head_entry = &jrp->entinfo[head];
  291. head_entry->desc_addr_virt = desc;
  292. head_entry->desc_size = desc_size;
  293. head_entry->callbk = (void *)cbk;
  294. head_entry->cbkarg = areq;
  295. head_entry->desc_addr_dma = desc_dma;
  296. jrp->inpring[jrp->inp_ring_write_index] = cpu_to_caam_dma(desc_dma);
  297. /*
  298. * Guarantee that the descriptor's DMA address has been written to
  299. * the next slot in the ring before the write index is updated, since
  300. * other cores may update this index independently.
  301. */
  302. smp_wmb();
  303. jrp->inp_ring_write_index = (jrp->inp_ring_write_index + 1) &
  304. (JOBR_DEPTH - 1);
  305. jrp->head = (head + 1) & (JOBR_DEPTH - 1);
  306. /*
  307. * Ensure that all job information has been written before
  308. * notifying CAAM that a new job was added to the input ring.
  309. */
  310. wmb();
  311. wr_reg32(&jrp->rregs->inpring_jobadd, 1);
  312. spin_unlock_bh(&jrp->inplock);
  313. return 0;
  314. }
  315. EXPORT_SYMBOL(caam_jr_enqueue);
  316. /*
  317. * Init JobR independent of platform property detection
  318. */
  319. static int caam_jr_init(struct device *dev)
  320. {
  321. struct caam_drv_private_jr *jrp;
  322. dma_addr_t inpbusaddr, outbusaddr;
  323. int i, error;
  324. jrp = dev_get_drvdata(dev);
  325. tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev);
  326. /* Connect job ring interrupt handler. */
  327. error = request_irq(jrp->irq, caam_jr_interrupt, IRQF_SHARED,
  328. dev_name(dev), dev);
  329. if (error) {
  330. dev_err(dev, "can't connect JobR %d interrupt (%d)\n",
  331. jrp->ridx, jrp->irq);
  332. goto out_kill_deq;
  333. }
  334. error = caam_reset_hw_jr(dev);
  335. if (error)
  336. goto out_free_irq;
  337. error = -ENOMEM;
  338. jrp->inpring = dma_alloc_coherent(dev, sizeof(*jrp->inpring) *
  339. JOBR_DEPTH, &inpbusaddr, GFP_KERNEL);
  340. if (!jrp->inpring)
  341. goto out_free_irq;
  342. jrp->outring = dma_alloc_coherent(dev, sizeof(*jrp->outring) *
  343. JOBR_DEPTH, &outbusaddr, GFP_KERNEL);
  344. if (!jrp->outring)
  345. goto out_free_inpring;
  346. jrp->entinfo = kcalloc(JOBR_DEPTH, sizeof(*jrp->entinfo), GFP_KERNEL);
  347. if (!jrp->entinfo)
  348. goto out_free_outring;
  349. for (i = 0; i < JOBR_DEPTH; i++)
  350. jrp->entinfo[i].desc_addr_dma = !0;
  351. /* Setup rings */
  352. jrp->inp_ring_write_index = 0;
  353. jrp->out_ring_read_index = 0;
  354. jrp->head = 0;
  355. jrp->tail = 0;
  356. wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);
  357. wr_reg64(&jrp->rregs->outring_base, outbusaddr);
  358. wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);
  359. wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);
  360. jrp->ringsize = JOBR_DEPTH;
  361. spin_lock_init(&jrp->inplock);
  362. spin_lock_init(&jrp->outlock);
  363. /* Select interrupt coalescing parameters */
  364. clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC |
  365. (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) |
  366. (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT));
  367. return 0;
  368. out_free_outring:
  369. dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
  370. jrp->outring, outbusaddr);
  371. out_free_inpring:
  372. dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  373. jrp->inpring, inpbusaddr);
  374. dev_err(dev, "can't allocate job rings for %d\n", jrp->ridx);
  375. out_free_irq:
  376. free_irq(jrp->irq, dev);
  377. out_kill_deq:
  378. tasklet_kill(&jrp->irqtask);
  379. return error;
  380. }
  381. /*
  382. * Probe routine for each detected JobR subsystem.
  383. */
  384. static int caam_jr_probe(struct platform_device *pdev)
  385. {
  386. struct device *jrdev;
  387. struct device_node *nprop;
  388. struct caam_job_ring __iomem *ctrl;
  389. struct caam_drv_private_jr *jrpriv;
  390. static int total_jobrs;
  391. int error;
  392. jrdev = &pdev->dev;
  393. jrpriv = devm_kmalloc(jrdev, sizeof(*jrpriv), GFP_KERNEL);
  394. if (!jrpriv)
  395. return -ENOMEM;
  396. dev_set_drvdata(jrdev, jrpriv);
  397. /* save ring identity relative to detection */
  398. jrpriv->ridx = total_jobrs++;
  399. nprop = pdev->dev.of_node;
  400. /* Get configuration properties from device tree */
  401. /* First, get register page */
  402. ctrl = of_iomap(nprop, 0);
  403. if (!ctrl) {
  404. dev_err(jrdev, "of_iomap() failed\n");
  405. return -ENOMEM;
  406. }
  407. jrpriv->rregs = (struct caam_job_ring __iomem __force *)ctrl;
  408. if (sizeof(dma_addr_t) == sizeof(u64)) {
  409. if (caam_dpaa2)
  410. error = dma_set_mask_and_coherent(jrdev,
  411. DMA_BIT_MASK(49));
  412. else if (of_device_is_compatible(nprop,
  413. "fsl,sec-v5.0-job-ring"))
  414. error = dma_set_mask_and_coherent(jrdev,
  415. DMA_BIT_MASK(40));
  416. else
  417. error = dma_set_mask_and_coherent(jrdev,
  418. DMA_BIT_MASK(36));
  419. } else {
  420. error = dma_set_mask_and_coherent(jrdev, DMA_BIT_MASK(32));
  421. }
  422. if (error) {
  423. dev_err(jrdev, "dma_set_mask_and_coherent failed (%d)\n",
  424. error);
  425. iounmap(ctrl);
  426. return error;
  427. }
  428. /* Identify the interrupt */
  429. jrpriv->irq = irq_of_parse_and_map(nprop, 0);
  430. /* Now do the platform independent part */
  431. error = caam_jr_init(jrdev); /* now turn on hardware */
  432. if (error) {
  433. irq_dispose_mapping(jrpriv->irq);
  434. iounmap(ctrl);
  435. return error;
  436. }
  437. jrpriv->dev = jrdev;
  438. spin_lock(&driver_data.jr_alloc_lock);
  439. list_add_tail(&jrpriv->list_node, &driver_data.jr_list);
  440. spin_unlock(&driver_data.jr_alloc_lock);
  441. atomic_set(&jrpriv->tfm_count, 0);
  442. return 0;
  443. }
  444. static const struct of_device_id caam_jr_match[] = {
  445. {
  446. .compatible = "fsl,sec-v4.0-job-ring",
  447. },
  448. {
  449. .compatible = "fsl,sec4.0-job-ring",
  450. },
  451. {},
  452. };
  453. MODULE_DEVICE_TABLE(of, caam_jr_match);
  454. static struct platform_driver caam_jr_driver = {
  455. .driver = {
  456. .name = "caam_jr",
  457. .of_match_table = caam_jr_match,
  458. },
  459. .probe = caam_jr_probe,
  460. .remove = caam_jr_remove,
  461. };
  462. static int __init jr_driver_init(void)
  463. {
  464. spin_lock_init(&driver_data.jr_alloc_lock);
  465. INIT_LIST_HEAD(&driver_data.jr_list);
  466. return platform_driver_register(&caam_jr_driver);
  467. }
  468. static void __exit jr_driver_exit(void)
  469. {
  470. platform_driver_unregister(&caam_jr_driver);
  471. }
  472. module_init(jr_driver_init);
  473. module_exit(jr_driver_exit);
  474. MODULE_LICENSE("GPL");
  475. MODULE_DESCRIPTION("FSL CAAM JR request backend");
  476. MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");