psc-dm644x.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PSC clock descriptions for TI DaVinci DM644x
  4. *
  5. * Copyright (C) 2018 David Lechner <david@lechnology.com>
  6. */
  7. #include <linux/clk-provider.h>
  8. #include <linux/clk.h>
  9. #include <linux/clkdev.h>
  10. #include <linux/init.h>
  11. #include <linux/kernel.h>
  12. #include <linux/types.h>
  13. #include "psc.h"
  14. LPSC_CLKDEV1(vpss_master_clkdev, "master", "vpss");
  15. LPSC_CLKDEV1(vpss_slave_clkdev, "slave", "vpss");
  16. LPSC_CLKDEV2(emac_clkdev, NULL, "davinci_emac.1",
  17. "fck", "davinci_mdio.0");
  18. LPSC_CLKDEV1(usb_clkdev, "usb", NULL);
  19. LPSC_CLKDEV1(ide_clkdev, NULL, "palm_bk3710");
  20. LPSC_CLKDEV1(aemif_clkdev, "aemif", NULL);
  21. LPSC_CLKDEV1(mmcsd_clkdev, NULL, "dm6441-mmc.0");
  22. LPSC_CLKDEV1(asp0_clkdev, NULL, "davinci-mcbsp");
  23. LPSC_CLKDEV1(i2c_clkdev, NULL, "i2c_davinci.1");
  24. LPSC_CLKDEV1(uart0_clkdev, NULL, "serial8250.0");
  25. LPSC_CLKDEV1(uart1_clkdev, NULL, "serial8250.1");
  26. LPSC_CLKDEV1(uart2_clkdev, NULL, "serial8250.2");
  27. /* REVISIT: gpio-davinci.c should be modified to drop con_id */
  28. LPSC_CLKDEV1(gpio_clkdev, "gpio", NULL);
  29. LPSC_CLKDEV1(timer0_clkdev, "timer0", NULL);
  30. LPSC_CLKDEV1(timer2_clkdev, NULL, "davinci-wdt");
  31. static const struct davinci_lpsc_clk_info dm644x_psc_info[] = {
  32. LPSC(0, 0, vpss_master, pll1_sysclk3, vpss_master_clkdev, 0),
  33. LPSC(1, 0, vpss_slave, pll1_sysclk3, vpss_slave_clkdev, 0),
  34. LPSC(6, 0, emac, pll1_sysclk5, emac_clkdev, 0),
  35. LPSC(9, 0, usb, pll1_sysclk5, usb_clkdev, 0),
  36. LPSC(10, 0, ide, pll1_sysclk5, ide_clkdev, 0),
  37. LPSC(11, 0, vlynq, pll1_sysclk5, NULL, 0),
  38. LPSC(14, 0, aemif, pll1_sysclk5, aemif_clkdev, 0),
  39. LPSC(15, 0, mmcsd, pll1_sysclk5, mmcsd_clkdev, 0),
  40. LPSC(17, 0, asp0, pll1_sysclk5, asp0_clkdev, 0),
  41. LPSC(18, 0, i2c, pll1_auxclk, i2c_clkdev, 0),
  42. LPSC(19, 0, uart0, pll1_auxclk, uart0_clkdev, 0),
  43. LPSC(20, 0, uart1, pll1_auxclk, uart1_clkdev, 0),
  44. LPSC(21, 0, uart2, pll1_auxclk, uart2_clkdev, 0),
  45. LPSC(22, 0, spi, pll1_sysclk5, NULL, 0),
  46. LPSC(23, 0, pwm0, pll1_auxclk, NULL, 0),
  47. LPSC(24, 0, pwm1, pll1_auxclk, NULL, 0),
  48. LPSC(25, 0, pwm2, pll1_auxclk, NULL, 0),
  49. LPSC(26, 0, gpio, pll1_sysclk5, gpio_clkdev, 0),
  50. LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED),
  51. LPSC(28, 0, timer1, pll1_auxclk, NULL, 0),
  52. /* REVISIT: why can't this be disabled? */
  53. LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED),
  54. LPSC(31, 0, arm, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
  55. /* REVISIT how to disable? */
  56. LPSC(39, 1, dsp, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED),
  57. /* REVISIT how to disable? */
  58. LPSC(40, 1, vicp, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
  59. { }
  60. };
  61. static int dm644x_psc_init(struct device *dev, void __iomem *base)
  62. {
  63. return davinci_psc_register_clocks(dev, dm644x_psc_info, 41, base);
  64. }
  65. static struct clk_bulk_data dm644x_psc_parent_clks[] = {
  66. { .id = "pll1_sysclk1" },
  67. { .id = "pll1_sysclk2" },
  68. { .id = "pll1_sysclk3" },
  69. { .id = "pll1_sysclk5" },
  70. { .id = "pll1_auxclk" },
  71. };
  72. const struct davinci_psc_init_data dm644x_psc_init_data = {
  73. .parent_clks = dm644x_psc_parent_clks,
  74. .num_parent_clks = ARRAY_SIZE(dm644x_psc_parent_clks),
  75. .psc_init = &dm644x_psc_init,
  76. };