pci-host-generic.c 7.7 KB

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  1. /*
  2. * Simple, generic PCI host controller driver targetting firmware-initialised
  3. * systems and virtual machines (e.g. the PCI emulation provided by kvmtool).
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. *
  17. * Copyright (C) 2014 ARM Limited
  18. *
  19. * Author: Will Deacon <will.deacon@arm.com>
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/of_address.h>
  24. #include <linux/of_pci.h>
  25. #include <linux/platform_device.h>
  26. struct gen_pci_cfg_bus_ops {
  27. u32 bus_shift;
  28. void __iomem *(*map_bus)(struct pci_bus *, unsigned int, int);
  29. };
  30. struct gen_pci_cfg_windows {
  31. struct resource res;
  32. struct resource *bus_range;
  33. void __iomem **win;
  34. const struct gen_pci_cfg_bus_ops *ops;
  35. };
  36. struct gen_pci {
  37. struct pci_host_bridge host;
  38. struct gen_pci_cfg_windows cfg;
  39. struct list_head resources;
  40. };
  41. static void __iomem *gen_pci_map_cfg_bus_cam(struct pci_bus *bus,
  42. unsigned int devfn,
  43. int where)
  44. {
  45. struct pci_sys_data *sys = bus->sysdata;
  46. struct gen_pci *pci = sys->private_data;
  47. resource_size_t idx = bus->number - pci->cfg.bus_range->start;
  48. return pci->cfg.win[idx] + ((devfn << 8) | where);
  49. }
  50. static struct gen_pci_cfg_bus_ops gen_pci_cfg_cam_bus_ops = {
  51. .bus_shift = 16,
  52. .map_bus = gen_pci_map_cfg_bus_cam,
  53. };
  54. static void __iomem *gen_pci_map_cfg_bus_ecam(struct pci_bus *bus,
  55. unsigned int devfn,
  56. int where)
  57. {
  58. struct pci_sys_data *sys = bus->sysdata;
  59. struct gen_pci *pci = sys->private_data;
  60. resource_size_t idx = bus->number - pci->cfg.bus_range->start;
  61. return pci->cfg.win[idx] + ((devfn << 12) | where);
  62. }
  63. static struct gen_pci_cfg_bus_ops gen_pci_cfg_ecam_bus_ops = {
  64. .bus_shift = 20,
  65. .map_bus = gen_pci_map_cfg_bus_ecam,
  66. };
  67. static int gen_pci_config_read(struct pci_bus *bus, unsigned int devfn,
  68. int where, int size, u32 *val)
  69. {
  70. void __iomem *addr;
  71. struct pci_sys_data *sys = bus->sysdata;
  72. struct gen_pci *pci = sys->private_data;
  73. addr = pci->cfg.ops->map_bus(bus, devfn, where);
  74. switch (size) {
  75. case 1:
  76. *val = readb(addr);
  77. break;
  78. case 2:
  79. *val = readw(addr);
  80. break;
  81. default:
  82. *val = readl(addr);
  83. }
  84. return PCIBIOS_SUCCESSFUL;
  85. }
  86. static int gen_pci_config_write(struct pci_bus *bus, unsigned int devfn,
  87. int where, int size, u32 val)
  88. {
  89. void __iomem *addr;
  90. struct pci_sys_data *sys = bus->sysdata;
  91. struct gen_pci *pci = sys->private_data;
  92. addr = pci->cfg.ops->map_bus(bus, devfn, where);
  93. switch (size) {
  94. case 1:
  95. writeb(val, addr);
  96. break;
  97. case 2:
  98. writew(val, addr);
  99. break;
  100. default:
  101. writel(val, addr);
  102. }
  103. return PCIBIOS_SUCCESSFUL;
  104. }
  105. static struct pci_ops gen_pci_ops = {
  106. .read = gen_pci_config_read,
  107. .write = gen_pci_config_write,
  108. };
  109. static const struct of_device_id gen_pci_of_match[] = {
  110. { .compatible = "pci-host-cam-generic",
  111. .data = &gen_pci_cfg_cam_bus_ops },
  112. { .compatible = "pci-host-ecam-generic",
  113. .data = &gen_pci_cfg_ecam_bus_ops },
  114. { },
  115. };
  116. MODULE_DEVICE_TABLE(of, gen_pci_of_match);
  117. static void gen_pci_release_of_pci_ranges(struct gen_pci *pci)
  118. {
  119. pci_free_resource_list(&pci->resources);
  120. }
  121. static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
  122. {
  123. int err, res_valid = 0;
  124. struct device *dev = pci->host.dev.parent;
  125. struct device_node *np = dev->of_node;
  126. resource_size_t iobase;
  127. struct resource_entry *win;
  128. err = of_pci_get_host_bridge_resources(np, 0, 0xff, &pci->resources,
  129. &iobase);
  130. if (err)
  131. return err;
  132. resource_list_for_each_entry(win, &pci->resources) {
  133. struct resource *parent, *res = win->res;
  134. switch (resource_type(res)) {
  135. case IORESOURCE_IO:
  136. parent = &ioport_resource;
  137. err = pci_remap_iospace(res, iobase);
  138. if (err) {
  139. dev_warn(dev, "error %d: failed to map resource %pR\n",
  140. err, res);
  141. continue;
  142. }
  143. break;
  144. case IORESOURCE_MEM:
  145. parent = &iomem_resource;
  146. res_valid |= !(res->flags & IORESOURCE_PREFETCH);
  147. break;
  148. case IORESOURCE_BUS:
  149. pci->cfg.bus_range = res;
  150. default:
  151. continue;
  152. }
  153. err = devm_request_resource(dev, parent, res);
  154. if (err)
  155. goto out_release_res;
  156. }
  157. if (!res_valid) {
  158. dev_err(dev, "non-prefetchable memory resource required\n");
  159. err = -EINVAL;
  160. goto out_release_res;
  161. }
  162. return 0;
  163. out_release_res:
  164. gen_pci_release_of_pci_ranges(pci);
  165. return err;
  166. }
  167. static int gen_pci_parse_map_cfg_windows(struct gen_pci *pci)
  168. {
  169. int err;
  170. u8 bus_max;
  171. resource_size_t busn;
  172. struct resource *bus_range;
  173. struct device *dev = pci->host.dev.parent;
  174. struct device_node *np = dev->of_node;
  175. err = of_address_to_resource(np, 0, &pci->cfg.res);
  176. if (err) {
  177. dev_err(dev, "missing \"reg\" property\n");
  178. return err;
  179. }
  180. /* Limit the bus-range to fit within reg */
  181. bus_max = pci->cfg.bus_range->start +
  182. (resource_size(&pci->cfg.res) >> pci->cfg.ops->bus_shift) - 1;
  183. pci->cfg.bus_range->end = min_t(resource_size_t,
  184. pci->cfg.bus_range->end, bus_max);
  185. pci->cfg.win = devm_kcalloc(dev, resource_size(pci->cfg.bus_range),
  186. sizeof(*pci->cfg.win), GFP_KERNEL);
  187. if (!pci->cfg.win)
  188. return -ENOMEM;
  189. /* Map our Configuration Space windows */
  190. if (!devm_request_mem_region(dev, pci->cfg.res.start,
  191. resource_size(&pci->cfg.res),
  192. "Configuration Space"))
  193. return -ENOMEM;
  194. bus_range = pci->cfg.bus_range;
  195. for (busn = bus_range->start; busn <= bus_range->end; ++busn) {
  196. u32 idx = busn - bus_range->start;
  197. u32 sz = 1 << pci->cfg.ops->bus_shift;
  198. pci->cfg.win[idx] = devm_ioremap(dev,
  199. pci->cfg.res.start + busn * sz,
  200. sz);
  201. if (!pci->cfg.win[idx])
  202. return -ENOMEM;
  203. }
  204. return 0;
  205. }
  206. static int gen_pci_setup(int nr, struct pci_sys_data *sys)
  207. {
  208. struct gen_pci *pci = sys->private_data;
  209. list_splice_init(&pci->resources, &sys->resources);
  210. return 1;
  211. }
  212. static int gen_pci_probe(struct platform_device *pdev)
  213. {
  214. int err;
  215. const char *type;
  216. const struct of_device_id *of_id;
  217. const int *prop;
  218. struct device *dev = &pdev->dev;
  219. struct device_node *np = dev->of_node;
  220. struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
  221. struct hw_pci hw = {
  222. .nr_controllers = 1,
  223. .private_data = (void **)&pci,
  224. .setup = gen_pci_setup,
  225. .map_irq = of_irq_parse_and_map_pci,
  226. .ops = &gen_pci_ops,
  227. };
  228. if (!pci)
  229. return -ENOMEM;
  230. type = of_get_property(np, "device_type", NULL);
  231. if (!type || strcmp(type, "pci")) {
  232. dev_err(dev, "invalid \"device_type\" %s\n", type);
  233. return -EINVAL;
  234. }
  235. prop = of_get_property(of_chosen, "linux,pci-probe-only", NULL);
  236. if (prop) {
  237. if (*prop)
  238. pci_add_flags(PCI_PROBE_ONLY);
  239. else
  240. pci_clear_flags(PCI_PROBE_ONLY);
  241. }
  242. of_id = of_match_node(gen_pci_of_match, np);
  243. pci->cfg.ops = of_id->data;
  244. pci->host.dev.parent = dev;
  245. INIT_LIST_HEAD(&pci->host.windows);
  246. INIT_LIST_HEAD(&pci->resources);
  247. /* Parse our PCI ranges and request their resources */
  248. err = gen_pci_parse_request_of_pci_ranges(pci);
  249. if (err)
  250. return err;
  251. /* Parse and map our Configuration Space windows */
  252. err = gen_pci_parse_map_cfg_windows(pci);
  253. if (err) {
  254. gen_pci_release_of_pci_ranges(pci);
  255. return err;
  256. }
  257. pci_common_init_dev(dev, &hw);
  258. return 0;
  259. }
  260. static struct platform_driver gen_pci_driver = {
  261. .driver = {
  262. .name = "pci-host-generic",
  263. .of_match_table = gen_pci_of_match,
  264. },
  265. .probe = gen_pci_probe,
  266. };
  267. module_platform_driver(gen_pci_driver);
  268. MODULE_DESCRIPTION("Generic PCI host driver");
  269. MODULE_AUTHOR("Will Deacon <will.deacon@arm.com>");
  270. MODULE_LICENSE("GPL v2");