hyperv.c 46 KB

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  1. /*
  2. * KVM Microsoft Hyper-V emulation
  3. *
  4. * derived from arch/x86/kvm/x86.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. * Copyright (C) 2008 Qumranet, Inc.
  8. * Copyright IBM Corporation, 2008
  9. * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10. * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com>
  11. *
  12. * Authors:
  13. * Avi Kivity <avi@qumranet.com>
  14. * Yaniv Kamay <yaniv@qumranet.com>
  15. * Amit Shah <amit.shah@qumranet.com>
  16. * Ben-Ami Yassour <benami@il.ibm.com>
  17. * Andrey Smetanin <asmetanin@virtuozzo.com>
  18. *
  19. * This work is licensed under the terms of the GNU GPL, version 2. See
  20. * the COPYING file in the top-level directory.
  21. *
  22. */
  23. #include "x86.h"
  24. #include "lapic.h"
  25. #include "ioapic.h"
  26. #include "hyperv.h"
  27. #include <linux/kvm_host.h>
  28. #include <linux/highmem.h>
  29. #include <linux/sched/cputime.h>
  30. #include <linux/eventfd.h>
  31. #include <asm/apicdef.h>
  32. #include <trace/events/kvm.h>
  33. #include "trace.h"
  34. #define KVM_HV_MAX_SPARSE_VCPU_SET_BITS DIV_ROUND_UP(KVM_MAX_VCPUS, 64)
  35. static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint)
  36. {
  37. return atomic64_read(&synic->sint[sint]);
  38. }
  39. static inline int synic_get_sint_vector(u64 sint_value)
  40. {
  41. if (sint_value & HV_SYNIC_SINT_MASKED)
  42. return -1;
  43. return sint_value & HV_SYNIC_SINT_VECTOR_MASK;
  44. }
  45. static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic,
  46. int vector)
  47. {
  48. int i;
  49. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  50. if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
  51. return true;
  52. }
  53. return false;
  54. }
  55. static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic,
  56. int vector)
  57. {
  58. int i;
  59. u64 sint_value;
  60. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  61. sint_value = synic_read_sint(synic, i);
  62. if (synic_get_sint_vector(sint_value) == vector &&
  63. sint_value & HV_SYNIC_SINT_AUTO_EOI)
  64. return true;
  65. }
  66. return false;
  67. }
  68. static void synic_update_vector(struct kvm_vcpu_hv_synic *synic,
  69. int vector)
  70. {
  71. if (vector < HV_SYNIC_FIRST_VALID_VECTOR)
  72. return;
  73. if (synic_has_vector_connected(synic, vector))
  74. __set_bit(vector, synic->vec_bitmap);
  75. else
  76. __clear_bit(vector, synic->vec_bitmap);
  77. if (synic_has_vector_auto_eoi(synic, vector))
  78. __set_bit(vector, synic->auto_eoi_bitmap);
  79. else
  80. __clear_bit(vector, synic->auto_eoi_bitmap);
  81. }
  82. static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint,
  83. u64 data, bool host)
  84. {
  85. int vector, old_vector;
  86. bool masked;
  87. vector = data & HV_SYNIC_SINT_VECTOR_MASK;
  88. masked = data & HV_SYNIC_SINT_MASKED;
  89. /*
  90. * Valid vectors are 16-255, however, nested Hyper-V attempts to write
  91. * default '0x10000' value on boot and this should not #GP. We need to
  92. * allow zero-initing the register from host as well.
  93. */
  94. if (vector < HV_SYNIC_FIRST_VALID_VECTOR && !host && !masked)
  95. return 1;
  96. /*
  97. * Guest may configure multiple SINTs to use the same vector, so
  98. * we maintain a bitmap of vectors handled by synic, and a
  99. * bitmap of vectors with auto-eoi behavior. The bitmaps are
  100. * updated here, and atomically queried on fast paths.
  101. */
  102. old_vector = synic_read_sint(synic, sint) & HV_SYNIC_SINT_VECTOR_MASK;
  103. atomic64_set(&synic->sint[sint], data);
  104. synic_update_vector(synic, old_vector);
  105. synic_update_vector(synic, vector);
  106. /* Load SynIC vectors into EOI exit bitmap */
  107. kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic));
  108. return 0;
  109. }
  110. static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx)
  111. {
  112. struct kvm_vcpu *vcpu = NULL;
  113. int i;
  114. if (vpidx >= KVM_MAX_VCPUS)
  115. return NULL;
  116. vcpu = kvm_get_vcpu(kvm, vpidx);
  117. if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
  118. return vcpu;
  119. kvm_for_each_vcpu(i, vcpu, kvm)
  120. if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
  121. return vcpu;
  122. return NULL;
  123. }
  124. static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx)
  125. {
  126. struct kvm_vcpu *vcpu;
  127. struct kvm_vcpu_hv_synic *synic;
  128. vcpu = get_vcpu_by_vpidx(kvm, vpidx);
  129. if (!vcpu)
  130. return NULL;
  131. synic = vcpu_to_synic(vcpu);
  132. return (synic->active) ? synic : NULL;
  133. }
  134. static void synic_clear_sint_msg_pending(struct kvm_vcpu_hv_synic *synic,
  135. u32 sint)
  136. {
  137. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  138. struct page *page;
  139. gpa_t gpa;
  140. struct hv_message *msg;
  141. struct hv_message_page *msg_page;
  142. gpa = synic->msg_page & PAGE_MASK;
  143. page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
  144. if (is_error_page(page)) {
  145. vcpu_err(vcpu, "Hyper-V SynIC can't get msg page, gpa 0x%llx\n",
  146. gpa);
  147. return;
  148. }
  149. msg_page = kmap_atomic(page);
  150. msg = &msg_page->sint_message[sint];
  151. msg->header.message_flags.msg_pending = 0;
  152. kunmap_atomic(msg_page);
  153. kvm_release_page_dirty(page);
  154. kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
  155. }
  156. static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint)
  157. {
  158. struct kvm *kvm = vcpu->kvm;
  159. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  160. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  161. struct kvm_vcpu_hv_stimer *stimer;
  162. int gsi, idx, stimers_pending;
  163. trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint);
  164. if (synic->msg_page & HV_SYNIC_SIMP_ENABLE)
  165. synic_clear_sint_msg_pending(synic, sint);
  166. /* Try to deliver pending Hyper-V SynIC timers messages */
  167. stimers_pending = 0;
  168. for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) {
  169. stimer = &hv_vcpu->stimer[idx];
  170. if (stimer->msg_pending &&
  171. (stimer->config & HV_STIMER_ENABLE) &&
  172. HV_STIMER_SINT(stimer->config) == sint) {
  173. set_bit(stimer->index,
  174. hv_vcpu->stimer_pending_bitmap);
  175. stimers_pending++;
  176. }
  177. }
  178. if (stimers_pending)
  179. kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
  180. idx = srcu_read_lock(&kvm->irq_srcu);
  181. gsi = atomic_read(&synic->sint_to_gsi[sint]);
  182. if (gsi != -1)
  183. kvm_notify_acked_gsi(kvm, gsi);
  184. srcu_read_unlock(&kvm->irq_srcu, idx);
  185. }
  186. static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr)
  187. {
  188. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  189. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  190. hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC;
  191. hv_vcpu->exit.u.synic.msr = msr;
  192. hv_vcpu->exit.u.synic.control = synic->control;
  193. hv_vcpu->exit.u.synic.evt_page = synic->evt_page;
  194. hv_vcpu->exit.u.synic.msg_page = synic->msg_page;
  195. kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
  196. }
  197. static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
  198. u32 msr, u64 data, bool host)
  199. {
  200. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  201. int ret;
  202. if (!synic->active && !host)
  203. return 1;
  204. trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host);
  205. ret = 0;
  206. switch (msr) {
  207. case HV_X64_MSR_SCONTROL:
  208. synic->control = data;
  209. if (!host)
  210. synic_exit(synic, msr);
  211. break;
  212. case HV_X64_MSR_SVERSION:
  213. if (!host) {
  214. ret = 1;
  215. break;
  216. }
  217. synic->version = data;
  218. break;
  219. case HV_X64_MSR_SIEFP:
  220. if ((data & HV_SYNIC_SIEFP_ENABLE) && !host &&
  221. !synic->dont_zero_synic_pages)
  222. if (kvm_clear_guest(vcpu->kvm,
  223. data & PAGE_MASK, PAGE_SIZE)) {
  224. ret = 1;
  225. break;
  226. }
  227. synic->evt_page = data;
  228. if (!host)
  229. synic_exit(synic, msr);
  230. break;
  231. case HV_X64_MSR_SIMP:
  232. if ((data & HV_SYNIC_SIMP_ENABLE) && !host &&
  233. !synic->dont_zero_synic_pages)
  234. if (kvm_clear_guest(vcpu->kvm,
  235. data & PAGE_MASK, PAGE_SIZE)) {
  236. ret = 1;
  237. break;
  238. }
  239. synic->msg_page = data;
  240. if (!host)
  241. synic_exit(synic, msr);
  242. break;
  243. case HV_X64_MSR_EOM: {
  244. int i;
  245. for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
  246. kvm_hv_notify_acked_sint(vcpu, i);
  247. break;
  248. }
  249. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  250. ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host);
  251. break;
  252. default:
  253. ret = 1;
  254. break;
  255. }
  256. return ret;
  257. }
  258. static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata,
  259. bool host)
  260. {
  261. int ret;
  262. if (!synic->active && !host)
  263. return 1;
  264. ret = 0;
  265. switch (msr) {
  266. case HV_X64_MSR_SCONTROL:
  267. *pdata = synic->control;
  268. break;
  269. case HV_X64_MSR_SVERSION:
  270. *pdata = synic->version;
  271. break;
  272. case HV_X64_MSR_SIEFP:
  273. *pdata = synic->evt_page;
  274. break;
  275. case HV_X64_MSR_SIMP:
  276. *pdata = synic->msg_page;
  277. break;
  278. case HV_X64_MSR_EOM:
  279. *pdata = 0;
  280. break;
  281. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  282. *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]);
  283. break;
  284. default:
  285. ret = 1;
  286. break;
  287. }
  288. return ret;
  289. }
  290. static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
  291. {
  292. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  293. struct kvm_lapic_irq irq;
  294. int ret, vector;
  295. if (sint >= ARRAY_SIZE(synic->sint))
  296. return -EINVAL;
  297. vector = synic_get_sint_vector(synic_read_sint(synic, sint));
  298. if (vector < 0)
  299. return -ENOENT;
  300. memset(&irq, 0, sizeof(irq));
  301. irq.shorthand = APIC_DEST_SELF;
  302. irq.dest_mode = APIC_DEST_PHYSICAL;
  303. irq.delivery_mode = APIC_DM_FIXED;
  304. irq.vector = vector;
  305. irq.level = 1;
  306. ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL);
  307. trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret);
  308. return ret;
  309. }
  310. int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint)
  311. {
  312. struct kvm_vcpu_hv_synic *synic;
  313. synic = synic_get(kvm, vpidx);
  314. if (!synic)
  315. return -EINVAL;
  316. return synic_set_irq(synic, sint);
  317. }
  318. void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
  319. {
  320. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  321. int i;
  322. trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector);
  323. for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
  324. if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
  325. kvm_hv_notify_acked_sint(vcpu, i);
  326. }
  327. static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi)
  328. {
  329. struct kvm_vcpu_hv_synic *synic;
  330. synic = synic_get(kvm, vpidx);
  331. if (!synic)
  332. return -EINVAL;
  333. if (sint >= ARRAY_SIZE(synic->sint_to_gsi))
  334. return -EINVAL;
  335. atomic_set(&synic->sint_to_gsi[sint], gsi);
  336. return 0;
  337. }
  338. void kvm_hv_irq_routing_update(struct kvm *kvm)
  339. {
  340. struct kvm_irq_routing_table *irq_rt;
  341. struct kvm_kernel_irq_routing_entry *e;
  342. u32 gsi;
  343. irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu,
  344. lockdep_is_held(&kvm->irq_lock));
  345. for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) {
  346. hlist_for_each_entry(e, &irq_rt->map[gsi], link) {
  347. if (e->type == KVM_IRQ_ROUTING_HV_SINT)
  348. kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu,
  349. e->hv_sint.sint, gsi);
  350. }
  351. }
  352. }
  353. static void synic_init(struct kvm_vcpu_hv_synic *synic)
  354. {
  355. int i;
  356. memset(synic, 0, sizeof(*synic));
  357. synic->version = HV_SYNIC_VERSION_1;
  358. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  359. atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED);
  360. atomic_set(&synic->sint_to_gsi[i], -1);
  361. }
  362. }
  363. static u64 get_time_ref_counter(struct kvm *kvm)
  364. {
  365. struct kvm_hv *hv = &kvm->arch.hyperv;
  366. struct kvm_vcpu *vcpu;
  367. u64 tsc;
  368. /*
  369. * The guest has not set up the TSC page or the clock isn't
  370. * stable, fall back to get_kvmclock_ns.
  371. */
  372. if (!hv->tsc_ref.tsc_sequence)
  373. return div_u64(get_kvmclock_ns(kvm), 100);
  374. vcpu = kvm_get_vcpu(kvm, 0);
  375. tsc = kvm_read_l1_tsc(vcpu, rdtsc());
  376. return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64)
  377. + hv->tsc_ref.tsc_offset;
  378. }
  379. static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer,
  380. bool vcpu_kick)
  381. {
  382. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  383. set_bit(stimer->index,
  384. vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
  385. kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
  386. if (vcpu_kick)
  387. kvm_vcpu_kick(vcpu);
  388. }
  389. static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer)
  390. {
  391. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  392. trace_kvm_hv_stimer_cleanup(stimer_to_vcpu(stimer)->vcpu_id,
  393. stimer->index);
  394. hrtimer_cancel(&stimer->timer);
  395. clear_bit(stimer->index,
  396. vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
  397. stimer->msg_pending = false;
  398. stimer->exp_time = 0;
  399. }
  400. static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer)
  401. {
  402. struct kvm_vcpu_hv_stimer *stimer;
  403. stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer);
  404. trace_kvm_hv_stimer_callback(stimer_to_vcpu(stimer)->vcpu_id,
  405. stimer->index);
  406. stimer_mark_pending(stimer, true);
  407. return HRTIMER_NORESTART;
  408. }
  409. /*
  410. * stimer_start() assumptions:
  411. * a) stimer->count is not equal to 0
  412. * b) stimer->config has HV_STIMER_ENABLE flag
  413. */
  414. static int stimer_start(struct kvm_vcpu_hv_stimer *stimer)
  415. {
  416. u64 time_now;
  417. ktime_t ktime_now;
  418. time_now = get_time_ref_counter(stimer_to_vcpu(stimer)->kvm);
  419. ktime_now = ktime_get();
  420. if (stimer->config & HV_STIMER_PERIODIC) {
  421. if (stimer->exp_time) {
  422. if (time_now >= stimer->exp_time) {
  423. u64 remainder;
  424. div64_u64_rem(time_now - stimer->exp_time,
  425. stimer->count, &remainder);
  426. stimer->exp_time =
  427. time_now + (stimer->count - remainder);
  428. }
  429. } else
  430. stimer->exp_time = time_now + stimer->count;
  431. trace_kvm_hv_stimer_start_periodic(
  432. stimer_to_vcpu(stimer)->vcpu_id,
  433. stimer->index,
  434. time_now, stimer->exp_time);
  435. hrtimer_start(&stimer->timer,
  436. ktime_add_ns(ktime_now,
  437. 100 * (stimer->exp_time - time_now)),
  438. HRTIMER_MODE_ABS);
  439. return 0;
  440. }
  441. stimer->exp_time = stimer->count;
  442. if (time_now >= stimer->count) {
  443. /*
  444. * Expire timer according to Hypervisor Top-Level Functional
  445. * specification v4(15.3.1):
  446. * "If a one shot is enabled and the specified count is in
  447. * the past, it will expire immediately."
  448. */
  449. stimer_mark_pending(stimer, false);
  450. return 0;
  451. }
  452. trace_kvm_hv_stimer_start_one_shot(stimer_to_vcpu(stimer)->vcpu_id,
  453. stimer->index,
  454. time_now, stimer->count);
  455. hrtimer_start(&stimer->timer,
  456. ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)),
  457. HRTIMER_MODE_ABS);
  458. return 0;
  459. }
  460. static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config,
  461. bool host)
  462. {
  463. trace_kvm_hv_stimer_set_config(stimer_to_vcpu(stimer)->vcpu_id,
  464. stimer->index, config, host);
  465. stimer_cleanup(stimer);
  466. if ((stimer->config & HV_STIMER_ENABLE) && HV_STIMER_SINT(config) == 0)
  467. config &= ~HV_STIMER_ENABLE;
  468. stimer->config = config;
  469. stimer_mark_pending(stimer, false);
  470. return 0;
  471. }
  472. static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count,
  473. bool host)
  474. {
  475. trace_kvm_hv_stimer_set_count(stimer_to_vcpu(stimer)->vcpu_id,
  476. stimer->index, count, host);
  477. stimer_cleanup(stimer);
  478. stimer->count = count;
  479. if (stimer->count == 0)
  480. stimer->config &= ~HV_STIMER_ENABLE;
  481. else if (stimer->config & HV_STIMER_AUTOENABLE)
  482. stimer->config |= HV_STIMER_ENABLE;
  483. stimer_mark_pending(stimer, false);
  484. return 0;
  485. }
  486. static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig)
  487. {
  488. *pconfig = stimer->config;
  489. return 0;
  490. }
  491. static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount)
  492. {
  493. *pcount = stimer->count;
  494. return 0;
  495. }
  496. static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint,
  497. struct hv_message *src_msg)
  498. {
  499. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  500. struct page *page;
  501. gpa_t gpa;
  502. struct hv_message *dst_msg;
  503. int r;
  504. struct hv_message_page *msg_page;
  505. if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE))
  506. return -ENOENT;
  507. gpa = synic->msg_page & PAGE_MASK;
  508. page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
  509. if (is_error_page(page))
  510. return -EFAULT;
  511. msg_page = kmap_atomic(page);
  512. dst_msg = &msg_page->sint_message[sint];
  513. if (sync_cmpxchg(&dst_msg->header.message_type, HVMSG_NONE,
  514. src_msg->header.message_type) != HVMSG_NONE) {
  515. dst_msg->header.message_flags.msg_pending = 1;
  516. r = -EAGAIN;
  517. } else {
  518. memcpy(&dst_msg->u.payload, &src_msg->u.payload,
  519. src_msg->header.payload_size);
  520. dst_msg->header.message_type = src_msg->header.message_type;
  521. dst_msg->header.payload_size = src_msg->header.payload_size;
  522. r = synic_set_irq(synic, sint);
  523. if (r >= 1)
  524. r = 0;
  525. else if (r == 0)
  526. r = -EFAULT;
  527. }
  528. kunmap_atomic(msg_page);
  529. kvm_release_page_dirty(page);
  530. kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
  531. return r;
  532. }
  533. static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer)
  534. {
  535. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  536. struct hv_message *msg = &stimer->msg;
  537. struct hv_timer_message_payload *payload =
  538. (struct hv_timer_message_payload *)&msg->u.payload;
  539. payload->expiration_time = stimer->exp_time;
  540. payload->delivery_time = get_time_ref_counter(vcpu->kvm);
  541. return synic_deliver_msg(vcpu_to_synic(vcpu),
  542. HV_STIMER_SINT(stimer->config), msg);
  543. }
  544. static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer)
  545. {
  546. int r;
  547. stimer->msg_pending = true;
  548. r = stimer_send_msg(stimer);
  549. trace_kvm_hv_stimer_expiration(stimer_to_vcpu(stimer)->vcpu_id,
  550. stimer->index, r);
  551. if (!r) {
  552. stimer->msg_pending = false;
  553. if (!(stimer->config & HV_STIMER_PERIODIC))
  554. stimer->config &= ~HV_STIMER_ENABLE;
  555. }
  556. }
  557. void kvm_hv_process_stimers(struct kvm_vcpu *vcpu)
  558. {
  559. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  560. struct kvm_vcpu_hv_stimer *stimer;
  561. u64 time_now, exp_time;
  562. int i;
  563. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  564. if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) {
  565. stimer = &hv_vcpu->stimer[i];
  566. if (stimer->config & HV_STIMER_ENABLE) {
  567. exp_time = stimer->exp_time;
  568. if (exp_time) {
  569. time_now =
  570. get_time_ref_counter(vcpu->kvm);
  571. if (time_now >= exp_time)
  572. stimer_expiration(stimer);
  573. }
  574. if ((stimer->config & HV_STIMER_ENABLE) &&
  575. stimer->count) {
  576. if (!stimer->msg_pending)
  577. stimer_start(stimer);
  578. } else
  579. stimer_cleanup(stimer);
  580. }
  581. }
  582. }
  583. void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu)
  584. {
  585. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  586. int i;
  587. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  588. stimer_cleanup(&hv_vcpu->stimer[i]);
  589. }
  590. bool kvm_hv_assist_page_enabled(struct kvm_vcpu *vcpu)
  591. {
  592. if (!(vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE))
  593. return false;
  594. return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED;
  595. }
  596. EXPORT_SYMBOL_GPL(kvm_hv_assist_page_enabled);
  597. bool kvm_hv_get_assist_page(struct kvm_vcpu *vcpu,
  598. struct hv_vp_assist_page *assist_page)
  599. {
  600. if (!kvm_hv_assist_page_enabled(vcpu))
  601. return false;
  602. return !kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data,
  603. assist_page, sizeof(*assist_page));
  604. }
  605. EXPORT_SYMBOL_GPL(kvm_hv_get_assist_page);
  606. static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer)
  607. {
  608. struct hv_message *msg = &stimer->msg;
  609. struct hv_timer_message_payload *payload =
  610. (struct hv_timer_message_payload *)&msg->u.payload;
  611. memset(&msg->header, 0, sizeof(msg->header));
  612. msg->header.message_type = HVMSG_TIMER_EXPIRED;
  613. msg->header.payload_size = sizeof(*payload);
  614. payload->timer_index = stimer->index;
  615. payload->expiration_time = 0;
  616. payload->delivery_time = 0;
  617. }
  618. static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index)
  619. {
  620. memset(stimer, 0, sizeof(*stimer));
  621. stimer->index = timer_index;
  622. hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  623. stimer->timer.function = stimer_timer_callback;
  624. stimer_prepare_msg(stimer);
  625. }
  626. void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
  627. {
  628. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  629. int i;
  630. synic_init(&hv_vcpu->synic);
  631. bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
  632. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  633. stimer_init(&hv_vcpu->stimer[i], i);
  634. }
  635. void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu)
  636. {
  637. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  638. hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu);
  639. }
  640. int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages)
  641. {
  642. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  643. /*
  644. * Hyper-V SynIC auto EOI SINT's are
  645. * not compatible with APICV, so deactivate APICV
  646. */
  647. kvm_vcpu_deactivate_apicv(vcpu);
  648. synic->active = true;
  649. synic->dont_zero_synic_pages = dont_zero_synic_pages;
  650. return 0;
  651. }
  652. static bool kvm_hv_msr_partition_wide(u32 msr)
  653. {
  654. bool r = false;
  655. switch (msr) {
  656. case HV_X64_MSR_GUEST_OS_ID:
  657. case HV_X64_MSR_HYPERCALL:
  658. case HV_X64_MSR_REFERENCE_TSC:
  659. case HV_X64_MSR_TIME_REF_COUNT:
  660. case HV_X64_MSR_CRASH_CTL:
  661. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  662. case HV_X64_MSR_RESET:
  663. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  664. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  665. case HV_X64_MSR_TSC_EMULATION_STATUS:
  666. r = true;
  667. break;
  668. }
  669. return r;
  670. }
  671. static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu,
  672. u32 index, u64 *pdata)
  673. {
  674. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  675. if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
  676. return -EINVAL;
  677. *pdata = hv->hv_crash_param[index];
  678. return 0;
  679. }
  680. static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata)
  681. {
  682. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  683. *pdata = hv->hv_crash_ctl;
  684. return 0;
  685. }
  686. static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host)
  687. {
  688. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  689. if (host)
  690. hv->hv_crash_ctl = data & HV_X64_MSR_CRASH_CTL_NOTIFY;
  691. if (!host && (data & HV_X64_MSR_CRASH_CTL_NOTIFY)) {
  692. vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n",
  693. hv->hv_crash_param[0],
  694. hv->hv_crash_param[1],
  695. hv->hv_crash_param[2],
  696. hv->hv_crash_param[3],
  697. hv->hv_crash_param[4]);
  698. /* Send notification about crash to user space */
  699. kvm_make_request(KVM_REQ_HV_CRASH, vcpu);
  700. }
  701. return 0;
  702. }
  703. static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu,
  704. u32 index, u64 data)
  705. {
  706. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  707. if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
  708. return -EINVAL;
  709. hv->hv_crash_param[index] = data;
  710. return 0;
  711. }
  712. /*
  713. * The kvmclock and Hyper-V TSC page use similar formulas, and converting
  714. * between them is possible:
  715. *
  716. * kvmclock formula:
  717. * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32)
  718. * + system_time
  719. *
  720. * Hyper-V formula:
  721. * nsec/100 = ticks * scale / 2^64 + offset
  722. *
  723. * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula.
  724. * By dividing the kvmclock formula by 100 and equating what's left we get:
  725. * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  726. * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100
  727. * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100
  728. *
  729. * Now expand the kvmclock formula and divide by 100:
  730. * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32)
  731. * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32)
  732. * + system_time
  733. * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  734. * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  735. * + system_time / 100
  736. *
  737. * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64:
  738. * nsec/100 = ticks * scale / 2^64
  739. * - tsc_timestamp * scale / 2^64
  740. * + system_time / 100
  741. *
  742. * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out:
  743. * offset = system_time / 100 - tsc_timestamp * scale / 2^64
  744. *
  745. * These two equivalencies are implemented in this function.
  746. */
  747. static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock,
  748. HV_REFERENCE_TSC_PAGE *tsc_ref)
  749. {
  750. u64 max_mul;
  751. if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT))
  752. return false;
  753. /*
  754. * check if scale would overflow, if so we use the time ref counter
  755. * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64
  756. * tsc_to_system_mul / 100 >= 2^(32-tsc_shift)
  757. * tsc_to_system_mul >= 100 * 2^(32-tsc_shift)
  758. */
  759. max_mul = 100ull << (32 - hv_clock->tsc_shift);
  760. if (hv_clock->tsc_to_system_mul >= max_mul)
  761. return false;
  762. /*
  763. * Otherwise compute the scale and offset according to the formulas
  764. * derived above.
  765. */
  766. tsc_ref->tsc_scale =
  767. mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift),
  768. hv_clock->tsc_to_system_mul,
  769. 100);
  770. tsc_ref->tsc_offset = hv_clock->system_time;
  771. do_div(tsc_ref->tsc_offset, 100);
  772. tsc_ref->tsc_offset -=
  773. mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64);
  774. return true;
  775. }
  776. void kvm_hv_setup_tsc_page(struct kvm *kvm,
  777. struct pvclock_vcpu_time_info *hv_clock)
  778. {
  779. struct kvm_hv *hv = &kvm->arch.hyperv;
  780. u32 tsc_seq;
  781. u64 gfn;
  782. BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence));
  783. BUILD_BUG_ON(offsetof(HV_REFERENCE_TSC_PAGE, tsc_sequence) != 0);
  784. if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
  785. return;
  786. mutex_lock(&kvm->arch.hyperv.hv_lock);
  787. if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
  788. goto out_unlock;
  789. gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
  790. /*
  791. * Because the TSC parameters only vary when there is a
  792. * change in the master clock, do not bother with caching.
  793. */
  794. if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn),
  795. &tsc_seq, sizeof(tsc_seq))))
  796. goto out_unlock;
  797. /*
  798. * While we're computing and writing the parameters, force the
  799. * guest to use the time reference count MSR.
  800. */
  801. hv->tsc_ref.tsc_sequence = 0;
  802. if (kvm_write_guest(kvm, gfn_to_gpa(gfn),
  803. &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)))
  804. goto out_unlock;
  805. if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref))
  806. goto out_unlock;
  807. /* Ensure sequence is zero before writing the rest of the struct. */
  808. smp_wmb();
  809. if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref)))
  810. goto out_unlock;
  811. /*
  812. * Now switch to the TSC page mechanism by writing the sequence.
  813. */
  814. tsc_seq++;
  815. if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0)
  816. tsc_seq = 1;
  817. /* Write the struct entirely before the non-zero sequence. */
  818. smp_wmb();
  819. hv->tsc_ref.tsc_sequence = tsc_seq;
  820. kvm_write_guest(kvm, gfn_to_gpa(gfn),
  821. &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence));
  822. out_unlock:
  823. mutex_unlock(&kvm->arch.hyperv.hv_lock);
  824. }
  825. static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
  826. bool host)
  827. {
  828. struct kvm *kvm = vcpu->kvm;
  829. struct kvm_hv *hv = &kvm->arch.hyperv;
  830. switch (msr) {
  831. case HV_X64_MSR_GUEST_OS_ID:
  832. hv->hv_guest_os_id = data;
  833. /* setting guest os id to zero disables hypercall page */
  834. if (!hv->hv_guest_os_id)
  835. hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
  836. break;
  837. case HV_X64_MSR_HYPERCALL: {
  838. u64 gfn;
  839. unsigned long addr;
  840. u8 instructions[4];
  841. /* if guest os id is not set hypercall should remain disabled */
  842. if (!hv->hv_guest_os_id)
  843. break;
  844. if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
  845. hv->hv_hypercall = data;
  846. break;
  847. }
  848. gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
  849. addr = gfn_to_hva(kvm, gfn);
  850. if (kvm_is_error_hva(addr))
  851. return 1;
  852. kvm_x86_ops->patch_hypercall(vcpu, instructions);
  853. ((unsigned char *)instructions)[3] = 0xc3; /* ret */
  854. if (__copy_to_user((void __user *)addr, instructions, 4))
  855. return 1;
  856. hv->hv_hypercall = data;
  857. mark_page_dirty(kvm, gfn);
  858. break;
  859. }
  860. case HV_X64_MSR_REFERENCE_TSC:
  861. hv->hv_tsc_page = data;
  862. if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)
  863. kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
  864. break;
  865. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  866. return kvm_hv_msr_set_crash_data(vcpu,
  867. msr - HV_X64_MSR_CRASH_P0,
  868. data);
  869. case HV_X64_MSR_CRASH_CTL:
  870. return kvm_hv_msr_set_crash_ctl(vcpu, data, host);
  871. case HV_X64_MSR_RESET:
  872. if (data == 1) {
  873. vcpu_debug(vcpu, "hyper-v reset requested\n");
  874. kvm_make_request(KVM_REQ_HV_RESET, vcpu);
  875. }
  876. break;
  877. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  878. hv->hv_reenlightenment_control = data;
  879. break;
  880. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  881. hv->hv_tsc_emulation_control = data;
  882. break;
  883. case HV_X64_MSR_TSC_EMULATION_STATUS:
  884. hv->hv_tsc_emulation_status = data;
  885. break;
  886. case HV_X64_MSR_TIME_REF_COUNT:
  887. /* read-only, but still ignore it if host-initiated */
  888. if (!host)
  889. return 1;
  890. break;
  891. default:
  892. vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
  893. msr, data);
  894. return 1;
  895. }
  896. return 0;
  897. }
  898. /* Calculate cpu time spent by current task in 100ns units */
  899. static u64 current_task_runtime_100ns(void)
  900. {
  901. u64 utime, stime;
  902. task_cputime_adjusted(current, &utime, &stime);
  903. return div_u64(utime + stime, 100);
  904. }
  905. static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
  906. {
  907. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  908. switch (msr) {
  909. case HV_X64_MSR_VP_INDEX: {
  910. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  911. int vcpu_idx = kvm_vcpu_get_idx(vcpu);
  912. u32 new_vp_index = (u32)data;
  913. if (!host || new_vp_index >= KVM_MAX_VCPUS)
  914. return 1;
  915. if (new_vp_index == hv_vcpu->vp_index)
  916. return 0;
  917. /*
  918. * The VP index is initialized to vcpu_index by
  919. * kvm_hv_vcpu_postcreate so they initially match. Now the
  920. * VP index is changing, adjust num_mismatched_vp_indexes if
  921. * it now matches or no longer matches vcpu_idx.
  922. */
  923. if (hv_vcpu->vp_index == vcpu_idx)
  924. atomic_inc(&hv->num_mismatched_vp_indexes);
  925. else if (new_vp_index == vcpu_idx)
  926. atomic_dec(&hv->num_mismatched_vp_indexes);
  927. hv_vcpu->vp_index = new_vp_index;
  928. break;
  929. }
  930. case HV_X64_MSR_VP_ASSIST_PAGE: {
  931. u64 gfn;
  932. unsigned long addr;
  933. if (!(data & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE)) {
  934. hv_vcpu->hv_vapic = data;
  935. if (kvm_lapic_enable_pv_eoi(vcpu, 0, 0))
  936. return 1;
  937. break;
  938. }
  939. gfn = data >> HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT;
  940. addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
  941. if (kvm_is_error_hva(addr))
  942. return 1;
  943. /*
  944. * Clear apic_assist portion of f(struct hv_vp_assist_page
  945. * only, there can be valuable data in the rest which needs
  946. * to be preserved e.g. on migration.
  947. */
  948. if (__clear_user((void __user *)addr, sizeof(u32)))
  949. return 1;
  950. hv_vcpu->hv_vapic = data;
  951. kvm_vcpu_mark_page_dirty(vcpu, gfn);
  952. if (kvm_lapic_enable_pv_eoi(vcpu,
  953. gfn_to_gpa(gfn) | KVM_MSR_ENABLED,
  954. sizeof(struct hv_vp_assist_page)))
  955. return 1;
  956. break;
  957. }
  958. case HV_X64_MSR_EOI:
  959. return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
  960. case HV_X64_MSR_ICR:
  961. return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
  962. case HV_X64_MSR_TPR:
  963. return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
  964. case HV_X64_MSR_VP_RUNTIME:
  965. if (!host)
  966. return 1;
  967. hv_vcpu->runtime_offset = data - current_task_runtime_100ns();
  968. break;
  969. case HV_X64_MSR_SCONTROL:
  970. case HV_X64_MSR_SVERSION:
  971. case HV_X64_MSR_SIEFP:
  972. case HV_X64_MSR_SIMP:
  973. case HV_X64_MSR_EOM:
  974. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  975. return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host);
  976. case HV_X64_MSR_STIMER0_CONFIG:
  977. case HV_X64_MSR_STIMER1_CONFIG:
  978. case HV_X64_MSR_STIMER2_CONFIG:
  979. case HV_X64_MSR_STIMER3_CONFIG: {
  980. int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
  981. return stimer_set_config(vcpu_to_stimer(vcpu, timer_index),
  982. data, host);
  983. }
  984. case HV_X64_MSR_STIMER0_COUNT:
  985. case HV_X64_MSR_STIMER1_COUNT:
  986. case HV_X64_MSR_STIMER2_COUNT:
  987. case HV_X64_MSR_STIMER3_COUNT: {
  988. int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
  989. return stimer_set_count(vcpu_to_stimer(vcpu, timer_index),
  990. data, host);
  991. }
  992. case HV_X64_MSR_TSC_FREQUENCY:
  993. case HV_X64_MSR_APIC_FREQUENCY:
  994. /* read-only, but still ignore it if host-initiated */
  995. if (!host)
  996. return 1;
  997. break;
  998. default:
  999. vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
  1000. msr, data);
  1001. return 1;
  1002. }
  1003. return 0;
  1004. }
  1005. static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  1006. {
  1007. u64 data = 0;
  1008. struct kvm *kvm = vcpu->kvm;
  1009. struct kvm_hv *hv = &kvm->arch.hyperv;
  1010. switch (msr) {
  1011. case HV_X64_MSR_GUEST_OS_ID:
  1012. data = hv->hv_guest_os_id;
  1013. break;
  1014. case HV_X64_MSR_HYPERCALL:
  1015. data = hv->hv_hypercall;
  1016. break;
  1017. case HV_X64_MSR_TIME_REF_COUNT:
  1018. data = get_time_ref_counter(kvm);
  1019. break;
  1020. case HV_X64_MSR_REFERENCE_TSC:
  1021. data = hv->hv_tsc_page;
  1022. break;
  1023. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  1024. return kvm_hv_msr_get_crash_data(vcpu,
  1025. msr - HV_X64_MSR_CRASH_P0,
  1026. pdata);
  1027. case HV_X64_MSR_CRASH_CTL:
  1028. return kvm_hv_msr_get_crash_ctl(vcpu, pdata);
  1029. case HV_X64_MSR_RESET:
  1030. data = 0;
  1031. break;
  1032. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  1033. data = hv->hv_reenlightenment_control;
  1034. break;
  1035. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  1036. data = hv->hv_tsc_emulation_control;
  1037. break;
  1038. case HV_X64_MSR_TSC_EMULATION_STATUS:
  1039. data = hv->hv_tsc_emulation_status;
  1040. break;
  1041. default:
  1042. vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
  1043. return 1;
  1044. }
  1045. *pdata = data;
  1046. return 0;
  1047. }
  1048. static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,
  1049. bool host)
  1050. {
  1051. u64 data = 0;
  1052. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  1053. switch (msr) {
  1054. case HV_X64_MSR_VP_INDEX:
  1055. data = hv_vcpu->vp_index;
  1056. break;
  1057. case HV_X64_MSR_EOI:
  1058. return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
  1059. case HV_X64_MSR_ICR:
  1060. return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
  1061. case HV_X64_MSR_TPR:
  1062. return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
  1063. case HV_X64_MSR_VP_ASSIST_PAGE:
  1064. data = hv_vcpu->hv_vapic;
  1065. break;
  1066. case HV_X64_MSR_VP_RUNTIME:
  1067. data = current_task_runtime_100ns() + hv_vcpu->runtime_offset;
  1068. break;
  1069. case HV_X64_MSR_SCONTROL:
  1070. case HV_X64_MSR_SVERSION:
  1071. case HV_X64_MSR_SIEFP:
  1072. case HV_X64_MSR_SIMP:
  1073. case HV_X64_MSR_EOM:
  1074. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  1075. return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata, host);
  1076. case HV_X64_MSR_STIMER0_CONFIG:
  1077. case HV_X64_MSR_STIMER1_CONFIG:
  1078. case HV_X64_MSR_STIMER2_CONFIG:
  1079. case HV_X64_MSR_STIMER3_CONFIG: {
  1080. int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
  1081. return stimer_get_config(vcpu_to_stimer(vcpu, timer_index),
  1082. pdata);
  1083. }
  1084. case HV_X64_MSR_STIMER0_COUNT:
  1085. case HV_X64_MSR_STIMER1_COUNT:
  1086. case HV_X64_MSR_STIMER2_COUNT:
  1087. case HV_X64_MSR_STIMER3_COUNT: {
  1088. int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
  1089. return stimer_get_count(vcpu_to_stimer(vcpu, timer_index),
  1090. pdata);
  1091. }
  1092. case HV_X64_MSR_TSC_FREQUENCY:
  1093. data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
  1094. break;
  1095. case HV_X64_MSR_APIC_FREQUENCY:
  1096. data = APIC_BUS_FREQUENCY;
  1097. break;
  1098. default:
  1099. vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
  1100. return 1;
  1101. }
  1102. *pdata = data;
  1103. return 0;
  1104. }
  1105. int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
  1106. {
  1107. if (kvm_hv_msr_partition_wide(msr)) {
  1108. int r;
  1109. mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
  1110. r = kvm_hv_set_msr_pw(vcpu, msr, data, host);
  1111. mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
  1112. return r;
  1113. } else
  1114. return kvm_hv_set_msr(vcpu, msr, data, host);
  1115. }
  1116. int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
  1117. {
  1118. if (kvm_hv_msr_partition_wide(msr)) {
  1119. int r;
  1120. mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
  1121. r = kvm_hv_get_msr_pw(vcpu, msr, pdata);
  1122. mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
  1123. return r;
  1124. } else
  1125. return kvm_hv_get_msr(vcpu, msr, pdata, host);
  1126. }
  1127. static __always_inline unsigned long *sparse_set_to_vcpu_mask(
  1128. struct kvm *kvm, u64 *sparse_banks, u64 valid_bank_mask,
  1129. u64 *vp_bitmap, unsigned long *vcpu_bitmap)
  1130. {
  1131. struct kvm_hv *hv = &kvm->arch.hyperv;
  1132. struct kvm_vcpu *vcpu;
  1133. int i, bank, sbank = 0;
  1134. memset(vp_bitmap, 0,
  1135. KVM_HV_MAX_SPARSE_VCPU_SET_BITS * sizeof(*vp_bitmap));
  1136. for_each_set_bit(bank, (unsigned long *)&valid_bank_mask,
  1137. KVM_HV_MAX_SPARSE_VCPU_SET_BITS)
  1138. vp_bitmap[bank] = sparse_banks[sbank++];
  1139. if (likely(!atomic_read(&hv->num_mismatched_vp_indexes))) {
  1140. /* for all vcpus vp_index == vcpu_idx */
  1141. return (unsigned long *)vp_bitmap;
  1142. }
  1143. bitmap_zero(vcpu_bitmap, KVM_MAX_VCPUS);
  1144. kvm_for_each_vcpu(i, vcpu, kvm) {
  1145. if (test_bit(vcpu_to_hv_vcpu(vcpu)->vp_index,
  1146. (unsigned long *)vp_bitmap))
  1147. __set_bit(i, vcpu_bitmap);
  1148. }
  1149. return vcpu_bitmap;
  1150. }
  1151. static u64 kvm_hv_flush_tlb(struct kvm_vcpu *current_vcpu, u64 ingpa,
  1152. u16 rep_cnt, bool ex)
  1153. {
  1154. struct kvm *kvm = current_vcpu->kvm;
  1155. struct kvm_vcpu_hv *hv_vcpu = &current_vcpu->arch.hyperv;
  1156. struct hv_tlb_flush_ex flush_ex;
  1157. struct hv_tlb_flush flush;
  1158. u64 vp_bitmap[KVM_HV_MAX_SPARSE_VCPU_SET_BITS];
  1159. DECLARE_BITMAP(vcpu_bitmap, KVM_MAX_VCPUS);
  1160. unsigned long *vcpu_mask;
  1161. u64 valid_bank_mask;
  1162. u64 sparse_banks[64];
  1163. int sparse_banks_len;
  1164. bool all_cpus;
  1165. if (!ex) {
  1166. if (unlikely(kvm_read_guest(kvm, ingpa, &flush, sizeof(flush))))
  1167. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1168. trace_kvm_hv_flush_tlb(flush.processor_mask,
  1169. flush.address_space, flush.flags);
  1170. valid_bank_mask = BIT_ULL(0);
  1171. sparse_banks[0] = flush.processor_mask;
  1172. all_cpus = flush.flags & HV_FLUSH_ALL_PROCESSORS;
  1173. } else {
  1174. if (unlikely(kvm_read_guest(kvm, ingpa, &flush_ex,
  1175. sizeof(flush_ex))))
  1176. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1177. trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask,
  1178. flush_ex.hv_vp_set.format,
  1179. flush_ex.address_space,
  1180. flush_ex.flags);
  1181. valid_bank_mask = flush_ex.hv_vp_set.valid_bank_mask;
  1182. all_cpus = flush_ex.hv_vp_set.format !=
  1183. HV_GENERIC_SET_SPARSE_4K;
  1184. sparse_banks_len =
  1185. bitmap_weight((unsigned long *)&valid_bank_mask, 64) *
  1186. sizeof(sparse_banks[0]);
  1187. if (!sparse_banks_len && !all_cpus)
  1188. goto ret_success;
  1189. if (!all_cpus &&
  1190. kvm_read_guest(kvm,
  1191. ingpa + offsetof(struct hv_tlb_flush_ex,
  1192. hv_vp_set.bank_contents),
  1193. sparse_banks,
  1194. sparse_banks_len))
  1195. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1196. }
  1197. cpumask_clear(&hv_vcpu->tlb_flush);
  1198. vcpu_mask = all_cpus ? NULL :
  1199. sparse_set_to_vcpu_mask(kvm, sparse_banks, valid_bank_mask,
  1200. vp_bitmap, vcpu_bitmap);
  1201. /*
  1202. * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we can't
  1203. * analyze it here, flush TLB regardless of the specified address space.
  1204. */
  1205. kvm_make_vcpus_request_mask(kvm,
  1206. KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP,
  1207. vcpu_mask, &hv_vcpu->tlb_flush);
  1208. ret_success:
  1209. /* We always do full TLB flush, set rep_done = rep_cnt. */
  1210. return (u64)HV_STATUS_SUCCESS |
  1211. ((u64)rep_cnt << HV_HYPERCALL_REP_COMP_OFFSET);
  1212. }
  1213. static void kvm_send_ipi_to_many(struct kvm *kvm, u32 vector,
  1214. unsigned long *vcpu_bitmap)
  1215. {
  1216. struct kvm_lapic_irq irq = {
  1217. .delivery_mode = APIC_DM_FIXED,
  1218. .vector = vector
  1219. };
  1220. struct kvm_vcpu *vcpu;
  1221. int i;
  1222. kvm_for_each_vcpu(i, vcpu, kvm) {
  1223. if (vcpu_bitmap && !test_bit(i, vcpu_bitmap))
  1224. continue;
  1225. /* We fail only when APIC is disabled */
  1226. kvm_apic_set_irq(vcpu, &irq, NULL);
  1227. }
  1228. }
  1229. static u64 kvm_hv_send_ipi(struct kvm_vcpu *current_vcpu, u64 ingpa, u64 outgpa,
  1230. bool ex, bool fast)
  1231. {
  1232. struct kvm *kvm = current_vcpu->kvm;
  1233. struct hv_send_ipi_ex send_ipi_ex;
  1234. struct hv_send_ipi send_ipi;
  1235. u64 vp_bitmap[KVM_HV_MAX_SPARSE_VCPU_SET_BITS];
  1236. DECLARE_BITMAP(vcpu_bitmap, KVM_MAX_VCPUS);
  1237. unsigned long *vcpu_mask;
  1238. unsigned long valid_bank_mask;
  1239. u64 sparse_banks[64];
  1240. int sparse_banks_len;
  1241. u32 vector;
  1242. bool all_cpus;
  1243. if (!ex) {
  1244. if (!fast) {
  1245. if (unlikely(kvm_read_guest(kvm, ingpa, &send_ipi,
  1246. sizeof(send_ipi))))
  1247. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1248. sparse_banks[0] = send_ipi.cpu_mask;
  1249. vector = send_ipi.vector;
  1250. } else {
  1251. /* 'reserved' part of hv_send_ipi should be 0 */
  1252. if (unlikely(ingpa >> 32 != 0))
  1253. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1254. sparse_banks[0] = outgpa;
  1255. vector = (u32)ingpa;
  1256. }
  1257. all_cpus = false;
  1258. valid_bank_mask = BIT_ULL(0);
  1259. trace_kvm_hv_send_ipi(vector, sparse_banks[0]);
  1260. } else {
  1261. if (unlikely(kvm_read_guest(kvm, ingpa, &send_ipi_ex,
  1262. sizeof(send_ipi_ex))))
  1263. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1264. trace_kvm_hv_send_ipi_ex(send_ipi_ex.vector,
  1265. send_ipi_ex.vp_set.format,
  1266. send_ipi_ex.vp_set.valid_bank_mask);
  1267. vector = send_ipi_ex.vector;
  1268. valid_bank_mask = send_ipi_ex.vp_set.valid_bank_mask;
  1269. sparse_banks_len = bitmap_weight(&valid_bank_mask, 64) *
  1270. sizeof(sparse_banks[0]);
  1271. all_cpus = send_ipi_ex.vp_set.format == HV_GENERIC_SET_ALL;
  1272. if (!sparse_banks_len)
  1273. goto ret_success;
  1274. if (!all_cpus &&
  1275. kvm_read_guest(kvm,
  1276. ingpa + offsetof(struct hv_send_ipi_ex,
  1277. vp_set.bank_contents),
  1278. sparse_banks,
  1279. sparse_banks_len))
  1280. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1281. }
  1282. if ((vector < HV_IPI_LOW_VECTOR) || (vector > HV_IPI_HIGH_VECTOR))
  1283. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1284. vcpu_mask = all_cpus ? NULL :
  1285. sparse_set_to_vcpu_mask(kvm, sparse_banks, valid_bank_mask,
  1286. vp_bitmap, vcpu_bitmap);
  1287. kvm_send_ipi_to_many(kvm, vector, vcpu_mask);
  1288. ret_success:
  1289. return HV_STATUS_SUCCESS;
  1290. }
  1291. bool kvm_hv_hypercall_enabled(struct kvm *kvm)
  1292. {
  1293. return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE;
  1294. }
  1295. static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result)
  1296. {
  1297. bool longmode;
  1298. longmode = is_64_bit_mode(vcpu);
  1299. if (longmode)
  1300. kvm_register_write(vcpu, VCPU_REGS_RAX, result);
  1301. else {
  1302. kvm_register_write(vcpu, VCPU_REGS_RDX, result >> 32);
  1303. kvm_register_write(vcpu, VCPU_REGS_RAX, result & 0xffffffff);
  1304. }
  1305. }
  1306. static int kvm_hv_hypercall_complete(struct kvm_vcpu *vcpu, u64 result)
  1307. {
  1308. kvm_hv_hypercall_set_result(vcpu, result);
  1309. ++vcpu->stat.hypercalls;
  1310. return kvm_skip_emulated_instruction(vcpu);
  1311. }
  1312. static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu)
  1313. {
  1314. return kvm_hv_hypercall_complete(vcpu, vcpu->run->hyperv.u.hcall.result);
  1315. }
  1316. static u16 kvm_hvcall_signal_event(struct kvm_vcpu *vcpu, bool fast, u64 param)
  1317. {
  1318. struct eventfd_ctx *eventfd;
  1319. if (unlikely(!fast)) {
  1320. int ret;
  1321. gpa_t gpa = param;
  1322. if ((gpa & (__alignof__(param) - 1)) ||
  1323. offset_in_page(gpa) + sizeof(param) > PAGE_SIZE)
  1324. return HV_STATUS_INVALID_ALIGNMENT;
  1325. ret = kvm_vcpu_read_guest(vcpu, gpa, &param, sizeof(param));
  1326. if (ret < 0)
  1327. return HV_STATUS_INVALID_ALIGNMENT;
  1328. }
  1329. /*
  1330. * Per spec, bits 32-47 contain the extra "flag number". However, we
  1331. * have no use for it, and in all known usecases it is zero, so just
  1332. * report lookup failure if it isn't.
  1333. */
  1334. if (param & 0xffff00000000ULL)
  1335. return HV_STATUS_INVALID_PORT_ID;
  1336. /* remaining bits are reserved-zero */
  1337. if (param & ~KVM_HYPERV_CONN_ID_MASK)
  1338. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1339. /* the eventfd is protected by vcpu->kvm->srcu, but conn_to_evt isn't */
  1340. rcu_read_lock();
  1341. eventfd = idr_find(&vcpu->kvm->arch.hyperv.conn_to_evt, param);
  1342. rcu_read_unlock();
  1343. if (!eventfd)
  1344. return HV_STATUS_INVALID_PORT_ID;
  1345. eventfd_signal(eventfd, 1);
  1346. return HV_STATUS_SUCCESS;
  1347. }
  1348. int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
  1349. {
  1350. u64 param, ingpa, outgpa, ret = HV_STATUS_SUCCESS;
  1351. uint16_t code, rep_idx, rep_cnt;
  1352. bool fast, longmode, rep;
  1353. /*
  1354. * hypercall generates UD from non zero cpl and real mode
  1355. * per HYPER-V spec
  1356. */
  1357. if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
  1358. kvm_queue_exception(vcpu, UD_VECTOR);
  1359. return 1;
  1360. }
  1361. longmode = is_64_bit_mode(vcpu);
  1362. if (!longmode) {
  1363. param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
  1364. (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
  1365. ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
  1366. (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
  1367. outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
  1368. (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
  1369. }
  1370. #ifdef CONFIG_X86_64
  1371. else {
  1372. param = kvm_register_read(vcpu, VCPU_REGS_RCX);
  1373. ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
  1374. outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
  1375. }
  1376. #endif
  1377. code = param & 0xffff;
  1378. fast = !!(param & HV_HYPERCALL_FAST_BIT);
  1379. rep_cnt = (param >> HV_HYPERCALL_REP_COMP_OFFSET) & 0xfff;
  1380. rep_idx = (param >> HV_HYPERCALL_REP_START_OFFSET) & 0xfff;
  1381. rep = !!(rep_cnt || rep_idx);
  1382. trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
  1383. switch (code) {
  1384. case HVCALL_NOTIFY_LONG_SPIN_WAIT:
  1385. if (unlikely(rep)) {
  1386. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1387. break;
  1388. }
  1389. kvm_vcpu_on_spin(vcpu, true);
  1390. break;
  1391. case HVCALL_SIGNAL_EVENT:
  1392. if (unlikely(rep)) {
  1393. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1394. break;
  1395. }
  1396. ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
  1397. if (ret != HV_STATUS_INVALID_PORT_ID)
  1398. break;
  1399. /* maybe userspace knows this conn_id: fall through */
  1400. case HVCALL_POST_MESSAGE:
  1401. /* don't bother userspace if it has no way to handle it */
  1402. if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) {
  1403. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1404. break;
  1405. }
  1406. vcpu->run->exit_reason = KVM_EXIT_HYPERV;
  1407. vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL;
  1408. vcpu->run->hyperv.u.hcall.input = param;
  1409. vcpu->run->hyperv.u.hcall.params[0] = ingpa;
  1410. vcpu->run->hyperv.u.hcall.params[1] = outgpa;
  1411. vcpu->arch.complete_userspace_io =
  1412. kvm_hv_hypercall_complete_userspace;
  1413. return 0;
  1414. case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST:
  1415. if (unlikely(fast || !rep_cnt || rep_idx)) {
  1416. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1417. break;
  1418. }
  1419. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
  1420. break;
  1421. case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE:
  1422. if (unlikely(fast || rep)) {
  1423. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1424. break;
  1425. }
  1426. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
  1427. break;
  1428. case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX:
  1429. if (unlikely(fast || !rep_cnt || rep_idx)) {
  1430. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1431. break;
  1432. }
  1433. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
  1434. break;
  1435. case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX:
  1436. if (unlikely(fast || rep)) {
  1437. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1438. break;
  1439. }
  1440. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
  1441. break;
  1442. case HVCALL_SEND_IPI:
  1443. if (unlikely(rep)) {
  1444. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1445. break;
  1446. }
  1447. ret = kvm_hv_send_ipi(vcpu, ingpa, outgpa, false, fast);
  1448. break;
  1449. case HVCALL_SEND_IPI_EX:
  1450. if (unlikely(fast || rep)) {
  1451. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1452. break;
  1453. }
  1454. ret = kvm_hv_send_ipi(vcpu, ingpa, outgpa, true, false);
  1455. break;
  1456. default:
  1457. ret = HV_STATUS_INVALID_HYPERCALL_CODE;
  1458. break;
  1459. }
  1460. return kvm_hv_hypercall_complete(vcpu, ret);
  1461. }
  1462. void kvm_hv_init_vm(struct kvm *kvm)
  1463. {
  1464. mutex_init(&kvm->arch.hyperv.hv_lock);
  1465. idr_init(&kvm->arch.hyperv.conn_to_evt);
  1466. }
  1467. void kvm_hv_destroy_vm(struct kvm *kvm)
  1468. {
  1469. struct eventfd_ctx *eventfd;
  1470. int i;
  1471. idr_for_each_entry(&kvm->arch.hyperv.conn_to_evt, eventfd, i)
  1472. eventfd_ctx_put(eventfd);
  1473. idr_destroy(&kvm->arch.hyperv.conn_to_evt);
  1474. }
  1475. static int kvm_hv_eventfd_assign(struct kvm *kvm, u32 conn_id, int fd)
  1476. {
  1477. struct kvm_hv *hv = &kvm->arch.hyperv;
  1478. struct eventfd_ctx *eventfd;
  1479. int ret;
  1480. eventfd = eventfd_ctx_fdget(fd);
  1481. if (IS_ERR(eventfd))
  1482. return PTR_ERR(eventfd);
  1483. mutex_lock(&hv->hv_lock);
  1484. ret = idr_alloc(&hv->conn_to_evt, eventfd, conn_id, conn_id + 1,
  1485. GFP_KERNEL);
  1486. mutex_unlock(&hv->hv_lock);
  1487. if (ret >= 0)
  1488. return 0;
  1489. if (ret == -ENOSPC)
  1490. ret = -EEXIST;
  1491. eventfd_ctx_put(eventfd);
  1492. return ret;
  1493. }
  1494. static int kvm_hv_eventfd_deassign(struct kvm *kvm, u32 conn_id)
  1495. {
  1496. struct kvm_hv *hv = &kvm->arch.hyperv;
  1497. struct eventfd_ctx *eventfd;
  1498. mutex_lock(&hv->hv_lock);
  1499. eventfd = idr_remove(&hv->conn_to_evt, conn_id);
  1500. mutex_unlock(&hv->hv_lock);
  1501. if (!eventfd)
  1502. return -ENOENT;
  1503. synchronize_srcu(&kvm->srcu);
  1504. eventfd_ctx_put(eventfd);
  1505. return 0;
  1506. }
  1507. int kvm_vm_ioctl_hv_eventfd(struct kvm *kvm, struct kvm_hyperv_eventfd *args)
  1508. {
  1509. if ((args->flags & ~KVM_HYPERV_EVENTFD_DEASSIGN) ||
  1510. (args->conn_id & ~KVM_HYPERV_CONN_ID_MASK))
  1511. return -EINVAL;
  1512. if (args->flags == KVM_HYPERV_EVENTFD_DEASSIGN)
  1513. return kvm_hv_eventfd_deassign(kvm, args->conn_id);
  1514. return kvm_hv_eventfd_assign(kvm, args->conn_id, args->fd);
  1515. }