utils.c 48 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  37. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  38. * All rights reserved.
  39. *
  40. * Redistribution and use in source and binary forms, with or without
  41. * modification, are permitted provided that the following conditions
  42. * are met:
  43. *
  44. * * Redistributions of source code must retain the above copyright
  45. * notice, this list of conditions and the following disclaimer.
  46. * * Redistributions in binary form must reproduce the above copyright
  47. * notice, this list of conditions and the following disclaimer in
  48. * the documentation and/or other materials provided with the
  49. * distribution.
  50. * * Neither the name Intel Corporation nor the names of its
  51. * contributors may be used to endorse or promote products derived
  52. * from this software without specific prior written permission.
  53. *
  54. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65. *
  66. *****************************************************************************/
  67. #include <net/mac80211.h>
  68. #include "iwl-debug.h"
  69. #include "iwl-io.h"
  70. #include "iwl-prph.h"
  71. #include "iwl-csr.h"
  72. #include "mvm.h"
  73. #include "fw/api/rs.h"
  74. /*
  75. * Will return 0 even if the cmd failed when RFKILL is asserted unless
  76. * CMD_WANT_SKB is set in cmd->flags.
  77. */
  78. int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  79. {
  80. int ret;
  81. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  82. if (WARN_ON(mvm->d3_test_active))
  83. return -EIO;
  84. #endif
  85. /*
  86. * Synchronous commands from this op-mode must hold
  87. * the mutex, this ensures we don't try to send two
  88. * (or more) synchronous commands at a time.
  89. */
  90. if (!(cmd->flags & CMD_ASYNC)) {
  91. lockdep_assert_held(&mvm->mutex);
  92. if (!(cmd->flags & CMD_SEND_IN_IDLE))
  93. iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
  94. }
  95. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  96. if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
  97. iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
  98. /*
  99. * If the caller wants the SKB, then don't hide any problems, the
  100. * caller might access the response buffer which will be NULL if
  101. * the command failed.
  102. */
  103. if (cmd->flags & CMD_WANT_SKB)
  104. return ret;
  105. /* Silently ignore failures if RFKILL is asserted */
  106. if (!ret || ret == -ERFKILL)
  107. return 0;
  108. return ret;
  109. }
  110. int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
  111. u32 flags, u16 len, const void *data)
  112. {
  113. struct iwl_host_cmd cmd = {
  114. .id = id,
  115. .len = { len, },
  116. .data = { data, },
  117. .flags = flags,
  118. };
  119. return iwl_mvm_send_cmd(mvm, &cmd);
  120. }
  121. /*
  122. * We assume that the caller set the status to the success value
  123. */
  124. int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
  125. u32 *status)
  126. {
  127. struct iwl_rx_packet *pkt;
  128. struct iwl_cmd_response *resp;
  129. int ret, resp_len;
  130. lockdep_assert_held(&mvm->mutex);
  131. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  132. if (WARN_ON(mvm->d3_test_active))
  133. return -EIO;
  134. #endif
  135. /*
  136. * Only synchronous commands can wait for status,
  137. * we use WANT_SKB so the caller can't.
  138. */
  139. if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
  140. "cmd flags %x", cmd->flags))
  141. return -EINVAL;
  142. cmd->flags |= CMD_WANT_SKB;
  143. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  144. if (ret == -ERFKILL) {
  145. /*
  146. * The command failed because of RFKILL, don't update
  147. * the status, leave it as success and return 0.
  148. */
  149. return 0;
  150. } else if (ret) {
  151. return ret;
  152. }
  153. pkt = cmd->resp_pkt;
  154. resp_len = iwl_rx_packet_payload_len(pkt);
  155. if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
  156. ret = -EIO;
  157. goto out_free_resp;
  158. }
  159. resp = (void *)pkt->data;
  160. *status = le32_to_cpu(resp->status);
  161. out_free_resp:
  162. iwl_free_resp(cmd);
  163. return ret;
  164. }
  165. /*
  166. * We assume that the caller set the status to the sucess value
  167. */
  168. int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
  169. const void *data, u32 *status)
  170. {
  171. struct iwl_host_cmd cmd = {
  172. .id = id,
  173. .len = { len, },
  174. .data = { data, },
  175. };
  176. return iwl_mvm_send_cmd_status(mvm, &cmd, status);
  177. }
  178. #define IWL_DECLARE_RATE_INFO(r) \
  179. [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
  180. /*
  181. * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
  182. */
  183. static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
  184. IWL_DECLARE_RATE_INFO(1),
  185. IWL_DECLARE_RATE_INFO(2),
  186. IWL_DECLARE_RATE_INFO(5),
  187. IWL_DECLARE_RATE_INFO(11),
  188. IWL_DECLARE_RATE_INFO(6),
  189. IWL_DECLARE_RATE_INFO(9),
  190. IWL_DECLARE_RATE_INFO(12),
  191. IWL_DECLARE_RATE_INFO(18),
  192. IWL_DECLARE_RATE_INFO(24),
  193. IWL_DECLARE_RATE_INFO(36),
  194. IWL_DECLARE_RATE_INFO(48),
  195. IWL_DECLARE_RATE_INFO(54),
  196. };
  197. int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
  198. enum nl80211_band band)
  199. {
  200. int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
  201. int idx;
  202. int band_offset = 0;
  203. /* Legacy rate format, search for match in table */
  204. if (band == NL80211_BAND_5GHZ)
  205. band_offset = IWL_FIRST_OFDM_RATE;
  206. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  207. if (fw_rate_idx_to_plcp[idx] == rate)
  208. return idx - band_offset;
  209. return -1;
  210. }
  211. u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
  212. {
  213. /* Get PLCP rate for tx_cmd->rate_n_flags */
  214. return fw_rate_idx_to_plcp[rate_idx];
  215. }
  216. void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
  217. {
  218. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  219. struct iwl_error_resp *err_resp = (void *)pkt->data;
  220. IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
  221. le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
  222. IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
  223. le16_to_cpu(err_resp->bad_cmd_seq_num),
  224. le32_to_cpu(err_resp->error_service));
  225. IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
  226. le64_to_cpu(err_resp->timestamp));
  227. }
  228. /*
  229. * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
  230. * The parameter should also be a combination of ANT_[ABC].
  231. */
  232. u8 first_antenna(u8 mask)
  233. {
  234. BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
  235. if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
  236. return BIT(0);
  237. return BIT(ffs(mask) - 1);
  238. }
  239. /*
  240. * Toggles between TX antennas to send the probe request on.
  241. * Receives the bitmask of valid TX antennas and the *index* used
  242. * for the last TX, and returns the next valid *index* to use.
  243. * In order to set it in the tx_cmd, must do BIT(idx).
  244. */
  245. u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
  246. {
  247. u8 ind = last_idx;
  248. int i;
  249. for (i = 0; i < MAX_RS_ANT_NUM; i++) {
  250. ind = (ind + 1) % MAX_RS_ANT_NUM;
  251. if (valid & BIT(ind))
  252. return ind;
  253. }
  254. WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
  255. return last_idx;
  256. }
  257. static const struct {
  258. const char *name;
  259. u8 num;
  260. } advanced_lookup[] = {
  261. { "NMI_INTERRUPT_WDG", 0x34 },
  262. { "SYSASSERT", 0x35 },
  263. { "UCODE_VERSION_MISMATCH", 0x37 },
  264. { "BAD_COMMAND", 0x38 },
  265. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  266. { "FATAL_ERROR", 0x3D },
  267. { "NMI_TRM_HW_ERR", 0x46 },
  268. { "NMI_INTERRUPT_TRM", 0x4C },
  269. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  270. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  271. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  272. { "NMI_INTERRUPT_HOST", 0x66 },
  273. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  274. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  275. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  276. { "ADVANCED_SYSASSERT", 0 },
  277. };
  278. static const char *desc_lookup(u32 num)
  279. {
  280. int i;
  281. for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
  282. if (advanced_lookup[i].num == num)
  283. return advanced_lookup[i].name;
  284. /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
  285. return advanced_lookup[i].name;
  286. }
  287. /*
  288. * Note: This structure is read from the device with IO accesses,
  289. * and the reading already does the endian conversion. As it is
  290. * read with u32-sized accesses, any members with a different size
  291. * need to be ordered correctly though!
  292. */
  293. struct iwl_error_event_table_v1 {
  294. u32 valid; /* (nonzero) valid, (0) log is empty */
  295. u32 error_id; /* type of error */
  296. u32 pc; /* program counter */
  297. u32 blink1; /* branch link */
  298. u32 blink2; /* branch link */
  299. u32 ilink1; /* interrupt link */
  300. u32 ilink2; /* interrupt link */
  301. u32 data1; /* error-specific data */
  302. u32 data2; /* error-specific data */
  303. u32 data3; /* error-specific data */
  304. u32 bcon_time; /* beacon timer */
  305. u32 tsf_low; /* network timestamp function timer */
  306. u32 tsf_hi; /* network timestamp function timer */
  307. u32 gp1; /* GP1 timer register */
  308. u32 gp2; /* GP2 timer register */
  309. u32 gp3; /* GP3 timer register */
  310. u32 ucode_ver; /* uCode version */
  311. u32 hw_ver; /* HW Silicon version */
  312. u32 brd_ver; /* HW board version */
  313. u32 log_pc; /* log program counter */
  314. u32 frame_ptr; /* frame pointer */
  315. u32 stack_ptr; /* stack pointer */
  316. u32 hcmd; /* last host command header */
  317. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  318. * rxtx_flag */
  319. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  320. * host_flag */
  321. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  322. * enc_flag */
  323. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  324. * time_flag */
  325. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  326. * wico interrupt */
  327. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  328. u32 wait_event; /* wait event() caller address */
  329. u32 l2p_control; /* L2pControlField */
  330. u32 l2p_duration; /* L2pDurationField */
  331. u32 l2p_mhvalid; /* L2pMhValidBits */
  332. u32 l2p_addr_match; /* L2pAddrMatchStat */
  333. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  334. * (LMPM_PMG_SEL) */
  335. u32 u_timestamp; /* indicate when the date and time of the
  336. * compilation */
  337. u32 flow_handler; /* FH read/write pointers, RX credit */
  338. } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
  339. struct iwl_error_event_table {
  340. u32 valid; /* (nonzero) valid, (0) log is empty */
  341. u32 error_id; /* type of error */
  342. u32 trm_hw_status0; /* TRM HW status */
  343. u32 trm_hw_status1; /* TRM HW status */
  344. u32 blink2; /* branch link */
  345. u32 ilink1; /* interrupt link */
  346. u32 ilink2; /* interrupt link */
  347. u32 data1; /* error-specific data */
  348. u32 data2; /* error-specific data */
  349. u32 data3; /* error-specific data */
  350. u32 bcon_time; /* beacon timer */
  351. u32 tsf_low; /* network timestamp function timer */
  352. u32 tsf_hi; /* network timestamp function timer */
  353. u32 gp1; /* GP1 timer register */
  354. u32 gp2; /* GP2 timer register */
  355. u32 fw_rev_type; /* firmware revision type */
  356. u32 major; /* uCode version major */
  357. u32 minor; /* uCode version minor */
  358. u32 hw_ver; /* HW Silicon version */
  359. u32 brd_ver; /* HW board version */
  360. u32 log_pc; /* log program counter */
  361. u32 frame_ptr; /* frame pointer */
  362. u32 stack_ptr; /* stack pointer */
  363. u32 hcmd; /* last host command header */
  364. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  365. * rxtx_flag */
  366. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  367. * host_flag */
  368. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  369. * enc_flag */
  370. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  371. * time_flag */
  372. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  373. * wico interrupt */
  374. u32 last_cmd_id; /* last HCMD id handled by the firmware */
  375. u32 wait_event; /* wait event() caller address */
  376. u32 l2p_control; /* L2pControlField */
  377. u32 l2p_duration; /* L2pDurationField */
  378. u32 l2p_mhvalid; /* L2pMhValidBits */
  379. u32 l2p_addr_match; /* L2pAddrMatchStat */
  380. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  381. * (LMPM_PMG_SEL) */
  382. u32 u_timestamp; /* indicate when the date and time of the
  383. * compilation */
  384. u32 flow_handler; /* FH read/write pointers, RX credit */
  385. } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
  386. /*
  387. * UMAC error struct - relevant starting from family 8000 chip.
  388. * Note: This structure is read from the device with IO accesses,
  389. * and the reading already does the endian conversion. As it is
  390. * read with u32-sized accesses, any members with a different size
  391. * need to be ordered correctly though!
  392. */
  393. struct iwl_umac_error_event_table {
  394. u32 valid; /* (nonzero) valid, (0) log is empty */
  395. u32 error_id; /* type of error */
  396. u32 blink1; /* branch link */
  397. u32 blink2; /* branch link */
  398. u32 ilink1; /* interrupt link */
  399. u32 ilink2; /* interrupt link */
  400. u32 data1; /* error-specific data */
  401. u32 data2; /* error-specific data */
  402. u32 data3; /* error-specific data */
  403. u32 umac_major;
  404. u32 umac_minor;
  405. u32 frame_pointer; /* core register 27*/
  406. u32 stack_pointer; /* core register 28 */
  407. u32 cmd_header; /* latest host cmd sent to UMAC */
  408. u32 nic_isr_pref; /* ISR status register */
  409. } __packed;
  410. #define ERROR_START_OFFSET (1 * sizeof(u32))
  411. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  412. static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
  413. {
  414. struct iwl_trans *trans = mvm->trans;
  415. struct iwl_umac_error_event_table table;
  416. if (!mvm->support_umac_log)
  417. return;
  418. iwl_trans_read_mem_bytes(trans, mvm->umac_error_event_table, &table,
  419. sizeof(table));
  420. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  421. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  422. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  423. mvm->status, table.valid);
  424. }
  425. IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
  426. desc_lookup(table.error_id));
  427. IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
  428. IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
  429. IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
  430. IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
  431. IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
  432. IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
  433. IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
  434. IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
  435. IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
  436. IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
  437. IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
  438. IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
  439. IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
  440. }
  441. static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
  442. {
  443. struct iwl_trans *trans = mvm->trans;
  444. struct iwl_error_event_table table;
  445. u32 val;
  446. if (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) {
  447. if (!base)
  448. base = mvm->fw->init_errlog_ptr;
  449. } else {
  450. if (!base)
  451. base = mvm->fw->inst_errlog_ptr;
  452. }
  453. if (base < 0x400000) {
  454. IWL_ERR(mvm,
  455. "Not valid error log pointer 0x%08X for %s uCode\n",
  456. base,
  457. (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT)
  458. ? "Init" : "RT");
  459. return;
  460. }
  461. /* check if there is a HW error */
  462. val = iwl_trans_read_mem32(trans, base);
  463. if (((val & ~0xf) == 0xa5a5a5a0) || ((val & ~0xf) == 0x5a5a5a50)) {
  464. int err;
  465. IWL_ERR(trans, "HW error, resetting before reading\n");
  466. /* reset the device */
  467. iwl_trans_sw_reset(trans);
  468. /* set INIT_DONE flag */
  469. iwl_set_bit(trans, CSR_GP_CNTRL,
  470. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  471. /* and wait for clock stabilization */
  472. if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
  473. udelay(2);
  474. err = iwl_poll_bit(trans, CSR_GP_CNTRL,
  475. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  476. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  477. 25000);
  478. if (err < 0) {
  479. IWL_DEBUG_INFO(trans,
  480. "Failed to reset the card for the dump\n");
  481. return;
  482. }
  483. }
  484. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  485. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  486. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  487. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  488. mvm->status, table.valid);
  489. }
  490. /* Do not change this output - scripts rely on it */
  491. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  492. trace_iwlwifi_dev_ucode_error(trans->dev, &table, table.hw_ver, table.brd_ver);
  493. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  494. desc_lookup(table.error_id));
  495. IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
  496. IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
  497. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  498. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  499. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  500. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  501. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  502. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  503. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  504. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  505. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  506. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  507. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  508. IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
  509. IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
  510. IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
  511. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  512. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  513. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  514. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  515. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  516. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  517. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  518. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  519. IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
  520. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  521. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  522. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  523. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  524. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  525. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  526. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  527. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  528. }
  529. void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
  530. {
  531. if (!test_bit(STATUS_DEVICE_ENABLED, &mvm->trans->status)) {
  532. IWL_ERR(mvm,
  533. "DEVICE_ENABLED bit is not set. Aborting dump.\n");
  534. return;
  535. }
  536. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[0]);
  537. if (mvm->error_event_table[1])
  538. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[1]);
  539. iwl_mvm_dump_umac_error_log(mvm);
  540. }
  541. int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
  542. {
  543. int i;
  544. lockdep_assert_held(&mvm->queue_info_lock);
  545. /* This should not be hit with new TX path */
  546. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  547. return -ENOSPC;
  548. /* Start by looking for a free queue */
  549. for (i = minq; i <= maxq; i++)
  550. if (mvm->queue_info[i].hw_queue_refcount == 0 &&
  551. mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
  552. return i;
  553. /*
  554. * If no free queue found - settle for an inactive one to reconfigure
  555. * Make sure that the inactive queue either already belongs to this STA,
  556. * or that if it belongs to another one - it isn't the reserved queue
  557. */
  558. for (i = minq; i <= maxq; i++)
  559. if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
  560. (sta_id == mvm->queue_info[i].ra_sta_id ||
  561. !mvm->queue_info[i].reserved))
  562. return i;
  563. return -ENOSPC;
  564. }
  565. int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
  566. int tid, int frame_limit, u16 ssn)
  567. {
  568. struct iwl_scd_txq_cfg_cmd cmd = {
  569. .scd_queue = queue,
  570. .action = SCD_CFG_ENABLE_QUEUE,
  571. .window = frame_limit,
  572. .sta_id = sta_id,
  573. .ssn = cpu_to_le16(ssn),
  574. .tx_fifo = fifo,
  575. .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
  576. queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
  577. .tid = tid,
  578. };
  579. int ret;
  580. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  581. return -EINVAL;
  582. spin_lock_bh(&mvm->queue_info_lock);
  583. if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
  584. "Trying to reconfig unallocated queue %d\n", queue)) {
  585. spin_unlock_bh(&mvm->queue_info_lock);
  586. return -ENXIO;
  587. }
  588. spin_unlock_bh(&mvm->queue_info_lock);
  589. IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
  590. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
  591. WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
  592. queue, fifo, ret);
  593. return ret;
  594. }
  595. static bool iwl_mvm_update_txq_mapping(struct iwl_mvm *mvm, int queue,
  596. int mac80211_queue, u8 sta_id, u8 tid)
  597. {
  598. bool enable_queue = true;
  599. spin_lock_bh(&mvm->queue_info_lock);
  600. /* Make sure this TID isn't already enabled */
  601. if (mvm->queue_info[queue].tid_bitmap & BIT(tid)) {
  602. spin_unlock_bh(&mvm->queue_info_lock);
  603. IWL_ERR(mvm, "Trying to enable TXQ %d with existing TID %d\n",
  604. queue, tid);
  605. return false;
  606. }
  607. /* Update mappings and refcounts */
  608. if (mvm->queue_info[queue].hw_queue_refcount > 0)
  609. enable_queue = false;
  610. if (mac80211_queue != IEEE80211_INVAL_HW_QUEUE) {
  611. WARN(mac80211_queue >=
  612. BITS_PER_BYTE * sizeof(mvm->hw_queue_to_mac80211[0]),
  613. "cannot track mac80211 queue %d (queue %d, sta %d, tid %d)\n",
  614. mac80211_queue, queue, sta_id, tid);
  615. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  616. }
  617. mvm->queue_info[queue].hw_queue_refcount++;
  618. mvm->queue_info[queue].tid_bitmap |= BIT(tid);
  619. mvm->queue_info[queue].ra_sta_id = sta_id;
  620. if (enable_queue) {
  621. if (tid != IWL_MAX_TID_COUNT)
  622. mvm->queue_info[queue].mac80211_ac =
  623. tid_to_mac80211_ac[tid];
  624. else
  625. mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
  626. mvm->queue_info[queue].txq_tid = tid;
  627. }
  628. IWL_DEBUG_TX_QUEUES(mvm,
  629. "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  630. queue, mvm->queue_info[queue].hw_queue_refcount,
  631. mvm->hw_queue_to_mac80211[queue]);
  632. spin_unlock_bh(&mvm->queue_info_lock);
  633. return enable_queue;
  634. }
  635. int iwl_mvm_tvqm_enable_txq(struct iwl_mvm *mvm, int mac80211_queue,
  636. u8 sta_id, u8 tid, unsigned int timeout)
  637. {
  638. struct iwl_tx_queue_cfg_cmd cmd = {
  639. .flags = cpu_to_le16(TX_QUEUE_CFG_ENABLE_QUEUE),
  640. .sta_id = sta_id,
  641. .tid = tid,
  642. };
  643. int queue;
  644. if (cmd.tid == IWL_MAX_TID_COUNT)
  645. cmd.tid = IWL_MGMT_TID;
  646. queue = iwl_trans_txq_alloc(mvm->trans, (void *)&cmd,
  647. SCD_QUEUE_CFG, timeout);
  648. if (queue < 0) {
  649. IWL_DEBUG_TX_QUEUES(mvm,
  650. "Failed allocating TXQ for sta %d tid %d, ret: %d\n",
  651. sta_id, tid, queue);
  652. return queue;
  653. }
  654. IWL_DEBUG_TX_QUEUES(mvm, "Enabling TXQ #%d for sta %d tid %d\n",
  655. queue, sta_id, tid);
  656. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  657. IWL_DEBUG_TX_QUEUES(mvm,
  658. "Enabling TXQ #%d (mac80211 map:0x%x)\n",
  659. queue, mvm->hw_queue_to_mac80211[queue]);
  660. return queue;
  661. }
  662. bool iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  663. u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
  664. unsigned int wdg_timeout)
  665. {
  666. struct iwl_scd_txq_cfg_cmd cmd = {
  667. .scd_queue = queue,
  668. .action = SCD_CFG_ENABLE_QUEUE,
  669. .window = cfg->frame_limit,
  670. .sta_id = cfg->sta_id,
  671. .ssn = cpu_to_le16(ssn),
  672. .tx_fifo = cfg->fifo,
  673. .aggregate = cfg->aggregate,
  674. .tid = cfg->tid,
  675. };
  676. bool inc_ssn;
  677. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  678. return false;
  679. /* Send the enabling command if we need to */
  680. if (!iwl_mvm_update_txq_mapping(mvm, queue, mac80211_queue,
  681. cfg->sta_id, cfg->tid))
  682. return false;
  683. inc_ssn = iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn,
  684. NULL, wdg_timeout);
  685. if (inc_ssn)
  686. le16_add_cpu(&cmd.ssn, 1);
  687. WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd),
  688. "Failed to configure queue %d on FIFO %d\n", queue, cfg->fifo);
  689. return inc_ssn;
  690. }
  691. int iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  692. u8 tid, u8 flags)
  693. {
  694. struct iwl_scd_txq_cfg_cmd cmd = {
  695. .scd_queue = queue,
  696. .action = SCD_CFG_DISABLE_QUEUE,
  697. };
  698. bool remove_mac_queue = mac80211_queue != IEEE80211_INVAL_HW_QUEUE;
  699. int ret;
  700. if (WARN_ON(remove_mac_queue && mac80211_queue >= IEEE80211_MAX_QUEUES))
  701. return -EINVAL;
  702. if (iwl_mvm_has_new_tx_api(mvm)) {
  703. spin_lock_bh(&mvm->queue_info_lock);
  704. if (remove_mac_queue)
  705. mvm->hw_queue_to_mac80211[queue] &=
  706. ~BIT(mac80211_queue);
  707. spin_unlock_bh(&mvm->queue_info_lock);
  708. iwl_trans_txq_free(mvm->trans, queue);
  709. return 0;
  710. }
  711. spin_lock_bh(&mvm->queue_info_lock);
  712. if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
  713. spin_unlock_bh(&mvm->queue_info_lock);
  714. return 0;
  715. }
  716. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  717. /*
  718. * If there is another TID with the same AC - don't remove the MAC queue
  719. * from the mapping
  720. */
  721. if (tid < IWL_MAX_TID_COUNT) {
  722. unsigned long tid_bitmap =
  723. mvm->queue_info[queue].tid_bitmap;
  724. int ac = tid_to_mac80211_ac[tid];
  725. int i;
  726. for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
  727. if (tid_to_mac80211_ac[i] == ac)
  728. remove_mac_queue = false;
  729. }
  730. }
  731. if (remove_mac_queue)
  732. mvm->hw_queue_to_mac80211[queue] &=
  733. ~BIT(mac80211_queue);
  734. mvm->queue_info[queue].hw_queue_refcount--;
  735. cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
  736. SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
  737. if (cmd.action == SCD_CFG_DISABLE_QUEUE)
  738. mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
  739. IWL_DEBUG_TX_QUEUES(mvm,
  740. "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  741. queue,
  742. mvm->queue_info[queue].hw_queue_refcount,
  743. mvm->hw_queue_to_mac80211[queue]);
  744. /* If the queue is still enabled - nothing left to do in this func */
  745. if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
  746. spin_unlock_bh(&mvm->queue_info_lock);
  747. return 0;
  748. }
  749. cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
  750. cmd.tid = mvm->queue_info[queue].txq_tid;
  751. /* Make sure queue info is correct even though we overwrite it */
  752. WARN(mvm->queue_info[queue].hw_queue_refcount ||
  753. mvm->queue_info[queue].tid_bitmap ||
  754. mvm->hw_queue_to_mac80211[queue],
  755. "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
  756. queue, mvm->queue_info[queue].hw_queue_refcount,
  757. mvm->hw_queue_to_mac80211[queue],
  758. mvm->queue_info[queue].tid_bitmap);
  759. /* If we are here - the queue is freed and we can zero out these vals */
  760. mvm->queue_info[queue].hw_queue_refcount = 0;
  761. mvm->queue_info[queue].tid_bitmap = 0;
  762. mvm->hw_queue_to_mac80211[queue] = 0;
  763. /* Regardless if this is a reserved TXQ for a STA - mark it as false */
  764. mvm->queue_info[queue].reserved = false;
  765. spin_unlock_bh(&mvm->queue_info_lock);
  766. iwl_trans_txq_disable(mvm->trans, queue, false);
  767. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
  768. sizeof(struct iwl_scd_txq_cfg_cmd), &cmd);
  769. if (ret)
  770. IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
  771. queue, ret);
  772. return ret;
  773. }
  774. /**
  775. * iwl_mvm_send_lq_cmd() - Send link quality command
  776. * @init: This command is sent as part of station initialization right
  777. * after station has been added.
  778. *
  779. * The link quality command is sent as the last step of station creation.
  780. * This is the special case in which init is set and we call a callback in
  781. * this case to clear the state indicating that station creation is in
  782. * progress.
  783. */
  784. int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
  785. {
  786. struct iwl_host_cmd cmd = {
  787. .id = LQ_CMD,
  788. .len = { sizeof(struct iwl_lq_cmd), },
  789. .flags = init ? 0 : CMD_ASYNC,
  790. .data = { lq, },
  791. };
  792. if (WARN_ON(lq->sta_id == IWL_MVM_INVALID_STA ||
  793. iwl_mvm_has_tlc_offload(mvm)))
  794. return -EINVAL;
  795. return iwl_mvm_send_cmd(mvm, &cmd);
  796. }
  797. /**
  798. * iwl_mvm_update_smps - Get a request to change the SMPS mode
  799. * @req_type: The part of the driver who call for a change.
  800. * @smps_requests: The request to change the SMPS mode.
  801. *
  802. * Get a requst to change the SMPS mode,
  803. * and change it according to all other requests in the driver.
  804. */
  805. void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  806. enum iwl_mvm_smps_type_request req_type,
  807. enum ieee80211_smps_mode smps_request)
  808. {
  809. struct iwl_mvm_vif *mvmvif;
  810. enum ieee80211_smps_mode smps_mode;
  811. int i;
  812. lockdep_assert_held(&mvm->mutex);
  813. /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
  814. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  815. return;
  816. if (vif->type == NL80211_IFTYPE_AP)
  817. smps_mode = IEEE80211_SMPS_OFF;
  818. else
  819. smps_mode = IEEE80211_SMPS_AUTOMATIC;
  820. mvmvif = iwl_mvm_vif_from_mac80211(vif);
  821. mvmvif->smps_requests[req_type] = smps_request;
  822. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  823. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
  824. smps_mode = IEEE80211_SMPS_STATIC;
  825. break;
  826. }
  827. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  828. smps_mode = IEEE80211_SMPS_DYNAMIC;
  829. }
  830. ieee80211_request_smps(vif, smps_mode);
  831. }
  832. int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
  833. {
  834. struct iwl_statistics_cmd scmd = {
  835. .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
  836. };
  837. struct iwl_host_cmd cmd = {
  838. .id = STATISTICS_CMD,
  839. .len[0] = sizeof(scmd),
  840. .data[0] = &scmd,
  841. .flags = CMD_WANT_SKB,
  842. };
  843. int ret;
  844. ret = iwl_mvm_send_cmd(mvm, &cmd);
  845. if (ret)
  846. return ret;
  847. iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
  848. iwl_free_resp(&cmd);
  849. if (clear)
  850. iwl_mvm_accu_radio_stats(mvm);
  851. return 0;
  852. }
  853. void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
  854. {
  855. mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
  856. mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
  857. mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
  858. mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
  859. }
  860. static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
  861. struct ieee80211_vif *vif)
  862. {
  863. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  864. bool *result = _data;
  865. int i;
  866. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  867. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
  868. mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  869. *result = false;
  870. }
  871. }
  872. bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
  873. {
  874. bool result = true;
  875. lockdep_assert_held(&mvm->mutex);
  876. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  877. return false;
  878. if (mvm->cfg->rx_with_siso_diversity)
  879. return false;
  880. ieee80211_iterate_active_interfaces_atomic(
  881. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  882. iwl_mvm_diversity_iter, &result);
  883. return result;
  884. }
  885. int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  886. bool low_latency,
  887. enum iwl_mvm_low_latency_cause cause)
  888. {
  889. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  890. int res;
  891. bool prev;
  892. lockdep_assert_held(&mvm->mutex);
  893. prev = iwl_mvm_vif_low_latency(mvmvif);
  894. iwl_mvm_vif_set_low_latency(mvmvif, low_latency, cause);
  895. low_latency = iwl_mvm_vif_low_latency(mvmvif);
  896. if (low_latency == prev)
  897. return 0;
  898. if (fw_has_capa(&mvm->fw->ucode_capa,
  899. IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA)) {
  900. struct iwl_mac_low_latency_cmd cmd = {
  901. .mac_id = cpu_to_le32(mvmvif->id)
  902. };
  903. if (low_latency) {
  904. /* currently we don't care about the direction */
  905. cmd.low_latency_rx = 1;
  906. cmd.low_latency_tx = 1;
  907. }
  908. res = iwl_mvm_send_cmd_pdu(mvm,
  909. iwl_cmd_id(LOW_LATENCY_CMD,
  910. MAC_CONF_GROUP, 0),
  911. 0, sizeof(cmd), &cmd);
  912. if (res)
  913. IWL_ERR(mvm, "Failed to send low latency command\n");
  914. }
  915. res = iwl_mvm_update_quotas(mvm, false, NULL);
  916. if (res)
  917. return res;
  918. iwl_mvm_bt_coex_vif_change(mvm);
  919. return iwl_mvm_power_update_mac(mvm);
  920. }
  921. static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  922. {
  923. bool *result = _data;
  924. if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
  925. *result = true;
  926. }
  927. bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
  928. {
  929. bool result = false;
  930. ieee80211_iterate_active_interfaces_atomic(
  931. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  932. iwl_mvm_ll_iter, &result);
  933. return result;
  934. }
  935. struct iwl_bss_iter_data {
  936. struct ieee80211_vif *vif;
  937. bool error;
  938. };
  939. static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
  940. struct ieee80211_vif *vif)
  941. {
  942. struct iwl_bss_iter_data *data = _data;
  943. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  944. return;
  945. if (data->vif) {
  946. data->error = true;
  947. return;
  948. }
  949. data->vif = vif;
  950. }
  951. struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
  952. {
  953. struct iwl_bss_iter_data bss_iter_data = {};
  954. ieee80211_iterate_active_interfaces_atomic(
  955. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  956. iwl_mvm_bss_iface_iterator, &bss_iter_data);
  957. if (bss_iter_data.error) {
  958. IWL_ERR(mvm, "More than one managed interface active!\n");
  959. return ERR_PTR(-EINVAL);
  960. }
  961. return bss_iter_data.vif;
  962. }
  963. struct iwl_sta_iter_data {
  964. bool assoc;
  965. };
  966. static void iwl_mvm_sta_iface_iterator(void *_data, u8 *mac,
  967. struct ieee80211_vif *vif)
  968. {
  969. struct iwl_sta_iter_data *data = _data;
  970. if (vif->type != NL80211_IFTYPE_STATION)
  971. return;
  972. if (vif->bss_conf.assoc)
  973. data->assoc = true;
  974. }
  975. bool iwl_mvm_is_vif_assoc(struct iwl_mvm *mvm)
  976. {
  977. struct iwl_sta_iter_data data = {
  978. .assoc = false,
  979. };
  980. ieee80211_iterate_active_interfaces_atomic(mvm->hw,
  981. IEEE80211_IFACE_ITER_NORMAL,
  982. iwl_mvm_sta_iface_iterator,
  983. &data);
  984. return data.assoc;
  985. }
  986. unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
  987. struct ieee80211_vif *vif,
  988. bool tdls, bool cmd_q)
  989. {
  990. struct iwl_fw_dbg_trigger_tlv *trigger;
  991. struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
  992. unsigned int default_timeout =
  993. cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
  994. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS)) {
  995. /*
  996. * We can't know when the station is asleep or awake, so we
  997. * must disable the queue hang detection.
  998. */
  999. if (fw_has_capa(&mvm->fw->ucode_capa,
  1000. IWL_UCODE_TLV_CAPA_STA_PM_NOTIF) &&
  1001. vif && vif->type == NL80211_IFTYPE_AP)
  1002. return IWL_WATCHDOG_DISABLED;
  1003. return iwlmvm_mod_params.tfd_q_hang_detect ?
  1004. default_timeout : IWL_WATCHDOG_DISABLED;
  1005. }
  1006. trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
  1007. txq_timer = (void *)trigger->data;
  1008. if (tdls)
  1009. return le32_to_cpu(txq_timer->tdls);
  1010. if (cmd_q)
  1011. return le32_to_cpu(txq_timer->command_queue);
  1012. if (WARN_ON(!vif))
  1013. return default_timeout;
  1014. switch (ieee80211_vif_type_p2p(vif)) {
  1015. case NL80211_IFTYPE_ADHOC:
  1016. return le32_to_cpu(txq_timer->ibss);
  1017. case NL80211_IFTYPE_STATION:
  1018. return le32_to_cpu(txq_timer->bss);
  1019. case NL80211_IFTYPE_AP:
  1020. return le32_to_cpu(txq_timer->softap);
  1021. case NL80211_IFTYPE_P2P_CLIENT:
  1022. return le32_to_cpu(txq_timer->p2p_client);
  1023. case NL80211_IFTYPE_P2P_GO:
  1024. return le32_to_cpu(txq_timer->p2p_go);
  1025. case NL80211_IFTYPE_P2P_DEVICE:
  1026. return le32_to_cpu(txq_timer->p2p_device);
  1027. case NL80211_IFTYPE_MONITOR:
  1028. return default_timeout;
  1029. default:
  1030. WARN_ON(1);
  1031. return mvm->cfg->base_params->wd_timeout;
  1032. }
  1033. }
  1034. void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  1035. const char *errmsg)
  1036. {
  1037. struct iwl_fw_dbg_trigger_tlv *trig;
  1038. struct iwl_fw_dbg_trigger_mlme *trig_mlme;
  1039. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
  1040. goto out;
  1041. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
  1042. trig_mlme = (void *)trig->data;
  1043. if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt,
  1044. ieee80211_vif_to_wdev(vif), trig))
  1045. goto out;
  1046. if (trig_mlme->stop_connection_loss &&
  1047. --trig_mlme->stop_connection_loss)
  1048. goto out;
  1049. iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, "%s", errmsg);
  1050. out:
  1051. ieee80211_connection_loss(vif);
  1052. }
  1053. /*
  1054. * Remove inactive TIDs of a given queue.
  1055. * If all queue TIDs are inactive - mark the queue as inactive
  1056. * If only some the queue TIDs are inactive - unmap them from the queue
  1057. */
  1058. static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
  1059. struct iwl_mvm_sta *mvmsta, int queue,
  1060. unsigned long tid_bitmap)
  1061. {
  1062. int tid;
  1063. lockdep_assert_held(&mvmsta->lock);
  1064. lockdep_assert_held(&mvm->queue_info_lock);
  1065. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  1066. return;
  1067. /* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
  1068. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1069. /* If some TFDs are still queued - don't mark TID as inactive */
  1070. if (iwl_mvm_tid_queued(mvm, &mvmsta->tid_data[tid]))
  1071. tid_bitmap &= ~BIT(tid);
  1072. /* Don't mark as inactive any TID that has an active BA */
  1073. if (mvmsta->tid_data[tid].state != IWL_AGG_OFF)
  1074. tid_bitmap &= ~BIT(tid);
  1075. }
  1076. /* If all TIDs in the queue are inactive - mark queue as inactive. */
  1077. if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
  1078. mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
  1079. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
  1080. mvmsta->tid_data[tid].is_tid_active = false;
  1081. IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
  1082. queue);
  1083. return;
  1084. }
  1085. /*
  1086. * If we are here, this is a shared queue and not all TIDs timed-out.
  1087. * Remove the ones that did.
  1088. */
  1089. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1090. int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
  1091. mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
  1092. mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac_queue);
  1093. mvm->queue_info[queue].hw_queue_refcount--;
  1094. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  1095. mvmsta->tid_data[tid].is_tid_active = false;
  1096. IWL_DEBUG_TX_QUEUES(mvm,
  1097. "Removing inactive TID %d from shared Q:%d\n",
  1098. tid, queue);
  1099. }
  1100. IWL_DEBUG_TX_QUEUES(mvm,
  1101. "TXQ #%d left with tid bitmap 0x%x\n", queue,
  1102. mvm->queue_info[queue].tid_bitmap);
  1103. /*
  1104. * There may be different TIDs with the same mac queues, so make
  1105. * sure all TIDs have existing corresponding mac queues enabled
  1106. */
  1107. tid_bitmap = mvm->queue_info[queue].tid_bitmap;
  1108. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1109. mvm->hw_queue_to_mac80211[queue] |=
  1110. BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
  1111. }
  1112. /* If the queue is marked as shared - "unshare" it */
  1113. if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
  1114. mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
  1115. mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
  1116. IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
  1117. queue);
  1118. }
  1119. }
  1120. void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
  1121. {
  1122. unsigned long timeout_queues_map = 0;
  1123. unsigned long now = jiffies;
  1124. int i;
  1125. if (iwl_mvm_has_new_tx_api(mvm))
  1126. return;
  1127. spin_lock_bh(&mvm->queue_info_lock);
  1128. for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
  1129. if (mvm->queue_info[i].hw_queue_refcount > 0)
  1130. timeout_queues_map |= BIT(i);
  1131. spin_unlock_bh(&mvm->queue_info_lock);
  1132. rcu_read_lock();
  1133. /*
  1134. * If a queue time outs - mark it as INACTIVE (don't remove right away
  1135. * if we don't have to.) This is an optimization in case traffic comes
  1136. * later, and we don't HAVE to use a currently-inactive queue
  1137. */
  1138. for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
  1139. struct ieee80211_sta *sta;
  1140. struct iwl_mvm_sta *mvmsta;
  1141. u8 sta_id;
  1142. int tid;
  1143. unsigned long inactive_tid_bitmap = 0;
  1144. unsigned long queue_tid_bitmap;
  1145. spin_lock_bh(&mvm->queue_info_lock);
  1146. queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
  1147. /* If TXQ isn't in active use anyway - nothing to do here... */
  1148. if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
  1149. mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
  1150. spin_unlock_bh(&mvm->queue_info_lock);
  1151. continue;
  1152. }
  1153. /* Check to see if there are inactive TIDs on this queue */
  1154. for_each_set_bit(tid, &queue_tid_bitmap,
  1155. IWL_MAX_TID_COUNT + 1) {
  1156. if (time_after(mvm->queue_info[i].last_frame_time[tid] +
  1157. IWL_MVM_DQA_QUEUE_TIMEOUT, now))
  1158. continue;
  1159. inactive_tid_bitmap |= BIT(tid);
  1160. }
  1161. spin_unlock_bh(&mvm->queue_info_lock);
  1162. /* If all TIDs are active - finish check on this queue */
  1163. if (!inactive_tid_bitmap)
  1164. continue;
  1165. /*
  1166. * If we are here - the queue hadn't been served recently and is
  1167. * in use
  1168. */
  1169. sta_id = mvm->queue_info[i].ra_sta_id;
  1170. sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
  1171. /*
  1172. * If the STA doesn't exist anymore, it isn't an error. It could
  1173. * be that it was removed since getting the queues, and in this
  1174. * case it should've inactivated its queues anyway.
  1175. */
  1176. if (IS_ERR_OR_NULL(sta))
  1177. continue;
  1178. mvmsta = iwl_mvm_sta_from_mac80211(sta);
  1179. spin_lock_bh(&mvmsta->lock);
  1180. spin_lock(&mvm->queue_info_lock);
  1181. iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
  1182. inactive_tid_bitmap);
  1183. spin_unlock(&mvm->queue_info_lock);
  1184. spin_unlock_bh(&mvmsta->lock);
  1185. }
  1186. rcu_read_unlock();
  1187. }
  1188. void iwl_mvm_event_frame_timeout_callback(struct iwl_mvm *mvm,
  1189. struct ieee80211_vif *vif,
  1190. const struct ieee80211_sta *sta,
  1191. u16 tid)
  1192. {
  1193. struct iwl_fw_dbg_trigger_tlv *trig;
  1194. struct iwl_fw_dbg_trigger_ba *ba_trig;
  1195. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_BA))
  1196. return;
  1197. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_BA);
  1198. ba_trig = (void *)trig->data;
  1199. if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt,
  1200. ieee80211_vif_to_wdev(vif), trig))
  1201. return;
  1202. if (!(le16_to_cpu(ba_trig->frame_timeout) & BIT(tid)))
  1203. return;
  1204. iwl_fw_dbg_collect_trig(&mvm->fwrt, trig,
  1205. "Frame from %pM timed out, tid %d",
  1206. sta->addr, tid);
  1207. }
  1208. u8 iwl_mvm_tcm_load_percentage(u32 airtime, u32 elapsed)
  1209. {
  1210. if (!elapsed)
  1211. return 0;
  1212. return (100 * airtime / elapsed) / USEC_PER_MSEC;
  1213. }
  1214. static enum iwl_mvm_traffic_load
  1215. iwl_mvm_tcm_load(struct iwl_mvm *mvm, u32 airtime, unsigned long elapsed)
  1216. {
  1217. u8 load = iwl_mvm_tcm_load_percentage(airtime, elapsed);
  1218. if (load > IWL_MVM_TCM_LOAD_HIGH_THRESH)
  1219. return IWL_MVM_TRAFFIC_HIGH;
  1220. if (load > IWL_MVM_TCM_LOAD_MEDIUM_THRESH)
  1221. return IWL_MVM_TRAFFIC_MEDIUM;
  1222. return IWL_MVM_TRAFFIC_LOW;
  1223. }
  1224. struct iwl_mvm_tcm_iter_data {
  1225. struct iwl_mvm *mvm;
  1226. bool any_sent;
  1227. };
  1228. static void iwl_mvm_tcm_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  1229. {
  1230. struct iwl_mvm_tcm_iter_data *data = _data;
  1231. struct iwl_mvm *mvm = data->mvm;
  1232. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  1233. bool low_latency, prev = mvmvif->low_latency & LOW_LATENCY_TRAFFIC;
  1234. if (mvmvif->id >= NUM_MAC_INDEX_DRIVER)
  1235. return;
  1236. low_latency = mvm->tcm.result.low_latency[mvmvif->id];
  1237. if (!mvm->tcm.result.change[mvmvif->id] &&
  1238. prev == low_latency) {
  1239. iwl_mvm_update_quotas(mvm, false, NULL);
  1240. return;
  1241. }
  1242. if (prev != low_latency) {
  1243. /* this sends traffic load and updates quota as well */
  1244. iwl_mvm_update_low_latency(mvm, vif, low_latency,
  1245. LOW_LATENCY_TRAFFIC);
  1246. } else {
  1247. iwl_mvm_update_quotas(mvm, false, NULL);
  1248. }
  1249. data->any_sent = true;
  1250. }
  1251. static void iwl_mvm_tcm_results(struct iwl_mvm *mvm)
  1252. {
  1253. struct iwl_mvm_tcm_iter_data data = {
  1254. .mvm = mvm,
  1255. .any_sent = false,
  1256. };
  1257. mutex_lock(&mvm->mutex);
  1258. ieee80211_iterate_active_interfaces(
  1259. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  1260. iwl_mvm_tcm_iter, &data);
  1261. if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN))
  1262. iwl_mvm_config_scan(mvm);
  1263. mutex_unlock(&mvm->mutex);
  1264. }
  1265. static unsigned long iwl_mvm_calc_tcm_stats(struct iwl_mvm *mvm,
  1266. unsigned long ts,
  1267. bool handle_uapsd)
  1268. {
  1269. unsigned int elapsed = jiffies_to_msecs(ts - mvm->tcm.ts);
  1270. u32 total_airtime = 0;
  1271. int ac, mac;
  1272. bool low_latency = false;
  1273. enum iwl_mvm_traffic_load load;
  1274. bool handle_ll = time_after(ts, mvm->tcm.ll_ts + MVM_LL_PERIOD);
  1275. if (handle_ll)
  1276. mvm->tcm.ll_ts = ts;
  1277. if (handle_uapsd)
  1278. mvm->tcm.uapsd_nonagg_ts = ts;
  1279. mvm->tcm.result.elapsed = elapsed;
  1280. for (mac = 0; mac < NUM_MAC_INDEX_DRIVER; mac++) {
  1281. struct iwl_mvm_tcm_mac *mdata = &mvm->tcm.data[mac];
  1282. u32 vo_vi_pkts = 0;
  1283. u32 airtime = mdata->rx.airtime + mdata->tx.airtime;
  1284. total_airtime += airtime;
  1285. load = iwl_mvm_tcm_load(mvm, airtime, elapsed);
  1286. mvm->tcm.result.change[mac] = load != mvm->tcm.result.load[mac];
  1287. mvm->tcm.result.load[mac] = load;
  1288. mvm->tcm.result.airtime[mac] = airtime;
  1289. for (ac = IEEE80211_AC_VO; ac <= IEEE80211_AC_VI; ac++)
  1290. vo_vi_pkts += mdata->rx.pkts[ac] +
  1291. mdata->tx.pkts[ac];
  1292. /* enable immediately with enough packets but defer disabling */
  1293. if (vo_vi_pkts > IWL_MVM_TCM_LOWLAT_ENABLE_THRESH)
  1294. mvm->tcm.result.low_latency[mac] = true;
  1295. else if (handle_ll)
  1296. mvm->tcm.result.low_latency[mac] = false;
  1297. if (handle_ll) {
  1298. /* clear old data */
  1299. memset(&mdata->rx.pkts, 0, sizeof(mdata->rx.pkts));
  1300. memset(&mdata->tx.pkts, 0, sizeof(mdata->tx.pkts));
  1301. }
  1302. low_latency |= mvm->tcm.result.low_latency[mac];
  1303. memset(&mdata->rx.airtime, 0, sizeof(mdata->rx.airtime));
  1304. memset(&mdata->tx.airtime, 0, sizeof(mdata->tx.airtime));
  1305. }
  1306. load = iwl_mvm_tcm_load(mvm, total_airtime, elapsed);
  1307. mvm->tcm.result.global_change = load != mvm->tcm.result.global_load;
  1308. mvm->tcm.result.global_load = load;
  1309. /*
  1310. * If the current load isn't low we need to force re-evaluation
  1311. * in the TCM period, so that we can return to low load if there
  1312. * was no traffic at all (and thus iwl_mvm_recalc_tcm didn't get
  1313. * triggered by traffic).
  1314. */
  1315. if (load != IWL_MVM_TRAFFIC_LOW)
  1316. return MVM_TCM_PERIOD;
  1317. /*
  1318. * If low-latency is active we need to force re-evaluation after
  1319. * (the longer) MVM_LL_PERIOD, so that we can disable low-latency
  1320. * when there's no traffic at all.
  1321. */
  1322. if (low_latency)
  1323. return MVM_LL_PERIOD;
  1324. /*
  1325. * Otherwise, we don't need to run the work struct because we're
  1326. * in the default "idle" state - traffic indication is low (which
  1327. * also covers the "no traffic" case) and low-latency is disabled
  1328. * so there's no state that may need to be disabled when there's
  1329. * no traffic at all.
  1330. *
  1331. * Note that this has no impact on the regular scheduling of the
  1332. * updates triggered by traffic - those happen whenever one of the
  1333. * two timeouts expire (if there's traffic at all.)
  1334. */
  1335. return 0;
  1336. }
  1337. void iwl_mvm_recalc_tcm(struct iwl_mvm *mvm)
  1338. {
  1339. unsigned long ts = jiffies;
  1340. bool handle_uapsd =
  1341. false;
  1342. spin_lock(&mvm->tcm.lock);
  1343. if (mvm->tcm.paused || !time_after(ts, mvm->tcm.ts + MVM_TCM_PERIOD)) {
  1344. spin_unlock(&mvm->tcm.lock);
  1345. return;
  1346. }
  1347. spin_unlock(&mvm->tcm.lock);
  1348. spin_lock(&mvm->tcm.lock);
  1349. /* re-check if somebody else won the recheck race */
  1350. if (!mvm->tcm.paused && time_after(ts, mvm->tcm.ts + MVM_TCM_PERIOD)) {
  1351. /* calculate statistics */
  1352. unsigned long work_delay = iwl_mvm_calc_tcm_stats(mvm, ts,
  1353. handle_uapsd);
  1354. /* the memset needs to be visible before the timestamp */
  1355. smp_mb();
  1356. mvm->tcm.ts = ts;
  1357. if (work_delay)
  1358. schedule_delayed_work(&mvm->tcm.work, work_delay);
  1359. }
  1360. spin_unlock(&mvm->tcm.lock);
  1361. iwl_mvm_tcm_results(mvm);
  1362. }
  1363. void iwl_mvm_tcm_work(struct work_struct *work)
  1364. {
  1365. struct delayed_work *delayed_work = to_delayed_work(work);
  1366. struct iwl_mvm *mvm = container_of(delayed_work, struct iwl_mvm,
  1367. tcm.work);
  1368. iwl_mvm_recalc_tcm(mvm);
  1369. }
  1370. void iwl_mvm_pause_tcm(struct iwl_mvm *mvm, bool with_cancel)
  1371. {
  1372. spin_lock_bh(&mvm->tcm.lock);
  1373. mvm->tcm.paused = true;
  1374. spin_unlock_bh(&mvm->tcm.lock);
  1375. if (with_cancel)
  1376. cancel_delayed_work_sync(&mvm->tcm.work);
  1377. }
  1378. void iwl_mvm_resume_tcm(struct iwl_mvm *mvm)
  1379. {
  1380. int mac;
  1381. spin_lock_bh(&mvm->tcm.lock);
  1382. mvm->tcm.ts = jiffies;
  1383. mvm->tcm.ll_ts = jiffies;
  1384. for (mac = 0; mac < NUM_MAC_INDEX_DRIVER; mac++) {
  1385. struct iwl_mvm_tcm_mac *mdata = &mvm->tcm.data[mac];
  1386. memset(&mdata->rx.pkts, 0, sizeof(mdata->rx.pkts));
  1387. memset(&mdata->tx.pkts, 0, sizeof(mdata->tx.pkts));
  1388. memset(&mdata->rx.airtime, 0, sizeof(mdata->rx.airtime));
  1389. memset(&mdata->tx.airtime, 0, sizeof(mdata->tx.airtime));
  1390. }
  1391. /* The TCM data needs to be reset before "paused" flag changes */
  1392. smp_mb();
  1393. mvm->tcm.paused = false;
  1394. spin_unlock_bh(&mvm->tcm.lock);
  1395. }
  1396. void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
  1397. {
  1398. bool ps_disabled;
  1399. lockdep_assert_held(&mvm->mutex);
  1400. /* Disable power save when reading GP2 */
  1401. ps_disabled = mvm->ps_disabled;
  1402. if (!ps_disabled) {
  1403. mvm->ps_disabled = true;
  1404. iwl_mvm_power_update_device(mvm);
  1405. }
  1406. *gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
  1407. *boottime = ktime_get_boot_ns();
  1408. if (!ps_disabled) {
  1409. mvm->ps_disabled = ps_disabled;
  1410. iwl_mvm_power_update_device(mvm);
  1411. }
  1412. }