intel_dp_mst.c 19 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config,
  33. struct drm_connector_state *conn_state)
  34. {
  35. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  36. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  37. struct intel_dp *intel_dp = &intel_dig_port->dp;
  38. struct intel_connector *connector =
  39. to_intel_connector(conn_state->connector);
  40. struct drm_atomic_state *state = pipe_config->base.state;
  41. int bpp;
  42. int lane_count, slots;
  43. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  44. int mst_pbn;
  45. bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc,
  46. DP_DPCD_QUIRK_LIMITED_M_N);
  47. pipe_config->has_pch_encoder = false;
  48. bpp = 24;
  49. if (intel_dp->compliance.test_data.bpc) {
  50. bpp = intel_dp->compliance.test_data.bpc * 3;
  51. DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
  52. bpp);
  53. }
  54. /*
  55. * for MST we always configure max link bw - the spec doesn't
  56. * seem to suggest we should do otherwise.
  57. */
  58. lane_count = intel_dp_max_lane_count(intel_dp);
  59. pipe_config->lane_count = lane_count;
  60. pipe_config->pipe_bpp = bpp;
  61. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  62. if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, connector->port))
  63. pipe_config->has_audio = true;
  64. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  65. pipe_config->pbn = mst_pbn;
  66. slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
  67. connector->port, mst_pbn);
  68. if (slots < 0) {
  69. DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
  70. return false;
  71. }
  72. intel_link_compute_m_n(bpp, lane_count,
  73. adjusted_mode->crtc_clock,
  74. pipe_config->port_clock,
  75. &pipe_config->dp_m_n,
  76. reduce_m_n);
  77. pipe_config->dp_m_n.tu = slots;
  78. return true;
  79. }
  80. static int intel_dp_mst_atomic_check(struct drm_connector *connector,
  81. struct drm_connector_state *new_conn_state)
  82. {
  83. struct drm_atomic_state *state = new_conn_state->state;
  84. struct drm_connector_state *old_conn_state;
  85. struct drm_crtc *old_crtc;
  86. struct drm_crtc_state *crtc_state;
  87. int slots, ret = 0;
  88. old_conn_state = drm_atomic_get_old_connector_state(state, connector);
  89. old_crtc = old_conn_state->crtc;
  90. if (!old_crtc)
  91. return ret;
  92. crtc_state = drm_atomic_get_new_crtc_state(state, old_crtc);
  93. slots = to_intel_crtc_state(crtc_state)->dp_m_n.tu;
  94. if (drm_atomic_crtc_needs_modeset(crtc_state) && slots > 0) {
  95. struct drm_dp_mst_topology_mgr *mgr;
  96. struct drm_encoder *old_encoder;
  97. old_encoder = old_conn_state->best_encoder;
  98. mgr = &enc_to_mst(old_encoder)->primary->dp.mst_mgr;
  99. ret = drm_dp_atomic_release_vcpi_slots(state, mgr, slots);
  100. if (ret)
  101. DRM_DEBUG_KMS("failed releasing %d vcpi slots:%d\n", slots, ret);
  102. else
  103. to_intel_crtc_state(crtc_state)->dp_m_n.tu = 0;
  104. }
  105. return ret;
  106. }
  107. static void intel_mst_disable_dp(struct intel_encoder *encoder,
  108. struct intel_crtc_state *old_crtc_state,
  109. struct drm_connector_state *old_conn_state)
  110. {
  111. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  112. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  113. struct intel_dp *intel_dp = &intel_dig_port->dp;
  114. struct intel_connector *connector =
  115. to_intel_connector(old_conn_state->connector);
  116. int ret;
  117. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  118. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
  119. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  120. if (ret) {
  121. DRM_ERROR("failed to update payload %d\n", ret);
  122. }
  123. if (old_crtc_state->has_audio)
  124. intel_audio_codec_disable(encoder);
  125. }
  126. static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
  127. struct intel_crtc_state *old_crtc_state,
  128. struct drm_connector_state *old_conn_state)
  129. {
  130. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  131. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  132. struct intel_dp *intel_dp = &intel_dig_port->dp;
  133. struct intel_connector *connector =
  134. to_intel_connector(old_conn_state->connector);
  135. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  136. /* this can fail */
  137. drm_dp_check_act_status(&intel_dp->mst_mgr);
  138. /* and this can also fail */
  139. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  140. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
  141. intel_dp->active_mst_links--;
  142. intel_mst->connector = NULL;
  143. if (intel_dp->active_mst_links == 0) {
  144. intel_dig_port->base.post_disable(&intel_dig_port->base,
  145. NULL, NULL);
  146. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  147. }
  148. }
  149. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
  150. struct intel_crtc_state *pipe_config,
  151. struct drm_connector_state *conn_state)
  152. {
  153. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  154. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  155. struct intel_dp *intel_dp = &intel_dig_port->dp;
  156. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  157. enum port port = intel_dig_port->port;
  158. struct intel_connector *connector =
  159. to_intel_connector(conn_state->connector);
  160. int ret;
  161. uint32_t temp;
  162. /* MST encoders are bound to a crtc, not to a connector,
  163. * force the mapping here for get_hw_state.
  164. */
  165. connector->encoder = encoder;
  166. intel_mst->connector = connector;
  167. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  168. if (intel_dp->active_mst_links == 0)
  169. intel_dig_port->base.pre_enable(&intel_dig_port->base,
  170. pipe_config, NULL);
  171. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  172. connector->port,
  173. pipe_config->pbn,
  174. pipe_config->dp_m_n.tu);
  175. if (ret == false) {
  176. DRM_ERROR("failed to allocate vcpi\n");
  177. return;
  178. }
  179. intel_dp->active_mst_links++;
  180. temp = I915_READ(DP_TP_STATUS(port));
  181. I915_WRITE(DP_TP_STATUS(port), temp);
  182. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  183. }
  184. static void intel_mst_enable_dp(struct intel_encoder *encoder,
  185. struct intel_crtc_state *pipe_config,
  186. struct drm_connector_state *conn_state)
  187. {
  188. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  189. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  190. struct intel_dp *intel_dp = &intel_dig_port->dp;
  191. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  192. enum port port = intel_dig_port->port;
  193. int ret;
  194. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  195. if (intel_wait_for_register(dev_priv,
  196. DP_TP_STATUS(port),
  197. DP_TP_STATUS_ACT_SENT,
  198. DP_TP_STATUS_ACT_SENT,
  199. 1))
  200. DRM_ERROR("Timed out waiting for ACT sent\n");
  201. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  202. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  203. if (pipe_config->has_audio)
  204. intel_audio_codec_enable(encoder, pipe_config, conn_state);
  205. }
  206. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  207. enum pipe *pipe)
  208. {
  209. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  210. *pipe = intel_mst->pipe;
  211. if (intel_mst->connector)
  212. return true;
  213. return false;
  214. }
  215. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  216. struct intel_crtc_state *pipe_config)
  217. {
  218. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  219. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  220. struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
  221. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  222. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  223. u32 temp, flags = 0;
  224. pipe_config->has_audio =
  225. intel_ddi_is_audio_enabled(dev_priv, crtc);
  226. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  227. if (temp & TRANS_DDI_PHSYNC)
  228. flags |= DRM_MODE_FLAG_PHSYNC;
  229. else
  230. flags |= DRM_MODE_FLAG_NHSYNC;
  231. if (temp & TRANS_DDI_PVSYNC)
  232. flags |= DRM_MODE_FLAG_PVSYNC;
  233. else
  234. flags |= DRM_MODE_FLAG_NVSYNC;
  235. switch (temp & TRANS_DDI_BPC_MASK) {
  236. case TRANS_DDI_BPC_6:
  237. pipe_config->pipe_bpp = 18;
  238. break;
  239. case TRANS_DDI_BPC_8:
  240. pipe_config->pipe_bpp = 24;
  241. break;
  242. case TRANS_DDI_BPC_10:
  243. pipe_config->pipe_bpp = 30;
  244. break;
  245. case TRANS_DDI_BPC_12:
  246. pipe_config->pipe_bpp = 36;
  247. break;
  248. default:
  249. break;
  250. }
  251. pipe_config->base.adjusted_mode.flags |= flags;
  252. pipe_config->lane_count =
  253. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  254. intel_dp_get_m_n(crtc, pipe_config);
  255. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  256. }
  257. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  258. {
  259. struct intel_connector *intel_connector = to_intel_connector(connector);
  260. struct intel_dp *intel_dp = intel_connector->mst_port;
  261. struct edid *edid;
  262. int ret;
  263. if (!intel_dp) {
  264. return intel_connector_update_modes(connector, NULL);
  265. }
  266. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  267. ret = intel_connector_update_modes(connector, edid);
  268. kfree(edid);
  269. return ret;
  270. }
  271. static enum drm_connector_status
  272. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  273. {
  274. struct intel_connector *intel_connector = to_intel_connector(connector);
  275. struct intel_dp *intel_dp = intel_connector->mst_port;
  276. if (!intel_dp)
  277. return connector_status_disconnected;
  278. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  279. }
  280. static void
  281. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  282. {
  283. struct intel_connector *intel_connector = to_intel_connector(connector);
  284. if (!IS_ERR_OR_NULL(intel_connector->edid))
  285. kfree(intel_connector->edid);
  286. drm_connector_cleanup(connector);
  287. kfree(connector);
  288. }
  289. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  290. .detect = intel_dp_mst_detect,
  291. .fill_modes = drm_helper_probe_single_connector_modes,
  292. .late_register = intel_connector_register,
  293. .early_unregister = intel_connector_unregister,
  294. .destroy = intel_dp_mst_connector_destroy,
  295. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  296. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  297. };
  298. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  299. {
  300. return intel_dp_mst_get_ddc_modes(connector);
  301. }
  302. static enum drm_mode_status
  303. intel_dp_mst_mode_valid(struct drm_connector *connector,
  304. struct drm_display_mode *mode)
  305. {
  306. struct intel_connector *intel_connector = to_intel_connector(connector);
  307. struct intel_dp *intel_dp = intel_connector->mst_port;
  308. int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
  309. int bpp = 24; /* MST uses fixed bpp */
  310. int max_rate, mode_rate, max_lanes, max_link_clock;
  311. max_link_clock = intel_dp_max_link_rate(intel_dp);
  312. max_lanes = intel_dp_max_lane_count(intel_dp);
  313. max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
  314. mode_rate = intel_dp_link_required(mode->clock, bpp);
  315. /* TODO - validate mode against available PBN for link */
  316. if (mode->clock < 10000)
  317. return MODE_CLOCK_LOW;
  318. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  319. return MODE_H_ILLEGAL;
  320. if (mode_rate > max_rate || mode->clock > max_dotclk)
  321. return MODE_CLOCK_HIGH;
  322. return MODE_OK;
  323. }
  324. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  325. struct drm_connector_state *state)
  326. {
  327. struct intel_connector *intel_connector = to_intel_connector(connector);
  328. struct intel_dp *intel_dp = intel_connector->mst_port;
  329. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  330. if (!intel_dp)
  331. return NULL;
  332. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  333. }
  334. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  335. {
  336. struct intel_connector *intel_connector = to_intel_connector(connector);
  337. struct intel_dp *intel_dp = intel_connector->mst_port;
  338. if (!intel_dp)
  339. return NULL;
  340. return &intel_dp->mst_encoders[0]->base.base;
  341. }
  342. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  343. .get_modes = intel_dp_mst_get_modes,
  344. .mode_valid = intel_dp_mst_mode_valid,
  345. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  346. .best_encoder = intel_mst_best_encoder,
  347. .atomic_check = intel_dp_mst_atomic_check,
  348. };
  349. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  350. {
  351. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  352. drm_encoder_cleanup(encoder);
  353. kfree(intel_mst);
  354. }
  355. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  356. .destroy = intel_dp_mst_encoder_destroy,
  357. };
  358. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  359. {
  360. if (connector->encoder && connector->base.state->crtc) {
  361. enum pipe pipe;
  362. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  363. return false;
  364. return true;
  365. }
  366. return false;
  367. }
  368. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  369. {
  370. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  371. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  372. struct drm_device *dev = intel_dig_port->base.base.dev;
  373. struct intel_connector *intel_connector;
  374. struct drm_connector *connector;
  375. int i;
  376. intel_connector = intel_connector_alloc();
  377. if (!intel_connector)
  378. return NULL;
  379. connector = &intel_connector->base;
  380. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  381. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  382. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  383. intel_connector->mst_port = intel_dp;
  384. intel_connector->port = port;
  385. for (i = PIPE_A; i <= PIPE_C; i++) {
  386. drm_mode_connector_attach_encoder(&intel_connector->base,
  387. &intel_dp->mst_encoders[i]->base.base);
  388. }
  389. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  390. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  391. drm_mode_connector_set_path_property(connector, pathprop);
  392. return connector;
  393. }
  394. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  395. {
  396. struct drm_i915_private *dev_priv = to_i915(connector->dev);
  397. if (dev_priv->fbdev)
  398. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
  399. connector);
  400. drm_connector_register(connector);
  401. }
  402. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  403. struct drm_connector *connector)
  404. {
  405. struct intel_connector *intel_connector = to_intel_connector(connector);
  406. struct drm_i915_private *dev_priv = to_i915(connector->dev);
  407. drm_connector_unregister(connector);
  408. if (dev_priv->fbdev)
  409. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
  410. connector);
  411. /* prevent race with the check in ->detect */
  412. drm_modeset_lock(&connector->dev->mode_config.connection_mutex, NULL);
  413. intel_connector->mst_port = NULL;
  414. drm_modeset_unlock(&connector->dev->mode_config.connection_mutex);
  415. drm_connector_unreference(connector);
  416. DRM_DEBUG_KMS("\n");
  417. }
  418. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  419. {
  420. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  421. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  422. struct drm_device *dev = intel_dig_port->base.base.dev;
  423. drm_kms_helper_hotplug_event(dev);
  424. }
  425. static const struct drm_dp_mst_topology_cbs mst_cbs = {
  426. .add_connector = intel_dp_add_mst_connector,
  427. .register_connector = intel_dp_register_mst_connector,
  428. .destroy_connector = intel_dp_destroy_mst_connector,
  429. .hotplug = intel_dp_mst_hotplug,
  430. };
  431. static struct intel_dp_mst_encoder *
  432. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  433. {
  434. struct intel_dp_mst_encoder *intel_mst;
  435. struct intel_encoder *intel_encoder;
  436. struct drm_device *dev = intel_dig_port->base.base.dev;
  437. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  438. if (!intel_mst)
  439. return NULL;
  440. intel_mst->pipe = pipe;
  441. intel_encoder = &intel_mst->base;
  442. intel_mst->primary = intel_dig_port;
  443. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  444. DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
  445. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  446. intel_encoder->power_domain = intel_dig_port->base.power_domain;
  447. intel_encoder->port = intel_dig_port->port;
  448. intel_encoder->crtc_mask = 0x7;
  449. intel_encoder->cloneable = 0;
  450. intel_encoder->compute_config = intel_dp_mst_compute_config;
  451. intel_encoder->disable = intel_mst_disable_dp;
  452. intel_encoder->post_disable = intel_mst_post_disable_dp;
  453. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  454. intel_encoder->enable = intel_mst_enable_dp;
  455. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  456. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  457. return intel_mst;
  458. }
  459. static bool
  460. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  461. {
  462. int i;
  463. struct intel_dp *intel_dp = &intel_dig_port->dp;
  464. for (i = PIPE_A; i <= PIPE_C; i++)
  465. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  466. return true;
  467. }
  468. int
  469. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  470. {
  471. struct intel_dp *intel_dp = &intel_dig_port->dp;
  472. struct drm_device *dev = intel_dig_port->base.base.dev;
  473. int ret;
  474. intel_dp->can_mst = true;
  475. intel_dp->mst_mgr.cbs = &mst_cbs;
  476. /* create encoders */
  477. intel_dp_create_fake_mst_encoders(intel_dig_port);
  478. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev,
  479. &intel_dp->aux, 16, 3, conn_base_id);
  480. if (ret) {
  481. intel_dp->can_mst = false;
  482. return ret;
  483. }
  484. return 0;
  485. }
  486. void
  487. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  488. {
  489. struct intel_dp *intel_dp = &intel_dig_port->dp;
  490. if (!intel_dp->can_mst)
  491. return;
  492. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  493. /* encoders will get killed by normal cleanup */
  494. }