mtd_dataflash.c 24 KB

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  1. /*
  2. * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
  3. *
  4. * Largely derived from at91_dataflash.c:
  5. * Copyright (C) 2003-2005 SAN People (Pty) Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/device.h>
  17. #include <linux/mutex.h>
  18. #include <linux/err.h>
  19. #include <linux/math64.h>
  20. #include <linux/of.h>
  21. #include <linux/of_device.h>
  22. #include <linux/spi/spi.h>
  23. #include <linux/spi/flash.h>
  24. #include <linux/mtd/mtd.h>
  25. #include <linux/mtd/partitions.h>
  26. /*
  27. * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
  28. * each chip, which may be used for double buffered I/O; but this driver
  29. * doesn't (yet) use these for any kind of i/o overlap or prefetching.
  30. *
  31. * Sometimes DataFlash is packaged in MMC-format cards, although the
  32. * MMC stack can't (yet?) distinguish between MMC and DataFlash
  33. * protocols during enumeration.
  34. */
  35. /* reads can bypass the buffers */
  36. #define OP_READ_CONTINUOUS 0xE8
  37. #define OP_READ_PAGE 0xD2
  38. /* group B requests can run even while status reports "busy" */
  39. #define OP_READ_STATUS 0xD7 /* group B */
  40. /* move data between host and buffer */
  41. #define OP_READ_BUFFER1 0xD4 /* group B */
  42. #define OP_READ_BUFFER2 0xD6 /* group B */
  43. #define OP_WRITE_BUFFER1 0x84 /* group B */
  44. #define OP_WRITE_BUFFER2 0x87 /* group B */
  45. /* erasing flash */
  46. #define OP_ERASE_PAGE 0x81
  47. #define OP_ERASE_BLOCK 0x50
  48. /* move data between buffer and flash */
  49. #define OP_TRANSFER_BUF1 0x53
  50. #define OP_TRANSFER_BUF2 0x55
  51. #define OP_MREAD_BUFFER1 0xD4
  52. #define OP_MREAD_BUFFER2 0xD6
  53. #define OP_MWERASE_BUFFER1 0x83
  54. #define OP_MWERASE_BUFFER2 0x86
  55. #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
  56. #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
  57. /* write to buffer, then write-erase to flash */
  58. #define OP_PROGRAM_VIA_BUF1 0x82
  59. #define OP_PROGRAM_VIA_BUF2 0x85
  60. /* compare buffer to flash */
  61. #define OP_COMPARE_BUF1 0x60
  62. #define OP_COMPARE_BUF2 0x61
  63. /* read flash to buffer, then write-erase to flash */
  64. #define OP_REWRITE_VIA_BUF1 0x58
  65. #define OP_REWRITE_VIA_BUF2 0x59
  66. /* newer chips report JEDEC manufacturer and device IDs; chip
  67. * serial number and OTP bits; and per-sector writeprotect.
  68. */
  69. #define OP_READ_ID 0x9F
  70. #define OP_READ_SECURITY 0x77
  71. #define OP_WRITE_SECURITY_REVC 0x9A
  72. #define OP_WRITE_SECURITY 0x9B /* revision D */
  73. struct dataflash {
  74. uint8_t command[4];
  75. char name[24];
  76. unsigned short page_offset; /* offset in flash address */
  77. unsigned int page_size; /* of bytes per page */
  78. struct mutex lock;
  79. struct spi_device *spi;
  80. struct mtd_info mtd;
  81. };
  82. #ifdef CONFIG_OF
  83. static const struct of_device_id dataflash_dt_ids[] = {
  84. { .compatible = "atmel,at45", },
  85. { .compatible = "atmel,dataflash", },
  86. { /* sentinel */ }
  87. };
  88. #endif
  89. /* ......................................................................... */
  90. /*
  91. * Return the status of the DataFlash device.
  92. */
  93. static inline int dataflash_status(struct spi_device *spi)
  94. {
  95. /* NOTE: at45db321c over 25 MHz wants to write
  96. * a dummy byte after the opcode...
  97. */
  98. return spi_w8r8(spi, OP_READ_STATUS);
  99. }
  100. /*
  101. * Poll the DataFlash device until it is READY.
  102. * This usually takes 5-20 msec or so; more for sector erase.
  103. */
  104. static int dataflash_waitready(struct spi_device *spi)
  105. {
  106. int status;
  107. for (;;) {
  108. status = dataflash_status(spi);
  109. if (status < 0) {
  110. pr_debug("%s: status %d?\n",
  111. dev_name(&spi->dev), status);
  112. status = 0;
  113. }
  114. if (status & (1 << 7)) /* RDY/nBSY */
  115. return status;
  116. msleep(3);
  117. }
  118. }
  119. /* ......................................................................... */
  120. /*
  121. * Erase pages of flash.
  122. */
  123. static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
  124. {
  125. struct dataflash *priv = mtd->priv;
  126. struct spi_device *spi = priv->spi;
  127. struct spi_transfer x = { .tx_dma = 0, };
  128. struct spi_message msg;
  129. unsigned blocksize = priv->page_size << 3;
  130. uint8_t *command;
  131. uint32_t rem;
  132. pr_debug("%s: erase addr=0x%llx len 0x%llx\n",
  133. dev_name(&spi->dev), (long long)instr->addr,
  134. (long long)instr->len);
  135. div_u64_rem(instr->len, priv->page_size, &rem);
  136. if (rem)
  137. return -EINVAL;
  138. div_u64_rem(instr->addr, priv->page_size, &rem);
  139. if (rem)
  140. return -EINVAL;
  141. spi_message_init(&msg);
  142. x.tx_buf = command = priv->command;
  143. x.len = 4;
  144. spi_message_add_tail(&x, &msg);
  145. mutex_lock(&priv->lock);
  146. while (instr->len > 0) {
  147. unsigned int pageaddr;
  148. int status;
  149. int do_block;
  150. /* Calculate flash page address; use block erase (for speed) if
  151. * we're at a block boundary and need to erase the whole block.
  152. */
  153. pageaddr = div_u64(instr->addr, priv->page_size);
  154. do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
  155. pageaddr = pageaddr << priv->page_offset;
  156. command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
  157. command[1] = (uint8_t)(pageaddr >> 16);
  158. command[2] = (uint8_t)(pageaddr >> 8);
  159. command[3] = 0;
  160. pr_debug("ERASE %s: (%x) %x %x %x [%i]\n",
  161. do_block ? "block" : "page",
  162. command[0], command[1], command[2], command[3],
  163. pageaddr);
  164. status = spi_sync(spi, &msg);
  165. (void) dataflash_waitready(spi);
  166. if (status < 0) {
  167. printk(KERN_ERR "%s: erase %x, err %d\n",
  168. dev_name(&spi->dev), pageaddr, status);
  169. /* REVISIT: can retry instr->retries times; or
  170. * giveup and instr->fail_addr = instr->addr;
  171. */
  172. continue;
  173. }
  174. if (do_block) {
  175. instr->addr += blocksize;
  176. instr->len -= blocksize;
  177. } else {
  178. instr->addr += priv->page_size;
  179. instr->len -= priv->page_size;
  180. }
  181. }
  182. mutex_unlock(&priv->lock);
  183. /* Inform MTD subsystem that erase is complete */
  184. instr->state = MTD_ERASE_DONE;
  185. mtd_erase_callback(instr);
  186. return 0;
  187. }
  188. /*
  189. * Read from the DataFlash device.
  190. * from : Start offset in flash device
  191. * len : Amount to read
  192. * retlen : About of data actually read
  193. * buf : Buffer containing the data
  194. */
  195. static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
  196. size_t *retlen, u_char *buf)
  197. {
  198. struct dataflash *priv = mtd->priv;
  199. struct spi_transfer x[2] = { { .tx_dma = 0, }, };
  200. struct spi_message msg;
  201. unsigned int addr;
  202. uint8_t *command;
  203. int status;
  204. pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev),
  205. (unsigned)from, (unsigned)(from + len));
  206. /* Calculate flash page/byte address */
  207. addr = (((unsigned)from / priv->page_size) << priv->page_offset)
  208. + ((unsigned)from % priv->page_size);
  209. command = priv->command;
  210. pr_debug("READ: (%x) %x %x %x\n",
  211. command[0], command[1], command[2], command[3]);
  212. spi_message_init(&msg);
  213. x[0].tx_buf = command;
  214. x[0].len = 8;
  215. spi_message_add_tail(&x[0], &msg);
  216. x[1].rx_buf = buf;
  217. x[1].len = len;
  218. spi_message_add_tail(&x[1], &msg);
  219. mutex_lock(&priv->lock);
  220. /* Continuous read, max clock = f(car) which may be less than
  221. * the peak rate available. Some chips support commands with
  222. * fewer "don't care" bytes. Both buffers stay unchanged.
  223. */
  224. command[0] = OP_READ_CONTINUOUS;
  225. command[1] = (uint8_t)(addr >> 16);
  226. command[2] = (uint8_t)(addr >> 8);
  227. command[3] = (uint8_t)(addr >> 0);
  228. /* plus 4 "don't care" bytes */
  229. status = spi_sync(priv->spi, &msg);
  230. mutex_unlock(&priv->lock);
  231. if (status >= 0) {
  232. *retlen = msg.actual_length - 8;
  233. status = 0;
  234. } else
  235. pr_debug("%s: read %x..%x --> %d\n",
  236. dev_name(&priv->spi->dev),
  237. (unsigned)from, (unsigned)(from + len),
  238. status);
  239. return status;
  240. }
  241. /*
  242. * Write to the DataFlash device.
  243. * to : Start offset in flash device
  244. * len : Amount to write
  245. * retlen : Amount of data actually written
  246. * buf : Buffer containing the data
  247. */
  248. static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
  249. size_t * retlen, const u_char * buf)
  250. {
  251. struct dataflash *priv = mtd->priv;
  252. struct spi_device *spi = priv->spi;
  253. struct spi_transfer x[2] = { { .tx_dma = 0, }, };
  254. struct spi_message msg;
  255. unsigned int pageaddr, addr, offset, writelen;
  256. size_t remaining = len;
  257. u_char *writebuf = (u_char *) buf;
  258. int status = -EINVAL;
  259. uint8_t *command;
  260. pr_debug("%s: write 0x%x..0x%x\n",
  261. dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len));
  262. spi_message_init(&msg);
  263. x[0].tx_buf = command = priv->command;
  264. x[0].len = 4;
  265. spi_message_add_tail(&x[0], &msg);
  266. pageaddr = ((unsigned)to / priv->page_size);
  267. offset = ((unsigned)to % priv->page_size);
  268. if (offset + len > priv->page_size)
  269. writelen = priv->page_size - offset;
  270. else
  271. writelen = len;
  272. mutex_lock(&priv->lock);
  273. while (remaining > 0) {
  274. pr_debug("write @ %i:%i len=%i\n",
  275. pageaddr, offset, writelen);
  276. /* REVISIT:
  277. * (a) each page in a sector must be rewritten at least
  278. * once every 10K sibling erase/program operations.
  279. * (b) for pages that are already erased, we could
  280. * use WRITE+MWRITE not PROGRAM for ~30% speedup.
  281. * (c) WRITE to buffer could be done while waiting for
  282. * a previous MWRITE/MWERASE to complete ...
  283. * (d) error handling here seems to be mostly missing.
  284. *
  285. * Two persistent bits per page, plus a per-sector counter,
  286. * could support (a) and (b) ... we might consider using
  287. * the second half of sector zero, which is just one block,
  288. * to track that state. (On AT91, that sector should also
  289. * support boot-from-DataFlash.)
  290. */
  291. addr = pageaddr << priv->page_offset;
  292. /* (1) Maybe transfer partial page to Buffer1 */
  293. if (writelen != priv->page_size) {
  294. command[0] = OP_TRANSFER_BUF1;
  295. command[1] = (addr & 0x00FF0000) >> 16;
  296. command[2] = (addr & 0x0000FF00) >> 8;
  297. command[3] = 0;
  298. pr_debug("TRANSFER: (%x) %x %x %x\n",
  299. command[0], command[1], command[2], command[3]);
  300. status = spi_sync(spi, &msg);
  301. if (status < 0)
  302. pr_debug("%s: xfer %u -> %d\n",
  303. dev_name(&spi->dev), addr, status);
  304. (void) dataflash_waitready(priv->spi);
  305. }
  306. /* (2) Program full page via Buffer1 */
  307. addr += offset;
  308. command[0] = OP_PROGRAM_VIA_BUF1;
  309. command[1] = (addr & 0x00FF0000) >> 16;
  310. command[2] = (addr & 0x0000FF00) >> 8;
  311. command[3] = (addr & 0x000000FF);
  312. pr_debug("PROGRAM: (%x) %x %x %x\n",
  313. command[0], command[1], command[2], command[3]);
  314. x[1].tx_buf = writebuf;
  315. x[1].len = writelen;
  316. spi_message_add_tail(x + 1, &msg);
  317. status = spi_sync(spi, &msg);
  318. spi_transfer_del(x + 1);
  319. if (status < 0)
  320. pr_debug("%s: pgm %u/%u -> %d\n",
  321. dev_name(&spi->dev), addr, writelen, status);
  322. (void) dataflash_waitready(priv->spi);
  323. #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
  324. /* (3) Compare to Buffer1 */
  325. addr = pageaddr << priv->page_offset;
  326. command[0] = OP_COMPARE_BUF1;
  327. command[1] = (addr & 0x00FF0000) >> 16;
  328. command[2] = (addr & 0x0000FF00) >> 8;
  329. command[3] = 0;
  330. pr_debug("COMPARE: (%x) %x %x %x\n",
  331. command[0], command[1], command[2], command[3]);
  332. status = spi_sync(spi, &msg);
  333. if (status < 0)
  334. pr_debug("%s: compare %u -> %d\n",
  335. dev_name(&spi->dev), addr, status);
  336. status = dataflash_waitready(priv->spi);
  337. /* Check result of the compare operation */
  338. if (status & (1 << 6)) {
  339. printk(KERN_ERR "%s: compare page %u, err %d\n",
  340. dev_name(&spi->dev), pageaddr, status);
  341. remaining = 0;
  342. status = -EIO;
  343. break;
  344. } else
  345. status = 0;
  346. #endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
  347. remaining = remaining - writelen;
  348. pageaddr++;
  349. offset = 0;
  350. writebuf += writelen;
  351. *retlen += writelen;
  352. if (remaining > priv->page_size)
  353. writelen = priv->page_size;
  354. else
  355. writelen = remaining;
  356. }
  357. mutex_unlock(&priv->lock);
  358. return status;
  359. }
  360. /* ......................................................................... */
  361. #ifdef CONFIG_MTD_DATAFLASH_OTP
  362. static int dataflash_get_otp_info(struct mtd_info *mtd,
  363. struct otp_info *info, size_t len)
  364. {
  365. /* Report both blocks as identical: bytes 0..64, locked.
  366. * Unless the user block changed from all-ones, we can't
  367. * tell whether it's still writable; so we assume it isn't.
  368. */
  369. info->start = 0;
  370. info->length = 64;
  371. info->locked = 1;
  372. return sizeof(*info);
  373. }
  374. static ssize_t otp_read(struct spi_device *spi, unsigned base,
  375. uint8_t *buf, loff_t off, size_t len)
  376. {
  377. struct spi_message m;
  378. size_t l;
  379. uint8_t *scratch;
  380. struct spi_transfer t;
  381. int status;
  382. if (off > 64)
  383. return -EINVAL;
  384. if ((off + len) > 64)
  385. len = 64 - off;
  386. spi_message_init(&m);
  387. l = 4 + base + off + len;
  388. scratch = kzalloc(l, GFP_KERNEL);
  389. if (!scratch)
  390. return -ENOMEM;
  391. /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
  392. * IN: ignore 4 bytes, data bytes 0..N (max 127)
  393. */
  394. scratch[0] = OP_READ_SECURITY;
  395. memset(&t, 0, sizeof t);
  396. t.tx_buf = scratch;
  397. t.rx_buf = scratch;
  398. t.len = l;
  399. spi_message_add_tail(&t, &m);
  400. dataflash_waitready(spi);
  401. status = spi_sync(spi, &m);
  402. if (status >= 0) {
  403. memcpy(buf, scratch + 4 + base + off, len);
  404. status = len;
  405. }
  406. kfree(scratch);
  407. return status;
  408. }
  409. static int dataflash_read_fact_otp(struct mtd_info *mtd,
  410. loff_t from, size_t len, size_t *retlen, u_char *buf)
  411. {
  412. struct dataflash *priv = mtd->priv;
  413. int status;
  414. /* 64 bytes, from 0..63 ... start at 64 on-chip */
  415. mutex_lock(&priv->lock);
  416. status = otp_read(priv->spi, 64, buf, from, len);
  417. mutex_unlock(&priv->lock);
  418. if (status < 0)
  419. return status;
  420. *retlen = status;
  421. return 0;
  422. }
  423. static int dataflash_read_user_otp(struct mtd_info *mtd,
  424. loff_t from, size_t len, size_t *retlen, u_char *buf)
  425. {
  426. struct dataflash *priv = mtd->priv;
  427. int status;
  428. /* 64 bytes, from 0..63 ... start at 0 on-chip */
  429. mutex_lock(&priv->lock);
  430. status = otp_read(priv->spi, 0, buf, from, len);
  431. mutex_unlock(&priv->lock);
  432. if (status < 0)
  433. return status;
  434. *retlen = status;
  435. return 0;
  436. }
  437. static int dataflash_write_user_otp(struct mtd_info *mtd,
  438. loff_t from, size_t len, size_t *retlen, u_char *buf)
  439. {
  440. struct spi_message m;
  441. const size_t l = 4 + 64;
  442. uint8_t *scratch;
  443. struct spi_transfer t;
  444. struct dataflash *priv = mtd->priv;
  445. int status;
  446. if (len > 64)
  447. return -EINVAL;
  448. /* Strictly speaking, we *could* truncate the write ... but
  449. * let's not do that for the only write that's ever possible.
  450. */
  451. if ((from + len) > 64)
  452. return -EINVAL;
  453. /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
  454. * IN: ignore all
  455. */
  456. scratch = kzalloc(l, GFP_KERNEL);
  457. if (!scratch)
  458. return -ENOMEM;
  459. scratch[0] = OP_WRITE_SECURITY;
  460. memcpy(scratch + 4 + from, buf, len);
  461. spi_message_init(&m);
  462. memset(&t, 0, sizeof t);
  463. t.tx_buf = scratch;
  464. t.len = l;
  465. spi_message_add_tail(&t, &m);
  466. /* Write the OTP bits, if they've not yet been written.
  467. * This modifies SRAM buffer1.
  468. */
  469. mutex_lock(&priv->lock);
  470. dataflash_waitready(priv->spi);
  471. status = spi_sync(priv->spi, &m);
  472. mutex_unlock(&priv->lock);
  473. kfree(scratch);
  474. if (status >= 0) {
  475. status = 0;
  476. *retlen = len;
  477. }
  478. return status;
  479. }
  480. static char *otp_setup(struct mtd_info *device, char revision)
  481. {
  482. device->_get_fact_prot_info = dataflash_get_otp_info;
  483. device->_read_fact_prot_reg = dataflash_read_fact_otp;
  484. device->_get_user_prot_info = dataflash_get_otp_info;
  485. device->_read_user_prot_reg = dataflash_read_user_otp;
  486. /* rev c parts (at45db321c and at45db1281 only!) use a
  487. * different write procedure; not (yet?) implemented.
  488. */
  489. if (revision > 'c')
  490. device->_write_user_prot_reg = dataflash_write_user_otp;
  491. return ", OTP";
  492. }
  493. #else
  494. static char *otp_setup(struct mtd_info *device, char revision)
  495. {
  496. return " (OTP)";
  497. }
  498. #endif
  499. /* ......................................................................... */
  500. /*
  501. * Register DataFlash device with MTD subsystem.
  502. */
  503. static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
  504. int pagesize, int pageoffset, char revision)
  505. {
  506. struct dataflash *priv;
  507. struct mtd_info *device;
  508. struct mtd_part_parser_data ppdata;
  509. struct flash_platform_data *pdata = dev_get_platdata(&spi->dev);
  510. char *otp_tag = "";
  511. int err = 0;
  512. priv = kzalloc(sizeof *priv, GFP_KERNEL);
  513. if (!priv)
  514. return -ENOMEM;
  515. mutex_init(&priv->lock);
  516. priv->spi = spi;
  517. priv->page_size = pagesize;
  518. priv->page_offset = pageoffset;
  519. /* name must be usable with cmdlinepart */
  520. sprintf(priv->name, "spi%d.%d-%s",
  521. spi->master->bus_num, spi->chip_select,
  522. name);
  523. device = &priv->mtd;
  524. device->name = (pdata && pdata->name) ? pdata->name : priv->name;
  525. device->size = nr_pages * pagesize;
  526. device->erasesize = pagesize;
  527. device->writesize = pagesize;
  528. device->owner = THIS_MODULE;
  529. device->type = MTD_DATAFLASH;
  530. device->flags = MTD_WRITEABLE;
  531. device->_erase = dataflash_erase;
  532. device->_read = dataflash_read;
  533. device->_write = dataflash_write;
  534. device->priv = priv;
  535. device->dev.parent = &spi->dev;
  536. if (revision >= 'c')
  537. otp_tag = otp_setup(device, revision);
  538. dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
  539. name, (long long)((device->size + 1023) >> 10),
  540. pagesize, otp_tag);
  541. spi_set_drvdata(spi, priv);
  542. ppdata.of_node = spi->dev.of_node;
  543. err = mtd_device_parse_register(device, NULL, &ppdata,
  544. pdata ? pdata->parts : NULL,
  545. pdata ? pdata->nr_parts : 0);
  546. if (!err)
  547. return 0;
  548. spi_set_drvdata(spi, NULL);
  549. kfree(priv);
  550. return err;
  551. }
  552. static inline int add_dataflash(struct spi_device *spi, char *name,
  553. int nr_pages, int pagesize, int pageoffset)
  554. {
  555. return add_dataflash_otp(spi, name, nr_pages, pagesize,
  556. pageoffset, 0);
  557. }
  558. struct flash_info {
  559. char *name;
  560. /* JEDEC id has a high byte of zero plus three data bytes:
  561. * the manufacturer id, then a two byte device id.
  562. */
  563. uint32_t jedec_id;
  564. /* The size listed here is what works with OP_ERASE_PAGE. */
  565. unsigned nr_pages;
  566. uint16_t pagesize;
  567. uint16_t pageoffset;
  568. uint16_t flags;
  569. #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
  570. #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
  571. };
  572. static struct flash_info dataflash_data[] = {
  573. /*
  574. * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
  575. * one with IS_POW2PS and the other without. The entry with the
  576. * non-2^N byte page size can't name exact chip revisions without
  577. * losing backwards compatibility for cmdlinepart.
  578. *
  579. * These newer chips also support 128-byte security registers (with
  580. * 64 bytes one-time-programmable) and software write-protection.
  581. */
  582. { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
  583. { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
  584. { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
  585. { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
  586. { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
  587. { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
  588. { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
  589. { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
  590. { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
  591. { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
  592. { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
  593. { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
  594. { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
  595. { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
  596. { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
  597. };
  598. static struct flash_info *jedec_probe(struct spi_device *spi)
  599. {
  600. int tmp;
  601. uint8_t code = OP_READ_ID;
  602. uint8_t id[3];
  603. uint32_t jedec;
  604. struct flash_info *info;
  605. int status;
  606. /* JEDEC also defines an optional "extended device information"
  607. * string for after vendor-specific data, after the three bytes
  608. * we use here. Supporting some chips might require using it.
  609. *
  610. * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
  611. * That's not an error; only rev C and newer chips handle it, and
  612. * only Atmel sells these chips.
  613. */
  614. tmp = spi_write_then_read(spi, &code, 1, id, 3);
  615. if (tmp < 0) {
  616. pr_debug("%s: error %d reading JEDEC ID\n",
  617. dev_name(&spi->dev), tmp);
  618. return ERR_PTR(tmp);
  619. }
  620. if (id[0] != 0x1f)
  621. return NULL;
  622. jedec = id[0];
  623. jedec = jedec << 8;
  624. jedec |= id[1];
  625. jedec = jedec << 8;
  626. jedec |= id[2];
  627. for (tmp = 0, info = dataflash_data;
  628. tmp < ARRAY_SIZE(dataflash_data);
  629. tmp++, info++) {
  630. if (info->jedec_id == jedec) {
  631. pr_debug("%s: OTP, sector protect%s\n",
  632. dev_name(&spi->dev),
  633. (info->flags & SUP_POW2PS)
  634. ? ", binary pagesize" : ""
  635. );
  636. if (info->flags & SUP_POW2PS) {
  637. status = dataflash_status(spi);
  638. if (status < 0) {
  639. pr_debug("%s: status error %d\n",
  640. dev_name(&spi->dev), status);
  641. return ERR_PTR(status);
  642. }
  643. if (status & 0x1) {
  644. if (info->flags & IS_POW2PS)
  645. return info;
  646. } else {
  647. if (!(info->flags & IS_POW2PS))
  648. return info;
  649. }
  650. } else
  651. return info;
  652. }
  653. }
  654. /*
  655. * Treat other chips as errors ... we won't know the right page
  656. * size (it might be binary) even when we can tell which density
  657. * class is involved (legacy chip id scheme).
  658. */
  659. dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
  660. return ERR_PTR(-ENODEV);
  661. }
  662. /*
  663. * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
  664. * or else the ID code embedded in the status bits:
  665. *
  666. * Device Density ID code #Pages PageSize Offset
  667. * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
  668. * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
  669. * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
  670. * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
  671. * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
  672. * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
  673. * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
  674. * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
  675. */
  676. static int dataflash_probe(struct spi_device *spi)
  677. {
  678. int status;
  679. struct flash_info *info;
  680. /*
  681. * Try to detect dataflash by JEDEC ID.
  682. * If it succeeds we know we have either a C or D part.
  683. * D will support power of 2 pagesize option.
  684. * Both support the security register, though with different
  685. * write procedures.
  686. */
  687. info = jedec_probe(spi);
  688. if (IS_ERR(info))
  689. return PTR_ERR(info);
  690. if (info != NULL)
  691. return add_dataflash_otp(spi, info->name, info->nr_pages,
  692. info->pagesize, info->pageoffset,
  693. (info->flags & SUP_POW2PS) ? 'd' : 'c');
  694. /*
  695. * Older chips support only legacy commands, identifing
  696. * capacity using bits in the status byte.
  697. */
  698. status = dataflash_status(spi);
  699. if (status <= 0 || status == 0xff) {
  700. pr_debug("%s: status error %d\n",
  701. dev_name(&spi->dev), status);
  702. if (status == 0 || status == 0xff)
  703. status = -ENODEV;
  704. return status;
  705. }
  706. /* if there's a device there, assume it's dataflash.
  707. * board setup should have set spi->max_speed_max to
  708. * match f(car) for continuous reads, mode 0 or 3.
  709. */
  710. switch (status & 0x3c) {
  711. case 0x0c: /* 0 0 1 1 x x */
  712. status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
  713. break;
  714. case 0x14: /* 0 1 0 1 x x */
  715. status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
  716. break;
  717. case 0x1c: /* 0 1 1 1 x x */
  718. status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
  719. break;
  720. case 0x24: /* 1 0 0 1 x x */
  721. status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
  722. break;
  723. case 0x2c: /* 1 0 1 1 x x */
  724. status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
  725. break;
  726. case 0x34: /* 1 1 0 1 x x */
  727. status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
  728. break;
  729. case 0x38: /* 1 1 1 x x x */
  730. case 0x3c:
  731. status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
  732. break;
  733. /* obsolete AT45DB1282 not (yet?) supported */
  734. default:
  735. dev_info(&spi->dev, "unsupported device (%x)\n",
  736. status & 0x3c);
  737. status = -ENODEV;
  738. }
  739. if (status < 0)
  740. pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev),
  741. status);
  742. return status;
  743. }
  744. static int dataflash_remove(struct spi_device *spi)
  745. {
  746. struct dataflash *flash = spi_get_drvdata(spi);
  747. int status;
  748. pr_debug("%s: remove\n", dev_name(&spi->dev));
  749. status = mtd_device_unregister(&flash->mtd);
  750. if (status == 0) {
  751. spi_set_drvdata(spi, NULL);
  752. kfree(flash);
  753. }
  754. return status;
  755. }
  756. static struct spi_driver dataflash_driver = {
  757. .driver = {
  758. .name = "mtd_dataflash",
  759. .owner = THIS_MODULE,
  760. .of_match_table = of_match_ptr(dataflash_dt_ids),
  761. },
  762. .probe = dataflash_probe,
  763. .remove = dataflash_remove,
  764. /* FIXME: investigate suspend and resume... */
  765. };
  766. module_spi_driver(dataflash_driver);
  767. MODULE_LICENSE("GPL");
  768. MODULE_AUTHOR("Andrew Victor, David Brownell");
  769. MODULE_DESCRIPTION("MTD DataFlash driver");
  770. MODULE_ALIAS("spi:mtd_dataflash");