init.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862
  1. #include <linux/gfp.h>
  2. #include <linux/initrd.h>
  3. #include <linux/ioport.h>
  4. #include <linux/swap.h>
  5. #include <linux/memblock.h>
  6. #include <linux/bootmem.h> /* for max_low_pfn */
  7. #include <asm/set_memory.h>
  8. #include <asm/e820/api.h>
  9. #include <asm/init.h>
  10. #include <asm/page.h>
  11. #include <asm/page_types.h>
  12. #include <asm/sections.h>
  13. #include <asm/setup.h>
  14. #include <asm/tlbflush.h>
  15. #include <asm/tlb.h>
  16. #include <asm/proto.h>
  17. #include <asm/dma.h> /* for MAX_DMA_PFN */
  18. #include <asm/microcode.h>
  19. #include <asm/kaslr.h>
  20. #include <asm/hypervisor.h>
  21. #include <asm/cpufeature.h>
  22. /*
  23. * We need to define the tracepoints somewhere, and tlb.c
  24. * is only compied when SMP=y.
  25. */
  26. #define CREATE_TRACE_POINTS
  27. #include <trace/events/tlb.h>
  28. #include "mm_internal.h"
  29. /*
  30. * Tables translating between page_cache_type_t and pte encoding.
  31. *
  32. * The default values are defined statically as minimal supported mode;
  33. * WC and WT fall back to UC-. pat_init() updates these values to support
  34. * more cache modes, WC and WT, when it is safe to do so. See pat_init()
  35. * for the details. Note, __early_ioremap() used during early boot-time
  36. * takes pgprot_t (pte encoding) and does not use these tables.
  37. *
  38. * Index into __cachemode2pte_tbl[] is the cachemode.
  39. *
  40. * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
  41. * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
  42. */
  43. uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
  44. [_PAGE_CACHE_MODE_WB ] = 0 | 0 ,
  45. [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD,
  46. [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD,
  47. [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,
  48. [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD,
  49. [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD,
  50. };
  51. EXPORT_SYMBOL(__cachemode2pte_tbl);
  52. uint8_t __pte2cachemode_tbl[8] = {
  53. [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB,
  54. [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
  55. [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
  56. [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC,
  57. [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
  58. [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
  59. [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
  60. [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
  61. };
  62. EXPORT_SYMBOL(__pte2cachemode_tbl);
  63. static unsigned long __initdata pgt_buf_start;
  64. static unsigned long __initdata pgt_buf_end;
  65. static unsigned long __initdata pgt_buf_top;
  66. static unsigned long min_pfn_mapped;
  67. static bool __initdata can_use_brk_pgt = true;
  68. /*
  69. * Pages returned are already directly mapped.
  70. *
  71. * Changing that is likely to break Xen, see commit:
  72. *
  73. * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
  74. *
  75. * for detailed information.
  76. */
  77. __ref void *alloc_low_pages(unsigned int num)
  78. {
  79. unsigned long pfn;
  80. int i;
  81. if (after_bootmem) {
  82. unsigned int order;
  83. order = get_order((unsigned long)num << PAGE_SHIFT);
  84. return (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO, order);
  85. }
  86. if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) {
  87. unsigned long ret;
  88. if (min_pfn_mapped >= max_pfn_mapped)
  89. panic("alloc_low_pages: ran out of memory");
  90. ret = memblock_find_in_range(min_pfn_mapped << PAGE_SHIFT,
  91. max_pfn_mapped << PAGE_SHIFT,
  92. PAGE_SIZE * num , PAGE_SIZE);
  93. if (!ret)
  94. panic("alloc_low_pages: can not alloc memory");
  95. memblock_reserve(ret, PAGE_SIZE * num);
  96. pfn = ret >> PAGE_SHIFT;
  97. } else {
  98. pfn = pgt_buf_end;
  99. pgt_buf_end += num;
  100. printk(KERN_DEBUG "BRK [%#010lx, %#010lx] PGTABLE\n",
  101. pfn << PAGE_SHIFT, (pgt_buf_end << PAGE_SHIFT) - 1);
  102. }
  103. for (i = 0; i < num; i++) {
  104. void *adr;
  105. adr = __va((pfn + i) << PAGE_SHIFT);
  106. clear_page(adr);
  107. }
  108. return __va(pfn << PAGE_SHIFT);
  109. }
  110. /*
  111. * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS.
  112. * With KASLR memory randomization, depending on the machine e820 memory
  113. * and the PUD alignment. We may need twice more pages when KASLR memory
  114. * randomization is enabled.
  115. */
  116. #ifndef CONFIG_RANDOMIZE_MEMORY
  117. #define INIT_PGD_PAGE_COUNT 6
  118. #else
  119. #define INIT_PGD_PAGE_COUNT 12
  120. #endif
  121. #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
  122. RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE);
  123. void __init early_alloc_pgt_buf(void)
  124. {
  125. unsigned long tables = INIT_PGT_BUF_SIZE;
  126. phys_addr_t base;
  127. base = __pa(extend_brk(tables, PAGE_SIZE));
  128. pgt_buf_start = base >> PAGE_SHIFT;
  129. pgt_buf_end = pgt_buf_start;
  130. pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
  131. }
  132. int after_bootmem;
  133. early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
  134. struct map_range {
  135. unsigned long start;
  136. unsigned long end;
  137. unsigned page_size_mask;
  138. };
  139. static int page_size_mask;
  140. static void __init probe_page_size_mask(void)
  141. {
  142. /*
  143. * For pagealloc debugging, identity mapping will use small pages.
  144. * This will simplify cpa(), which otherwise needs to support splitting
  145. * large pages into small in interrupt context, etc.
  146. */
  147. if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled())
  148. page_size_mask |= 1 << PG_LEVEL_2M;
  149. else
  150. direct_gbpages = 0;
  151. /* Enable PSE if available */
  152. if (boot_cpu_has(X86_FEATURE_PSE))
  153. cr4_set_bits_and_update_boot(X86_CR4_PSE);
  154. /* Enable PGE if available */
  155. if (boot_cpu_has(X86_FEATURE_PGE)) {
  156. cr4_set_bits_and_update_boot(X86_CR4_PGE);
  157. __supported_pte_mask |= _PAGE_GLOBAL;
  158. } else
  159. __supported_pte_mask &= ~_PAGE_GLOBAL;
  160. /* Enable 1 GB linear kernel mappings if available: */
  161. if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) {
  162. printk(KERN_INFO "Using GB pages for direct mapping\n");
  163. page_size_mask |= 1 << PG_LEVEL_1G;
  164. } else {
  165. direct_gbpages = 0;
  166. }
  167. }
  168. static void setup_pcid(void)
  169. {
  170. #ifdef CONFIG_X86_64
  171. if (boot_cpu_has(X86_FEATURE_PCID)) {
  172. if (boot_cpu_has(X86_FEATURE_PGE)) {
  173. /*
  174. * This can't be cr4_set_bits_and_update_boot() --
  175. * the trampoline code can't handle CR4.PCIDE and
  176. * it wouldn't do any good anyway. Despite the name,
  177. * cr4_set_bits_and_update_boot() doesn't actually
  178. * cause the bits in question to remain set all the
  179. * way through the secondary boot asm.
  180. *
  181. * Instead, we brute-force it and set CR4.PCIDE
  182. * manually in start_secondary().
  183. */
  184. cr4_set_bits(X86_CR4_PCIDE);
  185. } else {
  186. /*
  187. * flush_tlb_all(), as currently implemented, won't
  188. * work if PCID is on but PGE is not. Since that
  189. * combination doesn't exist on real hardware, there's
  190. * no reason to try to fully support it, but it's
  191. * polite to avoid corrupting data if we're on
  192. * an improperly configured VM.
  193. */
  194. setup_clear_cpu_cap(X86_FEATURE_PCID);
  195. }
  196. }
  197. #endif
  198. }
  199. #ifdef CONFIG_X86_32
  200. #define NR_RANGE_MR 3
  201. #else /* CONFIG_X86_64 */
  202. #define NR_RANGE_MR 5
  203. #endif
  204. static int __meminit save_mr(struct map_range *mr, int nr_range,
  205. unsigned long start_pfn, unsigned long end_pfn,
  206. unsigned long page_size_mask)
  207. {
  208. if (start_pfn < end_pfn) {
  209. if (nr_range >= NR_RANGE_MR)
  210. panic("run out of range for init_memory_mapping\n");
  211. mr[nr_range].start = start_pfn<<PAGE_SHIFT;
  212. mr[nr_range].end = end_pfn<<PAGE_SHIFT;
  213. mr[nr_range].page_size_mask = page_size_mask;
  214. nr_range++;
  215. }
  216. return nr_range;
  217. }
  218. /*
  219. * adjust the page_size_mask for small range to go with
  220. * big page size instead small one if nearby are ram too.
  221. */
  222. static void __ref adjust_range_page_size_mask(struct map_range *mr,
  223. int nr_range)
  224. {
  225. int i;
  226. for (i = 0; i < nr_range; i++) {
  227. if ((page_size_mask & (1<<PG_LEVEL_2M)) &&
  228. !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) {
  229. unsigned long start = round_down(mr[i].start, PMD_SIZE);
  230. unsigned long end = round_up(mr[i].end, PMD_SIZE);
  231. #ifdef CONFIG_X86_32
  232. if ((end >> PAGE_SHIFT) > max_low_pfn)
  233. continue;
  234. #endif
  235. if (memblock_is_region_memory(start, end - start))
  236. mr[i].page_size_mask |= 1<<PG_LEVEL_2M;
  237. }
  238. if ((page_size_mask & (1<<PG_LEVEL_1G)) &&
  239. !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) {
  240. unsigned long start = round_down(mr[i].start, PUD_SIZE);
  241. unsigned long end = round_up(mr[i].end, PUD_SIZE);
  242. if (memblock_is_region_memory(start, end - start))
  243. mr[i].page_size_mask |= 1<<PG_LEVEL_1G;
  244. }
  245. }
  246. }
  247. static const char *page_size_string(struct map_range *mr)
  248. {
  249. static const char str_1g[] = "1G";
  250. static const char str_2m[] = "2M";
  251. static const char str_4m[] = "4M";
  252. static const char str_4k[] = "4k";
  253. if (mr->page_size_mask & (1<<PG_LEVEL_1G))
  254. return str_1g;
  255. /*
  256. * 32-bit without PAE has a 4M large page size.
  257. * PG_LEVEL_2M is misnamed, but we can at least
  258. * print out the right size in the string.
  259. */
  260. if (IS_ENABLED(CONFIG_X86_32) &&
  261. !IS_ENABLED(CONFIG_X86_PAE) &&
  262. mr->page_size_mask & (1<<PG_LEVEL_2M))
  263. return str_4m;
  264. if (mr->page_size_mask & (1<<PG_LEVEL_2M))
  265. return str_2m;
  266. return str_4k;
  267. }
  268. static int __meminit split_mem_range(struct map_range *mr, int nr_range,
  269. unsigned long start,
  270. unsigned long end)
  271. {
  272. unsigned long start_pfn, end_pfn, limit_pfn;
  273. unsigned long pfn;
  274. int i;
  275. limit_pfn = PFN_DOWN(end);
  276. /* head if not big page alignment ? */
  277. pfn = start_pfn = PFN_DOWN(start);
  278. #ifdef CONFIG_X86_32
  279. /*
  280. * Don't use a large page for the first 2/4MB of memory
  281. * because there are often fixed size MTRRs in there
  282. * and overlapping MTRRs into large pages can cause
  283. * slowdowns.
  284. */
  285. if (pfn == 0)
  286. end_pfn = PFN_DOWN(PMD_SIZE);
  287. else
  288. end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
  289. #else /* CONFIG_X86_64 */
  290. end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
  291. #endif
  292. if (end_pfn > limit_pfn)
  293. end_pfn = limit_pfn;
  294. if (start_pfn < end_pfn) {
  295. nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
  296. pfn = end_pfn;
  297. }
  298. /* big page (2M) range */
  299. start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
  300. #ifdef CONFIG_X86_32
  301. end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
  302. #else /* CONFIG_X86_64 */
  303. end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
  304. if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE)))
  305. end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
  306. #endif
  307. if (start_pfn < end_pfn) {
  308. nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
  309. page_size_mask & (1<<PG_LEVEL_2M));
  310. pfn = end_pfn;
  311. }
  312. #ifdef CONFIG_X86_64
  313. /* big page (1G) range */
  314. start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
  315. end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));
  316. if (start_pfn < end_pfn) {
  317. nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
  318. page_size_mask &
  319. ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
  320. pfn = end_pfn;
  321. }
  322. /* tail is not big page (1G) alignment */
  323. start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
  324. end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
  325. if (start_pfn < end_pfn) {
  326. nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
  327. page_size_mask & (1<<PG_LEVEL_2M));
  328. pfn = end_pfn;
  329. }
  330. #endif
  331. /* tail is not big page (2M) alignment */
  332. start_pfn = pfn;
  333. end_pfn = limit_pfn;
  334. nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
  335. if (!after_bootmem)
  336. adjust_range_page_size_mask(mr, nr_range);
  337. /* try to merge same page size and continuous */
  338. for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
  339. unsigned long old_start;
  340. if (mr[i].end != mr[i+1].start ||
  341. mr[i].page_size_mask != mr[i+1].page_size_mask)
  342. continue;
  343. /* move it */
  344. old_start = mr[i].start;
  345. memmove(&mr[i], &mr[i+1],
  346. (nr_range - 1 - i) * sizeof(struct map_range));
  347. mr[i--].start = old_start;
  348. nr_range--;
  349. }
  350. for (i = 0; i < nr_range; i++)
  351. pr_debug(" [mem %#010lx-%#010lx] page %s\n",
  352. mr[i].start, mr[i].end - 1,
  353. page_size_string(&mr[i]));
  354. return nr_range;
  355. }
  356. struct range pfn_mapped[E820_MAX_ENTRIES];
  357. int nr_pfn_mapped;
  358. static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn)
  359. {
  360. nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_MAX_ENTRIES,
  361. nr_pfn_mapped, start_pfn, end_pfn);
  362. nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_MAX_ENTRIES);
  363. max_pfn_mapped = max(max_pfn_mapped, end_pfn);
  364. if (start_pfn < (1UL<<(32-PAGE_SHIFT)))
  365. max_low_pfn_mapped = max(max_low_pfn_mapped,
  366. min(end_pfn, 1UL<<(32-PAGE_SHIFT)));
  367. }
  368. bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn)
  369. {
  370. int i;
  371. for (i = 0; i < nr_pfn_mapped; i++)
  372. if ((start_pfn >= pfn_mapped[i].start) &&
  373. (end_pfn <= pfn_mapped[i].end))
  374. return true;
  375. return false;
  376. }
  377. /*
  378. * Setup the direct mapping of the physical memory at PAGE_OFFSET.
  379. * This runs before bootmem is initialized and gets pages directly from
  380. * the physical memory. To access them they are temporarily mapped.
  381. */
  382. unsigned long __ref init_memory_mapping(unsigned long start,
  383. unsigned long end)
  384. {
  385. struct map_range mr[NR_RANGE_MR];
  386. unsigned long ret = 0;
  387. int nr_range, i;
  388. pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
  389. start, end - 1);
  390. memset(mr, 0, sizeof(mr));
  391. nr_range = split_mem_range(mr, 0, start, end);
  392. for (i = 0; i < nr_range; i++)
  393. ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
  394. mr[i].page_size_mask);
  395. add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT);
  396. return ret >> PAGE_SHIFT;
  397. }
  398. /*
  399. * We need to iterate through the E820 memory map and create direct mappings
  400. * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
  401. * create direct mappings for all pfns from [0 to max_low_pfn) and
  402. * [4GB to max_pfn) because of possible memory holes in high addresses
  403. * that cannot be marked as UC by fixed/variable range MTRRs.
  404. * Depending on the alignment of E820 ranges, this may possibly result
  405. * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
  406. *
  407. * init_mem_mapping() calls init_range_memory_mapping() with big range.
  408. * That range would have hole in the middle or ends, and only ram parts
  409. * will be mapped in init_range_memory_mapping().
  410. */
  411. static unsigned long __init init_range_memory_mapping(
  412. unsigned long r_start,
  413. unsigned long r_end)
  414. {
  415. unsigned long start_pfn, end_pfn;
  416. unsigned long mapped_ram_size = 0;
  417. int i;
  418. for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
  419. u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end);
  420. u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end);
  421. if (start >= end)
  422. continue;
  423. /*
  424. * if it is overlapping with brk pgt, we need to
  425. * alloc pgt buf from memblock instead.
  426. */
  427. can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >=
  428. min(end, (u64)pgt_buf_top<<PAGE_SHIFT);
  429. init_memory_mapping(start, end);
  430. mapped_ram_size += end - start;
  431. can_use_brk_pgt = true;
  432. }
  433. return mapped_ram_size;
  434. }
  435. static unsigned long __init get_new_step_size(unsigned long step_size)
  436. {
  437. /*
  438. * Initial mapped size is PMD_SIZE (2M).
  439. * We can not set step_size to be PUD_SIZE (1G) yet.
  440. * In worse case, when we cross the 1G boundary, and
  441. * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
  442. * to map 1G range with PTE. Hence we use one less than the
  443. * difference of page table level shifts.
  444. *
  445. * Don't need to worry about overflow in the top-down case, on 32bit,
  446. * when step_size is 0, round_down() returns 0 for start, and that
  447. * turns it into 0x100000000ULL.
  448. * In the bottom-up case, round_up(x, 0) returns 0 though too, which
  449. * needs to be taken into consideration by the code below.
  450. */
  451. return step_size << (PMD_SHIFT - PAGE_SHIFT - 1);
  452. }
  453. /**
  454. * memory_map_top_down - Map [map_start, map_end) top down
  455. * @map_start: start address of the target memory range
  456. * @map_end: end address of the target memory range
  457. *
  458. * This function will setup direct mapping for memory range
  459. * [map_start, map_end) in top-down. That said, the page tables
  460. * will be allocated at the end of the memory, and we map the
  461. * memory in top-down.
  462. */
  463. static void __init memory_map_top_down(unsigned long map_start,
  464. unsigned long map_end)
  465. {
  466. unsigned long real_end, start, last_start;
  467. unsigned long step_size;
  468. unsigned long addr;
  469. unsigned long mapped_ram_size = 0;
  470. /* xen has big range in reserved near end of ram, skip it at first.*/
  471. addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE);
  472. real_end = addr + PMD_SIZE;
  473. /* step_size need to be small so pgt_buf from BRK could cover it */
  474. step_size = PMD_SIZE;
  475. max_pfn_mapped = 0; /* will get exact value next */
  476. min_pfn_mapped = real_end >> PAGE_SHIFT;
  477. last_start = start = real_end;
  478. /*
  479. * We start from the top (end of memory) and go to the bottom.
  480. * The memblock_find_in_range() gets us a block of RAM from the
  481. * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
  482. * for page table.
  483. */
  484. while (last_start > map_start) {
  485. if (last_start > step_size) {
  486. start = round_down(last_start - 1, step_size);
  487. if (start < map_start)
  488. start = map_start;
  489. } else
  490. start = map_start;
  491. mapped_ram_size += init_range_memory_mapping(start,
  492. last_start);
  493. last_start = start;
  494. min_pfn_mapped = last_start >> PAGE_SHIFT;
  495. if (mapped_ram_size >= step_size)
  496. step_size = get_new_step_size(step_size);
  497. }
  498. if (real_end < map_end)
  499. init_range_memory_mapping(real_end, map_end);
  500. }
  501. /**
  502. * memory_map_bottom_up - Map [map_start, map_end) bottom up
  503. * @map_start: start address of the target memory range
  504. * @map_end: end address of the target memory range
  505. *
  506. * This function will setup direct mapping for memory range
  507. * [map_start, map_end) in bottom-up. Since we have limited the
  508. * bottom-up allocation above the kernel, the page tables will
  509. * be allocated just above the kernel and we map the memory
  510. * in [map_start, map_end) in bottom-up.
  511. */
  512. static void __init memory_map_bottom_up(unsigned long map_start,
  513. unsigned long map_end)
  514. {
  515. unsigned long next, start;
  516. unsigned long mapped_ram_size = 0;
  517. /* step_size need to be small so pgt_buf from BRK could cover it */
  518. unsigned long step_size = PMD_SIZE;
  519. start = map_start;
  520. min_pfn_mapped = start >> PAGE_SHIFT;
  521. /*
  522. * We start from the bottom (@map_start) and go to the top (@map_end).
  523. * The memblock_find_in_range() gets us a block of RAM from the
  524. * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
  525. * for page table.
  526. */
  527. while (start < map_end) {
  528. if (step_size && map_end - start > step_size) {
  529. next = round_up(start + 1, step_size);
  530. if (next > map_end)
  531. next = map_end;
  532. } else {
  533. next = map_end;
  534. }
  535. mapped_ram_size += init_range_memory_mapping(start, next);
  536. start = next;
  537. if (mapped_ram_size >= step_size)
  538. step_size = get_new_step_size(step_size);
  539. }
  540. }
  541. void __init init_mem_mapping(void)
  542. {
  543. unsigned long end;
  544. probe_page_size_mask();
  545. setup_pcid();
  546. #ifdef CONFIG_X86_64
  547. end = max_pfn << PAGE_SHIFT;
  548. #else
  549. end = max_low_pfn << PAGE_SHIFT;
  550. #endif
  551. /* the ISA range is always mapped regardless of memory holes */
  552. init_memory_mapping(0, ISA_END_ADDRESS);
  553. /* Init the trampoline, possibly with KASLR memory offset */
  554. init_trampoline();
  555. /*
  556. * If the allocation is in bottom-up direction, we setup direct mapping
  557. * in bottom-up, otherwise we setup direct mapping in top-down.
  558. */
  559. if (memblock_bottom_up()) {
  560. unsigned long kernel_end = __pa_symbol(_end);
  561. /*
  562. * we need two separate calls here. This is because we want to
  563. * allocate page tables above the kernel. So we first map
  564. * [kernel_end, end) to make memory above the kernel be mapped
  565. * as soon as possible. And then use page tables allocated above
  566. * the kernel to map [ISA_END_ADDRESS, kernel_end).
  567. */
  568. memory_map_bottom_up(kernel_end, end);
  569. memory_map_bottom_up(ISA_END_ADDRESS, kernel_end);
  570. } else {
  571. memory_map_top_down(ISA_END_ADDRESS, end);
  572. }
  573. #ifdef CONFIG_X86_64
  574. if (max_pfn > max_low_pfn) {
  575. /* can we preseve max_low_pfn ?*/
  576. max_low_pfn = max_pfn;
  577. }
  578. #else
  579. early_ioremap_page_table_range_init();
  580. #endif
  581. load_cr3(swapper_pg_dir);
  582. __flush_tlb_all();
  583. x86_init.hyper.init_mem_mapping();
  584. early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
  585. }
  586. /*
  587. * devmem_is_allowed() checks to see if /dev/mem access to a certain address
  588. * is valid. The argument is a physical page number.
  589. *
  590. * On x86, access has to be given to the first megabyte of RAM because that
  591. * area traditionally contains BIOS code and data regions used by X, dosemu,
  592. * and similar apps. Since they map the entire memory range, the whole range
  593. * must be allowed (for mapping), but any areas that would otherwise be
  594. * disallowed are flagged as being "zero filled" instead of rejected.
  595. * Access has to be given to non-kernel-ram areas as well, these contain the
  596. * PCI mmio resources as well as potential bios/acpi data regions.
  597. */
  598. int devmem_is_allowed(unsigned long pagenr)
  599. {
  600. if (page_is_ram(pagenr)) {
  601. /*
  602. * For disallowed memory regions in the low 1MB range,
  603. * request that the page be shown as all zeros.
  604. */
  605. if (pagenr < 256)
  606. return 2;
  607. return 0;
  608. }
  609. /*
  610. * This must follow RAM test, since System RAM is considered a
  611. * restricted resource under CONFIG_STRICT_IOMEM.
  612. */
  613. if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) {
  614. /* Low 1MB bypasses iomem restrictions. */
  615. if (pagenr < 256)
  616. return 1;
  617. return 0;
  618. }
  619. return 1;
  620. }
  621. void free_init_pages(char *what, unsigned long begin, unsigned long end)
  622. {
  623. unsigned long begin_aligned, end_aligned;
  624. /* Make sure boundaries are page aligned */
  625. begin_aligned = PAGE_ALIGN(begin);
  626. end_aligned = end & PAGE_MASK;
  627. if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
  628. begin = begin_aligned;
  629. end = end_aligned;
  630. }
  631. if (begin >= end)
  632. return;
  633. /*
  634. * If debugging page accesses then do not free this memory but
  635. * mark them not present - any buggy init-section access will
  636. * create a kernel page fault:
  637. */
  638. if (debug_pagealloc_enabled()) {
  639. pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
  640. begin, end - 1);
  641. set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
  642. } else {
  643. /*
  644. * We just marked the kernel text read only above, now that
  645. * we are going to free part of that, we need to make that
  646. * writeable and non-executable first.
  647. */
  648. set_memory_nx(begin, (end - begin) >> PAGE_SHIFT);
  649. set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
  650. free_reserved_area((void *)begin, (void *)end,
  651. POISON_FREE_INITMEM, what);
  652. }
  653. }
  654. void __ref free_initmem(void)
  655. {
  656. e820__reallocate_tables();
  657. free_init_pages("unused kernel",
  658. (unsigned long)(&__init_begin),
  659. (unsigned long)(&__init_end));
  660. }
  661. #ifdef CONFIG_BLK_DEV_INITRD
  662. void __init free_initrd_mem(unsigned long start, unsigned long end)
  663. {
  664. /*
  665. * end could be not aligned, and We can not align that,
  666. * decompresser could be confused by aligned initrd_end
  667. * We already reserve the end partial page before in
  668. * - i386_start_kernel()
  669. * - x86_64_start_kernel()
  670. * - relocate_initrd()
  671. * So here We can do PAGE_ALIGN() safely to get partial page to be freed
  672. */
  673. free_init_pages("initrd", start, PAGE_ALIGN(end));
  674. }
  675. #endif
  676. /*
  677. * Calculate the precise size of the DMA zone (first 16 MB of RAM),
  678. * and pass it to the MM layer - to help it set zone watermarks more
  679. * accurately.
  680. *
  681. * Done on 64-bit systems only for the time being, although 32-bit systems
  682. * might benefit from this as well.
  683. */
  684. void __init memblock_find_dma_reserve(void)
  685. {
  686. #ifdef CONFIG_X86_64
  687. u64 nr_pages = 0, nr_free_pages = 0;
  688. unsigned long start_pfn, end_pfn;
  689. phys_addr_t start_addr, end_addr;
  690. int i;
  691. u64 u;
  692. /*
  693. * Iterate over all memory ranges (free and reserved ones alike),
  694. * to calculate the total number of pages in the first 16 MB of RAM:
  695. */
  696. nr_pages = 0;
  697. for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
  698. start_pfn = min(start_pfn, MAX_DMA_PFN);
  699. end_pfn = min(end_pfn, MAX_DMA_PFN);
  700. nr_pages += end_pfn - start_pfn;
  701. }
  702. /*
  703. * Iterate over free memory ranges to calculate the number of free
  704. * pages in the DMA zone, while not counting potential partial
  705. * pages at the beginning or the end of the range:
  706. */
  707. nr_free_pages = 0;
  708. for_each_free_mem_range(u, NUMA_NO_NODE, MEMBLOCK_NONE, &start_addr, &end_addr, NULL) {
  709. start_pfn = min_t(unsigned long, PFN_UP(start_addr), MAX_DMA_PFN);
  710. end_pfn = min_t(unsigned long, PFN_DOWN(end_addr), MAX_DMA_PFN);
  711. if (start_pfn < end_pfn)
  712. nr_free_pages += end_pfn - start_pfn;
  713. }
  714. set_dma_reserve(nr_pages - nr_free_pages);
  715. #endif
  716. }
  717. void __init zone_sizes_init(void)
  718. {
  719. unsigned long max_zone_pfns[MAX_NR_ZONES];
  720. memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
  721. #ifdef CONFIG_ZONE_DMA
  722. max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn);
  723. #endif
  724. #ifdef CONFIG_ZONE_DMA32
  725. max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn);
  726. #endif
  727. max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
  728. #ifdef CONFIG_HIGHMEM
  729. max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
  730. #endif
  731. free_area_init_nodes(max_zone_pfns);
  732. }
  733. DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
  734. .loaded_mm = &init_mm,
  735. .next_asid = 1,
  736. .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
  737. };
  738. EXPORT_SYMBOL_GPL(cpu_tlbstate);
  739. void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
  740. {
  741. /* entry 0 MUST be WB (hardwired to speed up translations) */
  742. BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB);
  743. __cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
  744. __pte2cachemode_tbl[entry] = cache;
  745. }