migration.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/irq.h>
  3. #include <linux/interrupt.h>
  4. #include "internals.h"
  5. /**
  6. * irq_fixup_move_pending - Cleanup irq move pending from a dying CPU
  7. * @desc: Interrupt descpriptor to clean up
  8. * @force_clear: If set clear the move pending bit unconditionally.
  9. * If not set, clear it only when the dying CPU is the
  10. * last one in the pending mask.
  11. *
  12. * Returns true if the pending bit was set and the pending mask contains an
  13. * online CPU other than the dying CPU.
  14. */
  15. bool irq_fixup_move_pending(struct irq_desc *desc, bool force_clear)
  16. {
  17. struct irq_data *data = irq_desc_get_irq_data(desc);
  18. if (!irqd_is_setaffinity_pending(data))
  19. return false;
  20. /*
  21. * The outgoing CPU might be the last online target in a pending
  22. * interrupt move. If that's the case clear the pending move bit.
  23. */
  24. if (cpumask_any_and(desc->pending_mask, cpu_online_mask) >= nr_cpu_ids) {
  25. irqd_clr_move_pending(data);
  26. return false;
  27. }
  28. if (force_clear)
  29. irqd_clr_move_pending(data);
  30. return true;
  31. }
  32. void irq_move_masked_irq(struct irq_data *idata)
  33. {
  34. struct irq_desc *desc = irq_data_to_desc(idata);
  35. struct irq_chip *chip = desc->irq_data.chip;
  36. if (likely(!irqd_is_setaffinity_pending(&desc->irq_data)))
  37. return;
  38. irqd_clr_move_pending(&desc->irq_data);
  39. /*
  40. * Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
  41. */
  42. if (irqd_is_per_cpu(&desc->irq_data)) {
  43. WARN_ON(1);
  44. return;
  45. }
  46. if (unlikely(cpumask_empty(desc->pending_mask)))
  47. return;
  48. if (!chip->irq_set_affinity)
  49. return;
  50. assert_raw_spin_locked(&desc->lock);
  51. /*
  52. * If there was a valid mask to work with, please
  53. * do the disable, re-program, enable sequence.
  54. * This is *not* particularly important for level triggered
  55. * but in a edge trigger case, we might be setting rte
  56. * when an active trigger is coming in. This could
  57. * cause some ioapics to mal-function.
  58. * Being paranoid i guess!
  59. *
  60. * For correct operation this depends on the caller
  61. * masking the irqs.
  62. */
  63. if (cpumask_any_and(desc->pending_mask, cpu_online_mask) < nr_cpu_ids)
  64. irq_do_set_affinity(&desc->irq_data, desc->pending_mask, false);
  65. cpumask_clear(desc->pending_mask);
  66. }
  67. void irq_move_irq(struct irq_data *idata)
  68. {
  69. bool masked;
  70. /*
  71. * Get top level irq_data when CONFIG_IRQ_DOMAIN_HIERARCHY is enabled,
  72. * and it should be optimized away when CONFIG_IRQ_DOMAIN_HIERARCHY is
  73. * disabled. So we avoid an "#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY" here.
  74. */
  75. idata = irq_desc_get_irq_data(irq_data_to_desc(idata));
  76. if (likely(!irqd_is_setaffinity_pending(idata)))
  77. return;
  78. if (unlikely(irqd_irq_disabled(idata)))
  79. return;
  80. /*
  81. * Be careful vs. already masked interrupts. If this is a
  82. * threaded interrupt with ONESHOT set, we can end up with an
  83. * interrupt storm.
  84. */
  85. masked = irqd_irq_masked(idata);
  86. if (!masked)
  87. idata->chip->irq_mask(idata);
  88. irq_move_masked_irq(idata);
  89. if (!masked)
  90. idata->chip->irq_unmask(idata);
  91. }