common.c 143 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/types.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/pci.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/skbuff.h>
  39. #include <net/mac80211.h>
  40. #include "common.h"
  41. int
  42. _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
  43. {
  44. const int interval = 10; /* microseconds */
  45. int t = 0;
  46. do {
  47. if ((_il_rd(il, addr) & mask) == (bits & mask))
  48. return t;
  49. udelay(interval);
  50. t += interval;
  51. } while (t < timeout);
  52. return -ETIMEDOUT;
  53. }
  54. EXPORT_SYMBOL(_il_poll_bit);
  55. void
  56. il_set_bit(struct il_priv *p, u32 r, u32 m)
  57. {
  58. unsigned long reg_flags;
  59. spin_lock_irqsave(&p->reg_lock, reg_flags);
  60. _il_set_bit(p, r, m);
  61. spin_unlock_irqrestore(&p->reg_lock, reg_flags);
  62. }
  63. EXPORT_SYMBOL(il_set_bit);
  64. void
  65. il_clear_bit(struct il_priv *p, u32 r, u32 m)
  66. {
  67. unsigned long reg_flags;
  68. spin_lock_irqsave(&p->reg_lock, reg_flags);
  69. _il_clear_bit(p, r, m);
  70. spin_unlock_irqrestore(&p->reg_lock, reg_flags);
  71. }
  72. EXPORT_SYMBOL(il_clear_bit);
  73. bool
  74. _il_grab_nic_access(struct il_priv *il)
  75. {
  76. int ret;
  77. u32 val;
  78. /* this bit wakes up the NIC */
  79. _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  80. /*
  81. * These bits say the device is running, and should keep running for
  82. * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
  83. * but they do not indicate that embedded SRAM is restored yet;
  84. * 3945 and 4965 have volatile SRAM, and must save/restore contents
  85. * to/from host DRAM when sleeping/waking for power-saving.
  86. * Each direction takes approximately 1/4 millisecond; with this
  87. * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
  88. * series of register accesses are expected (e.g. reading Event Log),
  89. * to keep device from sleeping.
  90. *
  91. * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
  92. * SRAM is okay/restored. We don't check that here because this call
  93. * is just for hardware register access; but GP1 MAC_SLEEP check is a
  94. * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
  95. *
  96. */
  97. ret =
  98. _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
  99. (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
  100. CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
  101. if (unlikely(ret < 0)) {
  102. val = _il_rd(il, CSR_GP_CNTRL);
  103. WARN_ONCE(1, "Timeout waiting for ucode processor access "
  104. "(CSR_GP_CNTRL 0x%08x)\n", val);
  105. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
  106. return false;
  107. }
  108. return true;
  109. }
  110. EXPORT_SYMBOL_GPL(_il_grab_nic_access);
  111. int
  112. il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
  113. {
  114. const int interval = 10; /* microseconds */
  115. int t = 0;
  116. do {
  117. if ((il_rd(il, addr) & mask) == mask)
  118. return t;
  119. udelay(interval);
  120. t += interval;
  121. } while (t < timeout);
  122. return -ETIMEDOUT;
  123. }
  124. EXPORT_SYMBOL(il_poll_bit);
  125. u32
  126. il_rd_prph(struct il_priv *il, u32 reg)
  127. {
  128. unsigned long reg_flags;
  129. u32 val;
  130. spin_lock_irqsave(&il->reg_lock, reg_flags);
  131. _il_grab_nic_access(il);
  132. val = _il_rd_prph(il, reg);
  133. _il_release_nic_access(il);
  134. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  135. return val;
  136. }
  137. EXPORT_SYMBOL(il_rd_prph);
  138. void
  139. il_wr_prph(struct il_priv *il, u32 addr, u32 val)
  140. {
  141. unsigned long reg_flags;
  142. spin_lock_irqsave(&il->reg_lock, reg_flags);
  143. if (likely(_il_grab_nic_access(il))) {
  144. _il_wr_prph(il, addr, val);
  145. _il_release_nic_access(il);
  146. }
  147. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  148. }
  149. EXPORT_SYMBOL(il_wr_prph);
  150. u32
  151. il_read_targ_mem(struct il_priv *il, u32 addr)
  152. {
  153. unsigned long reg_flags;
  154. u32 value;
  155. spin_lock_irqsave(&il->reg_lock, reg_flags);
  156. _il_grab_nic_access(il);
  157. _il_wr(il, HBUS_TARG_MEM_RADDR, addr);
  158. value = _il_rd(il, HBUS_TARG_MEM_RDAT);
  159. _il_release_nic_access(il);
  160. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  161. return value;
  162. }
  163. EXPORT_SYMBOL(il_read_targ_mem);
  164. void
  165. il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
  166. {
  167. unsigned long reg_flags;
  168. spin_lock_irqsave(&il->reg_lock, reg_flags);
  169. if (likely(_il_grab_nic_access(il))) {
  170. _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
  171. _il_wr(il, HBUS_TARG_MEM_WDAT, val);
  172. _il_release_nic_access(il);
  173. }
  174. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  175. }
  176. EXPORT_SYMBOL(il_write_targ_mem);
  177. const char *
  178. il_get_cmd_string(u8 cmd)
  179. {
  180. switch (cmd) {
  181. IL_CMD(N_ALIVE);
  182. IL_CMD(N_ERROR);
  183. IL_CMD(C_RXON);
  184. IL_CMD(C_RXON_ASSOC);
  185. IL_CMD(C_QOS_PARAM);
  186. IL_CMD(C_RXON_TIMING);
  187. IL_CMD(C_ADD_STA);
  188. IL_CMD(C_REM_STA);
  189. IL_CMD(C_WEPKEY);
  190. IL_CMD(N_3945_RX);
  191. IL_CMD(C_TX);
  192. IL_CMD(C_RATE_SCALE);
  193. IL_CMD(C_LEDS);
  194. IL_CMD(C_TX_LINK_QUALITY_CMD);
  195. IL_CMD(C_CHANNEL_SWITCH);
  196. IL_CMD(N_CHANNEL_SWITCH);
  197. IL_CMD(C_SPECTRUM_MEASUREMENT);
  198. IL_CMD(N_SPECTRUM_MEASUREMENT);
  199. IL_CMD(C_POWER_TBL);
  200. IL_CMD(N_PM_SLEEP);
  201. IL_CMD(N_PM_DEBUG_STATS);
  202. IL_CMD(C_SCAN);
  203. IL_CMD(C_SCAN_ABORT);
  204. IL_CMD(N_SCAN_START);
  205. IL_CMD(N_SCAN_RESULTS);
  206. IL_CMD(N_SCAN_COMPLETE);
  207. IL_CMD(N_BEACON);
  208. IL_CMD(C_TX_BEACON);
  209. IL_CMD(C_TX_PWR_TBL);
  210. IL_CMD(C_BT_CONFIG);
  211. IL_CMD(C_STATS);
  212. IL_CMD(N_STATS);
  213. IL_CMD(N_CARD_STATE);
  214. IL_CMD(N_MISSED_BEACONS);
  215. IL_CMD(C_CT_KILL_CONFIG);
  216. IL_CMD(C_SENSITIVITY);
  217. IL_CMD(C_PHY_CALIBRATION);
  218. IL_CMD(N_RX_PHY);
  219. IL_CMD(N_RX_MPDU);
  220. IL_CMD(N_RX);
  221. IL_CMD(N_COMPRESSED_BA);
  222. default:
  223. return "UNKNOWN";
  224. }
  225. }
  226. EXPORT_SYMBOL(il_get_cmd_string);
  227. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  228. static void
  229. il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd,
  230. struct il_rx_pkt *pkt)
  231. {
  232. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  233. IL_ERR("Bad return from %s (0x%08X)\n",
  234. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  235. return;
  236. }
  237. #ifdef CONFIG_IWLEGACY_DEBUG
  238. switch (cmd->hdr.cmd) {
  239. case C_TX_LINK_QUALITY_CMD:
  240. case C_SENSITIVITY:
  241. D_HC_DUMP("back from %s (0x%08X)\n",
  242. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  243. break;
  244. default:
  245. D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd),
  246. pkt->hdr.flags);
  247. }
  248. #endif
  249. }
  250. static int
  251. il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
  252. {
  253. int ret;
  254. BUG_ON(!(cmd->flags & CMD_ASYNC));
  255. /* An asynchronous command can not expect an SKB to be set. */
  256. BUG_ON(cmd->flags & CMD_WANT_SKB);
  257. /* Assign a generic callback if one is not provided */
  258. if (!cmd->callback)
  259. cmd->callback = il_generic_cmd_callback;
  260. if (test_bit(S_EXIT_PENDING, &il->status))
  261. return -EBUSY;
  262. ret = il_enqueue_hcmd(il, cmd);
  263. if (ret < 0) {
  264. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  265. il_get_cmd_string(cmd->id), ret);
  266. return ret;
  267. }
  268. return 0;
  269. }
  270. int
  271. il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
  272. {
  273. int cmd_idx;
  274. int ret;
  275. lockdep_assert_held(&il->mutex);
  276. BUG_ON(cmd->flags & CMD_ASYNC);
  277. /* A synchronous command can not have a callback set. */
  278. BUG_ON(cmd->callback);
  279. D_INFO("Attempting to send sync command %s\n",
  280. il_get_cmd_string(cmd->id));
  281. set_bit(S_HCMD_ACTIVE, &il->status);
  282. D_INFO("Setting HCMD_ACTIVE for command %s\n",
  283. il_get_cmd_string(cmd->id));
  284. cmd_idx = il_enqueue_hcmd(il, cmd);
  285. if (cmd_idx < 0) {
  286. ret = cmd_idx;
  287. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  288. il_get_cmd_string(cmd->id), ret);
  289. goto out;
  290. }
  291. ret = wait_event_timeout(il->wait_command_queue,
  292. !test_bit(S_HCMD_ACTIVE, &il->status),
  293. HOST_COMPLETE_TIMEOUT);
  294. if (!ret) {
  295. if (test_bit(S_HCMD_ACTIVE, &il->status)) {
  296. IL_ERR("Error sending %s: time out after %dms.\n",
  297. il_get_cmd_string(cmd->id),
  298. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  299. clear_bit(S_HCMD_ACTIVE, &il->status);
  300. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  301. il_get_cmd_string(cmd->id));
  302. ret = -ETIMEDOUT;
  303. goto cancel;
  304. }
  305. }
  306. if (test_bit(S_RFKILL, &il->status)) {
  307. IL_ERR("Command %s aborted: RF KILL Switch\n",
  308. il_get_cmd_string(cmd->id));
  309. ret = -ECANCELED;
  310. goto fail;
  311. }
  312. if (test_bit(S_FW_ERROR, &il->status)) {
  313. IL_ERR("Command %s failed: FW Error\n",
  314. il_get_cmd_string(cmd->id));
  315. ret = -EIO;
  316. goto fail;
  317. }
  318. if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
  319. IL_ERR("Error: Response NULL in '%s'\n",
  320. il_get_cmd_string(cmd->id));
  321. ret = -EIO;
  322. goto cancel;
  323. }
  324. ret = 0;
  325. goto out;
  326. cancel:
  327. if (cmd->flags & CMD_WANT_SKB) {
  328. /*
  329. * Cancel the CMD_WANT_SKB flag for the cmd in the
  330. * TX cmd queue. Otherwise in case the cmd comes
  331. * in later, it will possibly set an invalid
  332. * address (cmd->meta.source).
  333. */
  334. il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB;
  335. }
  336. fail:
  337. if (cmd->reply_page) {
  338. il_free_pages(il, cmd->reply_page);
  339. cmd->reply_page = 0;
  340. }
  341. out:
  342. return ret;
  343. }
  344. EXPORT_SYMBOL(il_send_cmd_sync);
  345. int
  346. il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
  347. {
  348. if (cmd->flags & CMD_ASYNC)
  349. return il_send_cmd_async(il, cmd);
  350. return il_send_cmd_sync(il, cmd);
  351. }
  352. EXPORT_SYMBOL(il_send_cmd);
  353. int
  354. il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
  355. {
  356. struct il_host_cmd cmd = {
  357. .id = id,
  358. .len = len,
  359. .data = data,
  360. };
  361. return il_send_cmd_sync(il, &cmd);
  362. }
  363. EXPORT_SYMBOL(il_send_cmd_pdu);
  364. int
  365. il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
  366. void (*callback) (struct il_priv *il,
  367. struct il_device_cmd *cmd,
  368. struct il_rx_pkt *pkt))
  369. {
  370. struct il_host_cmd cmd = {
  371. .id = id,
  372. .len = len,
  373. .data = data,
  374. };
  375. cmd.flags |= CMD_ASYNC;
  376. cmd.callback = callback;
  377. return il_send_cmd_async(il, &cmd);
  378. }
  379. EXPORT_SYMBOL(il_send_cmd_pdu_async);
  380. /* default: IL_LED_BLINK(0) using blinking idx table */
  381. static int led_mode;
  382. module_param(led_mode, int, S_IRUGO);
  383. MODULE_PARM_DESC(led_mode,
  384. "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking");
  385. /* Throughput OFF time(ms) ON time (ms)
  386. * >300 25 25
  387. * >200 to 300 40 40
  388. * >100 to 200 55 55
  389. * >70 to 100 65 65
  390. * >50 to 70 75 75
  391. * >20 to 50 85 85
  392. * >10 to 20 95 95
  393. * >5 to 10 110 110
  394. * >1 to 5 130 130
  395. * >0 to 1 167 167
  396. * <=0 SOLID ON
  397. */
  398. static const struct ieee80211_tpt_blink il_blink[] = {
  399. {.throughput = 0, .blink_time = 334},
  400. {.throughput = 1 * 1024 - 1, .blink_time = 260},
  401. {.throughput = 5 * 1024 - 1, .blink_time = 220},
  402. {.throughput = 10 * 1024 - 1, .blink_time = 190},
  403. {.throughput = 20 * 1024 - 1, .blink_time = 170},
  404. {.throughput = 50 * 1024 - 1, .blink_time = 150},
  405. {.throughput = 70 * 1024 - 1, .blink_time = 130},
  406. {.throughput = 100 * 1024 - 1, .blink_time = 110},
  407. {.throughput = 200 * 1024 - 1, .blink_time = 80},
  408. {.throughput = 300 * 1024 - 1, .blink_time = 50},
  409. };
  410. /*
  411. * Adjust led blink rate to compensate on a MAC Clock difference on every HW
  412. * Led blink rate analysis showed an average deviation of 0% on 3945,
  413. * 5% on 4965 HW.
  414. * Need to compensate on the led on/off time per HW according to the deviation
  415. * to achieve the desired led frequency
  416. * The calculation is: (100-averageDeviation)/100 * blinkTime
  417. * For code efficiency the calculation will be:
  418. * compensation = (100 - averageDeviation) * 64 / 100
  419. * NewBlinkTime = (compensation * BlinkTime) / 64
  420. */
  421. static inline u8
  422. il_blink_compensation(struct il_priv *il, u8 time, u16 compensation)
  423. {
  424. if (!compensation) {
  425. IL_ERR("undefined blink compensation: "
  426. "use pre-defined blinking time\n");
  427. return time;
  428. }
  429. return (u8) ((time * compensation) >> 6);
  430. }
  431. /* Set led pattern command */
  432. static int
  433. il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off)
  434. {
  435. struct il_led_cmd led_cmd = {
  436. .id = IL_LED_LINK,
  437. .interval = IL_DEF_LED_INTRVL
  438. };
  439. int ret;
  440. if (!test_bit(S_READY, &il->status))
  441. return -EBUSY;
  442. if (il->blink_on == on && il->blink_off == off)
  443. return 0;
  444. if (off == 0) {
  445. /* led is SOLID_ON */
  446. on = IL_LED_SOLID;
  447. }
  448. D_LED("Led blink time compensation=%u\n",
  449. il->cfg->led_compensation);
  450. led_cmd.on =
  451. il_blink_compensation(il, on,
  452. il->cfg->led_compensation);
  453. led_cmd.off =
  454. il_blink_compensation(il, off,
  455. il->cfg->led_compensation);
  456. ret = il->ops->send_led_cmd(il, &led_cmd);
  457. if (!ret) {
  458. il->blink_on = on;
  459. il->blink_off = off;
  460. }
  461. return ret;
  462. }
  463. static void
  464. il_led_brightness_set(struct led_classdev *led_cdev,
  465. enum led_brightness brightness)
  466. {
  467. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  468. unsigned long on = 0;
  469. if (brightness > 0)
  470. on = IL_LED_SOLID;
  471. il_led_cmd(il, on, 0);
  472. }
  473. static int
  474. il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on,
  475. unsigned long *delay_off)
  476. {
  477. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  478. return il_led_cmd(il, *delay_on, *delay_off);
  479. }
  480. void
  481. il_leds_init(struct il_priv *il)
  482. {
  483. int mode = led_mode;
  484. int ret;
  485. if (mode == IL_LED_DEFAULT)
  486. mode = il->cfg->led_mode;
  487. il->led.name =
  488. kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy));
  489. il->led.brightness_set = il_led_brightness_set;
  490. il->led.blink_set = il_led_blink_set;
  491. il->led.max_brightness = 1;
  492. switch (mode) {
  493. case IL_LED_DEFAULT:
  494. WARN_ON(1);
  495. break;
  496. case IL_LED_BLINK:
  497. il->led.default_trigger =
  498. ieee80211_create_tpt_led_trigger(il->hw,
  499. IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
  500. il_blink,
  501. ARRAY_SIZE(il_blink));
  502. break;
  503. case IL_LED_RF_STATE:
  504. il->led.default_trigger = ieee80211_get_radio_led_name(il->hw);
  505. break;
  506. }
  507. ret = led_classdev_register(&il->pci_dev->dev, &il->led);
  508. if (ret) {
  509. kfree(il->led.name);
  510. return;
  511. }
  512. il->led_registered = true;
  513. }
  514. EXPORT_SYMBOL(il_leds_init);
  515. void
  516. il_leds_exit(struct il_priv *il)
  517. {
  518. if (!il->led_registered)
  519. return;
  520. led_classdev_unregister(&il->led);
  521. kfree(il->led.name);
  522. }
  523. EXPORT_SYMBOL(il_leds_exit);
  524. /************************** EEPROM BANDS ****************************
  525. *
  526. * The il_eeprom_band definitions below provide the mapping from the
  527. * EEPROM contents to the specific channel number supported for each
  528. * band.
  529. *
  530. * For example, il_priv->eeprom.band_3_channels[4] from the band_3
  531. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  532. * The specific geography and calibration information for that channel
  533. * is contained in the eeprom map itself.
  534. *
  535. * During init, we copy the eeprom information and channel map
  536. * information into il->channel_info_24/52 and il->channel_map_24/52
  537. *
  538. * channel_map_24/52 provides the idx in the channel_info array for a
  539. * given channel. We have to have two separate maps as there is channel
  540. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  541. * band_2
  542. *
  543. * A value of 0xff stored in the channel_map indicates that the channel
  544. * is not supported by the hardware at all.
  545. *
  546. * A value of 0xfe in the channel_map indicates that the channel is not
  547. * valid for Tx with the current hardware. This means that
  548. * while the system can tune and receive on a given channel, it may not
  549. * be able to associate or transmit any frames on that
  550. * channel. There is no corresponding channel information for that
  551. * entry.
  552. *
  553. *********************************************************************/
  554. /* 2.4 GHz */
  555. const u8 il_eeprom_band_1[14] = {
  556. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  557. };
  558. /* 5.2 GHz bands */
  559. static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
  560. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  561. };
  562. static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
  563. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  564. };
  565. static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
  566. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  567. };
  568. static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
  569. 145, 149, 153, 157, 161, 165
  570. };
  571. static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
  572. 1, 2, 3, 4, 5, 6, 7
  573. };
  574. static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
  575. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  576. };
  577. /******************************************************************************
  578. *
  579. * EEPROM related functions
  580. *
  581. ******************************************************************************/
  582. static int
  583. il_eeprom_verify_signature(struct il_priv *il)
  584. {
  585. u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
  586. int ret = 0;
  587. D_EEPROM("EEPROM signature=0x%08x\n", gp);
  588. switch (gp) {
  589. case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
  590. case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
  591. break;
  592. default:
  593. IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp);
  594. ret = -ENOENT;
  595. break;
  596. }
  597. return ret;
  598. }
  599. const u8 *
  600. il_eeprom_query_addr(const struct il_priv *il, size_t offset)
  601. {
  602. BUG_ON(offset >= il->cfg->eeprom_size);
  603. return &il->eeprom[offset];
  604. }
  605. EXPORT_SYMBOL(il_eeprom_query_addr);
  606. u16
  607. il_eeprom_query16(const struct il_priv *il, size_t offset)
  608. {
  609. if (!il->eeprom)
  610. return 0;
  611. return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8);
  612. }
  613. EXPORT_SYMBOL(il_eeprom_query16);
  614. /**
  615. * il_eeprom_init - read EEPROM contents
  616. *
  617. * Load the EEPROM contents from adapter into il->eeprom
  618. *
  619. * NOTE: This routine uses the non-debug IO access functions.
  620. */
  621. int
  622. il_eeprom_init(struct il_priv *il)
  623. {
  624. __le16 *e;
  625. u32 gp = _il_rd(il, CSR_EEPROM_GP);
  626. int sz;
  627. int ret;
  628. u16 addr;
  629. /* allocate eeprom */
  630. sz = il->cfg->eeprom_size;
  631. D_EEPROM("NVM size = %d\n", sz);
  632. il->eeprom = kzalloc(sz, GFP_KERNEL);
  633. if (!il->eeprom)
  634. return -ENOMEM;
  635. e = (__le16 *) il->eeprom;
  636. il->ops->apm_init(il);
  637. ret = il_eeprom_verify_signature(il);
  638. if (ret < 0) {
  639. IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  640. ret = -ENOENT;
  641. goto err;
  642. }
  643. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  644. ret = il->ops->eeprom_acquire_semaphore(il);
  645. if (ret < 0) {
  646. IL_ERR("Failed to acquire EEPROM semaphore.\n");
  647. ret = -ENOENT;
  648. goto err;
  649. }
  650. /* eeprom is an array of 16bit values */
  651. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  652. u32 r;
  653. _il_wr(il, CSR_EEPROM_REG,
  654. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  655. ret =
  656. _il_poll_bit(il, CSR_EEPROM_REG,
  657. CSR_EEPROM_REG_READ_VALID_MSK,
  658. CSR_EEPROM_REG_READ_VALID_MSK,
  659. IL_EEPROM_ACCESS_TIMEOUT);
  660. if (ret < 0) {
  661. IL_ERR("Time out reading EEPROM[%d]\n", addr);
  662. goto done;
  663. }
  664. r = _il_rd(il, CSR_EEPROM_REG);
  665. e[addr / 2] = cpu_to_le16(r >> 16);
  666. }
  667. D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM",
  668. il_eeprom_query16(il, EEPROM_VERSION));
  669. ret = 0;
  670. done:
  671. il->ops->eeprom_release_semaphore(il);
  672. err:
  673. if (ret)
  674. il_eeprom_free(il);
  675. /* Reset chip to save power until we load uCode during "up". */
  676. il_apm_stop(il);
  677. return ret;
  678. }
  679. EXPORT_SYMBOL(il_eeprom_init);
  680. void
  681. il_eeprom_free(struct il_priv *il)
  682. {
  683. kfree(il->eeprom);
  684. il->eeprom = NULL;
  685. }
  686. EXPORT_SYMBOL(il_eeprom_free);
  687. static void
  688. il_init_band_reference(const struct il_priv *il, int eep_band,
  689. int *eeprom_ch_count,
  690. const struct il_eeprom_channel **eeprom_ch_info,
  691. const u8 **eeprom_ch_idx)
  692. {
  693. u32 offset = il->cfg->regulatory_bands[eep_band - 1];
  694. switch (eep_band) {
  695. case 1: /* 2.4GHz band */
  696. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
  697. *eeprom_ch_info =
  698. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  699. offset);
  700. *eeprom_ch_idx = il_eeprom_band_1;
  701. break;
  702. case 2: /* 4.9GHz band */
  703. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
  704. *eeprom_ch_info =
  705. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  706. offset);
  707. *eeprom_ch_idx = il_eeprom_band_2;
  708. break;
  709. case 3: /* 5.2GHz band */
  710. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
  711. *eeprom_ch_info =
  712. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  713. offset);
  714. *eeprom_ch_idx = il_eeprom_band_3;
  715. break;
  716. case 4: /* 5.5GHz band */
  717. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
  718. *eeprom_ch_info =
  719. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  720. offset);
  721. *eeprom_ch_idx = il_eeprom_band_4;
  722. break;
  723. case 5: /* 5.7GHz band */
  724. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
  725. *eeprom_ch_info =
  726. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  727. offset);
  728. *eeprom_ch_idx = il_eeprom_band_5;
  729. break;
  730. case 6: /* 2.4GHz ht40 channels */
  731. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
  732. *eeprom_ch_info =
  733. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  734. offset);
  735. *eeprom_ch_idx = il_eeprom_band_6;
  736. break;
  737. case 7: /* 5 GHz ht40 channels */
  738. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
  739. *eeprom_ch_info =
  740. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  741. offset);
  742. *eeprom_ch_idx = il_eeprom_band_7;
  743. break;
  744. default:
  745. BUG();
  746. }
  747. }
  748. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  749. ? # x " " : "")
  750. /**
  751. * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
  752. *
  753. * Does not set up a command, or touch hardware.
  754. */
  755. static int
  756. il_mod_ht40_chan_info(struct il_priv *il, enum nl80211_band band, u16 channel,
  757. const struct il_eeprom_channel *eeprom_ch,
  758. u8 clear_ht40_extension_channel)
  759. {
  760. struct il_channel_info *ch_info;
  761. ch_info =
  762. (struct il_channel_info *)il_get_channel_info(il, band, channel);
  763. if (!il_is_channel_valid(ch_info))
  764. return -1;
  765. D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
  766. " Ad-Hoc %ssupported\n", ch_info->channel,
  767. il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
  768. CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE),
  769. CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE),
  770. CHECK_AND_PRINT(DFS), eeprom_ch->flags,
  771. eeprom_ch->max_power_avg,
  772. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
  773. !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not ");
  774. ch_info->ht40_eeprom = *eeprom_ch;
  775. ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
  776. ch_info->ht40_flags = eeprom_ch->flags;
  777. if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
  778. ch_info->ht40_extension_channel &=
  779. ~clear_ht40_extension_channel;
  780. return 0;
  781. }
  782. #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  783. ? # x " " : "")
  784. /**
  785. * il_init_channel_map - Set up driver's info for all possible channels
  786. */
  787. int
  788. il_init_channel_map(struct il_priv *il)
  789. {
  790. int eeprom_ch_count = 0;
  791. const u8 *eeprom_ch_idx = NULL;
  792. const struct il_eeprom_channel *eeprom_ch_info = NULL;
  793. int band, ch;
  794. struct il_channel_info *ch_info;
  795. if (il->channel_count) {
  796. D_EEPROM("Channel map already initialized.\n");
  797. return 0;
  798. }
  799. D_EEPROM("Initializing regulatory info from EEPROM\n");
  800. il->channel_count =
  801. ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) +
  802. ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) +
  803. ARRAY_SIZE(il_eeprom_band_5);
  804. D_EEPROM("Parsing data for %d channels.\n", il->channel_count);
  805. il->channel_info =
  806. kzalloc(sizeof(struct il_channel_info) * il->channel_count,
  807. GFP_KERNEL);
  808. if (!il->channel_info) {
  809. IL_ERR("Could not allocate channel_info\n");
  810. il->channel_count = 0;
  811. return -ENOMEM;
  812. }
  813. ch_info = il->channel_info;
  814. /* Loop through the 5 EEPROM bands adding them in order to the
  815. * channel map we maintain (that contains additional information than
  816. * what just in the EEPROM) */
  817. for (band = 1; band <= 5; band++) {
  818. il_init_band_reference(il, band, &eeprom_ch_count,
  819. &eeprom_ch_info, &eeprom_ch_idx);
  820. /* Loop through each band adding each of the channels */
  821. for (ch = 0; ch < eeprom_ch_count; ch++) {
  822. ch_info->channel = eeprom_ch_idx[ch];
  823. ch_info->band =
  824. (band ==
  825. 1) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
  826. /* permanently store EEPROM's channel regulatory flags
  827. * and max power in channel info database. */
  828. ch_info->eeprom = eeprom_ch_info[ch];
  829. /* Copy the run-time flags so they are there even on
  830. * invalid channels */
  831. ch_info->flags = eeprom_ch_info[ch].flags;
  832. /* First write that ht40 is not enabled, and then enable
  833. * one by one */
  834. ch_info->ht40_extension_channel =
  835. IEEE80211_CHAN_NO_HT40;
  836. if (!(il_is_channel_valid(ch_info))) {
  837. D_EEPROM("Ch. %d Flags %x [%sGHz] - "
  838. "No traffic\n", ch_info->channel,
  839. ch_info->flags,
  840. il_is_channel_a_band(ch_info) ? "5.2" :
  841. "2.4");
  842. ch_info++;
  843. continue;
  844. }
  845. /* Initialize regulatory-based run-time data */
  846. ch_info->max_power_avg = ch_info->curr_txpow =
  847. eeprom_ch_info[ch].max_power_avg;
  848. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  849. ch_info->min_power = 0;
  850. D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):"
  851. " Ad-Hoc %ssupported\n", ch_info->channel,
  852. il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
  853. CHECK_AND_PRINT_I(VALID),
  854. CHECK_AND_PRINT_I(IBSS),
  855. CHECK_AND_PRINT_I(ACTIVE),
  856. CHECK_AND_PRINT_I(RADAR),
  857. CHECK_AND_PRINT_I(WIDE),
  858. CHECK_AND_PRINT_I(DFS),
  859. eeprom_ch_info[ch].flags,
  860. eeprom_ch_info[ch].max_power_avg,
  861. ((eeprom_ch_info[ch].
  862. flags & EEPROM_CHANNEL_IBSS) &&
  863. !(eeprom_ch_info[ch].
  864. flags & EEPROM_CHANNEL_RADAR)) ? "" :
  865. "not ");
  866. ch_info++;
  867. }
  868. }
  869. /* Check if we do have HT40 channels */
  870. if (il->cfg->regulatory_bands[5] == EEPROM_REGULATORY_BAND_NO_HT40 &&
  871. il->cfg->regulatory_bands[6] == EEPROM_REGULATORY_BAND_NO_HT40)
  872. return 0;
  873. /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
  874. for (band = 6; band <= 7; band++) {
  875. enum nl80211_band ieeeband;
  876. il_init_band_reference(il, band, &eeprom_ch_count,
  877. &eeprom_ch_info, &eeprom_ch_idx);
  878. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  879. ieeeband =
  880. (band == 6) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
  881. /* Loop through each band adding each of the channels */
  882. for (ch = 0; ch < eeprom_ch_count; ch++) {
  883. /* Set up driver's info for lower half */
  884. il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch],
  885. &eeprom_ch_info[ch],
  886. IEEE80211_CHAN_NO_HT40PLUS);
  887. /* Set up driver's info for upper half */
  888. il_mod_ht40_chan_info(il, ieeeband,
  889. eeprom_ch_idx[ch] + 4,
  890. &eeprom_ch_info[ch],
  891. IEEE80211_CHAN_NO_HT40MINUS);
  892. }
  893. }
  894. return 0;
  895. }
  896. EXPORT_SYMBOL(il_init_channel_map);
  897. /*
  898. * il_free_channel_map - undo allocations in il_init_channel_map
  899. */
  900. void
  901. il_free_channel_map(struct il_priv *il)
  902. {
  903. kfree(il->channel_info);
  904. il->channel_count = 0;
  905. }
  906. EXPORT_SYMBOL(il_free_channel_map);
  907. /**
  908. * il_get_channel_info - Find driver's ilate channel info
  909. *
  910. * Based on band and channel number.
  911. */
  912. const struct il_channel_info *
  913. il_get_channel_info(const struct il_priv *il, enum nl80211_band band,
  914. u16 channel)
  915. {
  916. int i;
  917. switch (band) {
  918. case NL80211_BAND_5GHZ:
  919. for (i = 14; i < il->channel_count; i++) {
  920. if (il->channel_info[i].channel == channel)
  921. return &il->channel_info[i];
  922. }
  923. break;
  924. case NL80211_BAND_2GHZ:
  925. if (channel >= 1 && channel <= 14)
  926. return &il->channel_info[channel - 1];
  927. break;
  928. default:
  929. BUG();
  930. }
  931. return NULL;
  932. }
  933. EXPORT_SYMBOL(il_get_channel_info);
  934. /*
  935. * Setting power level allows the card to go to sleep when not busy.
  936. *
  937. * We calculate a sleep command based on the required latency, which
  938. * we get from mac80211.
  939. */
  940. #define SLP_VEC(X0, X1, X2, X3, X4) { \
  941. cpu_to_le32(X0), \
  942. cpu_to_le32(X1), \
  943. cpu_to_le32(X2), \
  944. cpu_to_le32(X3), \
  945. cpu_to_le32(X4) \
  946. }
  947. static void
  948. il_build_powertable_cmd(struct il_priv *il, struct il_powertable_cmd *cmd)
  949. {
  950. const __le32 interval[3][IL_POWER_VEC_SIZE] = {
  951. SLP_VEC(2, 2, 4, 6, 0xFF),
  952. SLP_VEC(2, 4, 7, 10, 10),
  953. SLP_VEC(4, 7, 10, 10, 0xFF)
  954. };
  955. int i, dtim_period, no_dtim;
  956. u32 max_sleep;
  957. bool skip;
  958. memset(cmd, 0, sizeof(*cmd));
  959. if (il->power_data.pci_pm)
  960. cmd->flags |= IL_POWER_PCI_PM_MSK;
  961. /* if no Power Save, we are done */
  962. if (il->power_data.ps_disabled)
  963. return;
  964. cmd->flags = IL_POWER_DRIVER_ALLOW_SLEEP_MSK;
  965. cmd->keep_alive_seconds = 0;
  966. cmd->debug_flags = 0;
  967. cmd->rx_data_timeout = cpu_to_le32(25 * 1024);
  968. cmd->tx_data_timeout = cpu_to_le32(25 * 1024);
  969. cmd->keep_alive_beacons = 0;
  970. dtim_period = il->vif ? il->vif->bss_conf.dtim_period : 0;
  971. if (dtim_period <= 2) {
  972. memcpy(cmd->sleep_interval, interval[0], sizeof(interval[0]));
  973. no_dtim = 2;
  974. } else if (dtim_period <= 10) {
  975. memcpy(cmd->sleep_interval, interval[1], sizeof(interval[1]));
  976. no_dtim = 2;
  977. } else {
  978. memcpy(cmd->sleep_interval, interval[2], sizeof(interval[2]));
  979. no_dtim = 0;
  980. }
  981. if (dtim_period == 0) {
  982. dtim_period = 1;
  983. skip = false;
  984. } else {
  985. skip = !!no_dtim;
  986. }
  987. if (skip) {
  988. __le32 tmp = cmd->sleep_interval[IL_POWER_VEC_SIZE - 1];
  989. max_sleep = le32_to_cpu(tmp);
  990. if (max_sleep == 0xFF)
  991. max_sleep = dtim_period * (skip + 1);
  992. else if (max_sleep > dtim_period)
  993. max_sleep = (max_sleep / dtim_period) * dtim_period;
  994. cmd->flags |= IL_POWER_SLEEP_OVER_DTIM_MSK;
  995. } else {
  996. max_sleep = dtim_period;
  997. cmd->flags &= ~IL_POWER_SLEEP_OVER_DTIM_MSK;
  998. }
  999. for (i = 0; i < IL_POWER_VEC_SIZE; i++)
  1000. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1001. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1002. }
  1003. static int
  1004. il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
  1005. {
  1006. D_POWER("Sending power/sleep command\n");
  1007. D_POWER("Flags value = 0x%08X\n", cmd->flags);
  1008. D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1009. D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1010. D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1011. le32_to_cpu(cmd->sleep_interval[0]),
  1012. le32_to_cpu(cmd->sleep_interval[1]),
  1013. le32_to_cpu(cmd->sleep_interval[2]),
  1014. le32_to_cpu(cmd->sleep_interval[3]),
  1015. le32_to_cpu(cmd->sleep_interval[4]));
  1016. return il_send_cmd_pdu(il, C_POWER_TBL,
  1017. sizeof(struct il_powertable_cmd), cmd);
  1018. }
  1019. static int
  1020. il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force)
  1021. {
  1022. int ret;
  1023. bool update_chains;
  1024. lockdep_assert_held(&il->mutex);
  1025. /* Don't update the RX chain when chain noise calibration is running */
  1026. update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
  1027. il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
  1028. if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
  1029. return 0;
  1030. if (!il_is_ready_rf(il))
  1031. return -EIO;
  1032. /* scan complete use sleep_power_next, need to be updated */
  1033. memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
  1034. if (test_bit(S_SCANNING, &il->status) && !force) {
  1035. D_INFO("Defer power set mode while scanning\n");
  1036. return 0;
  1037. }
  1038. if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
  1039. set_bit(S_POWER_PMI, &il->status);
  1040. ret = il_set_power(il, cmd);
  1041. if (!ret) {
  1042. if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
  1043. clear_bit(S_POWER_PMI, &il->status);
  1044. if (il->ops->update_chain_flags && update_chains)
  1045. il->ops->update_chain_flags(il);
  1046. else if (il->ops->update_chain_flags)
  1047. D_POWER("Cannot update the power, chain noise "
  1048. "calibration running: %d\n",
  1049. il->chain_noise_data.state);
  1050. memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
  1051. } else
  1052. IL_ERR("set power fail, ret = %d", ret);
  1053. return ret;
  1054. }
  1055. int
  1056. il_power_update_mode(struct il_priv *il, bool force)
  1057. {
  1058. struct il_powertable_cmd cmd;
  1059. il_build_powertable_cmd(il, &cmd);
  1060. return il_power_set_mode(il, &cmd, force);
  1061. }
  1062. EXPORT_SYMBOL(il_power_update_mode);
  1063. /* initialize to default */
  1064. void
  1065. il_power_initialize(struct il_priv *il)
  1066. {
  1067. u16 lctl;
  1068. pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
  1069. il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);
  1070. il->power_data.debug_sleep_level_override = -1;
  1071. memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd));
  1072. }
  1073. EXPORT_SYMBOL(il_power_initialize);
  1074. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  1075. * sending probe req. This should be set long enough to hear probe responses
  1076. * from more than one AP. */
  1077. #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  1078. #define IL_ACTIVE_DWELL_TIME_52 (20)
  1079. #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  1080. #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  1081. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  1082. * Must be set longer than active dwell time.
  1083. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  1084. #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  1085. #define IL_PASSIVE_DWELL_TIME_52 (10)
  1086. #define IL_PASSIVE_DWELL_BASE (100)
  1087. #define IL_CHANNEL_TUNE_TIME 5
  1088. static int
  1089. il_send_scan_abort(struct il_priv *il)
  1090. {
  1091. int ret;
  1092. struct il_rx_pkt *pkt;
  1093. struct il_host_cmd cmd = {
  1094. .id = C_SCAN_ABORT,
  1095. .flags = CMD_WANT_SKB,
  1096. };
  1097. /* Exit instantly with error when device is not ready
  1098. * to receive scan abort command or it does not perform
  1099. * hardware scan currently */
  1100. if (!test_bit(S_READY, &il->status) ||
  1101. !test_bit(S_GEO_CONFIGURED, &il->status) ||
  1102. !test_bit(S_SCAN_HW, &il->status) ||
  1103. test_bit(S_FW_ERROR, &il->status) ||
  1104. test_bit(S_EXIT_PENDING, &il->status))
  1105. return -EIO;
  1106. ret = il_send_cmd_sync(il, &cmd);
  1107. if (ret)
  1108. return ret;
  1109. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1110. if (pkt->u.status != CAN_ABORT_STATUS) {
  1111. /* The scan abort will return 1 for success or
  1112. * 2 for "failure". A failure condition can be
  1113. * due to simply not being in an active scan which
  1114. * can occur if we send the scan abort before we
  1115. * the microcode has notified us that a scan is
  1116. * completed. */
  1117. D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
  1118. ret = -EIO;
  1119. }
  1120. il_free_pages(il, cmd.reply_page);
  1121. return ret;
  1122. }
  1123. static void
  1124. il_complete_scan(struct il_priv *il, bool aborted)
  1125. {
  1126. struct cfg80211_scan_info info = {
  1127. .aborted = aborted,
  1128. };
  1129. /* check if scan was requested from mac80211 */
  1130. if (il->scan_request) {
  1131. D_SCAN("Complete scan in mac80211\n");
  1132. ieee80211_scan_completed(il->hw, &info);
  1133. }
  1134. il->scan_vif = NULL;
  1135. il->scan_request = NULL;
  1136. }
  1137. void
  1138. il_force_scan_end(struct il_priv *il)
  1139. {
  1140. lockdep_assert_held(&il->mutex);
  1141. if (!test_bit(S_SCANNING, &il->status)) {
  1142. D_SCAN("Forcing scan end while not scanning\n");
  1143. return;
  1144. }
  1145. D_SCAN("Forcing scan end\n");
  1146. clear_bit(S_SCANNING, &il->status);
  1147. clear_bit(S_SCAN_HW, &il->status);
  1148. clear_bit(S_SCAN_ABORTING, &il->status);
  1149. il_complete_scan(il, true);
  1150. }
  1151. static void
  1152. il_do_scan_abort(struct il_priv *il)
  1153. {
  1154. int ret;
  1155. lockdep_assert_held(&il->mutex);
  1156. if (!test_bit(S_SCANNING, &il->status)) {
  1157. D_SCAN("Not performing scan to abort\n");
  1158. return;
  1159. }
  1160. if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
  1161. D_SCAN("Scan abort in progress\n");
  1162. return;
  1163. }
  1164. ret = il_send_scan_abort(il);
  1165. if (ret) {
  1166. D_SCAN("Send scan abort failed %d\n", ret);
  1167. il_force_scan_end(il);
  1168. } else
  1169. D_SCAN("Successfully send scan abort\n");
  1170. }
  1171. /**
  1172. * il_scan_cancel - Cancel any currently executing HW scan
  1173. */
  1174. int
  1175. il_scan_cancel(struct il_priv *il)
  1176. {
  1177. D_SCAN("Queuing abort scan\n");
  1178. queue_work(il->workqueue, &il->abort_scan);
  1179. return 0;
  1180. }
  1181. EXPORT_SYMBOL(il_scan_cancel);
  1182. /**
  1183. * il_scan_cancel_timeout - Cancel any currently executing HW scan
  1184. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1185. *
  1186. */
  1187. int
  1188. il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
  1189. {
  1190. unsigned long timeout = jiffies + msecs_to_jiffies(ms);
  1191. lockdep_assert_held(&il->mutex);
  1192. D_SCAN("Scan cancel timeout\n");
  1193. il_do_scan_abort(il);
  1194. while (time_before_eq(jiffies, timeout)) {
  1195. if (!test_bit(S_SCAN_HW, &il->status))
  1196. break;
  1197. msleep(20);
  1198. }
  1199. return test_bit(S_SCAN_HW, &il->status);
  1200. }
  1201. EXPORT_SYMBOL(il_scan_cancel_timeout);
  1202. /* Service response to C_SCAN (0x80) */
  1203. static void
  1204. il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb)
  1205. {
  1206. #ifdef CONFIG_IWLEGACY_DEBUG
  1207. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1208. struct il_scanreq_notification *notif =
  1209. (struct il_scanreq_notification *)pkt->u.raw;
  1210. D_SCAN("Scan request status = 0x%x\n", notif->status);
  1211. #endif
  1212. }
  1213. /* Service N_SCAN_START (0x82) */
  1214. static void
  1215. il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb)
  1216. {
  1217. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1218. struct il_scanstart_notification *notif =
  1219. (struct il_scanstart_notification *)pkt->u.raw;
  1220. il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1221. D_SCAN("Scan start: " "%d [802.11%s] "
  1222. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel,
  1223. notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high),
  1224. le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer);
  1225. }
  1226. /* Service N_SCAN_RESULTS (0x83) */
  1227. static void
  1228. il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb)
  1229. {
  1230. #ifdef CONFIG_IWLEGACY_DEBUG
  1231. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1232. struct il_scanresults_notification *notif =
  1233. (struct il_scanresults_notification *)pkt->u.raw;
  1234. D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d "
  1235. "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a",
  1236. le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low),
  1237. le32_to_cpu(notif->stats[0]),
  1238. le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
  1239. #endif
  1240. }
  1241. /* Service N_SCAN_COMPLETE (0x84) */
  1242. static void
  1243. il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb)
  1244. {
  1245. #ifdef CONFIG_IWLEGACY_DEBUG
  1246. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1247. struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1248. #endif
  1249. D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1250. scan_notif->scanned_channels, scan_notif->tsf_low,
  1251. scan_notif->tsf_high, scan_notif->status);
  1252. /* The HW is no longer scanning */
  1253. clear_bit(S_SCAN_HW, &il->status);
  1254. D_SCAN("Scan on %sGHz took %dms\n",
  1255. (il->scan_band == NL80211_BAND_2GHZ) ? "2.4" : "5.2",
  1256. jiffies_to_msecs(jiffies - il->scan_start));
  1257. queue_work(il->workqueue, &il->scan_completed);
  1258. }
  1259. void
  1260. il_setup_rx_scan_handlers(struct il_priv *il)
  1261. {
  1262. /* scan handlers */
  1263. il->handlers[C_SCAN] = il_hdl_scan;
  1264. il->handlers[N_SCAN_START] = il_hdl_scan_start;
  1265. il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results;
  1266. il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete;
  1267. }
  1268. EXPORT_SYMBOL(il_setup_rx_scan_handlers);
  1269. u16
  1270. il_get_active_dwell_time(struct il_priv *il, enum nl80211_band band,
  1271. u8 n_probes)
  1272. {
  1273. if (band == NL80211_BAND_5GHZ)
  1274. return IL_ACTIVE_DWELL_TIME_52 +
  1275. IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  1276. else
  1277. return IL_ACTIVE_DWELL_TIME_24 +
  1278. IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  1279. }
  1280. EXPORT_SYMBOL(il_get_active_dwell_time);
  1281. u16
  1282. il_get_passive_dwell_time(struct il_priv *il, enum nl80211_band band,
  1283. struct ieee80211_vif *vif)
  1284. {
  1285. u16 value;
  1286. u16 passive =
  1287. (band ==
  1288. NL80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE +
  1289. IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE +
  1290. IL_PASSIVE_DWELL_TIME_52;
  1291. if (il_is_any_associated(il)) {
  1292. /*
  1293. * If we're associated, we clamp the maximum passive
  1294. * dwell time to be 98% of the smallest beacon interval
  1295. * (minus 2 * channel tune time)
  1296. */
  1297. value = il->vif ? il->vif->bss_conf.beacon_int : 0;
  1298. if (value > IL_PASSIVE_DWELL_BASE || !value)
  1299. value = IL_PASSIVE_DWELL_BASE;
  1300. value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
  1301. passive = min(value, passive);
  1302. }
  1303. return passive;
  1304. }
  1305. EXPORT_SYMBOL(il_get_passive_dwell_time);
  1306. void
  1307. il_init_scan_params(struct il_priv *il)
  1308. {
  1309. u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
  1310. if (!il->scan_tx_ant[NL80211_BAND_5GHZ])
  1311. il->scan_tx_ant[NL80211_BAND_5GHZ] = ant_idx;
  1312. if (!il->scan_tx_ant[NL80211_BAND_2GHZ])
  1313. il->scan_tx_ant[NL80211_BAND_2GHZ] = ant_idx;
  1314. }
  1315. EXPORT_SYMBOL(il_init_scan_params);
  1316. static int
  1317. il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif)
  1318. {
  1319. int ret;
  1320. lockdep_assert_held(&il->mutex);
  1321. cancel_delayed_work(&il->scan_check);
  1322. if (!il_is_ready_rf(il)) {
  1323. IL_WARN("Request scan called when driver not ready.\n");
  1324. return -EIO;
  1325. }
  1326. if (test_bit(S_SCAN_HW, &il->status)) {
  1327. D_SCAN("Multiple concurrent scan requests in parallel.\n");
  1328. return -EBUSY;
  1329. }
  1330. if (test_bit(S_SCAN_ABORTING, &il->status)) {
  1331. D_SCAN("Scan request while abort pending.\n");
  1332. return -EBUSY;
  1333. }
  1334. D_SCAN("Starting scan...\n");
  1335. set_bit(S_SCANNING, &il->status);
  1336. il->scan_start = jiffies;
  1337. ret = il->ops->request_scan(il, vif);
  1338. if (ret) {
  1339. clear_bit(S_SCANNING, &il->status);
  1340. return ret;
  1341. }
  1342. queue_delayed_work(il->workqueue, &il->scan_check,
  1343. IL_SCAN_CHECK_WATCHDOG);
  1344. return 0;
  1345. }
  1346. int
  1347. il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1348. struct ieee80211_scan_request *hw_req)
  1349. {
  1350. struct cfg80211_scan_request *req = &hw_req->req;
  1351. struct il_priv *il = hw->priv;
  1352. int ret;
  1353. if (req->n_channels == 0) {
  1354. IL_ERR("Can not scan on no channels.\n");
  1355. return -EINVAL;
  1356. }
  1357. mutex_lock(&il->mutex);
  1358. D_MAC80211("enter\n");
  1359. if (test_bit(S_SCANNING, &il->status)) {
  1360. D_SCAN("Scan already in progress.\n");
  1361. ret = -EAGAIN;
  1362. goto out_unlock;
  1363. }
  1364. /* mac80211 will only ask for one band at a time */
  1365. il->scan_request = req;
  1366. il->scan_vif = vif;
  1367. il->scan_band = req->channels[0]->band;
  1368. ret = il_scan_initiate(il, vif);
  1369. out_unlock:
  1370. D_MAC80211("leave ret %d\n", ret);
  1371. mutex_unlock(&il->mutex);
  1372. return ret;
  1373. }
  1374. EXPORT_SYMBOL(il_mac_hw_scan);
  1375. static void
  1376. il_bg_scan_check(struct work_struct *data)
  1377. {
  1378. struct il_priv *il =
  1379. container_of(data, struct il_priv, scan_check.work);
  1380. D_SCAN("Scan check work\n");
  1381. /* Since we are here firmware does not finish scan and
  1382. * most likely is in bad shape, so we don't bother to
  1383. * send abort command, just force scan complete to mac80211 */
  1384. mutex_lock(&il->mutex);
  1385. il_force_scan_end(il);
  1386. mutex_unlock(&il->mutex);
  1387. }
  1388. /**
  1389. * il_fill_probe_req - fill in all required fields and IE for probe request
  1390. */
  1391. u16
  1392. il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
  1393. const u8 *ta, const u8 *ies, int ie_len, int left)
  1394. {
  1395. int len = 0;
  1396. u8 *pos = NULL;
  1397. /* Make sure there is enough space for the probe request,
  1398. * two mandatory IEs and the data */
  1399. left -= 24;
  1400. if (left < 0)
  1401. return 0;
  1402. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1403. eth_broadcast_addr(frame->da);
  1404. memcpy(frame->sa, ta, ETH_ALEN);
  1405. eth_broadcast_addr(frame->bssid);
  1406. frame->seq_ctrl = 0;
  1407. len += 24;
  1408. /* ...next IE... */
  1409. pos = &frame->u.probe_req.variable[0];
  1410. /* fill in our indirect SSID IE */
  1411. left -= 2;
  1412. if (left < 0)
  1413. return 0;
  1414. *pos++ = WLAN_EID_SSID;
  1415. *pos++ = 0;
  1416. len += 2;
  1417. if (WARN_ON(left < ie_len))
  1418. return len;
  1419. if (ies && ie_len) {
  1420. memcpy(pos, ies, ie_len);
  1421. len += ie_len;
  1422. }
  1423. return (u16) len;
  1424. }
  1425. EXPORT_SYMBOL(il_fill_probe_req);
  1426. static void
  1427. il_bg_abort_scan(struct work_struct *work)
  1428. {
  1429. struct il_priv *il = container_of(work, struct il_priv, abort_scan);
  1430. D_SCAN("Abort scan work\n");
  1431. /* We keep scan_check work queued in case when firmware will not
  1432. * report back scan completed notification */
  1433. mutex_lock(&il->mutex);
  1434. il_scan_cancel_timeout(il, 200);
  1435. mutex_unlock(&il->mutex);
  1436. }
  1437. static void
  1438. il_bg_scan_completed(struct work_struct *work)
  1439. {
  1440. struct il_priv *il = container_of(work, struct il_priv, scan_completed);
  1441. bool aborted;
  1442. D_SCAN("Completed scan.\n");
  1443. cancel_delayed_work(&il->scan_check);
  1444. mutex_lock(&il->mutex);
  1445. aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
  1446. if (aborted)
  1447. D_SCAN("Aborted scan completed.\n");
  1448. if (!test_and_clear_bit(S_SCANNING, &il->status)) {
  1449. D_SCAN("Scan already completed.\n");
  1450. goto out_settings;
  1451. }
  1452. il_complete_scan(il, aborted);
  1453. out_settings:
  1454. /* Can we still talk to firmware ? */
  1455. if (!il_is_ready_rf(il))
  1456. goto out;
  1457. /*
  1458. * We do not commit power settings while scan is pending,
  1459. * do it now if the settings changed.
  1460. */
  1461. il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
  1462. il_set_tx_power(il, il->tx_power_next, false);
  1463. il->ops->post_scan(il);
  1464. out:
  1465. mutex_unlock(&il->mutex);
  1466. }
  1467. void
  1468. il_setup_scan_deferred_work(struct il_priv *il)
  1469. {
  1470. INIT_WORK(&il->scan_completed, il_bg_scan_completed);
  1471. INIT_WORK(&il->abort_scan, il_bg_abort_scan);
  1472. INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
  1473. }
  1474. EXPORT_SYMBOL(il_setup_scan_deferred_work);
  1475. void
  1476. il_cancel_scan_deferred_work(struct il_priv *il)
  1477. {
  1478. cancel_work_sync(&il->abort_scan);
  1479. cancel_work_sync(&il->scan_completed);
  1480. if (cancel_delayed_work_sync(&il->scan_check)) {
  1481. mutex_lock(&il->mutex);
  1482. il_force_scan_end(il);
  1483. mutex_unlock(&il->mutex);
  1484. }
  1485. }
  1486. EXPORT_SYMBOL(il_cancel_scan_deferred_work);
  1487. /* il->sta_lock must be held */
  1488. static void
  1489. il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
  1490. {
  1491. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
  1492. IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n",
  1493. sta_id, il->stations[sta_id].sta.sta.addr);
  1494. if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
  1495. D_ASSOC("STA id %u addr %pM already present"
  1496. " in uCode (according to driver)\n", sta_id,
  1497. il->stations[sta_id].sta.sta.addr);
  1498. } else {
  1499. il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
  1500. D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id,
  1501. il->stations[sta_id].sta.sta.addr);
  1502. }
  1503. }
  1504. static int
  1505. il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta,
  1506. struct il_rx_pkt *pkt, bool sync)
  1507. {
  1508. u8 sta_id = addsta->sta.sta_id;
  1509. unsigned long flags;
  1510. int ret = -EIO;
  1511. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1512. IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags);
  1513. return ret;
  1514. }
  1515. D_INFO("Processing response for adding station %u\n", sta_id);
  1516. spin_lock_irqsave(&il->sta_lock, flags);
  1517. switch (pkt->u.add_sta.status) {
  1518. case ADD_STA_SUCCESS_MSK:
  1519. D_INFO("C_ADD_STA PASSED\n");
  1520. il_sta_ucode_activate(il, sta_id);
  1521. ret = 0;
  1522. break;
  1523. case ADD_STA_NO_ROOM_IN_TBL:
  1524. IL_ERR("Adding station %d failed, no room in table.\n", sta_id);
  1525. break;
  1526. case ADD_STA_NO_BLOCK_ACK_RESOURCE:
  1527. IL_ERR("Adding station %d failed, no block ack resource.\n",
  1528. sta_id);
  1529. break;
  1530. case ADD_STA_MODIFY_NON_EXIST_STA:
  1531. IL_ERR("Attempting to modify non-existing station %d\n",
  1532. sta_id);
  1533. break;
  1534. default:
  1535. D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status);
  1536. break;
  1537. }
  1538. D_INFO("%s station id %u addr %pM\n",
  1539. il->stations[sta_id].sta.mode ==
  1540. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id,
  1541. il->stations[sta_id].sta.sta.addr);
  1542. /*
  1543. * XXX: The MAC address in the command buffer is often changed from
  1544. * the original sent to the device. That is, the MAC address
  1545. * written to the command buffer often is not the same MAC address
  1546. * read from the command buffer when the command returns. This
  1547. * issue has not yet been resolved and this debugging is left to
  1548. * observe the problem.
  1549. */
  1550. D_INFO("%s station according to cmd buffer %pM\n",
  1551. il->stations[sta_id].sta.mode ==
  1552. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr);
  1553. spin_unlock_irqrestore(&il->sta_lock, flags);
  1554. return ret;
  1555. }
  1556. static void
  1557. il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd,
  1558. struct il_rx_pkt *pkt)
  1559. {
  1560. struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload;
  1561. il_process_add_sta_resp(il, addsta, pkt, false);
  1562. }
  1563. int
  1564. il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags)
  1565. {
  1566. struct il_rx_pkt *pkt = NULL;
  1567. int ret = 0;
  1568. u8 data[sizeof(*sta)];
  1569. struct il_host_cmd cmd = {
  1570. .id = C_ADD_STA,
  1571. .flags = flags,
  1572. .data = data,
  1573. };
  1574. u8 sta_id __maybe_unused = sta->sta.sta_id;
  1575. D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr,
  1576. flags & CMD_ASYNC ? "a" : "");
  1577. if (flags & CMD_ASYNC)
  1578. cmd.callback = il_add_sta_callback;
  1579. else {
  1580. cmd.flags |= CMD_WANT_SKB;
  1581. might_sleep();
  1582. }
  1583. cmd.len = il->ops->build_addsta_hcmd(sta, data);
  1584. ret = il_send_cmd(il, &cmd);
  1585. if (ret)
  1586. return ret;
  1587. if (flags & CMD_ASYNC)
  1588. return 0;
  1589. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1590. ret = il_process_add_sta_resp(il, sta, pkt, true);
  1591. il_free_pages(il, cmd.reply_page);
  1592. return ret;
  1593. }
  1594. EXPORT_SYMBOL(il_send_add_sta);
  1595. static void
  1596. il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta)
  1597. {
  1598. struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
  1599. __le32 sta_flags;
  1600. if (!sta || !sta_ht_inf->ht_supported)
  1601. goto done;
  1602. D_ASSOC("spatial multiplexing power save mode: %s\n",
  1603. (sta->smps_mode == IEEE80211_SMPS_STATIC) ? "static" :
  1604. (sta->smps_mode == IEEE80211_SMPS_DYNAMIC) ? "dynamic" :
  1605. "disabled");
  1606. sta_flags = il->stations[idx].sta.station_flags;
  1607. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  1608. switch (sta->smps_mode) {
  1609. case IEEE80211_SMPS_STATIC:
  1610. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  1611. break;
  1612. case IEEE80211_SMPS_DYNAMIC:
  1613. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  1614. break;
  1615. case IEEE80211_SMPS_OFF:
  1616. break;
  1617. default:
  1618. IL_WARN("Invalid MIMO PS mode %d\n", sta->smps_mode);
  1619. break;
  1620. }
  1621. sta_flags |=
  1622. cpu_to_le32((u32) sta_ht_inf->
  1623. ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  1624. sta_flags |=
  1625. cpu_to_le32((u32) sta_ht_inf->
  1626. ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  1627. if (il_is_ht40_tx_allowed(il, &sta->ht_cap))
  1628. sta_flags |= STA_FLG_HT40_EN_MSK;
  1629. else
  1630. sta_flags &= ~STA_FLG_HT40_EN_MSK;
  1631. il->stations[idx].sta.station_flags = sta_flags;
  1632. done:
  1633. return;
  1634. }
  1635. /**
  1636. * il_prep_station - Prepare station information for addition
  1637. *
  1638. * should be called with sta_lock held
  1639. */
  1640. u8
  1641. il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
  1642. struct ieee80211_sta *sta)
  1643. {
  1644. struct il_station_entry *station;
  1645. int i;
  1646. u8 sta_id = IL_INVALID_STATION;
  1647. u16 rate;
  1648. if (is_ap)
  1649. sta_id = IL_AP_ID;
  1650. else if (is_broadcast_ether_addr(addr))
  1651. sta_id = il->hw_params.bcast_id;
  1652. else
  1653. for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
  1654. if (ether_addr_equal(il->stations[i].sta.sta.addr,
  1655. addr)) {
  1656. sta_id = i;
  1657. break;
  1658. }
  1659. if (!il->stations[i].used &&
  1660. sta_id == IL_INVALID_STATION)
  1661. sta_id = i;
  1662. }
  1663. /*
  1664. * These two conditions have the same outcome, but keep them
  1665. * separate
  1666. */
  1667. if (unlikely(sta_id == IL_INVALID_STATION))
  1668. return sta_id;
  1669. /*
  1670. * uCode is not able to deal with multiple requests to add a
  1671. * station. Keep track if one is in progress so that we do not send
  1672. * another.
  1673. */
  1674. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1675. D_INFO("STA %d already in process of being added.\n", sta_id);
  1676. return sta_id;
  1677. }
  1678. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1679. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
  1680. ether_addr_equal(il->stations[sta_id].sta.sta.addr, addr)) {
  1681. D_ASSOC("STA %d (%pM) already added, not adding again.\n",
  1682. sta_id, addr);
  1683. return sta_id;
  1684. }
  1685. station = &il->stations[sta_id];
  1686. station->used = IL_STA_DRIVER_ACTIVE;
  1687. D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr);
  1688. il->num_stations++;
  1689. /* Set up the C_ADD_STA command to send to device */
  1690. memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
  1691. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  1692. station->sta.mode = 0;
  1693. station->sta.sta.sta_id = sta_id;
  1694. station->sta.station_flags = 0;
  1695. /*
  1696. * OK to call unconditionally, since local stations (IBSS BSSID
  1697. * STA and broadcast STA) pass in a NULL sta, and mac80211
  1698. * doesn't allow HT IBSS.
  1699. */
  1700. il_set_ht_add_station(il, sta_id, sta);
  1701. /* 3945 only */
  1702. rate = (il->band == NL80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP;
  1703. /* Turn on both antennas for the station... */
  1704. station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
  1705. return sta_id;
  1706. }
  1707. EXPORT_SYMBOL_GPL(il_prep_station);
  1708. #define STA_WAIT_TIMEOUT (HZ/2)
  1709. /**
  1710. * il_add_station_common -
  1711. */
  1712. int
  1713. il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
  1714. struct ieee80211_sta *sta, u8 *sta_id_r)
  1715. {
  1716. unsigned long flags_spin;
  1717. int ret = 0;
  1718. u8 sta_id;
  1719. struct il_addsta_cmd sta_cmd;
  1720. *sta_id_r = 0;
  1721. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1722. sta_id = il_prep_station(il, addr, is_ap, sta);
  1723. if (sta_id == IL_INVALID_STATION) {
  1724. IL_ERR("Unable to prepare station %pM for addition\n", addr);
  1725. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1726. return -EINVAL;
  1727. }
  1728. /*
  1729. * uCode is not able to deal with multiple requests to add a
  1730. * station. Keep track if one is in progress so that we do not send
  1731. * another.
  1732. */
  1733. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1734. D_INFO("STA %d already in process of being added.\n", sta_id);
  1735. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1736. return -EEXIST;
  1737. }
  1738. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1739. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1740. D_ASSOC("STA %d (%pM) already added, not adding again.\n",
  1741. sta_id, addr);
  1742. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1743. return -EEXIST;
  1744. }
  1745. il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
  1746. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  1747. sizeof(struct il_addsta_cmd));
  1748. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1749. /* Add station to device's station table */
  1750. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1751. if (ret) {
  1752. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1753. IL_ERR("Adding station %pM failed.\n",
  1754. il->stations[sta_id].sta.sta.addr);
  1755. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1756. il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1757. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1758. }
  1759. *sta_id_r = sta_id;
  1760. return ret;
  1761. }
  1762. EXPORT_SYMBOL(il_add_station_common);
  1763. /**
  1764. * il_sta_ucode_deactivate - deactivate ucode status for a station
  1765. *
  1766. * il->sta_lock must be held
  1767. */
  1768. static void
  1769. il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
  1770. {
  1771. /* Ucode must be active and driver must be non active */
  1772. if ((il->stations[sta_id].
  1773. used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
  1774. IL_STA_UCODE_ACTIVE)
  1775. IL_ERR("removed non active STA %u\n", sta_id);
  1776. il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
  1777. memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
  1778. D_ASSOC("Removed STA %u\n", sta_id);
  1779. }
  1780. static int
  1781. il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id,
  1782. bool temporary)
  1783. {
  1784. struct il_rx_pkt *pkt;
  1785. int ret;
  1786. unsigned long flags_spin;
  1787. struct il_rem_sta_cmd rm_sta_cmd;
  1788. struct il_host_cmd cmd = {
  1789. .id = C_REM_STA,
  1790. .len = sizeof(struct il_rem_sta_cmd),
  1791. .flags = CMD_SYNC,
  1792. .data = &rm_sta_cmd,
  1793. };
  1794. memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
  1795. rm_sta_cmd.num_sta = 1;
  1796. memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
  1797. cmd.flags |= CMD_WANT_SKB;
  1798. ret = il_send_cmd(il, &cmd);
  1799. if (ret)
  1800. return ret;
  1801. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1802. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1803. IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags);
  1804. ret = -EIO;
  1805. }
  1806. if (!ret) {
  1807. switch (pkt->u.rem_sta.status) {
  1808. case REM_STA_SUCCESS_MSK:
  1809. if (!temporary) {
  1810. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1811. il_sta_ucode_deactivate(il, sta_id);
  1812. spin_unlock_irqrestore(&il->sta_lock,
  1813. flags_spin);
  1814. }
  1815. D_ASSOC("C_REM_STA PASSED\n");
  1816. break;
  1817. default:
  1818. ret = -EIO;
  1819. IL_ERR("C_REM_STA failed\n");
  1820. break;
  1821. }
  1822. }
  1823. il_free_pages(il, cmd.reply_page);
  1824. return ret;
  1825. }
  1826. /**
  1827. * il_remove_station - Remove driver's knowledge of station.
  1828. */
  1829. int
  1830. il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr)
  1831. {
  1832. unsigned long flags;
  1833. if (!il_is_ready(il)) {
  1834. D_INFO("Unable to remove station %pM, device not ready.\n",
  1835. addr);
  1836. /*
  1837. * It is typical for stations to be removed when we are
  1838. * going down. Return success since device will be down
  1839. * soon anyway
  1840. */
  1841. return 0;
  1842. }
  1843. D_ASSOC("Removing STA from driver:%d %pM\n", sta_id, addr);
  1844. if (WARN_ON(sta_id == IL_INVALID_STATION))
  1845. return -EINVAL;
  1846. spin_lock_irqsave(&il->sta_lock, flags);
  1847. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1848. D_INFO("Removing %pM but non DRIVER active\n", addr);
  1849. goto out_err;
  1850. }
  1851. if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1852. D_INFO("Removing %pM but non UCODE active\n", addr);
  1853. goto out_err;
  1854. }
  1855. if (il->stations[sta_id].used & IL_STA_LOCAL) {
  1856. kfree(il->stations[sta_id].lq);
  1857. il->stations[sta_id].lq = NULL;
  1858. }
  1859. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1860. il->num_stations--;
  1861. BUG_ON(il->num_stations < 0);
  1862. spin_unlock_irqrestore(&il->sta_lock, flags);
  1863. return il_send_remove_station(il, addr, sta_id, false);
  1864. out_err:
  1865. spin_unlock_irqrestore(&il->sta_lock, flags);
  1866. return -EINVAL;
  1867. }
  1868. EXPORT_SYMBOL_GPL(il_remove_station);
  1869. /**
  1870. * il_clear_ucode_stations - clear ucode station table bits
  1871. *
  1872. * This function clears all the bits in the driver indicating
  1873. * which stations are active in the ucode. Call when something
  1874. * other than explicit station management would cause this in
  1875. * the ucode, e.g. unassociated RXON.
  1876. */
  1877. void
  1878. il_clear_ucode_stations(struct il_priv *il)
  1879. {
  1880. int i;
  1881. unsigned long flags_spin;
  1882. bool cleared = false;
  1883. D_INFO("Clearing ucode stations in driver\n");
  1884. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1885. for (i = 0; i < il->hw_params.max_stations; i++) {
  1886. if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
  1887. D_INFO("Clearing ucode active for station %d\n", i);
  1888. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1889. cleared = true;
  1890. }
  1891. }
  1892. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1893. if (!cleared)
  1894. D_INFO("No active stations found to be cleared\n");
  1895. }
  1896. EXPORT_SYMBOL(il_clear_ucode_stations);
  1897. /**
  1898. * il_restore_stations() - Restore driver known stations to device
  1899. *
  1900. * All stations considered active by driver, but not present in ucode, is
  1901. * restored.
  1902. *
  1903. * Function sleeps.
  1904. */
  1905. void
  1906. il_restore_stations(struct il_priv *il)
  1907. {
  1908. struct il_addsta_cmd sta_cmd;
  1909. struct il_link_quality_cmd lq;
  1910. unsigned long flags_spin;
  1911. int i;
  1912. bool found = false;
  1913. int ret;
  1914. bool send_lq;
  1915. if (!il_is_ready(il)) {
  1916. D_INFO("Not ready yet, not restoring any stations.\n");
  1917. return;
  1918. }
  1919. D_ASSOC("Restoring all known stations ... start.\n");
  1920. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1921. for (i = 0; i < il->hw_params.max_stations; i++) {
  1922. if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
  1923. !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
  1924. D_ASSOC("Restoring sta %pM\n",
  1925. il->stations[i].sta.sta.addr);
  1926. il->stations[i].sta.mode = 0;
  1927. il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
  1928. found = true;
  1929. }
  1930. }
  1931. for (i = 0; i < il->hw_params.max_stations; i++) {
  1932. if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
  1933. memcpy(&sta_cmd, &il->stations[i].sta,
  1934. sizeof(struct il_addsta_cmd));
  1935. send_lq = false;
  1936. if (il->stations[i].lq) {
  1937. memcpy(&lq, il->stations[i].lq,
  1938. sizeof(struct il_link_quality_cmd));
  1939. send_lq = true;
  1940. }
  1941. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1942. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1943. if (ret) {
  1944. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1945. IL_ERR("Adding station %pM failed.\n",
  1946. il->stations[i].sta.sta.addr);
  1947. il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE;
  1948. il->stations[i].used &=
  1949. ~IL_STA_UCODE_INPROGRESS;
  1950. spin_unlock_irqrestore(&il->sta_lock,
  1951. flags_spin);
  1952. }
  1953. /*
  1954. * Rate scaling has already been initialized, send
  1955. * current LQ command
  1956. */
  1957. if (send_lq)
  1958. il_send_lq_cmd(il, &lq, CMD_SYNC, true);
  1959. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1960. il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
  1961. }
  1962. }
  1963. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1964. if (!found)
  1965. D_INFO("Restoring all known stations"
  1966. " .... no stations to be restored.\n");
  1967. else
  1968. D_INFO("Restoring all known stations" " .... complete.\n");
  1969. }
  1970. EXPORT_SYMBOL(il_restore_stations);
  1971. int
  1972. il_get_free_ucode_key_idx(struct il_priv *il)
  1973. {
  1974. int i;
  1975. for (i = 0; i < il->sta_key_max_num; i++)
  1976. if (!test_and_set_bit(i, &il->ucode_key_table))
  1977. return i;
  1978. return WEP_INVALID_OFFSET;
  1979. }
  1980. EXPORT_SYMBOL(il_get_free_ucode_key_idx);
  1981. void
  1982. il_dealloc_bcast_stations(struct il_priv *il)
  1983. {
  1984. unsigned long flags;
  1985. int i;
  1986. spin_lock_irqsave(&il->sta_lock, flags);
  1987. for (i = 0; i < il->hw_params.max_stations; i++) {
  1988. if (!(il->stations[i].used & IL_STA_BCAST))
  1989. continue;
  1990. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1991. il->num_stations--;
  1992. BUG_ON(il->num_stations < 0);
  1993. kfree(il->stations[i].lq);
  1994. il->stations[i].lq = NULL;
  1995. }
  1996. spin_unlock_irqrestore(&il->sta_lock, flags);
  1997. }
  1998. EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
  1999. #ifdef CONFIG_IWLEGACY_DEBUG
  2000. static void
  2001. il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
  2002. {
  2003. int i;
  2004. D_RATE("lq station id 0x%x\n", lq->sta_id);
  2005. D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk,
  2006. lq->general_params.dual_stream_ant_msk);
  2007. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
  2008. D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags);
  2009. }
  2010. #else
  2011. static inline void
  2012. il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
  2013. {
  2014. }
  2015. #endif
  2016. /**
  2017. * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
  2018. *
  2019. * It sometimes happens when a HT rate has been in use and we
  2020. * loose connectivity with AP then mac80211 will first tell us that the
  2021. * current channel is not HT anymore before removing the station. In such a
  2022. * scenario the RXON flags will be updated to indicate we are not
  2023. * communicating HT anymore, but the LQ command may still contain HT rates.
  2024. * Test for this to prevent driver from sending LQ command between the time
  2025. * RXON flags are updated and when LQ command is updated.
  2026. */
  2027. static bool
  2028. il_is_lq_table_valid(struct il_priv *il, struct il_link_quality_cmd *lq)
  2029. {
  2030. int i;
  2031. if (il->ht.enabled)
  2032. return true;
  2033. D_INFO("Channel %u is not an HT channel\n", il->active.channel);
  2034. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  2035. if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) {
  2036. D_INFO("idx %d of LQ expects HT channel\n", i);
  2037. return false;
  2038. }
  2039. }
  2040. return true;
  2041. }
  2042. /**
  2043. * il_send_lq_cmd() - Send link quality command
  2044. * @init: This command is sent as part of station initialization right
  2045. * after station has been added.
  2046. *
  2047. * The link quality command is sent as the last step of station creation.
  2048. * This is the special case in which init is set and we call a callback in
  2049. * this case to clear the state indicating that station creation is in
  2050. * progress.
  2051. */
  2052. int
  2053. il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
  2054. u8 flags, bool init)
  2055. {
  2056. int ret = 0;
  2057. unsigned long flags_spin;
  2058. struct il_host_cmd cmd = {
  2059. .id = C_TX_LINK_QUALITY_CMD,
  2060. .len = sizeof(struct il_link_quality_cmd),
  2061. .flags = flags,
  2062. .data = lq,
  2063. };
  2064. if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
  2065. return -EINVAL;
  2066. spin_lock_irqsave(&il->sta_lock, flags_spin);
  2067. if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  2068. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  2069. return -EINVAL;
  2070. }
  2071. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  2072. il_dump_lq_cmd(il, lq);
  2073. BUG_ON(init && (cmd.flags & CMD_ASYNC));
  2074. if (il_is_lq_table_valid(il, lq))
  2075. ret = il_send_cmd(il, &cmd);
  2076. else
  2077. ret = -EINVAL;
  2078. if (cmd.flags & CMD_ASYNC)
  2079. return ret;
  2080. if (init) {
  2081. D_INFO("init LQ command complete,"
  2082. " clearing sta addition status for sta %d\n",
  2083. lq->sta_id);
  2084. spin_lock_irqsave(&il->sta_lock, flags_spin);
  2085. il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  2086. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  2087. }
  2088. return ret;
  2089. }
  2090. EXPORT_SYMBOL(il_send_lq_cmd);
  2091. int
  2092. il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2093. struct ieee80211_sta *sta)
  2094. {
  2095. struct il_priv *il = hw->priv;
  2096. struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
  2097. int ret;
  2098. mutex_lock(&il->mutex);
  2099. D_MAC80211("enter station %pM\n", sta->addr);
  2100. ret = il_remove_station(il, sta_common->sta_id, sta->addr);
  2101. if (ret)
  2102. IL_ERR("Error removing station %pM\n", sta->addr);
  2103. D_MAC80211("leave ret %d\n", ret);
  2104. mutex_unlock(&il->mutex);
  2105. return ret;
  2106. }
  2107. EXPORT_SYMBOL(il_mac_sta_remove);
  2108. /************************** RX-FUNCTIONS ****************************/
  2109. /*
  2110. * Rx theory of operation
  2111. *
  2112. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  2113. * each of which point to Receive Buffers to be filled by the NIC. These get
  2114. * used not only for Rx frames, but for any command response or notification
  2115. * from the NIC. The driver and NIC manage the Rx buffers by means
  2116. * of idxes into the circular buffer.
  2117. *
  2118. * Rx Queue Indexes
  2119. * The host/firmware share two idx registers for managing the Rx buffers.
  2120. *
  2121. * The READ idx maps to the first position that the firmware may be writing
  2122. * to -- the driver can read up to (but not including) this position and get
  2123. * good data.
  2124. * The READ idx is managed by the firmware once the card is enabled.
  2125. *
  2126. * The WRITE idx maps to the last position the driver has read from -- the
  2127. * position preceding WRITE is the last slot the firmware can place a packet.
  2128. *
  2129. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2130. * WRITE = READ.
  2131. *
  2132. * During initialization, the host sets up the READ queue position to the first
  2133. * IDX position, and WRITE to the last (READ - 1 wrapped)
  2134. *
  2135. * When the firmware places a packet in a buffer, it will advance the READ idx
  2136. * and fire the RX interrupt. The driver can then query the READ idx and
  2137. * process as many packets as possible, moving the WRITE idx forward as it
  2138. * resets the Rx queue buffers with new memory.
  2139. *
  2140. * The management in the driver is as follows:
  2141. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2142. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2143. * to replenish the iwl->rxq->rx_free.
  2144. * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
  2145. * iwl->rxq is replenished and the READ IDX is updated (updating the
  2146. * 'processed' and 'read' driver idxes as well)
  2147. * + A received packet is processed and handed to the kernel network stack,
  2148. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  2149. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2150. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2151. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  2152. * were enough free buffers and RX_STALLED is set it is cleared.
  2153. *
  2154. *
  2155. * Driver sequence:
  2156. *
  2157. * il_rx_queue_alloc() Allocates rx_free
  2158. * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2159. * il_rx_queue_restock
  2160. * il_rx_queue_restock() Moves available buffers from rx_free into Rx
  2161. * queue, updates firmware pointers, and updates
  2162. * the WRITE idx. If insufficient rx_free buffers
  2163. * are available, schedules il_rx_replenish
  2164. *
  2165. * -- enable interrupts --
  2166. * ISR - il_rx() Detach il_rx_bufs from pool up to the
  2167. * READ IDX, detaching the SKB from the pool.
  2168. * Moves the packet buffer from queue to rx_used.
  2169. * Calls il_rx_queue_restock to refill any empty
  2170. * slots.
  2171. * ...
  2172. *
  2173. */
  2174. /**
  2175. * il_rx_queue_space - Return number of free slots available in queue.
  2176. */
  2177. int
  2178. il_rx_queue_space(const struct il_rx_queue *q)
  2179. {
  2180. int s = q->read - q->write;
  2181. if (s <= 0)
  2182. s += RX_QUEUE_SIZE;
  2183. /* keep some buffer to not confuse full and empty queue */
  2184. s -= 2;
  2185. if (s < 0)
  2186. s = 0;
  2187. return s;
  2188. }
  2189. EXPORT_SYMBOL(il_rx_queue_space);
  2190. /**
  2191. * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  2192. */
  2193. void
  2194. il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q)
  2195. {
  2196. unsigned long flags;
  2197. u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
  2198. u32 reg;
  2199. spin_lock_irqsave(&q->lock, flags);
  2200. if (q->need_update == 0)
  2201. goto exit_unlock;
  2202. /* If power-saving is in use, make sure device is awake */
  2203. if (test_bit(S_POWER_PMI, &il->status)) {
  2204. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2205. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2206. D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n",
  2207. reg);
  2208. il_set_bit(il, CSR_GP_CNTRL,
  2209. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2210. goto exit_unlock;
  2211. }
  2212. q->write_actual = (q->write & ~0x7);
  2213. il_wr(il, rx_wrt_ptr_reg, q->write_actual);
  2214. /* Else device is assumed to be awake */
  2215. } else {
  2216. /* Device expects a multiple of 8 */
  2217. q->write_actual = (q->write & ~0x7);
  2218. il_wr(il, rx_wrt_ptr_reg, q->write_actual);
  2219. }
  2220. q->need_update = 0;
  2221. exit_unlock:
  2222. spin_unlock_irqrestore(&q->lock, flags);
  2223. }
  2224. EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
  2225. int
  2226. il_rx_queue_alloc(struct il_priv *il)
  2227. {
  2228. struct il_rx_queue *rxq = &il->rxq;
  2229. struct device *dev = &il->pci_dev->dev;
  2230. int i;
  2231. spin_lock_init(&rxq->lock);
  2232. INIT_LIST_HEAD(&rxq->rx_free);
  2233. INIT_LIST_HEAD(&rxq->rx_used);
  2234. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  2235. rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
  2236. GFP_KERNEL);
  2237. if (!rxq->bd)
  2238. goto err_bd;
  2239. rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
  2240. &rxq->rb_stts_dma, GFP_KERNEL);
  2241. if (!rxq->rb_stts)
  2242. goto err_rb;
  2243. /* Fill the rx_used queue with _all_ of the Rx buffers */
  2244. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  2245. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  2246. /* Set us so that we have processed and used all buffers, but have
  2247. * not restocked the Rx queue with fresh buffers */
  2248. rxq->read = rxq->write = 0;
  2249. rxq->write_actual = 0;
  2250. rxq->free_count = 0;
  2251. rxq->need_update = 0;
  2252. return 0;
  2253. err_rb:
  2254. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  2255. rxq->bd_dma);
  2256. err_bd:
  2257. return -ENOMEM;
  2258. }
  2259. EXPORT_SYMBOL(il_rx_queue_alloc);
  2260. void
  2261. il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb)
  2262. {
  2263. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2264. struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2265. if (!report->state) {
  2266. D_11H("Spectrum Measure Notification: Start\n");
  2267. return;
  2268. }
  2269. memcpy(&il->measure_report, report, sizeof(*report));
  2270. il->measurement_status |= MEASUREMENT_READY;
  2271. }
  2272. EXPORT_SYMBOL(il_hdl_spectrum_measurement);
  2273. /*
  2274. * returns non-zero if packet should be dropped
  2275. */
  2276. int
  2277. il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
  2278. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2279. {
  2280. u16 fc = le16_to_cpu(hdr->frame_control);
  2281. /*
  2282. * All contexts have the same setting here due to it being
  2283. * a module parameter, so OK to check any context.
  2284. */
  2285. if (il->active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2286. return 0;
  2287. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2288. return 0;
  2289. D_RX("decrypt_res:0x%x\n", decrypt_res);
  2290. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2291. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2292. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2293. * Decryption will be done in SW. */
  2294. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2295. RX_RES_STATUS_BAD_KEY_TTAK)
  2296. break;
  2297. case RX_RES_STATUS_SEC_TYPE_WEP:
  2298. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2299. RX_RES_STATUS_BAD_ICV_MIC) {
  2300. /* bad ICV, the packet is destroyed since the
  2301. * decryption is inplace, drop it */
  2302. D_RX("Packet destroyed\n");
  2303. return -1;
  2304. }
  2305. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2306. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2307. RX_RES_STATUS_DECRYPT_OK) {
  2308. D_RX("hw decrypt successfully!!!\n");
  2309. stats->flag |= RX_FLAG_DECRYPTED;
  2310. }
  2311. break;
  2312. default:
  2313. break;
  2314. }
  2315. return 0;
  2316. }
  2317. EXPORT_SYMBOL(il_set_decrypted_flag);
  2318. /**
  2319. * il_txq_update_write_ptr - Send new write idx to hardware
  2320. */
  2321. void
  2322. il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
  2323. {
  2324. u32 reg = 0;
  2325. int txq_id = txq->q.id;
  2326. if (txq->need_update == 0)
  2327. return;
  2328. /* if we're trying to save power */
  2329. if (test_bit(S_POWER_PMI, &il->status)) {
  2330. /* wake up nic if it's powered down ...
  2331. * uCode will wake up, and interrupt us again, so next
  2332. * time we'll skip this part. */
  2333. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2334. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2335. D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n",
  2336. txq_id, reg);
  2337. il_set_bit(il, CSR_GP_CNTRL,
  2338. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2339. return;
  2340. }
  2341. il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
  2342. /*
  2343. * else not in power-save mode,
  2344. * uCode will never sleep when we're
  2345. * trying to tx (during RFKILL, we're not trying to tx).
  2346. */
  2347. } else
  2348. _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
  2349. txq->need_update = 0;
  2350. }
  2351. EXPORT_SYMBOL(il_txq_update_write_ptr);
  2352. /**
  2353. * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
  2354. */
  2355. void
  2356. il_tx_queue_unmap(struct il_priv *il, int txq_id)
  2357. {
  2358. struct il_tx_queue *txq = &il->txq[txq_id];
  2359. struct il_queue *q = &txq->q;
  2360. if (q->n_bd == 0)
  2361. return;
  2362. while (q->write_ptr != q->read_ptr) {
  2363. il->ops->txq_free_tfd(il, txq);
  2364. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2365. }
  2366. }
  2367. EXPORT_SYMBOL(il_tx_queue_unmap);
  2368. /**
  2369. * il_tx_queue_free - Deallocate DMA queue.
  2370. * @txq: Transmit queue to deallocate.
  2371. *
  2372. * Empty queue by removing and destroying all BD's.
  2373. * Free all buffers.
  2374. * 0-fill, but do not free "txq" descriptor structure.
  2375. */
  2376. void
  2377. il_tx_queue_free(struct il_priv *il, int txq_id)
  2378. {
  2379. struct il_tx_queue *txq = &il->txq[txq_id];
  2380. struct device *dev = &il->pci_dev->dev;
  2381. int i;
  2382. il_tx_queue_unmap(il, txq_id);
  2383. /* De-alloc array of command/tx buffers */
  2384. if (txq->cmd) {
  2385. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  2386. kfree(txq->cmd[i]);
  2387. }
  2388. /* De-alloc circular buffer of TFDs */
  2389. if (txq->q.n_bd)
  2390. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2391. txq->tfds, txq->q.dma_addr);
  2392. /* De-alloc array of per-TFD driver data */
  2393. kfree(txq->skbs);
  2394. txq->skbs = NULL;
  2395. /* deallocate arrays */
  2396. kfree(txq->cmd);
  2397. kfree(txq->meta);
  2398. txq->cmd = NULL;
  2399. txq->meta = NULL;
  2400. /* 0-fill queue descriptor structure */
  2401. memset(txq, 0, sizeof(*txq));
  2402. }
  2403. EXPORT_SYMBOL(il_tx_queue_free);
  2404. /**
  2405. * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
  2406. */
  2407. void
  2408. il_cmd_queue_unmap(struct il_priv *il)
  2409. {
  2410. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2411. struct il_queue *q = &txq->q;
  2412. int i;
  2413. if (q->n_bd == 0)
  2414. return;
  2415. while (q->read_ptr != q->write_ptr) {
  2416. i = il_get_cmd_idx(q, q->read_ptr, 0);
  2417. if (txq->meta[i].flags & CMD_MAPPED) {
  2418. pci_unmap_single(il->pci_dev,
  2419. dma_unmap_addr(&txq->meta[i], mapping),
  2420. dma_unmap_len(&txq->meta[i], len),
  2421. PCI_DMA_BIDIRECTIONAL);
  2422. txq->meta[i].flags = 0;
  2423. }
  2424. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2425. }
  2426. i = q->n_win;
  2427. if (txq->meta[i].flags & CMD_MAPPED) {
  2428. pci_unmap_single(il->pci_dev,
  2429. dma_unmap_addr(&txq->meta[i], mapping),
  2430. dma_unmap_len(&txq->meta[i], len),
  2431. PCI_DMA_BIDIRECTIONAL);
  2432. txq->meta[i].flags = 0;
  2433. }
  2434. }
  2435. EXPORT_SYMBOL(il_cmd_queue_unmap);
  2436. /**
  2437. * il_cmd_queue_free - Deallocate DMA queue.
  2438. * @txq: Transmit queue to deallocate.
  2439. *
  2440. * Empty queue by removing and destroying all BD's.
  2441. * Free all buffers.
  2442. * 0-fill, but do not free "txq" descriptor structure.
  2443. */
  2444. void
  2445. il_cmd_queue_free(struct il_priv *il)
  2446. {
  2447. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2448. struct device *dev = &il->pci_dev->dev;
  2449. int i;
  2450. il_cmd_queue_unmap(il);
  2451. /* De-alloc array of command/tx buffers */
  2452. if (txq->cmd) {
  2453. for (i = 0; i <= TFD_CMD_SLOTS; i++)
  2454. kfree(txq->cmd[i]);
  2455. }
  2456. /* De-alloc circular buffer of TFDs */
  2457. if (txq->q.n_bd)
  2458. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2459. txq->tfds, txq->q.dma_addr);
  2460. /* deallocate arrays */
  2461. kfree(txq->cmd);
  2462. kfree(txq->meta);
  2463. txq->cmd = NULL;
  2464. txq->meta = NULL;
  2465. /* 0-fill queue descriptor structure */
  2466. memset(txq, 0, sizeof(*txq));
  2467. }
  2468. EXPORT_SYMBOL(il_cmd_queue_free);
  2469. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  2470. * DMA services
  2471. *
  2472. * Theory of operation
  2473. *
  2474. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  2475. * of buffer descriptors, each of which points to one or more data buffers for
  2476. * the device to read from or fill. Driver and device exchange status of each
  2477. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  2478. * entries in each circular buffer, to protect against confusing empty and full
  2479. * queue states.
  2480. *
  2481. * The device reads or writes the data in the queues via the device's several
  2482. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  2483. *
  2484. * For Tx queue, there are low mark and high mark limits. If, after queuing
  2485. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  2486. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  2487. * Tx queue resumed.
  2488. *
  2489. * See more detailed info in 4965.h.
  2490. ***************************************************/
  2491. int
  2492. il_queue_space(const struct il_queue *q)
  2493. {
  2494. int s = q->read_ptr - q->write_ptr;
  2495. if (q->read_ptr > q->write_ptr)
  2496. s -= q->n_bd;
  2497. if (s <= 0)
  2498. s += q->n_win;
  2499. /* keep some reserve to not confuse empty and full situations */
  2500. s -= 2;
  2501. if (s < 0)
  2502. s = 0;
  2503. return s;
  2504. }
  2505. EXPORT_SYMBOL(il_queue_space);
  2506. /**
  2507. * il_queue_init - Initialize queue's high/low-water and read/write idxes
  2508. */
  2509. static int
  2510. il_queue_init(struct il_priv *il, struct il_queue *q, int slots, u32 id)
  2511. {
  2512. /*
  2513. * TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  2514. * il_queue_inc_wrap and il_queue_dec_wrap are broken.
  2515. */
  2516. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  2517. /* FIXME: remove q->n_bd */
  2518. q->n_bd = TFD_QUEUE_SIZE_MAX;
  2519. q->n_win = slots;
  2520. q->id = id;
  2521. /* slots_must be power-of-two size, otherwise
  2522. * il_get_cmd_idx is broken. */
  2523. BUG_ON(!is_power_of_2(slots));
  2524. q->low_mark = q->n_win / 4;
  2525. if (q->low_mark < 4)
  2526. q->low_mark = 4;
  2527. q->high_mark = q->n_win / 8;
  2528. if (q->high_mark < 2)
  2529. q->high_mark = 2;
  2530. q->write_ptr = q->read_ptr = 0;
  2531. return 0;
  2532. }
  2533. /**
  2534. * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  2535. */
  2536. static int
  2537. il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id)
  2538. {
  2539. struct device *dev = &il->pci_dev->dev;
  2540. size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
  2541. /* Driver ilate data, only for Tx (not command) queues,
  2542. * not shared with device. */
  2543. if (id != il->cmd_queue) {
  2544. txq->skbs = kcalloc(TFD_QUEUE_SIZE_MAX,
  2545. sizeof(struct sk_buff *),
  2546. GFP_KERNEL);
  2547. if (!txq->skbs) {
  2548. IL_ERR("Fail to alloc skbs\n");
  2549. goto error;
  2550. }
  2551. } else
  2552. txq->skbs = NULL;
  2553. /* Circular buffer of transmit frame descriptors (TFDs),
  2554. * shared with device */
  2555. txq->tfds =
  2556. dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL);
  2557. if (!txq->tfds)
  2558. goto error;
  2559. txq->q.id = id;
  2560. return 0;
  2561. error:
  2562. kfree(txq->skbs);
  2563. txq->skbs = NULL;
  2564. return -ENOMEM;
  2565. }
  2566. /**
  2567. * il_tx_queue_init - Allocate and initialize one tx/cmd queue
  2568. */
  2569. int
  2570. il_tx_queue_init(struct il_priv *il, u32 txq_id)
  2571. {
  2572. int i, len, ret;
  2573. int slots, actual_slots;
  2574. struct il_tx_queue *txq = &il->txq[txq_id];
  2575. /*
  2576. * Alloc buffer array for commands (Tx or other types of commands).
  2577. * For the command queue (#4/#9), allocate command space + one big
  2578. * command for scan, since scan command is very huge; the system will
  2579. * not have two scans at the same time, so only one is needed.
  2580. * For normal Tx queues (all other queues), no super-size command
  2581. * space is needed.
  2582. */
  2583. if (txq_id == il->cmd_queue) {
  2584. slots = TFD_CMD_SLOTS;
  2585. actual_slots = slots + 1;
  2586. } else {
  2587. slots = TFD_TX_CMD_SLOTS;
  2588. actual_slots = slots;
  2589. }
  2590. txq->meta =
  2591. kzalloc(sizeof(struct il_cmd_meta) * actual_slots, GFP_KERNEL);
  2592. txq->cmd =
  2593. kzalloc(sizeof(struct il_device_cmd *) * actual_slots, GFP_KERNEL);
  2594. if (!txq->meta || !txq->cmd)
  2595. goto out_free_arrays;
  2596. len = sizeof(struct il_device_cmd);
  2597. for (i = 0; i < actual_slots; i++) {
  2598. /* only happens for cmd queue */
  2599. if (i == slots)
  2600. len = IL_MAX_CMD_SIZE;
  2601. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  2602. if (!txq->cmd[i])
  2603. goto err;
  2604. }
  2605. /* Alloc driver data array and TFD circular buffer */
  2606. ret = il_tx_queue_alloc(il, txq, txq_id);
  2607. if (ret)
  2608. goto err;
  2609. txq->need_update = 0;
  2610. /*
  2611. * For the default queues 0-3, set up the swq_id
  2612. * already -- all others need to get one later
  2613. * (if they need one at all).
  2614. */
  2615. if (txq_id < 4)
  2616. il_set_swq_id(txq, txq_id, txq_id);
  2617. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2618. il_queue_init(il, &txq->q, slots, txq_id);
  2619. /* Tell device where to find queue */
  2620. il->ops->txq_init(il, txq);
  2621. return 0;
  2622. err:
  2623. for (i = 0; i < actual_slots; i++)
  2624. kfree(txq->cmd[i]);
  2625. out_free_arrays:
  2626. kfree(txq->meta);
  2627. txq->meta = NULL;
  2628. kfree(txq->cmd);
  2629. txq->cmd = NULL;
  2630. return -ENOMEM;
  2631. }
  2632. EXPORT_SYMBOL(il_tx_queue_init);
  2633. void
  2634. il_tx_queue_reset(struct il_priv *il, u32 txq_id)
  2635. {
  2636. int slots, actual_slots;
  2637. struct il_tx_queue *txq = &il->txq[txq_id];
  2638. if (txq_id == il->cmd_queue) {
  2639. slots = TFD_CMD_SLOTS;
  2640. actual_slots = TFD_CMD_SLOTS + 1;
  2641. } else {
  2642. slots = TFD_TX_CMD_SLOTS;
  2643. actual_slots = TFD_TX_CMD_SLOTS;
  2644. }
  2645. memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
  2646. txq->need_update = 0;
  2647. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2648. il_queue_init(il, &txq->q, slots, txq_id);
  2649. /* Tell device where to find queue */
  2650. il->ops->txq_init(il, txq);
  2651. }
  2652. EXPORT_SYMBOL(il_tx_queue_reset);
  2653. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  2654. /**
  2655. * il_enqueue_hcmd - enqueue a uCode command
  2656. * @il: device ilate data point
  2657. * @cmd: a point to the ucode command structure
  2658. *
  2659. * The function returns < 0 values to indicate the operation is
  2660. * failed. On success, it turns the idx (> 0) of command in the
  2661. * command queue.
  2662. */
  2663. int
  2664. il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
  2665. {
  2666. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2667. struct il_queue *q = &txq->q;
  2668. struct il_device_cmd *out_cmd;
  2669. struct il_cmd_meta *out_meta;
  2670. dma_addr_t phys_addr;
  2671. unsigned long flags;
  2672. int len;
  2673. u32 idx;
  2674. u16 fix_size;
  2675. cmd->len = il->ops->get_hcmd_size(cmd->id, cmd->len);
  2676. fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr));
  2677. /* If any of the command structures end up being larger than
  2678. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  2679. * we will need to increase the size of the TFD entries
  2680. * Also, check to see if command buffer should not exceed the size
  2681. * of device_cmd and max_cmd_size. */
  2682. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  2683. !(cmd->flags & CMD_SIZE_HUGE));
  2684. BUG_ON(fix_size > IL_MAX_CMD_SIZE);
  2685. if (il_is_rfkill(il) || il_is_ctkill(il)) {
  2686. IL_WARN("Not sending command - %s KILL\n",
  2687. il_is_rfkill(il) ? "RF" : "CT");
  2688. return -EIO;
  2689. }
  2690. spin_lock_irqsave(&il->hcmd_lock, flags);
  2691. if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
  2692. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2693. IL_ERR("Restarting adapter due to command queue full\n");
  2694. queue_work(il->workqueue, &il->restart);
  2695. return -ENOSPC;
  2696. }
  2697. idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
  2698. out_cmd = txq->cmd[idx];
  2699. out_meta = &txq->meta[idx];
  2700. if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
  2701. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2702. return -ENOSPC;
  2703. }
  2704. memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
  2705. out_meta->flags = cmd->flags | CMD_MAPPED;
  2706. if (cmd->flags & CMD_WANT_SKB)
  2707. out_meta->source = cmd;
  2708. if (cmd->flags & CMD_ASYNC)
  2709. out_meta->callback = cmd->callback;
  2710. out_cmd->hdr.cmd = cmd->id;
  2711. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  2712. /* At this point, the out_cmd now has all of the incoming cmd
  2713. * information */
  2714. out_cmd->hdr.flags = 0;
  2715. out_cmd->hdr.sequence =
  2716. cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr));
  2717. if (cmd->flags & CMD_SIZE_HUGE)
  2718. out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
  2719. len = sizeof(struct il_device_cmd);
  2720. if (idx == TFD_CMD_SLOTS)
  2721. len = IL_MAX_CMD_SIZE;
  2722. #ifdef CONFIG_IWLEGACY_DEBUG
  2723. switch (out_cmd->hdr.cmd) {
  2724. case C_TX_LINK_QUALITY_CMD:
  2725. case C_SENSITIVITY:
  2726. D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, "
  2727. "%d bytes at %d[%d]:%d\n",
  2728. il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
  2729. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2730. q->write_ptr, idx, il->cmd_queue);
  2731. break;
  2732. default:
  2733. D_HC("Sending command %s (#%x), seq: 0x%04X, "
  2734. "%d bytes at %d[%d]:%d\n",
  2735. il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
  2736. le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr,
  2737. idx, il->cmd_queue);
  2738. }
  2739. #endif
  2740. phys_addr =
  2741. pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size,
  2742. PCI_DMA_BIDIRECTIONAL);
  2743. if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) {
  2744. idx = -ENOMEM;
  2745. goto out;
  2746. }
  2747. dma_unmap_addr_set(out_meta, mapping, phys_addr);
  2748. dma_unmap_len_set(out_meta, len, fix_size);
  2749. txq->need_update = 1;
  2750. if (il->ops->txq_update_byte_cnt_tbl)
  2751. /* Set up entry in queue's byte count circular buffer */
  2752. il->ops->txq_update_byte_cnt_tbl(il, txq, 0);
  2753. il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size, 1,
  2754. U32_PAD(cmd->len));
  2755. /* Increment and update queue's write idx */
  2756. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  2757. il_txq_update_write_ptr(il, txq);
  2758. out:
  2759. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2760. return idx;
  2761. }
  2762. /**
  2763. * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
  2764. *
  2765. * When FW advances 'R' idx, all entries between old and new 'R' idx
  2766. * need to be reclaimed. As result, some free space forms. If there is
  2767. * enough free space (> low mark), wake the stack that feeds us.
  2768. */
  2769. static void
  2770. il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx)
  2771. {
  2772. struct il_tx_queue *txq = &il->txq[txq_id];
  2773. struct il_queue *q = &txq->q;
  2774. int nfreed = 0;
  2775. if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
  2776. IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
  2777. "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
  2778. q->write_ptr, q->read_ptr);
  2779. return;
  2780. }
  2781. for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
  2782. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2783. if (nfreed++ > 0) {
  2784. IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
  2785. q->write_ptr, q->read_ptr);
  2786. queue_work(il->workqueue, &il->restart);
  2787. }
  2788. }
  2789. }
  2790. /**
  2791. * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2792. * @rxb: Rx buffer to reclaim
  2793. *
  2794. * If an Rx buffer has an async callback associated with it the callback
  2795. * will be executed. The attached skb (if present) will only be freed
  2796. * if the callback returns 1
  2797. */
  2798. void
  2799. il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
  2800. {
  2801. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2802. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2803. int txq_id = SEQ_TO_QUEUE(sequence);
  2804. int idx = SEQ_TO_IDX(sequence);
  2805. int cmd_idx;
  2806. bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2807. struct il_device_cmd *cmd;
  2808. struct il_cmd_meta *meta;
  2809. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2810. unsigned long flags;
  2811. /* If a Tx command is being handled and it isn't in the actual
  2812. * command queue then there a command routing bug has been introduced
  2813. * in the queue management code. */
  2814. if (WARN
  2815. (txq_id != il->cmd_queue,
  2816. "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
  2817. txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr,
  2818. il->txq[il->cmd_queue].q.write_ptr)) {
  2819. il_print_hex_error(il, pkt, 32);
  2820. return;
  2821. }
  2822. cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
  2823. cmd = txq->cmd[cmd_idx];
  2824. meta = &txq->meta[cmd_idx];
  2825. txq->time_stamp = jiffies;
  2826. pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping),
  2827. dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL);
  2828. /* Input error checking is done when commands are added to queue. */
  2829. if (meta->flags & CMD_WANT_SKB) {
  2830. meta->source->reply_page = (unsigned long)rxb_addr(rxb);
  2831. rxb->page = NULL;
  2832. } else if (meta->callback)
  2833. meta->callback(il, cmd, pkt);
  2834. spin_lock_irqsave(&il->hcmd_lock, flags);
  2835. il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
  2836. if (!(meta->flags & CMD_ASYNC)) {
  2837. clear_bit(S_HCMD_ACTIVE, &il->status);
  2838. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  2839. il_get_cmd_string(cmd->hdr.cmd));
  2840. wake_up(&il->wait_command_queue);
  2841. }
  2842. /* Mark as unmapped */
  2843. meta->flags = 0;
  2844. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2845. }
  2846. EXPORT_SYMBOL(il_tx_cmd_complete);
  2847. MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
  2848. MODULE_VERSION(IWLWIFI_VERSION);
  2849. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  2850. MODULE_LICENSE("GPL");
  2851. /*
  2852. * set bt_coex_active to true, uCode will do kill/defer
  2853. * every time the priority line is asserted (BT is sending signals on the
  2854. * priority line in the PCIx).
  2855. * set bt_coex_active to false, uCode will ignore the BT activity and
  2856. * perform the normal operation
  2857. *
  2858. * User might experience transmit issue on some platform due to WiFi/BT
  2859. * co-exist problem. The possible behaviors are:
  2860. * Able to scan and finding all the available AP
  2861. * Not able to associate with any AP
  2862. * On those platforms, WiFi communication can be restored by set
  2863. * "bt_coex_active" module parameter to "false"
  2864. *
  2865. * default: bt_coex_active = true (BT_COEX_ENABLE)
  2866. */
  2867. static bool bt_coex_active = true;
  2868. module_param(bt_coex_active, bool, S_IRUGO);
  2869. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  2870. u32 il_debug_level;
  2871. EXPORT_SYMBOL(il_debug_level);
  2872. const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  2873. EXPORT_SYMBOL(il_bcast_addr);
  2874. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  2875. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  2876. static void
  2877. il_init_ht_hw_capab(const struct il_priv *il,
  2878. struct ieee80211_sta_ht_cap *ht_info,
  2879. enum nl80211_band band)
  2880. {
  2881. u16 max_bit_rate = 0;
  2882. u8 rx_chains_num = il->hw_params.rx_chains_num;
  2883. u8 tx_chains_num = il->hw_params.tx_chains_num;
  2884. ht_info->cap = 0;
  2885. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  2886. ht_info->ht_supported = true;
  2887. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  2888. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  2889. if (il->hw_params.ht40_channel & BIT(band)) {
  2890. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  2891. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  2892. ht_info->mcs.rx_mask[4] = 0x01;
  2893. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  2894. }
  2895. if (il->cfg->mod_params->amsdu_size_8K)
  2896. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  2897. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2898. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2899. ht_info->mcs.rx_mask[0] = 0xFF;
  2900. if (rx_chains_num >= 2)
  2901. ht_info->mcs.rx_mask[1] = 0xFF;
  2902. if (rx_chains_num >= 3)
  2903. ht_info->mcs.rx_mask[2] = 0xFF;
  2904. /* Highest supported Rx data rate */
  2905. max_bit_rate *= rx_chains_num;
  2906. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  2907. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  2908. /* Tx MCS capabilities */
  2909. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  2910. if (tx_chains_num != rx_chains_num) {
  2911. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2912. ht_info->mcs.tx_params |=
  2913. ((tx_chains_num -
  2914. 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  2915. }
  2916. }
  2917. /**
  2918. * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
  2919. */
  2920. int
  2921. il_init_geos(struct il_priv *il)
  2922. {
  2923. struct il_channel_info *ch;
  2924. struct ieee80211_supported_band *sband;
  2925. struct ieee80211_channel *channels;
  2926. struct ieee80211_channel *geo_ch;
  2927. struct ieee80211_rate *rates;
  2928. int i = 0;
  2929. s8 max_tx_power = 0;
  2930. if (il->bands[NL80211_BAND_2GHZ].n_bitrates ||
  2931. il->bands[NL80211_BAND_5GHZ].n_bitrates) {
  2932. D_INFO("Geography modes already initialized.\n");
  2933. set_bit(S_GEO_CONFIGURED, &il->status);
  2934. return 0;
  2935. }
  2936. channels =
  2937. kzalloc(sizeof(struct ieee80211_channel) * il->channel_count,
  2938. GFP_KERNEL);
  2939. if (!channels)
  2940. return -ENOMEM;
  2941. rates =
  2942. kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
  2943. GFP_KERNEL);
  2944. if (!rates) {
  2945. kfree(channels);
  2946. return -ENOMEM;
  2947. }
  2948. /* 5.2GHz channels start after the 2.4GHz channels */
  2949. sband = &il->bands[NL80211_BAND_5GHZ];
  2950. sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
  2951. /* just OFDM */
  2952. sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
  2953. sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
  2954. if (il->cfg->sku & IL_SKU_N)
  2955. il_init_ht_hw_capab(il, &sband->ht_cap, NL80211_BAND_5GHZ);
  2956. sband = &il->bands[NL80211_BAND_2GHZ];
  2957. sband->channels = channels;
  2958. /* OFDM & CCK */
  2959. sband->bitrates = rates;
  2960. sband->n_bitrates = RATE_COUNT_LEGACY;
  2961. if (il->cfg->sku & IL_SKU_N)
  2962. il_init_ht_hw_capab(il, &sband->ht_cap, NL80211_BAND_2GHZ);
  2963. il->ieee_channels = channels;
  2964. il->ieee_rates = rates;
  2965. for (i = 0; i < il->channel_count; i++) {
  2966. ch = &il->channel_info[i];
  2967. if (!il_is_channel_valid(ch))
  2968. continue;
  2969. sband = &il->bands[ch->band];
  2970. geo_ch = &sband->channels[sband->n_channels++];
  2971. geo_ch->center_freq =
  2972. ieee80211_channel_to_frequency(ch->channel, ch->band);
  2973. geo_ch->max_power = ch->max_power_avg;
  2974. geo_ch->max_antenna_gain = 0xff;
  2975. geo_ch->hw_value = ch->channel;
  2976. if (il_is_channel_valid(ch)) {
  2977. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  2978. geo_ch->flags |= IEEE80211_CHAN_NO_IR;
  2979. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  2980. geo_ch->flags |= IEEE80211_CHAN_NO_IR;
  2981. if (ch->flags & EEPROM_CHANNEL_RADAR)
  2982. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  2983. geo_ch->flags |= ch->ht40_extension_channel;
  2984. if (ch->max_power_avg > max_tx_power)
  2985. max_tx_power = ch->max_power_avg;
  2986. } else {
  2987. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  2988. }
  2989. D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel,
  2990. geo_ch->center_freq,
  2991. il_is_channel_a_band(ch) ? "5.2" : "2.4",
  2992. geo_ch->
  2993. flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid",
  2994. geo_ch->flags);
  2995. }
  2996. il->tx_power_device_lmt = max_tx_power;
  2997. il->tx_power_user_lmt = max_tx_power;
  2998. il->tx_power_next = max_tx_power;
  2999. if (il->bands[NL80211_BAND_5GHZ].n_channels == 0 &&
  3000. (il->cfg->sku & IL_SKU_A)) {
  3001. IL_INFO("Incorrectly detected BG card as ABG. "
  3002. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  3003. il->pci_dev->device, il->pci_dev->subsystem_device);
  3004. il->cfg->sku &= ~IL_SKU_A;
  3005. }
  3006. IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  3007. il->bands[NL80211_BAND_2GHZ].n_channels,
  3008. il->bands[NL80211_BAND_5GHZ].n_channels);
  3009. set_bit(S_GEO_CONFIGURED, &il->status);
  3010. return 0;
  3011. }
  3012. EXPORT_SYMBOL(il_init_geos);
  3013. /*
  3014. * il_free_geos - undo allocations in il_init_geos
  3015. */
  3016. void
  3017. il_free_geos(struct il_priv *il)
  3018. {
  3019. kfree(il->ieee_channels);
  3020. kfree(il->ieee_rates);
  3021. clear_bit(S_GEO_CONFIGURED, &il->status);
  3022. }
  3023. EXPORT_SYMBOL(il_free_geos);
  3024. static bool
  3025. il_is_channel_extension(struct il_priv *il, enum nl80211_band band,
  3026. u16 channel, u8 extension_chan_offset)
  3027. {
  3028. const struct il_channel_info *ch_info;
  3029. ch_info = il_get_channel_info(il, band, channel);
  3030. if (!il_is_channel_valid(ch_info))
  3031. return false;
  3032. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  3033. return !(ch_info->
  3034. ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS);
  3035. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  3036. return !(ch_info->
  3037. ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS);
  3038. return false;
  3039. }
  3040. bool
  3041. il_is_ht40_tx_allowed(struct il_priv *il, struct ieee80211_sta_ht_cap *ht_cap)
  3042. {
  3043. if (!il->ht.enabled || !il->ht.is_40mhz)
  3044. return false;
  3045. /*
  3046. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  3047. * the bit will not set if it is pure 40MHz case
  3048. */
  3049. if (ht_cap && !ht_cap->ht_supported)
  3050. return false;
  3051. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3052. if (il->disable_ht40)
  3053. return false;
  3054. #endif
  3055. return il_is_channel_extension(il, il->band,
  3056. le16_to_cpu(il->staging.channel),
  3057. il->ht.extension_chan_offset);
  3058. }
  3059. EXPORT_SYMBOL(il_is_ht40_tx_allowed);
  3060. static u16 noinline
  3061. il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  3062. {
  3063. u16 new_val;
  3064. u16 beacon_factor;
  3065. /*
  3066. * If mac80211 hasn't given us a beacon interval, program
  3067. * the default into the device.
  3068. */
  3069. if (!beacon_val)
  3070. return DEFAULT_BEACON_INTERVAL;
  3071. /*
  3072. * If the beacon interval we obtained from the peer
  3073. * is too large, we'll have to wake up more often
  3074. * (and in IBSS case, we'll beacon too much)
  3075. *
  3076. * For example, if max_beacon_val is 4096, and the
  3077. * requested beacon interval is 7000, we'll have to
  3078. * use 3500 to be able to wake up on the beacons.
  3079. *
  3080. * This could badly influence beacon detection stats.
  3081. */
  3082. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  3083. new_val = beacon_val / beacon_factor;
  3084. if (!new_val)
  3085. new_val = max_beacon_val;
  3086. return new_val;
  3087. }
  3088. int
  3089. il_send_rxon_timing(struct il_priv *il)
  3090. {
  3091. u64 tsf;
  3092. s32 interval_tm, rem;
  3093. struct ieee80211_conf *conf = NULL;
  3094. u16 beacon_int;
  3095. struct ieee80211_vif *vif = il->vif;
  3096. conf = &il->hw->conf;
  3097. lockdep_assert_held(&il->mutex);
  3098. memset(&il->timing, 0, sizeof(struct il_rxon_time_cmd));
  3099. il->timing.timestamp = cpu_to_le64(il->timestamp);
  3100. il->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  3101. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  3102. /*
  3103. * TODO: For IBSS we need to get atim_win from mac80211,
  3104. * for now just always use 0
  3105. */
  3106. il->timing.atim_win = 0;
  3107. beacon_int =
  3108. il_adjust_beacon_interval(beacon_int,
  3109. il->hw_params.max_beacon_itrvl *
  3110. TIME_UNIT);
  3111. il->timing.beacon_interval = cpu_to_le16(beacon_int);
  3112. tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
  3113. interval_tm = beacon_int * TIME_UNIT;
  3114. rem = do_div(tsf, interval_tm);
  3115. il->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  3116. il->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1;
  3117. D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
  3118. le16_to_cpu(il->timing.beacon_interval),
  3119. le32_to_cpu(il->timing.beacon_init_val),
  3120. le16_to_cpu(il->timing.atim_win));
  3121. return il_send_cmd_pdu(il, C_RXON_TIMING, sizeof(il->timing),
  3122. &il->timing);
  3123. }
  3124. EXPORT_SYMBOL(il_send_rxon_timing);
  3125. void
  3126. il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt)
  3127. {
  3128. struct il_rxon_cmd *rxon = &il->staging;
  3129. if (hw_decrypt)
  3130. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  3131. else
  3132. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  3133. }
  3134. EXPORT_SYMBOL(il_set_rxon_hwcrypto);
  3135. /* validate RXON structure is valid */
  3136. int
  3137. il_check_rxon_cmd(struct il_priv *il)
  3138. {
  3139. struct il_rxon_cmd *rxon = &il->staging;
  3140. bool error = false;
  3141. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  3142. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  3143. IL_WARN("check 2.4G: wrong narrow\n");
  3144. error = true;
  3145. }
  3146. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  3147. IL_WARN("check 2.4G: wrong radar\n");
  3148. error = true;
  3149. }
  3150. } else {
  3151. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  3152. IL_WARN("check 5.2G: not short slot!\n");
  3153. error = true;
  3154. }
  3155. if (rxon->flags & RXON_FLG_CCK_MSK) {
  3156. IL_WARN("check 5.2G: CCK!\n");
  3157. error = true;
  3158. }
  3159. }
  3160. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  3161. IL_WARN("mac/bssid mcast!\n");
  3162. error = true;
  3163. }
  3164. /* make sure basic rates 6Mbps and 1Mbps are supported */
  3165. if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
  3166. (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
  3167. IL_WARN("neither 1 nor 6 are basic\n");
  3168. error = true;
  3169. }
  3170. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  3171. IL_WARN("aid > 2007\n");
  3172. error = true;
  3173. }
  3174. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) ==
  3175. (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  3176. IL_WARN("CCK and short slot\n");
  3177. error = true;
  3178. }
  3179. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) ==
  3180. (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  3181. IL_WARN("CCK and auto detect");
  3182. error = true;
  3183. }
  3184. if ((rxon->
  3185. flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) ==
  3186. RXON_FLG_TGG_PROTECT_MSK) {
  3187. IL_WARN("TGg but no auto-detect\n");
  3188. error = true;
  3189. }
  3190. if (error)
  3191. IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel));
  3192. if (error) {
  3193. IL_ERR("Invalid RXON\n");
  3194. return -EINVAL;
  3195. }
  3196. return 0;
  3197. }
  3198. EXPORT_SYMBOL(il_check_rxon_cmd);
  3199. /**
  3200. * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  3201. * @il: staging_rxon is compared to active_rxon
  3202. *
  3203. * If the RXON structure is changing enough to require a new tune,
  3204. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  3205. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  3206. */
  3207. int
  3208. il_full_rxon_required(struct il_priv *il)
  3209. {
  3210. const struct il_rxon_cmd *staging = &il->staging;
  3211. const struct il_rxon_cmd *active = &il->active;
  3212. #define CHK(cond) \
  3213. if ((cond)) { \
  3214. D_INFO("need full RXON - " #cond "\n"); \
  3215. return 1; \
  3216. }
  3217. #define CHK_NEQ(c1, c2) \
  3218. if ((c1) != (c2)) { \
  3219. D_INFO("need full RXON - " \
  3220. #c1 " != " #c2 " - %d != %d\n", \
  3221. (c1), (c2)); \
  3222. return 1; \
  3223. }
  3224. /* These items are only settable from the full RXON command */
  3225. CHK(!il_is_associated(il));
  3226. CHK(!ether_addr_equal_64bits(staging->bssid_addr, active->bssid_addr));
  3227. CHK(!ether_addr_equal_64bits(staging->node_addr, active->node_addr));
  3228. CHK(!ether_addr_equal_64bits(staging->wlap_bssid_addr,
  3229. active->wlap_bssid_addr));
  3230. CHK_NEQ(staging->dev_type, active->dev_type);
  3231. CHK_NEQ(staging->channel, active->channel);
  3232. CHK_NEQ(staging->air_propagation, active->air_propagation);
  3233. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  3234. active->ofdm_ht_single_stream_basic_rates);
  3235. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  3236. active->ofdm_ht_dual_stream_basic_rates);
  3237. CHK_NEQ(staging->assoc_id, active->assoc_id);
  3238. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  3239. * be updated with the RXON_ASSOC command -- however only some
  3240. * flag transitions are allowed using RXON_ASSOC */
  3241. /* Check if we are not switching bands */
  3242. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  3243. active->flags & RXON_FLG_BAND_24G_MSK);
  3244. /* Check if we are switching association toggle */
  3245. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  3246. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  3247. #undef CHK
  3248. #undef CHK_NEQ
  3249. return 0;
  3250. }
  3251. EXPORT_SYMBOL(il_full_rxon_required);
  3252. u8
  3253. il_get_lowest_plcp(struct il_priv *il)
  3254. {
  3255. /*
  3256. * Assign the lowest rate -- should really get this from
  3257. * the beacon skb from mac80211.
  3258. */
  3259. if (il->staging.flags & RXON_FLG_BAND_24G_MSK)
  3260. return RATE_1M_PLCP;
  3261. else
  3262. return RATE_6M_PLCP;
  3263. }
  3264. EXPORT_SYMBOL(il_get_lowest_plcp);
  3265. static void
  3266. _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  3267. {
  3268. struct il_rxon_cmd *rxon = &il->staging;
  3269. if (!il->ht.enabled) {
  3270. rxon->flags &=
  3271. ~(RXON_FLG_CHANNEL_MODE_MSK |
  3272. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | RXON_FLG_HT40_PROT_MSK
  3273. | RXON_FLG_HT_PROT_MSK);
  3274. return;
  3275. }
  3276. rxon->flags |=
  3277. cpu_to_le32(il->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
  3278. /* Set up channel bandwidth:
  3279. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  3280. /* clear the HT channel mode before set the mode */
  3281. rxon->flags &=
  3282. ~(RXON_FLG_CHANNEL_MODE_MSK | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3283. if (il_is_ht40_tx_allowed(il, NULL)) {
  3284. /* pure ht40 */
  3285. if (il->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  3286. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  3287. /* Note: control channel is opposite of extension channel */
  3288. switch (il->ht.extension_chan_offset) {
  3289. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3290. rxon->flags &=
  3291. ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3292. break;
  3293. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3294. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3295. break;
  3296. }
  3297. } else {
  3298. /* Note: control channel is opposite of extension channel */
  3299. switch (il->ht.extension_chan_offset) {
  3300. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3301. rxon->flags &=
  3302. ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3303. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3304. break;
  3305. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3306. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3307. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3308. break;
  3309. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  3310. default:
  3311. /* channel location only valid if in Mixed mode */
  3312. IL_ERR("invalid extension channel offset\n");
  3313. break;
  3314. }
  3315. }
  3316. } else {
  3317. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  3318. }
  3319. if (il->ops->set_rxon_chain)
  3320. il->ops->set_rxon_chain(il);
  3321. D_ASSOC("rxon flags 0x%X operation mode :0x%X "
  3322. "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags),
  3323. il->ht.protection, il->ht.extension_chan_offset);
  3324. }
  3325. void
  3326. il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  3327. {
  3328. _il_set_rxon_ht(il, ht_conf);
  3329. }
  3330. EXPORT_SYMBOL(il_set_rxon_ht);
  3331. /* Return valid, unused, channel for a passive scan to reset the RF */
  3332. u8
  3333. il_get_single_channel_number(struct il_priv *il, enum nl80211_band band)
  3334. {
  3335. const struct il_channel_info *ch_info;
  3336. int i;
  3337. u8 channel = 0;
  3338. u8 min, max;
  3339. if (band == NL80211_BAND_5GHZ) {
  3340. min = 14;
  3341. max = il->channel_count;
  3342. } else {
  3343. min = 0;
  3344. max = 14;
  3345. }
  3346. for (i = min; i < max; i++) {
  3347. channel = il->channel_info[i].channel;
  3348. if (channel == le16_to_cpu(il->staging.channel))
  3349. continue;
  3350. ch_info = il_get_channel_info(il, band, channel);
  3351. if (il_is_channel_valid(ch_info))
  3352. break;
  3353. }
  3354. return channel;
  3355. }
  3356. EXPORT_SYMBOL(il_get_single_channel_number);
  3357. /**
  3358. * il_set_rxon_channel - Set the band and channel values in staging RXON
  3359. * @ch: requested channel as a pointer to struct ieee80211_channel
  3360. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  3361. * in the staging RXON flag structure based on the ch->band
  3362. */
  3363. int
  3364. il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch)
  3365. {
  3366. enum nl80211_band band = ch->band;
  3367. u16 channel = ch->hw_value;
  3368. if (le16_to_cpu(il->staging.channel) == channel && il->band == band)
  3369. return 0;
  3370. il->staging.channel = cpu_to_le16(channel);
  3371. if (band == NL80211_BAND_5GHZ)
  3372. il->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  3373. else
  3374. il->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3375. il->band = band;
  3376. D_INFO("Staging channel set to %d [%d]\n", channel, band);
  3377. return 0;
  3378. }
  3379. EXPORT_SYMBOL(il_set_rxon_channel);
  3380. void
  3381. il_set_flags_for_band(struct il_priv *il, enum nl80211_band band,
  3382. struct ieee80211_vif *vif)
  3383. {
  3384. if (band == NL80211_BAND_5GHZ) {
  3385. il->staging.flags &=
  3386. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  3387. RXON_FLG_CCK_MSK);
  3388. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3389. } else {
  3390. /* Copied from il_post_associate() */
  3391. if (vif && vif->bss_conf.use_short_slot)
  3392. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3393. else
  3394. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3395. il->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3396. il->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  3397. il->staging.flags &= ~RXON_FLG_CCK_MSK;
  3398. }
  3399. }
  3400. EXPORT_SYMBOL(il_set_flags_for_band);
  3401. /*
  3402. * initialize rxon structure with default values from eeprom
  3403. */
  3404. void
  3405. il_connection_init_rx_config(struct il_priv *il)
  3406. {
  3407. const struct il_channel_info *ch_info;
  3408. memset(&il->staging, 0, sizeof(il->staging));
  3409. switch (il->iw_mode) {
  3410. case NL80211_IFTYPE_UNSPECIFIED:
  3411. il->staging.dev_type = RXON_DEV_TYPE_ESS;
  3412. break;
  3413. case NL80211_IFTYPE_STATION:
  3414. il->staging.dev_type = RXON_DEV_TYPE_ESS;
  3415. il->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  3416. break;
  3417. case NL80211_IFTYPE_ADHOC:
  3418. il->staging.dev_type = RXON_DEV_TYPE_IBSS;
  3419. il->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  3420. il->staging.filter_flags =
  3421. RXON_FILTER_BCON_AWARE_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  3422. break;
  3423. default:
  3424. IL_ERR("Unsupported interface type %d\n", il->vif->type);
  3425. return;
  3426. }
  3427. #if 0
  3428. /* TODO: Figure out when short_preamble would be set and cache from
  3429. * that */
  3430. if (!hw_to_local(il->hw)->short_preamble)
  3431. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3432. else
  3433. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3434. #endif
  3435. ch_info =
  3436. il_get_channel_info(il, il->band, le16_to_cpu(il->active.channel));
  3437. if (!ch_info)
  3438. ch_info = &il->channel_info[0];
  3439. il->staging.channel = cpu_to_le16(ch_info->channel);
  3440. il->band = ch_info->band;
  3441. il_set_flags_for_band(il, il->band, il->vif);
  3442. il->staging.ofdm_basic_rates =
  3443. (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3444. il->staging.cck_basic_rates =
  3445. (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3446. /* clear both MIX and PURE40 mode flag */
  3447. il->staging.flags &=
  3448. ~(RXON_FLG_CHANNEL_MODE_MIXED | RXON_FLG_CHANNEL_MODE_PURE_40);
  3449. if (il->vif)
  3450. memcpy(il->staging.node_addr, il->vif->addr, ETH_ALEN);
  3451. il->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  3452. il->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  3453. }
  3454. EXPORT_SYMBOL(il_connection_init_rx_config);
  3455. void
  3456. il_set_rate(struct il_priv *il)
  3457. {
  3458. const struct ieee80211_supported_band *hw = NULL;
  3459. struct ieee80211_rate *rate;
  3460. int i;
  3461. hw = il_get_hw_mode(il, il->band);
  3462. if (!hw) {
  3463. IL_ERR("Failed to set rate: unable to get hw mode\n");
  3464. return;
  3465. }
  3466. il->active_rate = 0;
  3467. for (i = 0; i < hw->n_bitrates; i++) {
  3468. rate = &(hw->bitrates[i]);
  3469. if (rate->hw_value < RATE_COUNT_LEGACY)
  3470. il->active_rate |= (1 << rate->hw_value);
  3471. }
  3472. D_RATE("Set active_rate = %0x\n", il->active_rate);
  3473. il->staging.cck_basic_rates =
  3474. (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3475. il->staging.ofdm_basic_rates =
  3476. (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3477. }
  3478. EXPORT_SYMBOL(il_set_rate);
  3479. void
  3480. il_chswitch_done(struct il_priv *il, bool is_success)
  3481. {
  3482. if (test_bit(S_EXIT_PENDING, &il->status))
  3483. return;
  3484. if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3485. ieee80211_chswitch_done(il->vif, is_success);
  3486. }
  3487. EXPORT_SYMBOL(il_chswitch_done);
  3488. void
  3489. il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
  3490. {
  3491. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3492. struct il_csa_notification *csa = &(pkt->u.csa_notif);
  3493. struct il_rxon_cmd *rxon = (void *)&il->active;
  3494. if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3495. return;
  3496. if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
  3497. rxon->channel = csa->channel;
  3498. il->staging.channel = csa->channel;
  3499. D_11H("CSA notif: channel %d\n", le16_to_cpu(csa->channel));
  3500. il_chswitch_done(il, true);
  3501. } else {
  3502. IL_ERR("CSA notif (fail) : channel %d\n",
  3503. le16_to_cpu(csa->channel));
  3504. il_chswitch_done(il, false);
  3505. }
  3506. }
  3507. EXPORT_SYMBOL(il_hdl_csa);
  3508. #ifdef CONFIG_IWLEGACY_DEBUG
  3509. void
  3510. il_print_rx_config_cmd(struct il_priv *il)
  3511. {
  3512. struct il_rxon_cmd *rxon = &il->staging;
  3513. D_RADIO("RX CONFIG:\n");
  3514. il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3515. D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3516. D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3517. D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags));
  3518. D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3519. D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates);
  3520. D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3521. D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  3522. D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  3523. D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3524. }
  3525. EXPORT_SYMBOL(il_print_rx_config_cmd);
  3526. #endif
  3527. /**
  3528. * il_irq_handle_error - called for HW or SW error interrupt from card
  3529. */
  3530. void
  3531. il_irq_handle_error(struct il_priv *il)
  3532. {
  3533. /* Set the FW error flag -- cleared on il_down */
  3534. set_bit(S_FW_ERROR, &il->status);
  3535. /* Cancel currently queued command. */
  3536. clear_bit(S_HCMD_ACTIVE, &il->status);
  3537. IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version);
  3538. il->ops->dump_nic_error_log(il);
  3539. if (il->ops->dump_fh)
  3540. il->ops->dump_fh(il, NULL, false);
  3541. #ifdef CONFIG_IWLEGACY_DEBUG
  3542. if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
  3543. il_print_rx_config_cmd(il);
  3544. #endif
  3545. wake_up(&il->wait_command_queue);
  3546. /* Keep the restart process from trying to send host
  3547. * commands by clearing the INIT status bit */
  3548. clear_bit(S_READY, &il->status);
  3549. if (!test_bit(S_EXIT_PENDING, &il->status)) {
  3550. IL_DBG(IL_DL_FW_ERRORS,
  3551. "Restarting adapter due to uCode error.\n");
  3552. if (il->cfg->mod_params->restart_fw)
  3553. queue_work(il->workqueue, &il->restart);
  3554. }
  3555. }
  3556. EXPORT_SYMBOL(il_irq_handle_error);
  3557. static int
  3558. _il_apm_stop_master(struct il_priv *il)
  3559. {
  3560. int ret = 0;
  3561. /* stop device's busmaster DMA activity */
  3562. _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  3563. ret =
  3564. _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  3565. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  3566. if (ret < 0)
  3567. IL_WARN("Master Disable Timed Out, 100 usec\n");
  3568. D_INFO("stop master\n");
  3569. return ret;
  3570. }
  3571. void
  3572. _il_apm_stop(struct il_priv *il)
  3573. {
  3574. lockdep_assert_held(&il->reg_lock);
  3575. D_INFO("Stop card, put in low power state\n");
  3576. /* Stop device's DMA activity */
  3577. _il_apm_stop_master(il);
  3578. /* Reset the entire device */
  3579. _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  3580. udelay(10);
  3581. /*
  3582. * Clear "initialization complete" bit to move adapter from
  3583. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  3584. */
  3585. _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3586. }
  3587. EXPORT_SYMBOL(_il_apm_stop);
  3588. void
  3589. il_apm_stop(struct il_priv *il)
  3590. {
  3591. unsigned long flags;
  3592. spin_lock_irqsave(&il->reg_lock, flags);
  3593. _il_apm_stop(il);
  3594. spin_unlock_irqrestore(&il->reg_lock, flags);
  3595. }
  3596. EXPORT_SYMBOL(il_apm_stop);
  3597. /*
  3598. * Start up NIC's basic functionality after it has been reset
  3599. * (e.g. after platform boot, or shutdown via il_apm_stop())
  3600. * NOTE: This does not load uCode nor start the embedded processor
  3601. */
  3602. int
  3603. il_apm_init(struct il_priv *il)
  3604. {
  3605. int ret = 0;
  3606. u16 lctl;
  3607. D_INFO("Init card's basic functions\n");
  3608. /*
  3609. * Use "set_bit" below rather than "write", to preserve any hardware
  3610. * bits already set by default after reset.
  3611. */
  3612. /* Disable L0S exit timer (platform NMI Work/Around) */
  3613. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3614. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  3615. /*
  3616. * Disable L0s without affecting L1;
  3617. * don't wait for ICH L0s (ICH bug W/A)
  3618. */
  3619. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3620. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  3621. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  3622. il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  3623. /*
  3624. * Enable HAP INTA (interrupt from management bus) to
  3625. * wake device's PCI Express link L1a -> L0s
  3626. * NOTE: This is no-op for 3945 (non-existent bit)
  3627. */
  3628. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  3629. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  3630. /*
  3631. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  3632. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  3633. * If so (likely), disable L0S, so device moves directly L0->L1;
  3634. * costs negligible amount of power savings.
  3635. * If not (unlikely), enable L0S, so there is at least some
  3636. * power savings, even without L1.
  3637. */
  3638. if (il->cfg->set_l0s) {
  3639. pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
  3640. if (lctl & PCI_EXP_LNKCTL_ASPM_L1) {
  3641. /* L1-ASPM enabled; disable(!) L0S */
  3642. il_set_bit(il, CSR_GIO_REG,
  3643. CSR_GIO_REG_VAL_L0S_ENABLED);
  3644. D_POWER("L1 Enabled; Disabling L0S\n");
  3645. } else {
  3646. /* L1-ASPM disabled; enable(!) L0S */
  3647. il_clear_bit(il, CSR_GIO_REG,
  3648. CSR_GIO_REG_VAL_L0S_ENABLED);
  3649. D_POWER("L1 Disabled; Enabling L0S\n");
  3650. }
  3651. }
  3652. /* Configure analog phase-lock-loop before activating to D0A */
  3653. if (il->cfg->pll_cfg_val)
  3654. il_set_bit(il, CSR_ANA_PLL_CFG,
  3655. il->cfg->pll_cfg_val);
  3656. /*
  3657. * Set "initialization complete" bit to move adapter from
  3658. * D0U* --> D0A* (powered-up active) state.
  3659. */
  3660. il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3661. /*
  3662. * Wait for clock stabilization; once stabilized, access to
  3663. * device-internal resources is supported, e.g. il_wr_prph()
  3664. * and accesses to uCode SRAM.
  3665. */
  3666. ret =
  3667. _il_poll_bit(il, CSR_GP_CNTRL,
  3668. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  3669. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  3670. if (ret < 0) {
  3671. D_INFO("Failed to init the card\n");
  3672. goto out;
  3673. }
  3674. /*
  3675. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  3676. * BSM (Boostrap State Machine) is only in 3945 and 4965.
  3677. *
  3678. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  3679. * do not disable clocks. This preserves any hardware bits already
  3680. * set by default in "CLK_CTRL_REG" after reset.
  3681. */
  3682. if (il->cfg->use_bsm)
  3683. il_wr_prph(il, APMG_CLK_EN_REG,
  3684. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  3685. else
  3686. il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  3687. udelay(20);
  3688. /* Disable L1-Active */
  3689. il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
  3690. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  3691. out:
  3692. return ret;
  3693. }
  3694. EXPORT_SYMBOL(il_apm_init);
  3695. int
  3696. il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
  3697. {
  3698. int ret;
  3699. s8 prev_tx_power;
  3700. bool defer;
  3701. lockdep_assert_held(&il->mutex);
  3702. if (il->tx_power_user_lmt == tx_power && !force)
  3703. return 0;
  3704. if (!il->ops->send_tx_power)
  3705. return -EOPNOTSUPP;
  3706. /* 0 dBm mean 1 milliwatt */
  3707. if (tx_power < 0) {
  3708. IL_WARN("Requested user TXPOWER %d below 1 mW.\n", tx_power);
  3709. return -EINVAL;
  3710. }
  3711. if (tx_power > il->tx_power_device_lmt) {
  3712. IL_WARN("Requested user TXPOWER %d above upper limit %d.\n",
  3713. tx_power, il->tx_power_device_lmt);
  3714. return -EINVAL;
  3715. }
  3716. if (!il_is_ready_rf(il))
  3717. return -EIO;
  3718. /* scan complete and commit_rxon use tx_power_next value,
  3719. * it always need to be updated for newest request */
  3720. il->tx_power_next = tx_power;
  3721. /* do not set tx power when scanning or channel changing */
  3722. defer = test_bit(S_SCANNING, &il->status) ||
  3723. memcmp(&il->active, &il->staging, sizeof(il->staging));
  3724. if (defer && !force) {
  3725. D_INFO("Deferring tx power set\n");
  3726. return 0;
  3727. }
  3728. prev_tx_power = il->tx_power_user_lmt;
  3729. il->tx_power_user_lmt = tx_power;
  3730. ret = il->ops->send_tx_power(il);
  3731. /* if fail to set tx_power, restore the orig. tx power */
  3732. if (ret) {
  3733. il->tx_power_user_lmt = prev_tx_power;
  3734. il->tx_power_next = prev_tx_power;
  3735. }
  3736. return ret;
  3737. }
  3738. EXPORT_SYMBOL(il_set_tx_power);
  3739. void
  3740. il_send_bt_config(struct il_priv *il)
  3741. {
  3742. struct il_bt_cmd bt_cmd = {
  3743. .lead_time = BT_LEAD_TIME_DEF,
  3744. .max_kill = BT_MAX_KILL_DEF,
  3745. .kill_ack_mask = 0,
  3746. .kill_cts_mask = 0,
  3747. };
  3748. if (!bt_coex_active)
  3749. bt_cmd.flags = BT_COEX_DISABLE;
  3750. else
  3751. bt_cmd.flags = BT_COEX_ENABLE;
  3752. D_INFO("BT coex %s\n",
  3753. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  3754. if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd))
  3755. IL_ERR("failed to send BT Coex Config\n");
  3756. }
  3757. EXPORT_SYMBOL(il_send_bt_config);
  3758. int
  3759. il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
  3760. {
  3761. struct il_stats_cmd stats_cmd = {
  3762. .configuration_flags = clear ? IL_STATS_CONF_CLEAR_STATS : 0,
  3763. };
  3764. if (flags & CMD_ASYNC)
  3765. return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd),
  3766. &stats_cmd, NULL);
  3767. else
  3768. return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd),
  3769. &stats_cmd);
  3770. }
  3771. EXPORT_SYMBOL(il_send_stats_request);
  3772. void
  3773. il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb)
  3774. {
  3775. #ifdef CONFIG_IWLEGACY_DEBUG
  3776. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3777. struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3778. D_RX("sleep mode: %d, src: %d\n",
  3779. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3780. #endif
  3781. }
  3782. EXPORT_SYMBOL(il_hdl_pm_sleep);
  3783. void
  3784. il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb)
  3785. {
  3786. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3787. u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  3788. D_RADIO("Dumping %d bytes of unhandled notification for %s:\n", len,
  3789. il_get_cmd_string(pkt->hdr.cmd));
  3790. il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
  3791. }
  3792. EXPORT_SYMBOL(il_hdl_pm_debug_stats);
  3793. void
  3794. il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb)
  3795. {
  3796. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3797. IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3798. "seq 0x%04X ser 0x%08X\n",
  3799. le32_to_cpu(pkt->u.err_resp.error_type),
  3800. il_get_cmd_string(pkt->u.err_resp.cmd_id),
  3801. pkt->u.err_resp.cmd_id,
  3802. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3803. le32_to_cpu(pkt->u.err_resp.error_info));
  3804. }
  3805. EXPORT_SYMBOL(il_hdl_error);
  3806. void
  3807. il_clear_isr_stats(struct il_priv *il)
  3808. {
  3809. memset(&il->isr_stats, 0, sizeof(il->isr_stats));
  3810. }
  3811. int
  3812. il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
  3813. const struct ieee80211_tx_queue_params *params)
  3814. {
  3815. struct il_priv *il = hw->priv;
  3816. unsigned long flags;
  3817. int q;
  3818. D_MAC80211("enter\n");
  3819. if (!il_is_ready_rf(il)) {
  3820. D_MAC80211("leave - RF not ready\n");
  3821. return -EIO;
  3822. }
  3823. if (queue >= AC_NUM) {
  3824. D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  3825. return 0;
  3826. }
  3827. q = AC_NUM - 1 - queue;
  3828. spin_lock_irqsave(&il->lock, flags);
  3829. il->qos_data.def_qos_parm.ac[q].cw_min =
  3830. cpu_to_le16(params->cw_min);
  3831. il->qos_data.def_qos_parm.ac[q].cw_max =
  3832. cpu_to_le16(params->cw_max);
  3833. il->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  3834. il->qos_data.def_qos_parm.ac[q].edca_txop =
  3835. cpu_to_le16((params->txop * 32));
  3836. il->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  3837. spin_unlock_irqrestore(&il->lock, flags);
  3838. D_MAC80211("leave\n");
  3839. return 0;
  3840. }
  3841. EXPORT_SYMBOL(il_mac_conf_tx);
  3842. int
  3843. il_mac_tx_last_beacon(struct ieee80211_hw *hw)
  3844. {
  3845. struct il_priv *il = hw->priv;
  3846. int ret;
  3847. D_MAC80211("enter\n");
  3848. ret = (il->ibss_manager == IL_IBSS_MANAGER);
  3849. D_MAC80211("leave ret %d\n", ret);
  3850. return ret;
  3851. }
  3852. EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
  3853. static int
  3854. il_set_mode(struct il_priv *il)
  3855. {
  3856. il_connection_init_rx_config(il);
  3857. if (il->ops->set_rxon_chain)
  3858. il->ops->set_rxon_chain(il);
  3859. return il_commit_rxon(il);
  3860. }
  3861. int
  3862. il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3863. {
  3864. struct il_priv *il = hw->priv;
  3865. int err;
  3866. bool reset;
  3867. mutex_lock(&il->mutex);
  3868. D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
  3869. if (!il_is_ready_rf(il)) {
  3870. IL_WARN("Try to add interface when device not ready\n");
  3871. err = -EINVAL;
  3872. goto out;
  3873. }
  3874. /*
  3875. * We do not support multiple virtual interfaces, but on hardware reset
  3876. * we have to add the same interface again.
  3877. */
  3878. reset = (il->vif == vif);
  3879. if (il->vif && !reset) {
  3880. err = -EOPNOTSUPP;
  3881. goto out;
  3882. }
  3883. il->vif = vif;
  3884. il->iw_mode = vif->type;
  3885. err = il_set_mode(il);
  3886. if (err) {
  3887. IL_WARN("Fail to set mode %d\n", vif->type);
  3888. if (!reset) {
  3889. il->vif = NULL;
  3890. il->iw_mode = NL80211_IFTYPE_STATION;
  3891. }
  3892. }
  3893. out:
  3894. D_MAC80211("leave err %d\n", err);
  3895. mutex_unlock(&il->mutex);
  3896. return err;
  3897. }
  3898. EXPORT_SYMBOL(il_mac_add_interface);
  3899. static void
  3900. il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif)
  3901. {
  3902. lockdep_assert_held(&il->mutex);
  3903. if (il->scan_vif == vif) {
  3904. il_scan_cancel_timeout(il, 200);
  3905. il_force_scan_end(il);
  3906. }
  3907. il_set_mode(il);
  3908. }
  3909. void
  3910. il_mac_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3911. {
  3912. struct il_priv *il = hw->priv;
  3913. mutex_lock(&il->mutex);
  3914. D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
  3915. WARN_ON(il->vif != vif);
  3916. il->vif = NULL;
  3917. il->iw_mode = NL80211_IFTYPE_UNSPECIFIED;
  3918. il_teardown_interface(il, vif);
  3919. eth_zero_addr(il->bssid);
  3920. D_MAC80211("leave\n");
  3921. mutex_unlock(&il->mutex);
  3922. }
  3923. EXPORT_SYMBOL(il_mac_remove_interface);
  3924. int
  3925. il_alloc_txq_mem(struct il_priv *il)
  3926. {
  3927. if (!il->txq)
  3928. il->txq =
  3929. kzalloc(sizeof(struct il_tx_queue) *
  3930. il->cfg->num_of_queues, GFP_KERNEL);
  3931. if (!il->txq) {
  3932. IL_ERR("Not enough memory for txq\n");
  3933. return -ENOMEM;
  3934. }
  3935. return 0;
  3936. }
  3937. EXPORT_SYMBOL(il_alloc_txq_mem);
  3938. void
  3939. il_free_txq_mem(struct il_priv *il)
  3940. {
  3941. kfree(il->txq);
  3942. il->txq = NULL;
  3943. }
  3944. EXPORT_SYMBOL(il_free_txq_mem);
  3945. int
  3946. il_force_reset(struct il_priv *il, bool external)
  3947. {
  3948. struct il_force_reset *force_reset;
  3949. if (test_bit(S_EXIT_PENDING, &il->status))
  3950. return -EINVAL;
  3951. force_reset = &il->force_reset;
  3952. force_reset->reset_request_count++;
  3953. if (!external) {
  3954. if (force_reset->last_force_reset_jiffies &&
  3955. time_after(force_reset->last_force_reset_jiffies +
  3956. force_reset->reset_duration, jiffies)) {
  3957. D_INFO("force reset rejected\n");
  3958. force_reset->reset_reject_count++;
  3959. return -EAGAIN;
  3960. }
  3961. }
  3962. force_reset->reset_success_count++;
  3963. force_reset->last_force_reset_jiffies = jiffies;
  3964. /*
  3965. * if the request is from external(ex: debugfs),
  3966. * then always perform the request in regardless the module
  3967. * parameter setting
  3968. * if the request is from internal (uCode error or driver
  3969. * detect failure), then fw_restart module parameter
  3970. * need to be check before performing firmware reload
  3971. */
  3972. if (!external && !il->cfg->mod_params->restart_fw) {
  3973. D_INFO("Cancel firmware reload based on "
  3974. "module parameter setting\n");
  3975. return 0;
  3976. }
  3977. IL_ERR("On demand firmware reload\n");
  3978. /* Set the FW error flag -- cleared on il_down */
  3979. set_bit(S_FW_ERROR, &il->status);
  3980. wake_up(&il->wait_command_queue);
  3981. /*
  3982. * Keep the restart process from trying to send host
  3983. * commands by clearing the INIT status bit
  3984. */
  3985. clear_bit(S_READY, &il->status);
  3986. queue_work(il->workqueue, &il->restart);
  3987. return 0;
  3988. }
  3989. EXPORT_SYMBOL(il_force_reset);
  3990. int
  3991. il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3992. enum nl80211_iftype newtype, bool newp2p)
  3993. {
  3994. struct il_priv *il = hw->priv;
  3995. int err;
  3996. mutex_lock(&il->mutex);
  3997. D_MAC80211("enter: type %d, addr %pM newtype %d newp2p %d\n",
  3998. vif->type, vif->addr, newtype, newp2p);
  3999. if (newp2p) {
  4000. err = -EOPNOTSUPP;
  4001. goto out;
  4002. }
  4003. if (!il->vif || !il_is_ready_rf(il)) {
  4004. /*
  4005. * Huh? But wait ... this can maybe happen when
  4006. * we're in the middle of a firmware restart!
  4007. */
  4008. err = -EBUSY;
  4009. goto out;
  4010. }
  4011. /* success */
  4012. vif->type = newtype;
  4013. vif->p2p = false;
  4014. il->iw_mode = newtype;
  4015. il_teardown_interface(il, vif);
  4016. err = 0;
  4017. out:
  4018. D_MAC80211("leave err %d\n", err);
  4019. mutex_unlock(&il->mutex);
  4020. return err;
  4021. }
  4022. EXPORT_SYMBOL(il_mac_change_interface);
  4023. void il_mac_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4024. u32 queues, bool drop)
  4025. {
  4026. struct il_priv *il = hw->priv;
  4027. unsigned long timeout = jiffies + msecs_to_jiffies(500);
  4028. int i;
  4029. mutex_lock(&il->mutex);
  4030. D_MAC80211("enter\n");
  4031. if (il->txq == NULL)
  4032. goto out;
  4033. for (i = 0; i < il->hw_params.max_txq_num; i++) {
  4034. struct il_queue *q;
  4035. if (i == il->cmd_queue)
  4036. continue;
  4037. q = &il->txq[i].q;
  4038. if (q->read_ptr == q->write_ptr)
  4039. continue;
  4040. if (time_after(jiffies, timeout)) {
  4041. IL_ERR("Failed to flush queue %d\n", q->id);
  4042. break;
  4043. }
  4044. msleep(20);
  4045. }
  4046. out:
  4047. D_MAC80211("leave\n");
  4048. mutex_unlock(&il->mutex);
  4049. }
  4050. EXPORT_SYMBOL(il_mac_flush);
  4051. /*
  4052. * On every watchdog tick we check (latest) time stamp. If it does not
  4053. * change during timeout period and queue is not empty we reset firmware.
  4054. */
  4055. static int
  4056. il_check_stuck_queue(struct il_priv *il, int cnt)
  4057. {
  4058. struct il_tx_queue *txq = &il->txq[cnt];
  4059. struct il_queue *q = &txq->q;
  4060. unsigned long timeout;
  4061. unsigned long now = jiffies;
  4062. int ret;
  4063. if (q->read_ptr == q->write_ptr) {
  4064. txq->time_stamp = now;
  4065. return 0;
  4066. }
  4067. timeout =
  4068. txq->time_stamp +
  4069. msecs_to_jiffies(il->cfg->wd_timeout);
  4070. if (time_after(now, timeout)) {
  4071. IL_ERR("Queue %d stuck for %u ms.\n", q->id,
  4072. jiffies_to_msecs(now - txq->time_stamp));
  4073. ret = il_force_reset(il, false);
  4074. return (ret == -EAGAIN) ? 0 : 1;
  4075. }
  4076. return 0;
  4077. }
  4078. /*
  4079. * Making watchdog tick be a quarter of timeout assure we will
  4080. * discover the queue hung between timeout and 1.25*timeout
  4081. */
  4082. #define IL_WD_TICK(timeout) ((timeout) / 4)
  4083. /*
  4084. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  4085. * we reset the firmware. If everything is fine just rearm the timer.
  4086. */
  4087. void
  4088. il_bg_watchdog(unsigned long data)
  4089. {
  4090. struct il_priv *il = (struct il_priv *)data;
  4091. int cnt;
  4092. unsigned long timeout;
  4093. if (test_bit(S_EXIT_PENDING, &il->status))
  4094. return;
  4095. timeout = il->cfg->wd_timeout;
  4096. if (timeout == 0)
  4097. return;
  4098. /* monitor and check for stuck cmd queue */
  4099. if (il_check_stuck_queue(il, il->cmd_queue))
  4100. return;
  4101. /* monitor and check for other stuck queues */
  4102. for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
  4103. /* skip as we already checked the command queue */
  4104. if (cnt == il->cmd_queue)
  4105. continue;
  4106. if (il_check_stuck_queue(il, cnt))
  4107. return;
  4108. }
  4109. mod_timer(&il->watchdog,
  4110. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4111. }
  4112. EXPORT_SYMBOL(il_bg_watchdog);
  4113. void
  4114. il_setup_watchdog(struct il_priv *il)
  4115. {
  4116. unsigned int timeout = il->cfg->wd_timeout;
  4117. if (timeout)
  4118. mod_timer(&il->watchdog,
  4119. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4120. else
  4121. del_timer(&il->watchdog);
  4122. }
  4123. EXPORT_SYMBOL(il_setup_watchdog);
  4124. /*
  4125. * extended beacon time format
  4126. * time in usec will be changed into a 32-bit value in extended:internal format
  4127. * the extended part is the beacon counts
  4128. * the internal part is the time in usec within one beacon interval
  4129. */
  4130. u32
  4131. il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval)
  4132. {
  4133. u32 quot;
  4134. u32 rem;
  4135. u32 interval = beacon_interval * TIME_UNIT;
  4136. if (!interval || !usec)
  4137. return 0;
  4138. quot =
  4139. (usec /
  4140. interval) & (il_beacon_time_mask_high(il,
  4141. il->hw_params.
  4142. beacon_time_tsf_bits) >> il->
  4143. hw_params.beacon_time_tsf_bits);
  4144. rem =
  4145. (usec % interval) & il_beacon_time_mask_low(il,
  4146. il->hw_params.
  4147. beacon_time_tsf_bits);
  4148. return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
  4149. }
  4150. EXPORT_SYMBOL(il_usecs_to_beacons);
  4151. /* base is usually what we get from ucode with each received frame,
  4152. * the same as HW timer counter counting down
  4153. */
  4154. __le32
  4155. il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
  4156. u32 beacon_interval)
  4157. {
  4158. u32 base_low = base & il_beacon_time_mask_low(il,
  4159. il->hw_params.
  4160. beacon_time_tsf_bits);
  4161. u32 addon_low = addon & il_beacon_time_mask_low(il,
  4162. il->hw_params.
  4163. beacon_time_tsf_bits);
  4164. u32 interval = beacon_interval * TIME_UNIT;
  4165. u32 res = (base & il_beacon_time_mask_high(il,
  4166. il->hw_params.
  4167. beacon_time_tsf_bits)) +
  4168. (addon & il_beacon_time_mask_high(il,
  4169. il->hw_params.
  4170. beacon_time_tsf_bits));
  4171. if (base_low > addon_low)
  4172. res += base_low - addon_low;
  4173. else if (base_low < addon_low) {
  4174. res += interval + base_low - addon_low;
  4175. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4176. } else
  4177. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4178. return cpu_to_le32(res);
  4179. }
  4180. EXPORT_SYMBOL(il_add_beacon_time);
  4181. #ifdef CONFIG_PM_SLEEP
  4182. static int
  4183. il_pci_suspend(struct device *device)
  4184. {
  4185. struct pci_dev *pdev = to_pci_dev(device);
  4186. struct il_priv *il = pci_get_drvdata(pdev);
  4187. /*
  4188. * This function is called when system goes into suspend state
  4189. * mac80211 will call il_mac_stop() from the mac80211 suspend function
  4190. * first but since il_mac_stop() has no knowledge of who the caller is,
  4191. * it will not call apm_ops.stop() to stop the DMA operation.
  4192. * Calling apm_ops.stop here to make sure we stop the DMA.
  4193. */
  4194. il_apm_stop(il);
  4195. return 0;
  4196. }
  4197. static int
  4198. il_pci_resume(struct device *device)
  4199. {
  4200. struct pci_dev *pdev = to_pci_dev(device);
  4201. struct il_priv *il = pci_get_drvdata(pdev);
  4202. bool hw_rfkill = false;
  4203. /*
  4204. * We disable the RETRY_TIMEOUT register (0x41) to keep
  4205. * PCI Tx retries from interfering with C3 CPU state.
  4206. */
  4207. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  4208. il_enable_interrupts(il);
  4209. if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4210. hw_rfkill = true;
  4211. if (hw_rfkill)
  4212. set_bit(S_RFKILL, &il->status);
  4213. else
  4214. clear_bit(S_RFKILL, &il->status);
  4215. wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
  4216. return 0;
  4217. }
  4218. SIMPLE_DEV_PM_OPS(il_pm_ops, il_pci_suspend, il_pci_resume);
  4219. EXPORT_SYMBOL(il_pm_ops);
  4220. #endif /* CONFIG_PM_SLEEP */
  4221. static void
  4222. il_update_qos(struct il_priv *il)
  4223. {
  4224. if (test_bit(S_EXIT_PENDING, &il->status))
  4225. return;
  4226. il->qos_data.def_qos_parm.qos_flags = 0;
  4227. if (il->qos_data.qos_active)
  4228. il->qos_data.def_qos_parm.qos_flags |=
  4229. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  4230. if (il->ht.enabled)
  4231. il->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  4232. D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  4233. il->qos_data.qos_active, il->qos_data.def_qos_parm.qos_flags);
  4234. il_send_cmd_pdu_async(il, C_QOS_PARAM, sizeof(struct il_qosparam_cmd),
  4235. &il->qos_data.def_qos_parm, NULL);
  4236. }
  4237. /**
  4238. * il_mac_config - mac80211 config callback
  4239. */
  4240. int
  4241. il_mac_config(struct ieee80211_hw *hw, u32 changed)
  4242. {
  4243. struct il_priv *il = hw->priv;
  4244. const struct il_channel_info *ch_info;
  4245. struct ieee80211_conf *conf = &hw->conf;
  4246. struct ieee80211_channel *channel = conf->chandef.chan;
  4247. struct il_ht_config *ht_conf = &il->current_ht_config;
  4248. unsigned long flags = 0;
  4249. int ret = 0;
  4250. u16 ch;
  4251. int scan_active = 0;
  4252. bool ht_changed = false;
  4253. mutex_lock(&il->mutex);
  4254. D_MAC80211("enter: channel %d changed 0x%X\n", channel->hw_value,
  4255. changed);
  4256. if (unlikely(test_bit(S_SCANNING, &il->status))) {
  4257. scan_active = 1;
  4258. D_MAC80211("scan active\n");
  4259. }
  4260. if (changed &
  4261. (IEEE80211_CONF_CHANGE_SMPS | IEEE80211_CONF_CHANGE_CHANNEL)) {
  4262. /* mac80211 uses static for non-HT which is what we want */
  4263. il->current_ht_config.smps = conf->smps_mode;
  4264. /*
  4265. * Recalculate chain counts.
  4266. *
  4267. * If monitor mode is enabled then mac80211 will
  4268. * set up the SM PS mode to OFF if an HT channel is
  4269. * configured.
  4270. */
  4271. if (il->ops->set_rxon_chain)
  4272. il->ops->set_rxon_chain(il);
  4273. }
  4274. /* during scanning mac80211 will delay channel setting until
  4275. * scan finish with changed = 0
  4276. */
  4277. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  4278. if (scan_active)
  4279. goto set_ch_out;
  4280. ch = channel->hw_value;
  4281. ch_info = il_get_channel_info(il, channel->band, ch);
  4282. if (!il_is_channel_valid(ch_info)) {
  4283. D_MAC80211("leave - invalid channel\n");
  4284. ret = -EINVAL;
  4285. goto set_ch_out;
  4286. }
  4287. if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
  4288. !il_is_channel_ibss(ch_info)) {
  4289. D_MAC80211("leave - not IBSS channel\n");
  4290. ret = -EINVAL;
  4291. goto set_ch_out;
  4292. }
  4293. spin_lock_irqsave(&il->lock, flags);
  4294. /* Configure HT40 channels */
  4295. if (il->ht.enabled != conf_is_ht(conf)) {
  4296. il->ht.enabled = conf_is_ht(conf);
  4297. ht_changed = true;
  4298. }
  4299. if (il->ht.enabled) {
  4300. if (conf_is_ht40_minus(conf)) {
  4301. il->ht.extension_chan_offset =
  4302. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  4303. il->ht.is_40mhz = true;
  4304. } else if (conf_is_ht40_plus(conf)) {
  4305. il->ht.extension_chan_offset =
  4306. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  4307. il->ht.is_40mhz = true;
  4308. } else {
  4309. il->ht.extension_chan_offset =
  4310. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  4311. il->ht.is_40mhz = false;
  4312. }
  4313. } else
  4314. il->ht.is_40mhz = false;
  4315. /*
  4316. * Default to no protection. Protection mode will
  4317. * later be set from BSS config in il_ht_conf
  4318. */
  4319. il->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  4320. /* if we are switching from ht to 2.4 clear flags
  4321. * from any ht related info since 2.4 does not
  4322. * support ht */
  4323. if ((le16_to_cpu(il->staging.channel) != ch))
  4324. il->staging.flags = 0;
  4325. il_set_rxon_channel(il, channel);
  4326. il_set_rxon_ht(il, ht_conf);
  4327. il_set_flags_for_band(il, channel->band, il->vif);
  4328. spin_unlock_irqrestore(&il->lock, flags);
  4329. if (il->ops->update_bcast_stations)
  4330. ret = il->ops->update_bcast_stations(il);
  4331. set_ch_out:
  4332. /* The list of supported rates and rate mask can be different
  4333. * for each band; since the band may have changed, reset
  4334. * the rate mask to what mac80211 lists */
  4335. il_set_rate(il);
  4336. }
  4337. if (changed & (IEEE80211_CONF_CHANGE_PS | IEEE80211_CONF_CHANGE_IDLE)) {
  4338. il->power_data.ps_disabled = !(conf->flags & IEEE80211_CONF_PS);
  4339. ret = il_power_update_mode(il, false);
  4340. if (ret)
  4341. D_MAC80211("Error setting sleep level\n");
  4342. }
  4343. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  4344. D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt,
  4345. conf->power_level);
  4346. il_set_tx_power(il, conf->power_level, false);
  4347. }
  4348. if (!il_is_ready(il)) {
  4349. D_MAC80211("leave - not ready\n");
  4350. goto out;
  4351. }
  4352. if (scan_active)
  4353. goto out;
  4354. if (memcmp(&il->active, &il->staging, sizeof(il->staging)))
  4355. il_commit_rxon(il);
  4356. else
  4357. D_INFO("Not re-sending same RXON configuration.\n");
  4358. if (ht_changed)
  4359. il_update_qos(il);
  4360. out:
  4361. D_MAC80211("leave ret %d\n", ret);
  4362. mutex_unlock(&il->mutex);
  4363. return ret;
  4364. }
  4365. EXPORT_SYMBOL(il_mac_config);
  4366. void
  4367. il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  4368. {
  4369. struct il_priv *il = hw->priv;
  4370. unsigned long flags;
  4371. mutex_lock(&il->mutex);
  4372. D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
  4373. spin_lock_irqsave(&il->lock, flags);
  4374. memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
  4375. /* new association get rid of ibss beacon skb */
  4376. if (il->beacon_skb)
  4377. dev_kfree_skb(il->beacon_skb);
  4378. il->beacon_skb = NULL;
  4379. il->timestamp = 0;
  4380. spin_unlock_irqrestore(&il->lock, flags);
  4381. il_scan_cancel_timeout(il, 100);
  4382. if (!il_is_ready_rf(il)) {
  4383. D_MAC80211("leave - not ready\n");
  4384. mutex_unlock(&il->mutex);
  4385. return;
  4386. }
  4387. /* we are restarting association process */
  4388. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4389. il_commit_rxon(il);
  4390. il_set_rate(il);
  4391. D_MAC80211("leave\n");
  4392. mutex_unlock(&il->mutex);
  4393. }
  4394. EXPORT_SYMBOL(il_mac_reset_tsf);
  4395. static void
  4396. il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif)
  4397. {
  4398. struct il_ht_config *ht_conf = &il->current_ht_config;
  4399. struct ieee80211_sta *sta;
  4400. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  4401. D_ASSOC("enter:\n");
  4402. if (!il->ht.enabled)
  4403. return;
  4404. il->ht.protection =
  4405. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  4406. il->ht.non_gf_sta_present =
  4407. !!(bss_conf->
  4408. ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  4409. ht_conf->single_chain_sufficient = false;
  4410. switch (vif->type) {
  4411. case NL80211_IFTYPE_STATION:
  4412. rcu_read_lock();
  4413. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  4414. if (sta) {
  4415. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  4416. int maxstreams;
  4417. maxstreams =
  4418. (ht_cap->mcs.
  4419. tx_params & IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  4420. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  4421. maxstreams += 1;
  4422. if (ht_cap->mcs.rx_mask[1] == 0 &&
  4423. ht_cap->mcs.rx_mask[2] == 0)
  4424. ht_conf->single_chain_sufficient = true;
  4425. if (maxstreams <= 1)
  4426. ht_conf->single_chain_sufficient = true;
  4427. } else {
  4428. /*
  4429. * If at all, this can only happen through a race
  4430. * when the AP disconnects us while we're still
  4431. * setting up the connection, in that case mac80211
  4432. * will soon tell us about that.
  4433. */
  4434. ht_conf->single_chain_sufficient = true;
  4435. }
  4436. rcu_read_unlock();
  4437. break;
  4438. case NL80211_IFTYPE_ADHOC:
  4439. ht_conf->single_chain_sufficient = true;
  4440. break;
  4441. default:
  4442. break;
  4443. }
  4444. D_ASSOC("leave\n");
  4445. }
  4446. static inline void
  4447. il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif)
  4448. {
  4449. /*
  4450. * inform the ucode that there is no longer an
  4451. * association and that no more packets should be
  4452. * sent
  4453. */
  4454. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4455. il->staging.assoc_id = 0;
  4456. il_commit_rxon(il);
  4457. }
  4458. static void
  4459. il_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  4460. {
  4461. struct il_priv *il = hw->priv;
  4462. unsigned long flags;
  4463. __le64 timestamp;
  4464. struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
  4465. if (!skb)
  4466. return;
  4467. D_MAC80211("enter\n");
  4468. lockdep_assert_held(&il->mutex);
  4469. if (!il->beacon_enabled) {
  4470. IL_ERR("update beacon with no beaconing enabled\n");
  4471. dev_kfree_skb(skb);
  4472. return;
  4473. }
  4474. spin_lock_irqsave(&il->lock, flags);
  4475. if (il->beacon_skb)
  4476. dev_kfree_skb(il->beacon_skb);
  4477. il->beacon_skb = skb;
  4478. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  4479. il->timestamp = le64_to_cpu(timestamp);
  4480. D_MAC80211("leave\n");
  4481. spin_unlock_irqrestore(&il->lock, flags);
  4482. if (!il_is_ready_rf(il)) {
  4483. D_MAC80211("leave - RF not ready\n");
  4484. return;
  4485. }
  4486. il->ops->post_associate(il);
  4487. }
  4488. void
  4489. il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4490. struct ieee80211_bss_conf *bss_conf, u32 changes)
  4491. {
  4492. struct il_priv *il = hw->priv;
  4493. int ret;
  4494. mutex_lock(&il->mutex);
  4495. D_MAC80211("enter: changes 0x%x\n", changes);
  4496. if (!il_is_alive(il)) {
  4497. D_MAC80211("leave - not alive\n");
  4498. mutex_unlock(&il->mutex);
  4499. return;
  4500. }
  4501. if (changes & BSS_CHANGED_QOS) {
  4502. unsigned long flags;
  4503. spin_lock_irqsave(&il->lock, flags);
  4504. il->qos_data.qos_active = bss_conf->qos;
  4505. il_update_qos(il);
  4506. spin_unlock_irqrestore(&il->lock, flags);
  4507. }
  4508. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4509. /* FIXME: can we remove beacon_enabled ? */
  4510. if (vif->bss_conf.enable_beacon)
  4511. il->beacon_enabled = true;
  4512. else
  4513. il->beacon_enabled = false;
  4514. }
  4515. if (changes & BSS_CHANGED_BSSID) {
  4516. D_MAC80211("BSSID %pM\n", bss_conf->bssid);
  4517. /*
  4518. * On passive channel we wait with blocked queues to see if
  4519. * there is traffic on that channel. If no frame will be
  4520. * received (what is very unlikely since scan detects AP on
  4521. * that channel, but theoretically possible), mac80211 associate
  4522. * procedure will time out and mac80211 will call us with NULL
  4523. * bssid. We have to unblock queues on such condition.
  4524. */
  4525. if (is_zero_ether_addr(bss_conf->bssid))
  4526. il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE);
  4527. /*
  4528. * If there is currently a HW scan going on in the background,
  4529. * then we need to cancel it, otherwise sometimes we are not
  4530. * able to authenticate (FIXME: why ?)
  4531. */
  4532. if (il_scan_cancel_timeout(il, 100)) {
  4533. D_MAC80211("leave - scan abort failed\n");
  4534. mutex_unlock(&il->mutex);
  4535. return;
  4536. }
  4537. /* mac80211 only sets assoc when in STATION mode */
  4538. memcpy(il->staging.bssid_addr, bss_conf->bssid, ETH_ALEN);
  4539. /* FIXME: currently needed in a few places */
  4540. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4541. }
  4542. /*
  4543. * This needs to be after setting the BSSID in case
  4544. * mac80211 decides to do both changes at once because
  4545. * it will invoke post_associate.
  4546. */
  4547. if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
  4548. il_beacon_update(hw, vif);
  4549. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4550. D_MAC80211("ERP_PREAMBLE %d\n", bss_conf->use_short_preamble);
  4551. if (bss_conf->use_short_preamble)
  4552. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4553. else
  4554. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4555. }
  4556. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4557. D_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  4558. if (bss_conf->use_cts_prot && il->band != NL80211_BAND_5GHZ)
  4559. il->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4560. else
  4561. il->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4562. if (bss_conf->use_cts_prot)
  4563. il->staging.flags |= RXON_FLG_SELF_CTS_EN;
  4564. else
  4565. il->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
  4566. }
  4567. if (changes & BSS_CHANGED_BASIC_RATES) {
  4568. /* XXX use this information
  4569. *
  4570. * To do that, remove code from il_set_rate() and put something
  4571. * like this here:
  4572. *
  4573. if (A-band)
  4574. il->staging.ofdm_basic_rates =
  4575. bss_conf->basic_rates;
  4576. else
  4577. il->staging.ofdm_basic_rates =
  4578. bss_conf->basic_rates >> 4;
  4579. il->staging.cck_basic_rates =
  4580. bss_conf->basic_rates & 0xF;
  4581. */
  4582. }
  4583. if (changes & BSS_CHANGED_HT) {
  4584. il_ht_conf(il, vif);
  4585. if (il->ops->set_rxon_chain)
  4586. il->ops->set_rxon_chain(il);
  4587. }
  4588. if (changes & BSS_CHANGED_ASSOC) {
  4589. D_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4590. if (bss_conf->assoc) {
  4591. il->timestamp = bss_conf->sync_tsf;
  4592. if (!il_is_rfkill(il))
  4593. il->ops->post_associate(il);
  4594. } else
  4595. il_set_no_assoc(il, vif);
  4596. }
  4597. if (changes && il_is_associated(il) && bss_conf->aid) {
  4598. D_MAC80211("Changes (%#x) while associated\n", changes);
  4599. ret = il_send_rxon_assoc(il);
  4600. if (!ret) {
  4601. /* Sync active_rxon with latest change. */
  4602. memcpy((void *)&il->active, &il->staging,
  4603. sizeof(struct il_rxon_cmd));
  4604. }
  4605. }
  4606. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4607. if (vif->bss_conf.enable_beacon) {
  4608. memcpy(il->staging.bssid_addr, bss_conf->bssid,
  4609. ETH_ALEN);
  4610. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4611. il->ops->config_ap(il);
  4612. } else
  4613. il_set_no_assoc(il, vif);
  4614. }
  4615. if (changes & BSS_CHANGED_IBSS) {
  4616. ret = il->ops->manage_ibss_station(il, vif,
  4617. bss_conf->ibss_joined);
  4618. if (ret)
  4619. IL_ERR("failed to %s IBSS station %pM\n",
  4620. bss_conf->ibss_joined ? "add" : "remove",
  4621. bss_conf->bssid);
  4622. }
  4623. D_MAC80211("leave\n");
  4624. mutex_unlock(&il->mutex);
  4625. }
  4626. EXPORT_SYMBOL(il_mac_bss_info_changed);
  4627. irqreturn_t
  4628. il_isr(int irq, void *data)
  4629. {
  4630. struct il_priv *il = data;
  4631. u32 inta, inta_mask;
  4632. u32 inta_fh;
  4633. unsigned long flags;
  4634. if (!il)
  4635. return IRQ_NONE;
  4636. spin_lock_irqsave(&il->lock, flags);
  4637. /* Disable (but don't clear!) interrupts here to avoid
  4638. * back-to-back ISRs and sporadic interrupts from our NIC.
  4639. * If we have something to service, the tasklet will re-enable ints.
  4640. * If we *don't* have something, we'll re-enable before leaving here. */
  4641. inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
  4642. _il_wr(il, CSR_INT_MASK, 0x00000000);
  4643. /* Discover which interrupts are active/pending */
  4644. inta = _il_rd(il, CSR_INT);
  4645. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  4646. /* Ignore interrupt if there's nothing in NIC to service.
  4647. * This may be due to IRQ shared with another device,
  4648. * or due to sporadic interrupts thrown from our NIC. */
  4649. if (!inta && !inta_fh) {
  4650. D_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4651. goto none;
  4652. }
  4653. if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
  4654. /* Hardware disappeared. It might have already raised
  4655. * an interrupt */
  4656. IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
  4657. goto unplugged;
  4658. }
  4659. D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, inta_mask,
  4660. inta_fh);
  4661. inta &= ~CSR_INT_BIT_SCD;
  4662. /* il_irq_tasklet() will service interrupts and re-enable them */
  4663. if (likely(inta || inta_fh))
  4664. tasklet_schedule(&il->irq_tasklet);
  4665. unplugged:
  4666. spin_unlock_irqrestore(&il->lock, flags);
  4667. return IRQ_HANDLED;
  4668. none:
  4669. /* re-enable interrupts here since we don't have anything to service. */
  4670. /* only Re-enable if disabled by irq */
  4671. if (test_bit(S_INT_ENABLED, &il->status))
  4672. il_enable_interrupts(il);
  4673. spin_unlock_irqrestore(&il->lock, flags);
  4674. return IRQ_NONE;
  4675. }
  4676. EXPORT_SYMBOL(il_isr);
  4677. /*
  4678. * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  4679. * function.
  4680. */
  4681. void
  4682. il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
  4683. __le16 fc, __le32 *tx_flags)
  4684. {
  4685. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  4686. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  4687. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  4688. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4689. if (!ieee80211_is_mgmt(fc))
  4690. return;
  4691. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4692. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4693. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4694. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4695. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4696. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4697. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4698. break;
  4699. }
  4700. } else if (info->control.rates[0].
  4701. flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  4702. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4703. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4704. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4705. }
  4706. }
  4707. EXPORT_SYMBOL(il_tx_cmd_protection);