smp.c 17 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/cache.h>
  17. #include <linux/profile.h>
  18. #include <linux/errno.h>
  19. #include <linux/mm.h>
  20. #include <linux/err.h>
  21. #include <linux/cpu.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/irq.h>
  24. #include <linux/nmi.h>
  25. #include <linux/percpu.h>
  26. #include <linux/clockchips.h>
  27. #include <linux/completion.h>
  28. #include <linux/cpufreq.h>
  29. #include <linux/irq_work.h>
  30. #include <linux/atomic.h>
  31. #include <asm/smp.h>
  32. #include <asm/cacheflush.h>
  33. #include <asm/cpu.h>
  34. #include <asm/cputype.h>
  35. #include <asm/exception.h>
  36. #include <asm/idmap.h>
  37. #include <asm/topology.h>
  38. #include <asm/mmu_context.h>
  39. #include <asm/pgtable.h>
  40. #include <asm/pgalloc.h>
  41. #include <asm/processor.h>
  42. #include <asm/sections.h>
  43. #include <asm/tlbflush.h>
  44. #include <asm/ptrace.h>
  45. #include <asm/smp_plat.h>
  46. #include <asm/virt.h>
  47. #include <asm/mach/arch.h>
  48. #include <asm/mpu.h>
  49. #define CREATE_TRACE_POINTS
  50. #include <trace/events/ipi.h>
  51. /*
  52. * as from 2.5, kernels no longer have an init_tasks structure
  53. * so we need some other way of telling a new secondary core
  54. * where to place its SVC stack
  55. */
  56. struct secondary_data secondary_data;
  57. /*
  58. * control for which core is the next to come out of the secondary
  59. * boot "holding pen"
  60. */
  61. volatile int pen_release = -1;
  62. enum ipi_msg_type {
  63. IPI_WAKEUP,
  64. IPI_TIMER,
  65. IPI_RESCHEDULE,
  66. IPI_CALL_FUNC,
  67. IPI_CALL_FUNC_SINGLE,
  68. IPI_CPU_STOP,
  69. IPI_IRQ_WORK,
  70. IPI_COMPLETION,
  71. IPI_CPU_BACKTRACE = 15,
  72. };
  73. static DECLARE_COMPLETION(cpu_running);
  74. static struct smp_operations smp_ops;
  75. void __init smp_set_ops(const struct smp_operations *ops)
  76. {
  77. if (ops)
  78. smp_ops = *ops;
  79. };
  80. static unsigned long get_arch_pgd(pgd_t *pgd)
  81. {
  82. #ifdef CONFIG_ARM_LPAE
  83. return __phys_to_pfn(virt_to_phys(pgd));
  84. #else
  85. return virt_to_phys(pgd);
  86. #endif
  87. }
  88. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  89. {
  90. int ret;
  91. if (!smp_ops.smp_boot_secondary)
  92. return -ENOSYS;
  93. /*
  94. * We need to tell the secondary core where to find
  95. * its stack and the page tables.
  96. */
  97. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  98. #ifdef CONFIG_ARM_MPU
  99. secondary_data.mpu_rgn_szr = mpu_rgn_info.rgns[MPU_RAM_REGION].drsr;
  100. #endif
  101. #ifdef CONFIG_MMU
  102. secondary_data.pgdir = virt_to_phys(idmap_pgd);
  103. secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
  104. #endif
  105. sync_cache_w(&secondary_data);
  106. /*
  107. * Now bring the CPU into our world.
  108. */
  109. ret = smp_ops.smp_boot_secondary(cpu, idle);
  110. if (ret == 0) {
  111. /*
  112. * CPU was successfully started, wait for it
  113. * to come online or time out.
  114. */
  115. wait_for_completion_timeout(&cpu_running,
  116. msecs_to_jiffies(1000));
  117. if (!cpu_online(cpu)) {
  118. pr_crit("CPU%u: failed to come online\n", cpu);
  119. ret = -EIO;
  120. }
  121. } else {
  122. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  123. }
  124. memset(&secondary_data, 0, sizeof(secondary_data));
  125. return ret;
  126. }
  127. /* platform specific SMP operations */
  128. void __init smp_init_cpus(void)
  129. {
  130. if (smp_ops.smp_init_cpus)
  131. smp_ops.smp_init_cpus();
  132. }
  133. int platform_can_secondary_boot(void)
  134. {
  135. return !!smp_ops.smp_boot_secondary;
  136. }
  137. int platform_can_cpu_hotplug(void)
  138. {
  139. #ifdef CONFIG_HOTPLUG_CPU
  140. if (smp_ops.cpu_kill)
  141. return 1;
  142. #endif
  143. return 0;
  144. }
  145. #ifdef CONFIG_HOTPLUG_CPU
  146. static int platform_cpu_kill(unsigned int cpu)
  147. {
  148. if (smp_ops.cpu_kill)
  149. return smp_ops.cpu_kill(cpu);
  150. return 1;
  151. }
  152. static int platform_cpu_disable(unsigned int cpu)
  153. {
  154. if (smp_ops.cpu_disable)
  155. return smp_ops.cpu_disable(cpu);
  156. return 0;
  157. }
  158. int platform_can_hotplug_cpu(unsigned int cpu)
  159. {
  160. /* cpu_die must be specified to support hotplug */
  161. if (!smp_ops.cpu_die)
  162. return 0;
  163. if (smp_ops.cpu_can_disable)
  164. return smp_ops.cpu_can_disable(cpu);
  165. /*
  166. * By default, allow disabling all CPUs except the first one,
  167. * since this is special on a lot of platforms, e.g. because
  168. * of clock tick interrupts.
  169. */
  170. return cpu != 0;
  171. }
  172. /*
  173. * __cpu_disable runs on the processor to be shutdown.
  174. */
  175. int __cpu_disable(void)
  176. {
  177. unsigned int cpu = smp_processor_id();
  178. int ret;
  179. ret = platform_cpu_disable(cpu);
  180. if (ret)
  181. return ret;
  182. /*
  183. * Take this CPU offline. Once we clear this, we can't return,
  184. * and we must not schedule until we're ready to give up the cpu.
  185. */
  186. set_cpu_online(cpu, false);
  187. /*
  188. * OK - migrate IRQs away from this CPU
  189. */
  190. migrate_irqs();
  191. /*
  192. * Flush user cache and TLB mappings, and then remove this CPU
  193. * from the vm mask set of all processes.
  194. *
  195. * Caches are flushed to the Level of Unification Inner Shareable
  196. * to write-back dirty lines to unified caches shared by all CPUs.
  197. */
  198. flush_cache_louis();
  199. local_flush_tlb_all();
  200. clear_tasks_mm_cpumask(cpu);
  201. return 0;
  202. }
  203. static DECLARE_COMPLETION(cpu_died);
  204. /*
  205. * called on the thread which is asking for a CPU to be shutdown -
  206. * waits until shutdown has completed, or it is timed out.
  207. */
  208. void __cpu_die(unsigned int cpu)
  209. {
  210. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  211. pr_err("CPU%u: cpu didn't die\n", cpu);
  212. return;
  213. }
  214. pr_notice("CPU%u: shutdown\n", cpu);
  215. /*
  216. * platform_cpu_kill() is generally expected to do the powering off
  217. * and/or cutting of clocks to the dying CPU. Optionally, this may
  218. * be done by the CPU which is dying in preference to supporting
  219. * this call, but that means there is _no_ synchronisation between
  220. * the requesting CPU and the dying CPU actually losing power.
  221. */
  222. if (!platform_cpu_kill(cpu))
  223. pr_err("CPU%u: unable to kill\n", cpu);
  224. }
  225. /*
  226. * Called from the idle thread for the CPU which has been shutdown.
  227. *
  228. * Note that we disable IRQs here, but do not re-enable them
  229. * before returning to the caller. This is also the behaviour
  230. * of the other hotplug-cpu capable cores, so presumably coming
  231. * out of idle fixes this.
  232. */
  233. void arch_cpu_idle_dead(void)
  234. {
  235. unsigned int cpu = smp_processor_id();
  236. idle_task_exit();
  237. local_irq_disable();
  238. /*
  239. * Flush the data out of the L1 cache for this CPU. This must be
  240. * before the completion to ensure that data is safely written out
  241. * before platform_cpu_kill() gets called - which may disable
  242. * *this* CPU and power down its cache.
  243. */
  244. flush_cache_louis();
  245. /*
  246. * Tell __cpu_die() that this CPU is now safe to dispose of. Once
  247. * this returns, power and/or clocks can be removed at any point
  248. * from this CPU and its cache by platform_cpu_kill().
  249. */
  250. complete(&cpu_died);
  251. /*
  252. * Ensure that the cache lines associated with that completion are
  253. * written out. This covers the case where _this_ CPU is doing the
  254. * powering down, to ensure that the completion is visible to the
  255. * CPU waiting for this one.
  256. */
  257. flush_cache_louis();
  258. /*
  259. * The actual CPU shutdown procedure is at least platform (if not
  260. * CPU) specific. This may remove power, or it may simply spin.
  261. *
  262. * Platforms are generally expected *NOT* to return from this call,
  263. * although there are some which do because they have no way to
  264. * power down the CPU. These platforms are the _only_ reason we
  265. * have a return path which uses the fragment of assembly below.
  266. *
  267. * The return path should not be used for platforms which can
  268. * power off the CPU.
  269. */
  270. if (smp_ops.cpu_die)
  271. smp_ops.cpu_die(cpu);
  272. pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
  273. cpu);
  274. /*
  275. * Do not return to the idle loop - jump back to the secondary
  276. * cpu initialisation. There's some initialisation which needs
  277. * to be repeated to undo the effects of taking the CPU offline.
  278. */
  279. __asm__("mov sp, %0\n"
  280. " mov fp, #0\n"
  281. " b secondary_start_kernel"
  282. :
  283. : "r" (task_stack_page(current) + THREAD_SIZE - 8));
  284. }
  285. #endif /* CONFIG_HOTPLUG_CPU */
  286. /*
  287. * Called by both boot and secondaries to move global data into
  288. * per-processor storage.
  289. */
  290. static void smp_store_cpu_info(unsigned int cpuid)
  291. {
  292. struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
  293. cpu_info->loops_per_jiffy = loops_per_jiffy;
  294. cpu_info->cpuid = read_cpuid_id();
  295. store_cpu_topology(cpuid);
  296. }
  297. /*
  298. * This is the secondary CPU boot entry. We're using this CPUs
  299. * idle thread stack, but a set of temporary page tables.
  300. */
  301. asmlinkage void secondary_start_kernel(void)
  302. {
  303. struct mm_struct *mm = &init_mm;
  304. unsigned int cpu;
  305. /*
  306. * The identity mapping is uncached (strongly ordered), so
  307. * switch away from it before attempting any exclusive accesses.
  308. */
  309. cpu_switch_mm(mm->pgd, mm);
  310. local_flush_bp_all();
  311. enter_lazy_tlb(mm, current);
  312. local_flush_tlb_all();
  313. /*
  314. * All kernel threads share the same mm context; grab a
  315. * reference and switch to it.
  316. */
  317. cpu = smp_processor_id();
  318. atomic_inc(&mm->mm_count);
  319. current->active_mm = mm;
  320. cpumask_set_cpu(cpu, mm_cpumask(mm));
  321. cpu_init();
  322. pr_debug("CPU%u: Booted secondary processor\n", cpu);
  323. preempt_disable();
  324. trace_hardirqs_off();
  325. /*
  326. * Give the platform a chance to do its own initialisation.
  327. */
  328. if (smp_ops.smp_secondary_init)
  329. smp_ops.smp_secondary_init(cpu);
  330. notify_cpu_starting(cpu);
  331. calibrate_delay();
  332. smp_store_cpu_info(cpu);
  333. /*
  334. * OK, now it's safe to let the boot CPU continue. Wait for
  335. * the CPU migration code to notice that the CPU is online
  336. * before we continue - which happens after __cpu_up returns.
  337. */
  338. set_cpu_online(cpu, true);
  339. complete(&cpu_running);
  340. local_irq_enable();
  341. local_fiq_enable();
  342. local_abt_enable();
  343. /*
  344. * OK, it's off to the idle thread for us
  345. */
  346. cpu_startup_entry(CPUHP_ONLINE);
  347. }
  348. void __init smp_cpus_done(unsigned int max_cpus)
  349. {
  350. int cpu;
  351. unsigned long bogosum = 0;
  352. for_each_online_cpu(cpu)
  353. bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
  354. printk(KERN_INFO "SMP: Total of %d processors activated "
  355. "(%lu.%02lu BogoMIPS).\n",
  356. num_online_cpus(),
  357. bogosum / (500000/HZ),
  358. (bogosum / (5000/HZ)) % 100);
  359. hyp_mode_check();
  360. }
  361. void __init smp_prepare_boot_cpu(void)
  362. {
  363. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  364. }
  365. void __init smp_prepare_cpus(unsigned int max_cpus)
  366. {
  367. unsigned int ncores = num_possible_cpus();
  368. init_cpu_topology();
  369. smp_store_cpu_info(smp_processor_id());
  370. /*
  371. * are we trying to boot more cores than exist?
  372. */
  373. if (max_cpus > ncores)
  374. max_cpus = ncores;
  375. if (ncores > 1 && max_cpus) {
  376. /*
  377. * Initialise the present map, which describes the set of CPUs
  378. * actually populated at the present time. A platform should
  379. * re-initialize the map in the platforms smp_prepare_cpus()
  380. * if present != possible (e.g. physical hotplug).
  381. */
  382. init_cpu_present(cpu_possible_mask);
  383. /*
  384. * Initialise the SCU if there are more than one CPU
  385. * and let them know where to start.
  386. */
  387. if (smp_ops.smp_prepare_cpus)
  388. smp_ops.smp_prepare_cpus(max_cpus);
  389. }
  390. }
  391. static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
  392. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  393. {
  394. if (!__smp_cross_call)
  395. __smp_cross_call = fn;
  396. }
  397. static const char *ipi_types[NR_IPI] __tracepoint_string = {
  398. #define S(x,s) [x] = s
  399. S(IPI_WAKEUP, "CPU wakeup interrupts"),
  400. S(IPI_TIMER, "Timer broadcast interrupts"),
  401. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  402. S(IPI_CALL_FUNC, "Function call interrupts"),
  403. S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
  404. S(IPI_CPU_STOP, "CPU stop interrupts"),
  405. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  406. S(IPI_COMPLETION, "completion interrupts"),
  407. };
  408. static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
  409. {
  410. trace_ipi_raise(target, ipi_types[ipinr]);
  411. __smp_cross_call(target, ipinr);
  412. }
  413. void show_ipi_list(struct seq_file *p, int prec)
  414. {
  415. unsigned int cpu, i;
  416. for (i = 0; i < NR_IPI; i++) {
  417. seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
  418. for_each_online_cpu(cpu)
  419. seq_printf(p, "%10u ",
  420. __get_irq_stat(cpu, ipi_irqs[i]));
  421. seq_printf(p, " %s\n", ipi_types[i]);
  422. }
  423. }
  424. u64 smp_irq_stat_cpu(unsigned int cpu)
  425. {
  426. u64 sum = 0;
  427. int i;
  428. for (i = 0; i < NR_IPI; i++)
  429. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  430. return sum;
  431. }
  432. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  433. {
  434. smp_cross_call(mask, IPI_CALL_FUNC);
  435. }
  436. void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
  437. {
  438. smp_cross_call(mask, IPI_WAKEUP);
  439. }
  440. void arch_send_call_function_single_ipi(int cpu)
  441. {
  442. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
  443. }
  444. #ifdef CONFIG_IRQ_WORK
  445. void arch_irq_work_raise(void)
  446. {
  447. if (arch_irq_work_has_interrupt())
  448. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  449. }
  450. #endif
  451. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  452. void tick_broadcast(const struct cpumask *mask)
  453. {
  454. smp_cross_call(mask, IPI_TIMER);
  455. }
  456. #endif
  457. static DEFINE_RAW_SPINLOCK(stop_lock);
  458. /*
  459. * ipi_cpu_stop - handle IPI from smp_send_stop()
  460. */
  461. static void ipi_cpu_stop(unsigned int cpu)
  462. {
  463. if (system_state == SYSTEM_BOOTING ||
  464. system_state == SYSTEM_RUNNING) {
  465. raw_spin_lock(&stop_lock);
  466. pr_crit("CPU%u: stopping\n", cpu);
  467. dump_stack();
  468. raw_spin_unlock(&stop_lock);
  469. }
  470. set_cpu_online(cpu, false);
  471. local_fiq_disable();
  472. local_irq_disable();
  473. while (1)
  474. cpu_relax();
  475. }
  476. static DEFINE_PER_CPU(struct completion *, cpu_completion);
  477. int register_ipi_completion(struct completion *completion, int cpu)
  478. {
  479. per_cpu(cpu_completion, cpu) = completion;
  480. return IPI_COMPLETION;
  481. }
  482. static void ipi_complete(unsigned int cpu)
  483. {
  484. complete(per_cpu(cpu_completion, cpu));
  485. }
  486. /*
  487. * Main handler for inter-processor interrupts
  488. */
  489. asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
  490. {
  491. handle_IPI(ipinr, regs);
  492. }
  493. void handle_IPI(int ipinr, struct pt_regs *regs)
  494. {
  495. unsigned int cpu = smp_processor_id();
  496. struct pt_regs *old_regs = set_irq_regs(regs);
  497. if ((unsigned)ipinr < NR_IPI) {
  498. trace_ipi_entry_rcuidle(ipi_types[ipinr]);
  499. __inc_irq_stat(cpu, ipi_irqs[ipinr]);
  500. }
  501. switch (ipinr) {
  502. case IPI_WAKEUP:
  503. break;
  504. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  505. case IPI_TIMER:
  506. irq_enter();
  507. tick_receive_broadcast();
  508. irq_exit();
  509. break;
  510. #endif
  511. case IPI_RESCHEDULE:
  512. scheduler_ipi();
  513. break;
  514. case IPI_CALL_FUNC:
  515. irq_enter();
  516. generic_smp_call_function_interrupt();
  517. irq_exit();
  518. break;
  519. case IPI_CALL_FUNC_SINGLE:
  520. irq_enter();
  521. generic_smp_call_function_single_interrupt();
  522. irq_exit();
  523. break;
  524. case IPI_CPU_STOP:
  525. irq_enter();
  526. ipi_cpu_stop(cpu);
  527. irq_exit();
  528. break;
  529. #ifdef CONFIG_IRQ_WORK
  530. case IPI_IRQ_WORK:
  531. irq_enter();
  532. irq_work_run();
  533. irq_exit();
  534. break;
  535. #endif
  536. case IPI_COMPLETION:
  537. irq_enter();
  538. ipi_complete(cpu);
  539. irq_exit();
  540. break;
  541. case IPI_CPU_BACKTRACE:
  542. irq_enter();
  543. nmi_cpu_backtrace(regs);
  544. irq_exit();
  545. break;
  546. default:
  547. pr_crit("CPU%u: Unknown IPI message 0x%x\n",
  548. cpu, ipinr);
  549. break;
  550. }
  551. if ((unsigned)ipinr < NR_IPI)
  552. trace_ipi_exit_rcuidle(ipi_types[ipinr]);
  553. set_irq_regs(old_regs);
  554. }
  555. void smp_send_reschedule(int cpu)
  556. {
  557. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  558. }
  559. void smp_send_stop(void)
  560. {
  561. unsigned long timeout;
  562. struct cpumask mask;
  563. cpumask_copy(&mask, cpu_online_mask);
  564. cpumask_clear_cpu(smp_processor_id(), &mask);
  565. if (!cpumask_empty(&mask))
  566. smp_cross_call(&mask, IPI_CPU_STOP);
  567. /* Wait up to one second for other CPUs to stop */
  568. timeout = USEC_PER_SEC;
  569. while (num_online_cpus() > 1 && timeout--)
  570. udelay(1);
  571. if (num_online_cpus() > 1)
  572. pr_warn("SMP: failed to stop secondary CPUs\n");
  573. }
  574. /*
  575. * not supported here
  576. */
  577. int setup_profiling_timer(unsigned int multiplier)
  578. {
  579. return -EINVAL;
  580. }
  581. #ifdef CONFIG_CPU_FREQ
  582. static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
  583. static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
  584. static unsigned long global_l_p_j_ref;
  585. static unsigned long global_l_p_j_ref_freq;
  586. static int cpufreq_callback(struct notifier_block *nb,
  587. unsigned long val, void *data)
  588. {
  589. struct cpufreq_freqs *freq = data;
  590. int cpu = freq->cpu;
  591. if (freq->flags & CPUFREQ_CONST_LOOPS)
  592. return NOTIFY_OK;
  593. if (!per_cpu(l_p_j_ref, cpu)) {
  594. per_cpu(l_p_j_ref, cpu) =
  595. per_cpu(cpu_data, cpu).loops_per_jiffy;
  596. per_cpu(l_p_j_ref_freq, cpu) = freq->old;
  597. if (!global_l_p_j_ref) {
  598. global_l_p_j_ref = loops_per_jiffy;
  599. global_l_p_j_ref_freq = freq->old;
  600. }
  601. }
  602. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  603. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
  604. loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
  605. global_l_p_j_ref_freq,
  606. freq->new);
  607. per_cpu(cpu_data, cpu).loops_per_jiffy =
  608. cpufreq_scale(per_cpu(l_p_j_ref, cpu),
  609. per_cpu(l_p_j_ref_freq, cpu),
  610. freq->new);
  611. }
  612. return NOTIFY_OK;
  613. }
  614. static struct notifier_block cpufreq_notifier = {
  615. .notifier_call = cpufreq_callback,
  616. };
  617. static int __init register_cpufreq_notifier(void)
  618. {
  619. return cpufreq_register_notifier(&cpufreq_notifier,
  620. CPUFREQ_TRANSITION_NOTIFIER);
  621. }
  622. core_initcall(register_cpufreq_notifier);
  623. #endif
  624. static void raise_nmi(cpumask_t *mask)
  625. {
  626. /*
  627. * Generate the backtrace directly if we are running in a calling
  628. * context that is not preemptible by the backtrace IPI. Note
  629. * that nmi_cpu_backtrace() automatically removes the current cpu
  630. * from mask.
  631. */
  632. if (cpumask_test_cpu(smp_processor_id(), mask) && irqs_disabled())
  633. nmi_cpu_backtrace(NULL);
  634. smp_cross_call(mask, IPI_CPU_BACKTRACE);
  635. }
  636. void arch_trigger_all_cpu_backtrace(bool include_self)
  637. {
  638. nmi_trigger_all_cpu_backtrace(include_self, raise_nmi);
  639. }