pci.h 3.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef __ALPHA_PCI_H
  3. #define __ALPHA_PCI_H
  4. #ifdef __KERNEL__
  5. #include <linux/spinlock.h>
  6. #include <linux/dma-mapping.h>
  7. #include <linux/scatterlist.h>
  8. #include <asm/machvec.h>
  9. /*
  10. * The following structure is used to manage multiple PCI busses.
  11. */
  12. struct pci_dev;
  13. struct pci_bus;
  14. struct resource;
  15. struct pci_iommu_arena;
  16. struct page;
  17. /* A controller. Used to manage multiple PCI busses. */
  18. struct pci_controller {
  19. struct pci_controller *next;
  20. struct pci_bus *bus;
  21. struct resource *io_space;
  22. struct resource *mem_space;
  23. /* The following are for reporting to userland. The invariant is
  24. that if we report a BWX-capable dense memory, we do not report
  25. a sparse memory at all, even if it exists. */
  26. unsigned long sparse_mem_base;
  27. unsigned long dense_mem_base;
  28. unsigned long sparse_io_base;
  29. unsigned long dense_io_base;
  30. /* This one's for the kernel only. It's in KSEG somewhere. */
  31. unsigned long config_space_base;
  32. unsigned int index;
  33. /* For compatibility with current (as of July 2003) pciutils
  34. and XFree86. Eventually will be removed. */
  35. unsigned int need_domain_info;
  36. struct pci_iommu_arena *sg_pci;
  37. struct pci_iommu_arena *sg_isa;
  38. void *sysdata;
  39. };
  40. /* Override the logic in pci_scan_bus for skipping already-configured
  41. bus numbers. */
  42. #define pcibios_assign_all_busses() 1
  43. #define PCIBIOS_MIN_IO alpha_mv.min_io_address
  44. #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
  45. extern void pcibios_set_master(struct pci_dev *dev);
  46. /* IOMMU controls. */
  47. /* The PCI address space does not equal the physical memory address space.
  48. The networking and block device layers use this boolean for bounce buffer
  49. decisions. */
  50. #define PCI_DMA_BUS_IS_PHYS 0
  51. /* TODO: integrate with include/asm-generic/pci.h ? */
  52. static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
  53. {
  54. return channel ? 15 : 14;
  55. }
  56. #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
  57. static inline int pci_proc_domain(struct pci_bus *bus)
  58. {
  59. struct pci_controller *hose = bus->sysdata;
  60. return hose->need_domain_info;
  61. }
  62. #endif /* __KERNEL__ */
  63. /* Values for the `which' argument to sys_pciconfig_iobase. */
  64. #define IOBASE_HOSE 0
  65. #define IOBASE_SPARSE_MEM 1
  66. #define IOBASE_DENSE_MEM 2
  67. #define IOBASE_SPARSE_IO 3
  68. #define IOBASE_DENSE_IO 4
  69. #define IOBASE_ROOT_BUS 5
  70. #define IOBASE_FROM_HOSE 0x10000
  71. extern struct pci_dev *isa_bridge;
  72. extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
  73. size_t count);
  74. extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
  75. size_t count);
  76. extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
  77. struct vm_area_struct *vma,
  78. enum pci_mmap_state mmap_state);
  79. extern void pci_adjust_legacy_attr(struct pci_bus *bus,
  80. enum pci_mmap_state mmap_type);
  81. #define HAVE_PCI_LEGACY 1
  82. extern int pci_create_resource_files(struct pci_dev *dev);
  83. extern void pci_remove_resource_files(struct pci_dev *dev);
  84. #endif /* __ALPHA_PCI_H */